diff --git a/src/main/fragment/cache/fragment-cache-mega45gs02.asm b/src/main/fragment/cache/fragment-cache-mega45gs02.asm index 634d71a51..10127e9da 100644 --- a/src/main/fragment/cache/fragment-cache-mega45gs02.asm +++ b/src/main/fragment/cache/fragment-cache-mega45gs02.asm @@ -1408,3 +1408,1206 @@ sta {z1}+3 NO_SYNTHESIS //FRAGMENT vduz1=vwsc1 NO_SYNTHESIS +//FRAGMENT vbuz1=_deref_pbuc1_plus_1 +lda {c1} +inc +sta {z1} +//FRAGMENT vwuz1=_word_vbuz2 +lda {z2} +sta {z1} +lda #0 +sta {z1}+1 +//FRAGMENT vwuz1=vwuz2_rol_2 +lda {z2} +asl +sta {z1} +lda {z2}+1 +rol +sta {z1}+1 +asl {z1} +rol {z1}+1 +//FRAGMENT vwuz1=vwuz2_plus_vwuz3 +lda {z2} +clc +adc {z3} +sta {z1} +lda {z2}+1 +adc {z3}+1 +sta {z1}+1 +//FRAGMENT vwuz1=vwuz2_rol_4 +lda {z2} +asl +sta {z1} +lda {z2}+1 +rol +sta {z1}+1 +asl {z1} +rol {z1}+1 +asl {z1} +rol {z1}+1 +asl {z1} +rol {z1}+1 +//FRAGMENT pbuz1=pbuc1_plus_vwuz2 +clc +lda {z2} +adc #<{c1} +sta {z1} +lda {z2}+1 +adc #>{c1} +sta {z1}+1 +//FRAGMENT pbuz1=pbuz2 +lda {z2} +sta {z1} +lda {z2}+1 +sta {z1}+1 +//FRAGMENT 0_neq_vbuz1_then_la1 +lda {z1} +cmp #0 +bne {la1} +//FRAGMENT pbuz1_derefidx_vbuz2=vbuz3 +lda {z3} +ldz {z2} +sta ({z1}),z +//FRAGMENT pbuz1_derefidx_vbuz2=vbuc1 +lda #{c1} +ldz {z2} +sta ({z1}),z +//FRAGMENT pbuz1=pbuz1_plus_vbuc1 +lda #{c1} +clc +adc {z1} +sta {z1} +bcc !+ +inc {z1}+1 +!: +//FRAGMENT pvoz1=pvoc1 +lda #<{c1} +sta {z1} +lda #>{c1} +sta {z1}+1 +//FRAGMENT pbuz1=pbuz1_minus_vbuc1 +sec +lda {z1} +sbc #{c1} +sta {z1} +lda {z1}+1 +sbc #0 +sta {z1}+1 +//FRAGMENT pbuz1=pbuz2_plus_vwuc1 +clc +lda {z2} +adc #<{c1} +sta {z1} +lda {z2}+1 +adc #>{c1} +sta {z1}+1 +//FRAGMENT pbuz1_neq_pbuz2_then_la1 +lda {z1}+1 +cmp {z2}+1 +bne {la1} +lda {z1} +cmp {z2} +bne {la1} +//FRAGMENT _deref_pbuz1=_deref_pbuz2 +ldy #0 +lda ({z2}),y +ldy #0 +sta ({z1}),y +//FRAGMENT pbuz1=pbuz2_plus_vbuc1 +lda #{c1} +clc +adc {z2} +sta {z1} +lda #0 +adc {z2}+1 +sta {z1}+1 +//FRAGMENT vbuaa=_deref_pbuc1_plus_1 +lda {c1} +inc +//FRAGMENT vbuxx=_deref_pbuc1_plus_1 +ldx {c1} +inx +//FRAGMENT vbuz1=vbuxx +stx {z1} +//FRAGMENT vwuz1=_word_vbuxx +txa +sta {z1} +lda #0 +sta {z1}+1 +//FRAGMENT vwuz1=_word_vbuyy +tya +sta {z1} +lda #0 +sta {z1}+1 +//FRAGMENT vwuz1=_word_vbuzz +tza +sta {z1} +lda #0 +sta {z1}+1 +//FRAGMENT 0_neq_vbuaa_then_la1 +cmp #0 +bne {la1} +//FRAGMENT vbuz1=vbuaa +sta {z1} +//FRAGMENT pbuz1_derefidx_vbuz2=vbuaa +ldz {z2} +sta ({z1}),z +//FRAGMENT pbuz1_derefidx_vbuz2=vbuxx +txa +ldz {z2} +sta ({z1}),z +//FRAGMENT pbuz1_derefidx_vbuz2=vbuyy +tya +ldz {z2} +sta ({z1}),z +//FRAGMENT pbuz1_derefidx_vbuz2=vbuzz +tza +ldz {z2} +sta ({z1}),z +//FRAGMENT 0_neq_vbuxx_then_la1 +cpx #0 +bne {la1} +//FRAGMENT vbuaa=vbuxx +txa +//FRAGMENT 0_neq_vbuyy_then_la1 +cpy #0 +bne {la1} +//FRAGMENT vbuaa=vbuyy +tya +//FRAGMENT 0_neq_vbuzz_then_la1 +cpz #0 +bne {la1} +//FRAGMENT vbuaa=vbuzz +tza +//FRAGMENT vbuz1=vbuyy +sty {z1} +//FRAGMENT vbuz1=vbuzz +tza +sta {z1} +//FRAGMENT vbuxx=vbuaa +tax +//FRAGMENT vbuyy=_deref_pbuc1_plus_1 +ldy {c1} +iny +//FRAGMENT vbuxx=vbuyy +tya +tax +//FRAGMENT vbuzz=_deref_pbuc1_plus_1 +lda {c1} +inc +taz +//FRAGMENT vbuxx=vbuzz +tza +tax +//FRAGMENT vwuz1=vwuz2_plus_vwuz1 +lda {z1} +clc +adc {z2} +sta {z1} +lda {z1}+1 +adc {z2}+1 +sta {z1}+1 +//FRAGMENT pbuz1=pbuc1_plus_vwuz1 +clc +lda {z1} +adc #<{c1} +sta {z1} +lda {z1}+1 +adc #>{c1} +sta {z1}+1 +//FRAGMENT vwuz1=vwuz1_rol_4 +asw {z1} +asw {z1} +asw {z1} +asw {z1} +//FRAGMENT pwuz1=pbuc1 +lda #<{c1} +sta {z1} +lda #>{c1} +sta {z1}+1 +//FRAGMENT pbuz1=pbuz1_plus_vwuc1 +clc +lda {z1} +adc #<{c1} +sta {z1} +lda {z1}+1 +adc #>{c1} +sta {z1}+1 +//FRAGMENT pbuz1_derefidx_vbuz2=pbuz3_derefidx_vbuz2 +ldy {z2} +lda ({z3}),y +sta ({z1}),y +//FRAGMENT pwuz1=pwuz1_plus_vbuc1 +lda #{c1} +clc +adc {z1} +sta {z1} +bcc !+ +inc {z1}+1 +!: +//FRAGMENT vbuz1=vbuz2_rol_1 +lda {z2} +asl +sta {z1} +//FRAGMENT pwuz1_derefidx_vbuz2=vwuz3 +ldy {z2} +lda {z3} +sta ({z1}),y +iny +lda {z3}+1 +sta ({z1}),y +//FRAGMENT vwuz1=vwuz1_plus_vbuc1 +lda #{c1} +clc +adc {z1} +sta {z1} +bcc !+ +inc {z1}+1 +!: +//FRAGMENT _deref_pwuc1=vwuz1 +lda {z1} +sta {c1} +lda {z1}+1 +sta {c1}+1 +//FRAGMENT _deref_qbuc1=_ptr_vbuz1 +lda {z1} +sta {c1} +lda #0 +sta {c1}+1 +//FRAGMENT _deref_qbuc1=pbuz1 +lda {z1} +sta {c1} +lda {z1}+1 +sta {c1}+1 +//FRAGMENT pbuz1_derefidx_vbuaa=pbuz2_derefidx_vbuaa +tay +lda ({z2}),y +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuxx=pbuz2_derefidx_vbuxx +txa +tay +lda ({z2}),y +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuyy=pbuz2_derefidx_vbuyy +lda ({z2}),y +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuzz=pbuz2_derefidx_vbuzz +tza +tay +lda ({z2}),y +sta ({z1}),y +//FRAGMENT vwuz1=_word_vbuaa +sta {z1} +lda #0 +sta {z1}+1 +//FRAGMENT vbuz1=vbuaa_rol_1 +asl +sta {z1} +//FRAGMENT vbuz1=vbuxx_rol_1 +txa +asl +sta {z1} +//FRAGMENT vbuz1=vbuyy_rol_1 +tya +asl +sta {z1} +//FRAGMENT vbuz1=vbuzz_rol_1 +tza +asl +sta {z1} +//FRAGMENT vbuaa=vbuz1_rol_1 +lda {z1} +asl +//FRAGMENT vbuaa=vbuaa_rol_1 +asl +//FRAGMENT vbuaa=vbuxx_rol_1 +txa +asl +//FRAGMENT vbuaa=vbuyy_rol_1 +tya +asl +//FRAGMENT vbuaa=vbuzz_rol_1 +tza +asl +//FRAGMENT vbuxx=vbuz1_rol_1 +lda {z1} +asl +tax +//FRAGMENT vbuxx=vbuaa_rol_1 +asl +tax +//FRAGMENT vbuxx=vbuxx_rol_1 +txa +asl +tax +//FRAGMENT vbuxx=vbuyy_rol_1 +tya +asl +tax +//FRAGMENT vbuxx=vbuzz_rol_1 +tza +asl +tax +//FRAGMENT vbuyy=vbuz1_rol_1 +lda {z1} +asl +tay +//FRAGMENT vbuyy=vbuaa_rol_1 +asl +tay +//FRAGMENT vbuyy=vbuxx_rol_1 +txa +asl +tay +//FRAGMENT vbuyy=vbuyy_rol_1 +tya +asl +tay +//FRAGMENT vbuyy=vbuzz_rol_1 +tza +asl +tay +//FRAGMENT vbuzz=vbuz1_rol_1 +lda {z1} +asl +taz +//FRAGMENT vbuzz=vbuaa_rol_1 +asl +taz +//FRAGMENT vbuzz=vbuxx_rol_1 +txa +asl +taz +//FRAGMENT vbuzz=vbuyy_rol_1 +tya +asl +taz +//FRAGMENT vbuzz=vbuzz_rol_1 +tza +asl +taz +//FRAGMENT pwuz1_derefidx_vbuaa=vwuz2 +tay +lda {z2} +sta ({z1}),y +iny +lda {z2}+1 +sta ({z1}),y +//FRAGMENT pwuz1_derefidx_vbuxx=vwuz2 +txa +tay +lda {z2} +sta ({z1}),y +iny +lda {z2}+1 +sta ({z1}),y +//FRAGMENT pwuz1_derefidx_vbuyy=vwuz2 +lda {z2} +sta ({z1}),y +iny +lda {z2}+1 +sta ({z1}),y +//FRAGMENT pwuz1_derefidx_vbuzz=vwuz2 +tza +tay +lda {z2} +sta ({z1}),y +iny +lda {z2}+1 +sta ({z1}),y +//FRAGMENT _deref_qbuc1=_ptr_vbuxx +txa +sta {c1} +lda #0 +sta {c1}+1 +//FRAGMENT _deref_qbuc1=_ptr_vbuyy +tya +sta {c1} +lda #0 +sta {c1}+1 +//FRAGMENT _deref_qbuc1=_ptr_vbuzz +tza +sta {c1} +lda #0 +sta {c1}+1 +//FRAGMENT vduz1=vbuc1 +lda #{c1} +sta {z1} +lda #0 +sta {z1}+1 +sta {z1}+2 +sta {z1}+3 +//FRAGMENT vbuz1=vbuc1_plus_vbuz2 +lda #{c1} +clc +adc {z2} +sta {z1} +//FRAGMENT vwuz1=vwuc1_minus_vbuz2 +sec +lda #<{c1} +sbc {z2} +sta {z1} +lda #>{c1} +sbc #0 +sta {z1}+1 +//FRAGMENT vbuz1=vbuz2_ror_5 +lda {z2} +lsr +lsr +lsr +lsr +lsr +sta {z1} +//FRAGMENT vbuz1=vbuc1_rol_vbuz2 +lda #{c1} +ldy {z2} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +sta {z1} +//FRAGMENT vwuz1=vwuz2 +lda {z2} +sta {z1} +lda {z2}+1 +sta {z1}+1 +//FRAGMENT vduz1=vduz2_ror_4 +lda {z2}+3 +lsr +sta {z1}+3 +lda {z2}+2 +ror +sta {z1}+2 +lda {z2}+1 +ror +sta {z1}+1 +lda {z2} +ror +sta {z1} +lsr {z1}+3 +ror {z1}+2 +ror {z1}+1 +ror {z1} +lsr {z1}+3 +ror {z1}+2 +ror {z1}+1 +ror {z1} +lsr {z1}+3 +ror {z1}+2 +ror {z1}+1 +ror {z1} +//FRAGMENT vbuz1=_hi__word_vduz2 +lda {z2}+1 +sta {z1} +//FRAGMENT vwuz1=_lo_vduz2 +lda {z2} +sta {z1} +lda {z2}+1 +sta {z1}+1 +//FRAGMENT vbuz1=vbuc1_plus_vbuaa +clc +adc #{c1} +sta {z1} +//FRAGMENT vbuz1=vbuc1_plus_vbuxx +txa +clc +adc #{c1} +sta {z1} +//FRAGMENT vbuz1=vbuc1_plus_vbuyy +tya +clc +adc #{c1} +sta {z1} +//FRAGMENT vbuz1=vbuc1_plus_vbuzz +tza +clc +adc #{c1} +sta {z1} +//FRAGMENT vbuaa=vbuc1_plus_vbuz1 +lda #{c1} +clc +adc {z1} +//FRAGMENT vbuaa=vbuc1_plus_vbuaa +clc +adc #{c1} +//FRAGMENT vbuaa=vbuc1_plus_vbuxx +txa +clc +adc #{c1} +//FRAGMENT vbuaa=vbuc1_plus_vbuyy +tya +clc +adc #{c1} +//FRAGMENT vbuaa=vbuc1_plus_vbuzz +tza +clc +adc #{c1} +//FRAGMENT vbuxx=vbuc1_plus_vbuz1 +lda #{c1} +clc +adc {z1} +tax +//FRAGMENT vbuxx=vbuc1_plus_vbuaa +clc +adc #{c1} +tax +//FRAGMENT vbuxx=vbuc1_plus_vbuxx +txa +clc +adc #{c1} +tax +//FRAGMENT vbuxx=vbuc1_plus_vbuyy +tya +clc +adc #{c1} +tax +//FRAGMENT vbuxx=vbuc1_plus_vbuzz +tza +clc +adc #{c1} +tax +//FRAGMENT vbuyy=vbuc1_plus_vbuz1 +lda #{c1} +clc +adc {z1} +tay +//FRAGMENT vbuyy=vbuc1_plus_vbuaa +clc +adc #{c1} +tay +//FRAGMENT vbuyy=vbuc1_plus_vbuxx +txa +clc +adc #{c1} +tay +//FRAGMENT vbuyy=vbuc1_plus_vbuyy +tya +clc +adc #{c1} +tay +//FRAGMENT vbuyy=vbuc1_plus_vbuzz +tza +clc +adc #{c1} +tay +//FRAGMENT vbuzz=vbuc1_plus_vbuz1 +lda #{c1} +clc +adc {z1} +taz +//FRAGMENT vbuzz=vbuc1_plus_vbuaa +clc +adc #{c1} +taz +//FRAGMENT vbuzz=vbuc1_plus_vbuxx +txa +clc +adc #{c1} +taz +//FRAGMENT vbuzz=vbuc1_plus_vbuyy +tya +clc +adc #{c1} +taz +//FRAGMENT vbuzz=vbuc1_plus_vbuzz +tza +clc +adc #{c1} +taz +//FRAGMENT vwuz1=vwuc1_minus_vbuaa +tax +stx $ff +lda #<{c1} +sec +sbc $ff +sta {z1} +lda #>{c1} +sbc #00 +sta {z1}+1 +//FRAGMENT vwuz1=vwuc1_minus_vbuxx +stx $ff +lda #<{c1} +sec +sbc $ff +sta {z1} +lda #>{c1} +sbc #00 +sta {z1}+1 +//FRAGMENT vwuz1=vwuc1_minus_vbuyy +tya +tax +stx $ff +lda #<{c1} +sec +sbc $ff +sta {z1} +lda #>{c1} +sbc #00 +sta {z1}+1 +//FRAGMENT vwuz1=vwuc1_minus_vbuzz +tza +tax +stx $ff +lda #<{c1} +sec +sbc $ff +sta {z1} +lda #>{c1} +sbc #00 +sta {z1}+1 +//FRAGMENT vbuz1=vbuxx_ror_5 +txa +lsr +lsr +lsr +lsr +lsr +sta {z1} +//FRAGMENT vbuz1=vbuyy_ror_5 +tya +lsr +lsr +lsr +lsr +lsr +sta {z1} +//FRAGMENT vbuz1=vbuzz_ror_5 +tza +lsr +lsr +lsr +lsr +lsr +sta {z1} +//FRAGMENT vbuaa=vbuz1_ror_5 +lda {z1} +lsr +lsr +lsr +lsr +lsr +//FRAGMENT vbuaa=vbuxx_ror_5 +txa +lsr +lsr +lsr +lsr +lsr +//FRAGMENT vbuaa=vbuyy_ror_5 +tya +lsr +lsr +lsr +lsr +lsr +//FRAGMENT vbuaa=vbuzz_ror_5 +tza +lsr +lsr +lsr +lsr +lsr +//FRAGMENT vbuxx=vbuz1_ror_5 +lda {z1} +lsr +lsr +lsr +lsr +lsr +tax +//FRAGMENT vbuxx=vbuxx_ror_5 +txa +lsr +lsr +lsr +lsr +lsr +tax +//FRAGMENT vbuxx=vbuyy_ror_5 +tya +lsr +lsr +lsr +lsr +lsr +tax +//FRAGMENT vbuxx=vbuzz_ror_5 +tza +lsr +lsr +lsr +lsr +lsr +tax +//FRAGMENT vbuyy=vbuz1_ror_5 +lda {z1} +lsr +lsr +lsr +lsr +lsr +tay +//FRAGMENT vbuyy=vbuxx_ror_5 +txa +lsr +lsr +lsr +lsr +lsr +tay +//FRAGMENT vbuyy=vbuyy_ror_5 +tya +lsr +lsr +lsr +lsr +lsr +tay +//FRAGMENT vbuyy=vbuzz_ror_5 +tza +lsr +lsr +lsr +lsr +lsr +tay +//FRAGMENT vbuzz=vbuz1_ror_5 +lda {z1} +lsr +lsr +lsr +lsr +lsr +taz +//FRAGMENT vbuzz=vbuxx_ror_5 +txa +lsr +lsr +lsr +lsr +lsr +taz +//FRAGMENT vbuzz=vbuyy_ror_5 +tya +lsr +lsr +lsr +lsr +lsr +taz +//FRAGMENT vbuzz=vbuzz_ror_5 +tza +lsr +lsr +lsr +lsr +lsr +taz +//FRAGMENT vbuaa=vbuc1_rol_vbuz1 +lda #{c1} +ldy {z1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +//FRAGMENT vbuxx=vbuc1_rol_vbuz1 +lda #{c1} +ldx {z1} +cpx #0 +beq !e+ +!: +asl +dex +bne !- +!e: +tax +//FRAGMENT vbuyy=vbuc1_rol_vbuz1 +lda #{c1} +ldy {z1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +tay +//FRAGMENT vbuzz=vbuc1_rol_vbuz1 +lda #{c1} +ldy {z1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +taz +//FRAGMENT vbuz1=vbuc1_rol_vbuaa +tay +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +sta {z1} +//FRAGMENT vbuaa=vbuc1_rol_vbuaa +tay +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +//FRAGMENT vbuxx=vbuc1_rol_vbuaa +tax +lda #{c1} +cpx #0 +beq !e+ +!: +asl +dex +bne !- +!e: +tax +//FRAGMENT vbuyy=vbuc1_rol_vbuaa +tay +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +tay +//FRAGMENT vbuzz=vbuc1_rol_vbuaa +tay +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +taz +//FRAGMENT vbuz1=vbuc1_rol_vbuxx +lda #{c1} +cpx #0 +beq !e+ +!: +asl +dex +bne !- +!e: +sta {z1} +//FRAGMENT vbuaa=vbuc1_rol_vbuxx +lda #{c1} +cpx #0 +beq !e+ +!: +asl +dex +bne !- +!e: +//FRAGMENT vbuxx=vbuc1_rol_vbuxx +lda #{c1} +cpx #0 +beq !e+ +!: +asl +dex +bne !- +!e: +tax +//FRAGMENT vbuyy=vbuc1_rol_vbuxx +lda #{c1} +cpx #0 +beq !e+ +!: +asl +dex +bne !- +!e: +tay +//FRAGMENT vbuzz=vbuc1_rol_vbuxx +lda #{c1} +cpx #0 +beq !e+ +!: +asl +dex +bne !- +!e: +taz +//FRAGMENT vbuz1=vbuc1_rol_vbuyy +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +sta {z1} +//FRAGMENT vbuaa=vbuc1_rol_vbuyy +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +//FRAGMENT vbuxx=vbuc1_rol_vbuyy +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +tax +//FRAGMENT vbuyy=vbuc1_rol_vbuyy +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +tay +//FRAGMENT vbuzz=vbuc1_rol_vbuyy +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +taz +//FRAGMENT vbuz1=vbuc1_rol_vbuzz +tza +tay +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +sta {z1} +//FRAGMENT vbuaa=vbuc1_rol_vbuzz +tza +tay +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +//FRAGMENT vbuxx=vbuc1_rol_vbuzz +tza +tax +lda #{c1} +cpx #0 +beq !e+ +!: +asl +dex +bne !- +!e: +tax +//FRAGMENT vbuyy=vbuc1_rol_vbuzz +tza +tay +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +tay +//FRAGMENT vbuzz=vbuc1_rol_vbuzz +tza +tay +lda #{c1} +cpy #0 +beq !e+ +!: +asl +dey +bne !- +!e: +taz +//FRAGMENT vbuaa=_hi__word_vduz1 +lda {z1}+1 +//FRAGMENT vbuxx=_hi__word_vduz1 +ldx {z1}+1 +//FRAGMENT vbuaa=vbuz1_bor_vbuz2 +lda {z1} +ora {z2} +//FRAGMENT vbuxx=vbuz1_bor_vbuz2 +lda {z1} +ora {z2} +tax +//FRAGMENT vbuyy=vbuz1_bor_vbuz2 +lda {z1} +ora {z2} +tay +//FRAGMENT vbuzz=vbuz1_bor_vbuz2 +lda {z1} +ora {z2} +taz +//FRAGMENT vbuaa=vbuxx_bor_vbuz1 +txa +ora {z1} +//FRAGMENT vbuxx=vbuxx_bor_vbuz1 +txa +ora {z1} +tax +//FRAGMENT vbuyy=vbuxx_bor_vbuz1 +txa +ora {z1} +tay +//FRAGMENT vbuzz=vbuxx_bor_vbuz1 +txa +ora {z1} +taz +//FRAGMENT vbuaa=vbuyy_bor_vbuz1 +tya +ora {z1} +//FRAGMENT vbuxx=vbuyy_bor_vbuz1 +tya +ora {z1} +tax +//FRAGMENT vbuyy=vbuyy_bor_vbuz1 +tya +ora {z1} +tay +//FRAGMENT vbuzz=vbuyy_bor_vbuz1 +tya +ora {z1} +taz +//FRAGMENT vbuaa=vbuzz_bor_vbuz1 +tza +ora {z1} +//FRAGMENT vbuxx=vbuzz_bor_vbuz1 +tza +ora {z1} +tax +//FRAGMENT vbuyy=vbuzz_bor_vbuz1 +tza +ora {z1} +tay +//FRAGMENT vbuzz=vbuzz_bor_vbuz1 +tza +ora {z1} +taz +//FRAGMENT vbuxx=vbuxx_bor_vbuaa +stx $ff +ora $ff +tax +//FRAGMENT vbuyy=vbuxx_bor_vbuaa +stx $ff +ora $ff +tay +//FRAGMENT vbuzz=vbuxx_bor_vbuaa +stx $ff +ora $ff +taz +//FRAGMENT vbuxx=vbuyy_bor_vbuaa +sty $ff +ora $ff +tax +//FRAGMENT vbuyy=vbuyy_bor_vbuaa +sty $ff +ora $ff +tay +//FRAGMENT vbuzz=vbuyy_bor_vbuaa +sty $ff +ora $ff +taz +//FRAGMENT vbuxx=vbuzz_bor_vbuaa +tax +tza +stx $ff +ora $ff +tax +//FRAGMENT vbuyy=vbuzz_bor_vbuaa +tay +tza +sty $ff +ora $ff +tay +//FRAGMENT vbuzz=vbuzz_bor_vbuaa +tay +tza +sty $ff +ora $ff +taz +//FRAGMENT vbuaa=vbuz1_bor_vbuxx +txa +ora {z1} +//FRAGMENT vbuxx=vbuz1_bor_vbuxx +txa +ora {z1} +tax +//FRAGMENT vbuyy=vbuz1_bor_vbuxx +txa +ora {z1} +tay +//FRAGMENT vbuzz=vbuz1_bor_vbuxx +txa +ora {z1} +taz +//FRAGMENT vbuyy=_hi__word_vduz1 +ldy {z1}+1 +//FRAGMENT vbuzz=_hi__word_vduz1 +lda {z1}+1 +taz +//FRAGMENT pbuc1_derefidx_vbuyy=vbuaa +sta {c1},y +//FRAGMENT pbuc1_derefidx_vbuzz=vbuaa +tax +tza +tay +txa +sta {c1},y +//FRAGMENT pbuc1_derefidx_vbuyy=vbuxx +txa +sta {c1},y +//FRAGMENT pbuc1_derefidx_vbuzz=vbuxx +tza +tay +txa +sta {c1},y +//FRAGMENT pbuc1_derefidx_vbuzz=vbuyy +tza +tax +tya +sta {c1},x +//FRAGMENT vbuyy=vbuaa +tay +//FRAGMENT vbuzz=vbuaa +taz diff --git a/src/main/fragment/cache/fragment-cache-mos6502x.asm b/src/main/fragment/cache/fragment-cache-mos6502x.asm index 24102e742..319a2a17d 100644 --- a/src/main/fragment/cache/fragment-cache-mos6502x.asm +++ b/src/main/fragment/cache/fragment-cache-mos6502x.asm @@ -19747,3 +19747,235 @@ ror {z1} dex bne !- !e: +//FRAGMENT vbuz1_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuz2)_then_la1 +lda {z1} +ldx {z2} +ldy {c2},x +cmp {c1},y +bcs {la1} +//FRAGMENT vbuz1_lt_pbuc1_derefidx_(pbuc2_derefidx_vbuz2)_then_la1 +lda {z1} +ldx {z2} +ldy {c2},x +cmp {c1},y +bcc {la1} +//FRAGMENT vbuz1=pbuc1_derefidx_(pbuc2_derefidx_vbuz2) +ldx {z2} +ldy {c2},x +ldx {c1},y +stx {z1} +//FRAGMENT _deref_pbuc1_lt_vbuaa_then_la1 +ldy {c1} +sta $ff +cpy $ff +bcc {la1} +//FRAGMENT vbuz1_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuaa)_then_la1 +tax +lda {z1} +ldy {c2},x +cmp {c1},y +bcs {la1} +//FRAGMENT vbuz1_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuxx)_then_la1 +lda {z1} +ldy {c2},x +cmp {c1},y +bcs {la1} +//FRAGMENT vbuz1_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuyy)_then_la1 +lda {z1} +ldx {c2},y +cmp {c1},x +bcs {la1} +//FRAGMENT vbuaa_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuz1)_then_la1 +ldx {z1} +ldy {c2},x +cmp {c1},y +bcs {la1} +//FRAGMENT vbuz1_lt_pbuc1_derefidx_(pbuc2_derefidx_vbuxx)_then_la1 +lda {z1} +ldy {c2},x +cmp {c1},y +bcc {la1} +//FRAGMENT vbuz1_lt_pbuc1_derefidx_(pbuc2_derefidx_vbuyy)_then_la1 +lda {z1} +ldx {c2},y +cmp {c1},x +bcc {la1} +//FRAGMENT vbuxx_lt_pbuc1_derefidx_(pbuc2_derefidx_vbuz1)_then_la1 +ldy {z1} +txa +ldx {c2},y +cmp {c1},x +bcc {la1} +//FRAGMENT vbuxx_lt_pbuc1_derefidx_(pbuc2_derefidx_vbuxx)_then_la1 +txa +ldy {c2},x +cmp {c1},y +bcc {la1} +//FRAGMENT vbuxx_lt_pbuc1_derefidx_(pbuc2_derefidx_vbuyy)_then_la1 +txa +ldx {c2},y +cmp {c1},x +bcc {la1} +//FRAGMENT vbuyy_lt_pbuc1_derefidx_(pbuc2_derefidx_vbuz1)_then_la1 +ldx {z1} +tya +ldy {c2},x +cmp {c1},y +bcc {la1} +//FRAGMENT vbuyy_lt_pbuc1_derefidx_(pbuc2_derefidx_vbuxx)_then_la1 +tya +ldy {c2},x +cmp {c1},y +bcc {la1} +//FRAGMENT vbuyy_lt_pbuc1_derefidx_(pbuc2_derefidx_vbuyy)_then_la1 +tya +ldx {c2},y +cmp {c1},x +bcc {la1} +//FRAGMENT vbuaa=pbuc1_derefidx_(pbuc2_derefidx_vbuz1) +ldx {z1} +ldy {c2},x +lda {c1},y +//FRAGMENT vbuxx=pbuc1_derefidx_(pbuc2_derefidx_vbuz1) +ldx {z1} +ldy {c2},x +ldx {c1},y +//FRAGMENT vbuyy=pbuc1_derefidx_(pbuc2_derefidx_vbuz1) +ldy {z1} +ldx {c2},y +ldy {c1},x +//FRAGMENT vbuxx_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuz1)_then_la1 +ldy {z1} +txa +ldx {c2},y +cmp {c1},x +bcs {la1} +//FRAGMENT vbuxx_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuxx)_then_la1 +txa +ldy {c2},x +cmp {c1},y +bcs {la1} +//FRAGMENT vbuxx_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuyy)_then_la1 +txa +ldx {c2},y +cmp {c1},x +bcs {la1} +//FRAGMENT vbuyy_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuz1)_then_la1 +ldx {z1} +tya +ldy {c2},x +cmp {c1},y +bcs {la1} +//FRAGMENT vbuyy_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuxx)_then_la1 +tya +ldy {c2},x +cmp {c1},y +bcs {la1} +//FRAGMENT vbuyy_ge_pbuc1_derefidx_(pbuc2_derefidx_vbuyy)_then_la1 +tya +ldx {c2},y +cmp {c1},x +bcs {la1} +//FRAGMENT _deref_pbuc1_lt_vbuxx_then_la1 +lda {c1} +stx $ff +cmp $ff +bcc {la1} +//FRAGMENT _deref_pbuc1_lt_vbuyy_then_la1 +ldx {c1} +sty $ff +cpx $ff +bcc {la1} +//FRAGMENT vbsxx=pbsc1_derefidx_vbuyy +ldx {c1},y +//FRAGMENT pbuz1_derefidx_vbuz2=pbuz3_derefidx_vbuz4 +ldy {z4} +lda ({z3}),y +ldy {z2} +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuaa=pbuz2_derefidx_vbuz3 +ldy {z3} +sta $ff +lda ({z2}),y +ldy $ff +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuxx=pbuz2_derefidx_vbuz3 +ldy {z3} +stx $ff +lda ({z2}),y +ldy $ff +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuyy=pbuz2_derefidx_vbuz3 +sty $ff +ldy {z3} +lda ({z2}),y +ldy $ff +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuz2=pbuz3_derefidx_vbuaa +tay +lda ({z3}),y +ldy {z2} +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuxx=pbuz2_derefidx_vbuaa +stx $ff +tay +lda ({z2}),y +ldy $ff +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuyy=pbuz2_derefidx_vbuaa +sty $ff +tay +lda ({z2}),y +ldy $ff +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuz2=pbuz3_derefidx_vbuxx +txa +tay +lda ({z3}),y +ldy {z2} +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuaa=pbuz2_derefidx_vbuxx +sta $ff +txa +tay +lda ({z2}),y +ldy $ff +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuyy=pbuz2_derefidx_vbuxx +sty $ff +txa +tay +lda ({z2}),y +ldy $ff +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuz2=pbuz3_derefidx_vbuyy +lda ({z3}),y +ldy {z2} +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuaa=pbuz2_derefidx_vbuyy +sta $ff +lda ({z2}),y +ldy $ff +sta ({z1}),y +//FRAGMENT pbuz1_derefidx_vbuxx=pbuz2_derefidx_vbuyy +stx $ff +lda ({z2}),y +ldy $ff +sta ({z1}),y +//FRAGMENT vbuz1=_deref_pbuc1_plus_2 +lda {c1} +clc +adc #2 +sta {z1} +//FRAGMENT vbuaa=_deref_pbuc1_plus_2 +lda {c1} +clc +adc #2 +//FRAGMENT vbuxx=_deref_pbuc1_plus_2 +ldx {c1} +inx +inx +//FRAGMENT vbuyy=_deref_pbuc1_plus_2 +ldy {c1} +iny +iny diff --git a/src/test/kc/bitmap-circle-2.c b/src/test/kc/bitmap-circle-2.c index 77c3d304f..0c5c910cb 100644 --- a/src/test/kc/bitmap-circle-2.c +++ b/src/test/kc/bitmap-circle-2.c @@ -11,8 +11,8 @@ void main() { fill(SCREEN,40*25,$16); *BORDER_COLOR = BLUE; - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); for (int i = 1; i < 180; i += 5) { circle(160,100,i); diff --git a/src/test/kc/bitmap-circle.c b/src/test/kc/bitmap-circle.c index 0640115ca..703689c16 100644 --- a/src/test/kc/bitmap-circle.c +++ b/src/test/kc/bitmap-circle.c @@ -15,8 +15,8 @@ void main() { fill(SCREEN,40*25,$16); *BORDER_COLOR = BLUE; - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); circle(100,100,50); diff --git a/src/test/kc/bitmap-line-anim-1.c b/src/test/kc/bitmap-line-anim-1.c index 96d68b4f6..07b41144e 100644 --- a/src/test/kc/bitmap-line-anim-1.c +++ b/src/test/kc/bitmap-line-anim-1.c @@ -12,8 +12,8 @@ byte next=0; void main() { *BORDER_COLOR = 0; *BG_COLOR = 0; - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); bitmap_init(BITMAP); bitmap_clear(); init_screen(); diff --git a/src/test/kc/bitmap-line-anim-2.c b/src/test/kc/bitmap-line-anim-2.c index bc289c55a..ef900d598 100644 --- a/src/test/kc/bitmap-line-anim-2.c +++ b/src/test/kc/bitmap-line-anim-2.c @@ -12,8 +12,8 @@ word next=0; void main() { *BORDER_COLOR = 0; *BG_COLOR = 0; - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); bitmap_init(BITMAP, SCREEN); bitmap_clear(PURPLE, WHITE); do { diff --git a/src/test/kc/bitmap-plot-0.c b/src/test/kc/bitmap-plot-0.c index 4f8a81cac..20edfeff6 100644 --- a/src/test/kc/bitmap-plot-0.c +++ b/src/test/kc/bitmap-plot-0.c @@ -11,7 +11,7 @@ byte plots_per_frame[0x100]; void main() { bitmap_init(BITMAP, SCREEN); bitmap_clear(BLACK, WHITE); - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; *D018 = toD018(SCREEN, BITMAP); init_irq(); word x = 0; @@ -40,7 +40,7 @@ void init_irq() { // Disable CIA 1 Timer IRQ CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $100 - *VIC_CONTROL |=$80; + *VICII_CONTROL |=$80; *RASTER = $00; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/bitmap-plot-1.c b/src/test/kc/bitmap-plot-1.c index dcda625ef..bd74f4a47 100644 --- a/src/test/kc/bitmap-plot-1.c +++ b/src/test/kc/bitmap-plot-1.c @@ -16,7 +16,7 @@ void main() { sin16s_gen2(SINE, 512, -0x1001, 0x1001); bitmap_init(BITMAP, SCREEN); bitmap_clear(BLACK, WHITE); - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; *D018 = toD018(SCREEN, BITMAP); init_irq(); word idx_x = 0; @@ -47,7 +47,7 @@ void init_irq() { // Disable CIA 1 Timer IRQ CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $100 - *VIC_CONTROL |=$80; + *VICII_CONTROL |=$80; *RASTER = $00; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/bitmap-plot-2.c b/src/test/kc/bitmap-plot-2.c index 5c54231b4..e30dc2448 100644 --- a/src/test/kc/bitmap-plot-2.c +++ b/src/test/kc/bitmap-plot-2.c @@ -16,7 +16,7 @@ void main() { sin16s_gen2(SINE, 512, -0x1001, 0x1001); bitmap_init(BITMAP, SCREEN); bitmap_clear(BLACK, WHITE); - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; *D018 = toD018(SCREEN, BITMAP); init_irq(); word idx_x = 0; @@ -56,7 +56,7 @@ void init_irq() { // Disable CIA 1 Timer IRQ CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $100 - *VIC_CONTROL |=$80; + *VICII_CONTROL |=$80; *RASTER = $00; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/bitmap-plot-3.c b/src/test/kc/bitmap-plot-3.c index dfba90f21..c78030558 100644 --- a/src/test/kc/bitmap-plot-3.c +++ b/src/test/kc/bitmap-plot-3.c @@ -13,7 +13,7 @@ byte* COSTAB = SINTAB+0x40; void main() { bitmap_init(BITMAP, SCREEN); bitmap_clear(BLACK, WHITE); - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; *D018 = toD018(SCREEN, BITMAP); for( byte i=0, a=0; i!=8; i++, a+=32) { bitmap_line( (word)COSTAB[a]+120, (word)SINTAB[a], (word)COSTAB[a+32]+120, (word)SINTAB[a+32]); diff --git a/src/test/kc/c64dtv-8bppcharstretch.c b/src/test/kc/c64dtv-8bppcharstretch.c index 2b5e9119f..b0c3c7477 100644 --- a/src/test/kc/c64dtv-8bppcharstretch.c +++ b/src/test/kc/c64dtv-8bppcharstretch.c @@ -16,8 +16,8 @@ void main() { *DTV_FEATURE = DTV_FEATURE_ENABLE; // 8BPP Pixel Cell Mode *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY | DTV_BADLINE_OFF; - *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3; - *VIC_CONTROL2 = VIC_MCM | VIC_CSEL; + *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3; + *VICII_CONTROL2 = VICII_MCM | VICII_CSEL; // Plane A: SCREEN *DTV_PLANEA_START_LO = < SCREEN; *DTV_PLANEA_START_MI = > SCREEN; @@ -36,7 +36,7 @@ void main() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)SCREEN/$4000); // Set VIC Bank // VIC memory - *VIC_MEMORY = (byte)((((word)SCREEN)&$3fff)/$40) | ((>(((word)SCREEN)&$3fff))/4); + *VICII_MEMORY = (byte)((((word)SCREEN)&$3fff)/$40) | ((>(((word)SCREEN)&$3fff))/4); // DTV Palette - Grey Tones for(byte j : 0..$f) { @@ -59,14 +59,14 @@ void main() { bne stabilize } - *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3; + *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3; *BORDER_COLOR = 0; byte rst = $42; while(*RASTER!=rst) {} asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } do { rst = *RASTER; - *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7); + *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7); *BORDER_COLOR = rst*$10; asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } } while (rst!=$f2); diff --git a/src/test/kc/c64dtv-8bppchunkystretch.c b/src/test/kc/c64dtv-8bppchunkystretch.c index 44eaf4eae..f65cae313 100644 --- a/src/test/kc/c64dtv-8bppchunkystretch.c +++ b/src/test/kc/c64dtv-8bppchunkystretch.c @@ -14,8 +14,8 @@ void main() { *DTV_FEATURE = DTV_FEATURE_ENABLE; // 8BPP Pixel Cell Mode *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_COLORRAM_OFF | DTV_CHUNKY | DTV_BADLINE_OFF; - *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3; - *VIC_CONTROL2 = VIC_MCM | VIC_CSEL; + *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3; + *VICII_CONTROL2 = VICII_MCM | VICII_CSEL; // Plane B: CHUNKY *DTV_PLANEB_START_LO = < CHUNKY; *DTV_PLANEB_START_MI = > CHUNKY; @@ -27,7 +27,7 @@ void main() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)CHUNKY/$4000); // Set VIC Bank // VIC memory - *VIC_MEMORY = (byte)((((word)CHUNKY)&$3fff)/$40) | ((>(((word)CHUNKY)&$3fff))/4); + *VICII_MEMORY = (byte)((((word)CHUNKY)&$3fff)/$40) | ((>(((word)CHUNKY)&$3fff))/4); // DTV Palette - Grey Tones for(byte j : 0..$f) { @@ -50,14 +50,14 @@ void main() { bne stabilize } - *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3; + *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3; *BORDER_COLOR = 0; byte rst = $42; while(*RASTER!=rst) {} asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } do { rst = *RASTER; - *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7); + *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7); *BORDER_COLOR = rst*$10; asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } } while (rst!=$f2); diff --git a/src/test/kc/c64dtv-gfxexplorer.c b/src/test/kc/c64dtv-gfxexplorer.c index 2202e16ea..9411baefb 100644 --- a/src/test/kc/c64dtv-gfxexplorer.c +++ b/src/test/kc/c64dtv-gfxexplorer.c @@ -22,15 +22,15 @@ void main() { } // VIC Screens -byte* const VIC_SCREEN0 = $4000; -byte* const VIC_SCREEN1 = $4400; -byte* const VIC_SCREEN2 = $4800; -byte* const VIC_SCREEN3 = $4c00; -byte* const VIC_SCREEN4 = $5000; +byte* const VICII_SCREEN0 = $4000; +byte* const VICII_SCREEN1 = $4400; +byte* const VICII_SCREEN2 = $4800; +byte* const VICII_SCREEN3 = $4c00; +byte* const VICII_SCREEN4 = $5000; // VIC Charset from ROM -byte* const VIC_CHARSET_ROM = $5800; +byte* const VICII_CHARSET_ROM = $5800; // VIC Bitmap -byte* const VIC_BITMAP = $6000; +byte* const VICII_BITMAP = $6000; // 8BPP Chunky Bitmap (contains 8bpp pixels) const dword PLANE_8BPP_CHUNKY = $20000; @@ -52,17 +52,17 @@ const dword PLANE_CHARSET8 = $3c000; // Get plane address from a plane index (from the form) dword get_plane(byte idx) { if(idx==0) { - return (dword)VIC_SCREEN0; + return (dword)VICII_SCREEN0; } else if(idx==1) { - return (dword)VIC_SCREEN1; + return (dword)VICII_SCREEN1; } else if(idx==2) { - return (dword)VIC_SCREEN2; + return (dword)VICII_SCREEN2; } else if(idx==3) { - return (dword)VIC_SCREEN3; + return (dword)VICII_SCREEN3; } else if(idx==4) { - return (dword)VIC_BITMAP; + return (dword)VICII_BITMAP; } else if(idx==5) { - return (dword)VIC_CHARSET_ROM; + return (dword)VICII_CHARSET_ROM; } else if(idx==6) { return (dword)PLANE_8BPP_CHUNKY; } else if(idx==7) { @@ -80,33 +80,33 @@ dword get_plane(byte idx) { } else if(idx==13) { return (dword)PLANE_FULL; } - return (dword)VIC_SCREEN0; + return (dword)VICII_SCREEN0; } // Get the VIC screen address from the screen index -byte* get_vic_screen(byte idx) { +byte* get_VICII_screen(byte idx) { if(idx==0) { - return VIC_SCREEN0; + return VICII_SCREEN0; } else if(idx==1) { - return VIC_SCREEN1; + return VICII_SCREEN1; } else if(idx==2) { - return VIC_SCREEN2; + return VICII_SCREEN2; } else if(idx==3) { - return VIC_SCREEN3; + return VICII_SCREEN3; } else if(idx==4) { - return VIC_SCREEN4; + return VICII_SCREEN4; } - return VIC_SCREEN0; + return VICII_SCREEN0; } // Get the VIC charset/bitmap address from the index -byte* get_vic_charset(byte idx) { +byte* get_VICII_charset(byte idx) { if(idx==0) { - return VIC_CHARSET_ROM; + return VICII_CHARSET_ROM; } else if(idx==1) { - return VIC_BITMAP; + return VICII_BITMAP; } - return VIC_CHARSET_ROM; + return VICII_CHARSET_ROM; } // Screen containing the FORM @@ -278,18 +278,18 @@ byte* const form_b_step_hi = form_fields_val+20; byte* const form_b_step_lo = form_fields_val+21; byte* const form_b_mod_hi = form_fields_val+22; byte* const form_b_mod_lo = form_fields_val+23; -byte* const form_vic_screen = form_fields_val+24; -byte* const form_vic_gfx = form_fields_val+25; -byte* const form_vic_cols = form_fields_val+26; +byte* const form_VICII_screen = form_fields_val+24; +byte* const form_VICII_gfx = form_fields_val+25; +byte* const form_VICII_cols = form_fields_val+26; byte* const form_dtv_palet = form_fields_val+27; -byte* const form_vic_bg0_hi = form_fields_val+28; -byte* const form_vic_bg0_lo = form_fields_val+29; -byte* const form_vic_bg1_hi = form_fields_val+30; -byte* const form_vic_bg1_lo = form_fields_val+31; -byte* const form_vic_bg2_hi = form_fields_val+32; -byte* const form_vic_bg2_lo = form_fields_val+33; -byte* const form_vic_bg3_hi = form_fields_val+34; -byte* const form_vic_bg3_lo = form_fields_val+35; +byte* const form_VICII_bg0_hi = form_fields_val+28; +byte* const form_VICII_bg0_lo = form_fields_val+29; +byte* const form_VICII_bg1_hi = form_fields_val+30; +byte* const form_VICII_bg1_lo = form_fields_val+31; +byte* const form_VICII_bg2_hi = form_fields_val+32; +byte* const form_VICII_bg2_lo = form_fields_val+33; +byte* const form_VICII_bg3_hi = form_fields_val+34; +byte* const form_VICII_bg3_lo = form_fields_val+35; // Change graphics mode to show the selected graphics mode void gfx_mode() { @@ -317,19 +317,19 @@ void gfx_mode() { *DTV_CONTROL = dtv_control; // VIC Graphics Mode - byte vic_control = VIC_DEN | VIC_RSEL | 3; + byte VICII_control = VICII_DEN | VICII_RSEL | 3; if(*form_ctrl_ecm!=0) { - vic_control = vic_control | VIC_ECM; + VICII_control = VICII_control | VICII_ECM; } if(*form_ctrl_bmm!=0) { - vic_control = vic_control | VIC_BMM; + VICII_control = VICII_control | VICII_BMM; } - *VIC_CONTROL = vic_control; - byte vic_control2 = VIC_CSEL; + *VICII_CONTROL = VICII_control; + byte VICII_control2 = VICII_CSEL; if(*form_ctrl_mcm!=0) { - vic_control2 = vic_control2 | VIC_MCM; + VICII_control2 = VICII_control2 | VICII_MCM; } - *VIC_CONTROL2 = vic_control2; + *VICII_CONTROL2 = VICII_control2; // Linear Graphics Plane A Counter byte plane_a_offs = *form_a_start_hi*$10|*form_a_start_lo; @@ -353,25 +353,25 @@ void gfx_mode() { // VIC Graphics Bank CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input - CIA2->PORT_A = %00000011 ^ (byte)((word)VIC_SCREEN0/$4000); // Set VIC Bank + CIA2->PORT_A = %00000011 ^ (byte)((word)VICII_SCREEN0/$4000); // Set VIC Bank // VIC memory - *VIC_MEMORY = (byte)(((word)get_vic_screen(*form_vic_screen)&$3fff)/$40) | ((>((word)get_vic_charset(*form_vic_gfx)&$3fff))/4); + *VICII_MEMORY = (byte)(((word)get_VICII_screen(*form_VICII_screen)&$3fff)/$40) | ((>((word)get_VICII_charset(*form_VICII_gfx)&$3fff))/4); // VIC Colors - byte* vic_colors = get_vic_screen(*form_vic_cols); + byte* VICII_colors = get_VICII_screen(*form_VICII_cols); byte* col=COLS; for(byte cy: 0..24 ) { for(byte cx: 0..39) { - *col++ = *vic_colors++; + *col++ = *VICII_colors++; } } // Background colors VICII->BORDER_COLOR = 0; - VICII->BG_COLOR = *form_vic_bg0_hi*$10|*form_vic_bg0_lo; - VICII->BG_COLOR1 = *form_vic_bg1_hi*$10|*form_vic_bg1_lo; - VICII->BG_COLOR2 = *form_vic_bg2_hi*$10|*form_vic_bg2_lo; - VICII->BG_COLOR3 = *form_vic_bg3_hi*$10|*form_vic_bg3_lo; + VICII->BG_COLOR = *form_VICII_bg0_hi*$10|*form_VICII_bg0_lo; + VICII->BG_COLOR1 = *form_VICII_bg1_hi*$10|*form_VICII_bg1_lo; + VICII->BG_COLOR2 = *form_VICII_bg2_hi*$10|*form_VICII_bg2_lo; + VICII->BG_COLOR3 = *form_VICII_bg3_hi*$10|*form_VICII_bg3_lo; // DTV Palette if(*form_dtv_palet==0) { @@ -407,7 +407,7 @@ void gfx_init() { gfx_init_screen3(); gfx_init_screen4(); gfx_init_charset(); - gfx_init_vic_bitmap(); + gfx_init_VICII_bitmap(); gfx_init_plane_8bppchunky(); gfx_init_plane_charset8(); gfx_init_plane_horisontal(); @@ -421,7 +421,7 @@ void gfx_init() { void gfx_init_charset() { *PROCPORT = $32; byte* chargen = CHARGEN; - byte* charset = VIC_CHARSET_ROM; + byte* charset = VICII_CHARSET_ROM; for(byte c: 0..$ff) { for( byte l: 0..7) { *charset++ = *chargen++; @@ -432,7 +432,7 @@ void gfx_init_charset() { // Initialize VIC screen 0 ( value is %yyyyxxxx where yyyy is ypos and xxxx is xpos) void gfx_init_screen0() { - byte* ch=VIC_SCREEN0; + byte* ch=VICII_SCREEN0; for(byte cy: 0..24 ) { for(byte cx: 0..39) { *ch++ = (cy&$f)*$10|(cx&$f); @@ -442,7 +442,7 @@ void gfx_init_screen0() { // Initialize VIC screen 1 ( value is %0000cccc where cccc is (x+y mod $f)) void gfx_init_screen1() { - byte* ch=VIC_SCREEN1; + byte* ch=VICII_SCREEN1; for(byte cy: 0..24 ) { for(byte cx: 0..39) { *ch++ = (cx+cy)&$f; @@ -452,7 +452,7 @@ void gfx_init_screen1() { // Initialize VIC screen 2 ( value is %ccccrrrr where cccc is (x+y mod $f) and rrrr is %1111-%cccc) void gfx_init_screen2() { - byte* ch=VIC_SCREEN2; + byte* ch=VICII_SCREEN2; for(byte cy: 0..24 ) { for(byte cx: 0..39) { byte col = (cx+cy)&$f; @@ -464,7 +464,7 @@ void gfx_init_screen2() { // Initialize VIC screen 3 ( value is %00xx00yy where xx is xpos and yy is ypos void gfx_init_screen3() { - byte* ch=VIC_SCREEN3; + byte* ch=VICII_SCREEN3; for(byte cy: 0..24 ) { for(byte cx: 0..39) { *ch++ = (cx&3)*$10|(cy&3); @@ -474,7 +474,7 @@ void gfx_init_screen3() { // Initialize VIC screen 4 - all chars are 00 void gfx_init_screen4() { - byte* ch=VIC_SCREEN4; + byte* ch=VICII_SCREEN4; for(byte cy: 0..24 ) { for(byte cx: 0..39) { *ch++ = 0; @@ -483,9 +483,9 @@ void gfx_init_screen4() { } // Initialize VIC bitmap -void gfx_init_vic_bitmap() { +void gfx_init_VICII_bitmap() { // Draw some lines on the bitmap - bitmap_init(VIC_BITMAP); + bitmap_init(VICII_BITMAP); bitmap_clear(); byte lines_x[] = { $00, $ff, $ff, $00, $00, $80, $ff, $80, $00, $80 }; byte lines_y[] = { $00, $00, $c7, $c7, $00, $00, $64, $c7, $64, $00 }; @@ -649,8 +649,8 @@ void form_mode() { // DTV Graphics Mode *DTV_CONTROL = 0; // VIC Graphics Mode - VICII->CONTROL1 = VIC_DEN|VIC_RSEL|3; - VICII->CONTROL2 = VIC_CSEL; + VICII->CONTROL1 = VICII_DEN|VICII_RSEL|3; + VICII->CONTROL2 = VICII_CSEL; // VIC Memory Pointers VICII->MEMORY = (byte)((((word)FORM_SCREEN&$3fff)/$40)|(((word)FORM_CHARSET&$3fff)/$400)); // DTV Plane A to FORM_SCREEN also diff --git a/src/test/kc/c64dtv-gfxmodes.c b/src/test/kc/c64dtv-gfxmodes.c index db0598c46..4fcf64f57 100644 --- a/src/test/kc/c64dtv-gfxmodes.c +++ b/src/test/kc/c64dtv-gfxmodes.c @@ -55,10 +55,10 @@ void menu() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank // VIC Graphics Mode - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_CSEL; + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_CSEL; // VIC Memory Pointers - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); // DTV Palette - default for(byte i : 0..$f) { DTV_PALETTE[i] = DTV_PALETTE_DEFAULT[i]; @@ -202,10 +202,10 @@ void mode_stdchar() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank // VIC Graphics Mode - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_CSEL; + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_CSEL; // VIC Memory Pointers - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); // DTV Palette - default for(byte i : 0..$f) { DTV_PALETTE[i] = DTV_PALETTE_DEFAULT[i]; @@ -253,10 +253,10 @@ void mode_ecmchar() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank // VIC Graphics Mode - *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3; - *VIC_CONTROL2 = VIC_CSEL; + *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3; + *VICII_CONTROL2 = VICII_CSEL; // VIC Memory Pointers - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); // DTV Palette - default for(byte i : 0..$f) { DTV_PALETTE[i] = DTV_PALETTE_DEFAULT[i]; @@ -309,10 +309,10 @@ void mode_mcchar() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank // VIC Graphics Mode - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_CSEL|VIC_MCM; + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_CSEL|VICII_MCM; // VIC Memory Pointers - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); // DTV Palette - default for(byte i : 0..$f) { DTV_PALETTE[i] = DTV_PALETTE_DEFAULT[i]; @@ -355,10 +355,10 @@ void mode_stdbitmap() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)BITMAP/$4000); // Set VIC Bank // VIC Graphics Mode - *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_CSEL; + *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_CSEL; // VIC Memory Pointers - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)); // DTV Palette - default for(byte i : 0..$f) { DTV_PALETTE[i] = DTV_PALETTE_DEFAULT[i]; @@ -411,10 +411,10 @@ void mode_hicolstdchar() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank // VIC Graphics Mode - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_CSEL; + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_CSEL; // VIC Memory Pointers - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); // DTV Palette - Grey Tones for(byte i : 0..$f) { DTV_PALETTE[i] = i; @@ -464,10 +464,10 @@ void mode_hicolecmchar() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank // VIC Graphics Mode - *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3; - *VIC_CONTROL2 = VIC_CSEL; + *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3; + *VICII_CONTROL2 = VICII_CSEL; // VIC Memory Pointers - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); // DTV Palette - Grey Tones for(byte i : 0..$f) { DTV_PALETTE[i] = i; @@ -520,10 +520,10 @@ void mode_hicolmcchar() { CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank // VIC Graphics Mode - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_CSEL|VIC_MCM; + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_CSEL|VICII_MCM; // VIC Memory Pointers - *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); + *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)); // DTV Palette - Grey Tones for(byte i : 0..$f) { DTV_PALETTE[i] = i; @@ -564,8 +564,8 @@ void mode_twoplanebitmap() { dtv_control = DTV_HIGHCOLOR | DTV_LINEAR; *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR; // VIC Graphics Mode - *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_CSEL; + *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_CSEL; // Linear Graphics Plane A Counter *DTV_PLANEA_START_LO = PLANEA; @@ -634,8 +634,8 @@ void mode_sixsfred() { dtv_control = DTV_HIGHCOLOR | DTV_LINEAR; *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR; // VIC Graphics Mode - *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_MCM|VIC_CSEL; + *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_MCM|VICII_CSEL; // Linear Graphics Plane A Counter *DTV_PLANEA_START_LO = PLANEA; @@ -700,8 +700,8 @@ void mode_sixsfred2() { dtv_control = DTV_LINEAR; *DTV_CONTROL = DTV_LINEAR; // VIC Graphics Mode - *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_MCM|VIC_CSEL; + *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_MCM|VICII_CSEL; // Linear Graphics Plane A Counter *DTV_PLANEA_START_LO = PLANEA; @@ -771,8 +771,8 @@ void mode_8bpppixelcell() { dtv_control = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY; *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY; // VIC Graphics Mode - *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3; - *VIC_CONTROL2 = VIC_MCM|VIC_CSEL; + *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3; + *VICII_CONTROL2 = VICII_MCM|VICII_CSEL; // Linear Graphics Plane A Counter *DTV_PLANEA_START_LO = PLANEA; @@ -839,8 +839,8 @@ void mode_8bppchunkybmm() { dtv_control = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY | DTV_COLORRAM_OFF; *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY | DTV_COLORRAM_OFF; // VIC Graphics Mode - *VIC_CONTROL = VIC_ECM | VIC_DEN | VIC_RSEL | 3; - *VIC_CONTROL2 = VIC_MCM | VIC_CSEL; + *VICII_CONTROL = VICII_ECM | VICII_DEN | VICII_RSEL | 3; + *VICII_CONTROL2 = VICII_MCM | VICII_CSEL; // Linear Graphics Plane B Counter *DTV_PLANEB_START_LO = < < PLANEB; *DTV_PLANEB_START_MI = > < PLANEB; diff --git a/src/test/kc/complex/clearscreen/clearscreen.c b/src/test/kc/complex/clearscreen/clearscreen.c index addd54030..3dffce723 100644 --- a/src/test/kc/complex/clearscreen/clearscreen.c +++ b/src/test/kc/complex/clearscreen/clearscreen.c @@ -290,9 +290,9 @@ void setupRasterIrq(unsigned int raster, void()* irqRoutine) { // Disable CIA 1 Timer IRQ CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR; if(raster<0x100) { - *VIC_CONTROL &=0x7f; + *VICII_CONTROL &=0x7f; } else { - *VIC_CONTROL |=0x80; + *VICII_CONTROL |=0x80; } *RASTER = INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to 0x00 - *VIC_CONTROL &=0x7f; + *VICII_CONTROL &=0x7f; *RASTER = 0x28; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/complex/tetris/tetris-render.c b/src/test/kc/complex/tetris/tetris-render.c index da5192b8c..41254cd51 100644 --- a/src/test/kc/complex/tetris/tetris-render.c +++ b/src/test/kc/complex/tetris/tetris-render.c @@ -45,7 +45,7 @@ __align(0x40) char* screen_lines_2[PLAYFIELD_LINES]; void render_init() { vicSelectGfxBank(PLAYFIELD_CHARSET); // Enable Extended Background Color Mode - *D011 = VIC_ECM | VIC_DEN | VIC_RSEL | 3; + *D011 = VICII_ECM | VICII_DEN | VICII_RSEL | 3; *BORDER_COLOR = BLACK; *BG_COLOR = BLACK; *BG_COLOR1 = PIECES_COLORS_1[0]; diff --git a/src/test/kc/complex/tetris/tetris-sprites.c b/src/test/kc/complex/tetris/tetris-sprites.c index c40361d47..fd86d5751 100644 --- a/src/test/kc/complex/tetris/tetris-sprites.c +++ b/src/test/kc/complex/tetris/tetris-sprites.c @@ -43,7 +43,7 @@ void sprites_irq_init() { // Disable CIA 1 Timer IRQ CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line - *VIC_CONTROL &=0x7f; + *VICII_CONTROL &=0x7f; *RASTER = IRQ_RASTER_FIRST; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/complex/xmega65/xmega65.c b/src/test/kc/complex/xmega65/xmega65.c index 2f68fdd32..a5b52ac13 100644 --- a/src/test/kc/complex/xmega65/xmega65.c +++ b/src/test/kc/complex/xmega65/xmega65.c @@ -9,7 +9,7 @@ char* const RASTER = 0xd012; -char* const VIC_MEMORY = 0xd018; +char* const VICII_MEMORY = 0xd018; char* const SCREEN = 0x0400; char* const BG_COLOR = 0xd021; char* const COLS = 0xd800; @@ -20,7 +20,7 @@ char MESSAGE[] = "hello world!"; void main() { // Initialize screen memory - *VIC_MEMORY = 0x14; + *VICII_MEMORY = 0x14; // Init screen/colors memset(SCREEN, ' ', 40*25); memset(COLS, WHITE, 40*25); diff --git a/src/test/kc/examples/bresenham/bitmap-bresenham.c b/src/test/kc/examples/bresenham/bitmap-bresenham.c index 11beffc57..c17c8c32c 100644 --- a/src/test/kc/examples/bresenham/bitmap-bresenham.c +++ b/src/test/kc/examples/bresenham/bitmap-bresenham.c @@ -11,8 +11,8 @@ char lines_cnt = 8; void main() { VICII->BORDER_COLOR = 0; VICII->BG_COLOR = 0; - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; - *VIC_MEMORY = (char)((((unsigned int)SCREEN&$3fff)/$40)|(((unsigned int)BITMAP&$3fff)/$400)); + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; + *VICII_MEMORY = (char)((((unsigned int)SCREEN&$3fff)/$40)|(((unsigned int)BITMAP&$3fff)/$400)); bitmap_init(BITMAP); bitmap_clear(); init_screen(); diff --git a/src/test/kc/examples/conio/nacht-screen.c b/src/test/kc/examples/conio/nacht-screen.c index ddfdbb2fc..56f461123 100644 --- a/src/test/kc/examples/conio/nacht-screen.c +++ b/src/test/kc/examples/conio/nacht-screen.c @@ -12,7 +12,7 @@ const char COLOR_BLACK = 0x00; static unsigned char XSize, YSize; void main() { - *VIC_MEMORY = 0x17; + *VICII_MEMORY = 0x17; screensize(&XSize, &YSize); MakeNiceScreen(); while(!kbhit()) {} diff --git a/src/test/kc/examples/irq/irq-hyperscreen.c b/src/test/kc/examples/irq/irq-hyperscreen.c index 57e43dd3e..bc433db65 100644 --- a/src/test/kc/examples/irq/irq-hyperscreen.c +++ b/src/test/kc/examples/irq/irq-hyperscreen.c @@ -27,7 +27,7 @@ void main() { __interrupt(hardware_clobber) void irq_bottom_1() { VICII->BORDER_COLOR = WHITE; // Set screen height to 24 lines - this is done after the border should have started drawing - so it wont start - VICII->CONTROL1 &= ($ff^VIC_RSEL); + VICII->CONTROL1 &= ($ff^VICII_RSEL); // Acknowledge the IRQ VICII->IRQ_STATUS = IRQ_RASTER; // Trigger IRQ 2 at line $fd @@ -40,7 +40,7 @@ __interrupt(hardware_clobber) void irq_bottom_1() { __interrupt(hardware_clobber) void irq_bottom_2() { VICII->BORDER_COLOR = WHITE; // Set screen height back to 25 lines (preparing for the next screen) - VICII->CONTROL1 |= VIC_RSEL; + VICII->CONTROL1 |= VICII_RSEL; // Acknowledge the IRQ VICII->IRQ_STATUS = IRQ_RASTER; // Trigger IRQ 1 at line $fa diff --git a/src/test/kc/examples/multiplexer/simple-multiplexer.c b/src/test/kc/examples/multiplexer/simple-multiplexer.c index f0ee529aa..1725e4528 100644 --- a/src/test/kc/examples/multiplexer/simple-multiplexer.c +++ b/src/test/kc/examples/multiplexer/simple-multiplexer.c @@ -28,7 +28,7 @@ void main() { // Initialize the program void init() { - *D011 = VIC_DEN | VIC_RSEL | 3; + *D011 = VICII_DEN | VICII_RSEL | 3; // Initialize the multiplexer plexInit(SCREEN); // Set the x-positions & pointers @@ -63,7 +63,7 @@ void loop() { (VICII->BORDER_COLOR)++; plexSort(); VICII->BORDER_COLOR = BLACK; - while((*D011&VIC_RST8)!=0) {} + while((*D011&VICII_RST8)!=0) {} // Show the sprites for( char ss: 0..PLEX_COUNT-1) { VICII->BORDER_COLOR = BLACK; diff --git a/src/test/kc/examples/scrolllogo/scrolllogo.c b/src/test/kc/examples/scrolllogo/scrolllogo.c index 2f097345c..5556cfbc7 100644 --- a/src/test/kc/examples/scrolllogo/scrolllogo.c +++ b/src/test/kc/examples/scrolllogo/scrolllogo.c @@ -21,7 +21,7 @@ void main() { VICII->BG_COLOR = VICII->BG_COLOR1 = DARK_GREY; VICII->BG_COLOR2 = BLACK; *D018 = toD018(SCREEN, LOGO); - *D016 = VIC_MCM; + *D016 = VICII_MCM; memset(SCREEN, BLACK, 1000); memset(COLS, WHITE|8, 1000); for(char ch: 0..239) { @@ -50,7 +50,7 @@ void loop() { void render_logo(signed int xpos) { char logo_idx; char screen_idx; - *D016 = VIC_MCM|((char)xpos&7); + *D016 = VICII_MCM|((char)xpos&7); signed char x_char = (signed char)(xpos/8); char line = 0; if(xpos<0) { diff --git a/src/test/kc/examples/showlogo/showlogo.c b/src/test/kc/examples/showlogo/showlogo.c index 1f2ac1e85..ac73923c9 100644 --- a/src/test/kc/examples/showlogo/showlogo.c +++ b/src/test/kc/examples/showlogo/showlogo.c @@ -15,7 +15,7 @@ void main() { VICII->BG_COLOR = VICII->BG_COLOR1 = DARK_GREY; VICII->BG_COLOR2 = BLACK; *D018 = toD018(SCREEN, LOGO); - *D016 = VIC_MCM | VIC_CSEL; + *D016 = VICII_MCM | VICII_CSEL; memset(SCREEN, BLACK, 40*25); memset(COLS, WHITE|8, 40*25); for(char ch: 0..239) { diff --git a/src/test/kc/examples/sinplotter/sine-plotter.c b/src/test/kc/examples/sinplotter/sine-plotter.c index 6ff6ed1c5..375363096 100644 --- a/src/test/kc/examples/sinplotter/sine-plotter.c +++ b/src/test/kc/examples/sinplotter/sine-plotter.c @@ -23,9 +23,9 @@ void main() { // Disable kernal & basic *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK; *PROCPORT = PROCPORT_RAM_IO; - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; vicSelectGfxBank(SCREEN); - *D016 = VIC_CSEL; + *D016 = VICII_CSEL; *D018 = toD018(SCREEN, BITMAP); bitmap_init(BITMAP, SCREEN); diff --git a/src/test/kc/float-error-message.c b/src/test/kc/float-error-message.c index 6af1d6625..614f1f354 100644 --- a/src/test/kc/float-error-message.c +++ b/src/test/kc/float-error-message.c @@ -1,7 +1,7 @@ // Tests what error message an accidental float gives -char* VIC_MEMORY = 0xd018; +char* VICII_MEMORY = 0xd018; void main() { - *VIC_MEMORY = 0.14; + *VICII_MEMORY = 0.14; } \ No newline at end of file diff --git a/src/test/kc/index-sizeof-reuse-2.c b/src/test/kc/index-sizeof-reuse-2.c index 0079419da..c91d1e02f 100644 --- a/src/test/kc/index-sizeof-reuse-2.c +++ b/src/test/kc/index-sizeof-reuse-2.c @@ -4,8 +4,8 @@ unsigned int entities[NUM_ENTITIES]; -char * const VIC_RASTER = 0xd012; -char * const VIC_BG_COLOR = 0xd020; +char * const VICII_RASTER = 0xd012; +char * const VICII_BG_COLOR = 0xd020; char * const SCREEN = 0x0400; void main() { @@ -14,8 +14,8 @@ void main() { while(1) { // Wait for raster refresh - while(*VIC_RASTER!=0xff) ; - *VIC_BG_COLOR = 0; + while(*VICII_RASTER!=0xff) ; + *VICII_BG_COLOR = 0; // Move the entities char * line = SCREEN; for(char i=0;iINTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $100 - *VIC_CONTROL |=$80; + *VICII_CONTROL |=$80; *RASTER = $00; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/irq-hardware-clobber.c b/src/test/kc/irq-hardware-clobber.c index 618ed4802..0a71ad80e 100644 --- a/src/test/kc/irq-hardware-clobber.c +++ b/src/test/kc/irq-hardware-clobber.c @@ -3,7 +3,7 @@ void()** const KERNEL_IRQ = $0314; void()** const HARDWARE_IRQ = $fffe; byte* const RASTER = $d012; -byte* const VIC_CONTROL = $d011; +byte* const VICII_CONTROL = $d011; byte* const IRQ_STATUS = $d019; byte* const IRQ_ENABLE = $d01a; const byte IRQ_RASTER = %00000001; @@ -37,7 +37,7 @@ void main() { // Disable CIA 1 Timer IRQ *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $100 - *VIC_CONTROL |=$80; + *VICII_CONTROL |=$80; *RASTER = $00; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/irq-hardware-stack.c b/src/test/kc/irq-hardware-stack.c index b1811dc08..6b09251e4 100644 --- a/src/test/kc/irq-hardware-stack.c +++ b/src/test/kc/irq-hardware-stack.c @@ -5,7 +5,7 @@ void()** const KERNEL_IRQ = $0314; void()** const HARDWARE_IRQ = $fffe; byte* const RASTER = $d012; -byte* const VIC_CONTROL = $d011; +byte* const VICII_CONTROL = $d011; byte* const IRQ_STATUS = $d019; byte* const IRQ_ENABLE = $d01a; const byte IRQ_RASTER = %00000001; @@ -39,7 +39,7 @@ void main() { // Disable CIA 1 Timer IRQ *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $100 - *VIC_CONTROL |=$80; + *VICII_CONTROL |=$80; *RASTER = $00; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/irq-hardware.c b/src/test/kc/irq-hardware.c index 42466f089..e8003d797 100644 --- a/src/test/kc/irq-hardware.c +++ b/src/test/kc/irq-hardware.c @@ -3,7 +3,7 @@ void()** const KERNEL_IRQ = $0314; void()** const HARDWARE_IRQ = $fffe; byte* const RASTER = $d012; -byte* const VIC_CONTROL = $d011; +byte* const VICII_CONTROL = $d011; byte* const IRQ_STATUS = $d019; byte* const IRQ_ENABLE = $d01a; const byte IRQ_RASTER = %00000001; @@ -37,7 +37,7 @@ void main() { // Disable CIA 1 Timer IRQ *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $100 - *VIC_CONTROL |=$80; + *VICII_CONTROL |=$80; *RASTER = $00; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/irq-idx-problem.c b/src/test/kc/irq-idx-problem.c index 02f4aa895..04507ab1b 100644 --- a/src/test/kc/irq-idx-problem.c +++ b/src/test/kc/irq-idx-problem.c @@ -8,7 +8,7 @@ void main() { // Disable CIA 1 Timer IRQ CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $60 - *VIC_CONTROL &=$7f; + *VICII_CONTROL &=$7f; *RASTER = $60; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; @@ -19,8 +19,8 @@ void main() { asm { cli } } -byte * const VIC_BASE = $D000; -const byte VIC_SIZE = 48; +byte * const VICII_BASE = $D000; +const byte VICII_SIZE = 48; const byte IRQ_CHANGE_NEXT = $7f; byte IRQ_CHANGE_IDX[] = { $20, $21, IRQ_CHANGE_NEXT, $20, $21, IRQ_CHANGE_NEXT, $20, $21, IRQ_CHANGE_NEXT, $20, $21, IRQ_CHANGE_NEXT }; @@ -33,10 +33,10 @@ __interrupt void table_driven_irq() { byte idx = IRQ_CHANGE_IDX[irq_idx]; byte val = IRQ_CHANGE_VAL[irq_idx]; irq_idx++; - if (idx < VIC_SIZE) { - VIC_BASE[idx] = val; - } else if (idx < VIC_SIZE + 8) { - SCREEN[idx + $3f8 - VIC_SIZE] = val; + if (idx < VICII_SIZE) { + VICII_BASE[idx] = val; + } else if (idx < VICII_SIZE + 8) { + SCREEN[idx + $3f8 - VICII_SIZE] = val; } else { *IRQ_STATUS = IRQ_RASTER; *RASTER = val; diff --git a/src/test/kc/irq-kernel.c b/src/test/kc/irq-kernel.c index 0bf937af2..495d110e3 100644 --- a/src/test/kc/irq-kernel.c +++ b/src/test/kc/irq-kernel.c @@ -2,7 +2,7 @@ void()** const KERNEL_IRQ = $0314; byte* const RASTER = $d012; -byte* const VIC_CONTROL = $d011; +byte* const VICII_CONTROL = $d011; byte* const IRQ_STATUS = $d019; byte* const IRQ_ENABLE = $d01a; const byte IRQ_RASTER = %00000001; @@ -21,7 +21,7 @@ void main() { // Disable CIA 1 Timer IRQ *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $100 - *VIC_CONTROL |=$80; + *VICII_CONTROL |=$80; *RASTER = $00; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/irq-local-var-overlap-problem.c b/src/test/kc/irq-local-var-overlap-problem.c index 956cfb94d..4415d375d 100644 --- a/src/test/kc/irq-local-var-overlap-problem.c +++ b/src/test/kc/irq-local-var-overlap-problem.c @@ -2,7 +2,7 @@ void()** const KERNEL_IRQ = $0314; byte* const RASTER = $d012; -byte* const VIC_CONTROL = $d011; +byte* const VICII_CONTROL = $d011; byte* const IRQ_STATUS = $d019; byte* const IRQ_ENABLE = $d01a; const byte IRQ_RASTER = %00000001; @@ -18,7 +18,7 @@ void main() { // Disable CIA 1 Timer IRQ *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $0fd - *VIC_CONTROL &=$7f; + *VICII_CONTROL &=$7f; *RASTER = $fd; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/irq-raster.c b/src/test/kc/irq-raster.c index 2defc506c..03e7948fd 100644 --- a/src/test/kc/irq-raster.c +++ b/src/test/kc/irq-raster.c @@ -2,7 +2,7 @@ void()** const KERNEL_IRQ = $0314; byte* const RASTER = $d012; -byte* const VIC_CONTROL = $d011; +byte* const VICII_CONTROL = $d011; byte* const IRQ_STATUS = $d019; byte* const IRQ_ENABLE = $d01a; const byte IRQ_RASTER = %00000001; @@ -21,7 +21,7 @@ void main() { // Disable CIA 1 Timer IRQ *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $100 - *VIC_CONTROL |=$80; + *VICII_CONTROL |=$80; *RASTER = $00; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/irq-volatile-bool-problem.c b/src/test/kc/irq-volatile-bool-problem.c index 9d33cd376..df229e52e 100644 --- a/src/test/kc/irq-volatile-bool-problem.c +++ b/src/test/kc/irq-volatile-bool-problem.c @@ -3,7 +3,7 @@ void()** const KERNEL_IRQ = $0314; byte* const RASTER = $d012; -byte* const VIC_CONTROL = $d011; +byte* const VICII_CONTROL = $d011; byte* const IRQ_STATUS = $d019; byte* const IRQ_ENABLE = $d01a; const byte IRQ_RASTER = %00000001; @@ -18,7 +18,7 @@ void main() { // Disable CIA 1 Timer IRQ *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR; // Set raster line to $0fd - *VIC_CONTROL &=$7f; + *VICII_CONTROL &=$7f; *RASTER = $fd; // Enable Raster Interrupt *IRQ_ENABLE = IRQ_RASTER; diff --git a/src/test/kc/line-anim.c b/src/test/kc/line-anim.c index 4611c5d21..ff753ec30 100644 --- a/src/test/kc/line-anim.c +++ b/src/test/kc/line-anim.c @@ -35,7 +35,7 @@ void main() { // Disable kernal & basic *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK; *PROCPORT = PROCPORT_RAM_IO; - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3; + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3; vicSelectGfxBank(SCREEN); *D018 = toD018(SCREEN, BITMAP); bitmap_init(BITMAP); diff --git a/src/test/kc/millfork-benchmarks/plasma-kc.c b/src/test/kc/millfork-benchmarks/plasma-kc.c index 7112ead6b..e09585224 100644 --- a/src/test/kc/millfork-benchmarks/plasma-kc.c +++ b/src/test/kc/millfork-benchmarks/plasma-kc.c @@ -122,23 +122,23 @@ int main (void) tmp = block & 0xFC; tmp |= (char)((((unsigned int)SCREEN1) >> 14) ^ 0x03); CIA2->PORT_A = tmp; - v = *VIC_MEMORY; + v = *VICII_MEMORY; /* Run the demo until a key was hit */ while (count) { /* Build page 1, then make it visible */ doplasma ((char*)SCREEN1); - *VIC_MEMORY = PAGE1; + *VICII_MEMORY = PAGE1; /* Build page 2, then make it visible */ doplasma ((char*)SCREEN2); - *VIC_MEMORY = PAGE2; + *VICII_MEMORY = PAGE2; /* Count frames */ --count; } - *VIC_MEMORY = v; + *VICII_MEMORY = v; CIA2->PORT_A = block; /* Reset screen colors */ diff --git a/src/test/kc/multiplexer-irq/simple-multiplexer-irq.c b/src/test/kc/multiplexer-irq/simple-multiplexer-irq.c index 1c055c76d..8947a6115 100644 --- a/src/test/kc/multiplexer-irq/simple-multiplexer-irq.c +++ b/src/test/kc/multiplexer-irq/simple-multiplexer-irq.c @@ -23,7 +23,7 @@ void main() { // Initialize the program void init() { - *D011 = VIC_DEN | VIC_RSEL | 3; + *D011 = VICII_DEN | VICII_RSEL | 3; // Initialize the multiplexer plexInit(SCREEN); // Set the x-positions & pointers @@ -44,7 +44,7 @@ void init() { *IRQ_ENABLE = IRQ_RASTER; *IRQ_STATUS = IRQ_RASTER; *KERNEL_IRQ = &plex_irq; - *VIC_CONTROL &= 0x7f; + *VICII_CONTROL &= 0x7f; *RASTER = 0x0; asm { cli } } diff --git a/src/test/kc/norom-charset.c b/src/test/kc/norom-charset.c index eddbdaf3a..793067048 100644 --- a/src/test/kc/norom-charset.c +++ b/src/test/kc/norom-charset.c @@ -1,5 +1,5 @@ // Generate a charset based on a 5x3 pattern stored in 2 bytes -byte* VIC_MEMORY = $d018; +byte* VICII_MEMORY = $d018; byte* SCREEN = $400; byte* CHARSET = $3000; @@ -13,7 +13,7 @@ void main() { gen_char3(charset, charset_spec_row[c]); charset = charset+8; } - *VIC_MEMORY = (byte)(((word)SCREEN/$40)|((word)CHARSET/$400)); + *VICII_MEMORY = (byte)(((word)SCREEN/$40)|((word)CHARSET/$400)); } // Generate one 5x3 character from a 16-bit char spec diff --git a/src/test/kc/norom.asm b/src/test/kc/norom.asm index 1b4dc35c9..896f17894 100644 --- a/src/test/kc/norom.asm +++ b/src/test/kc/norom.asm @@ -1,7 +1,7 @@ .pc = $801 "Basic" :BasicUpstart(main) .pc = $80d "Program" - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label CHARSET = $3000 main: { @@ -47,7 +47,7 @@ sr2:rol charset_spec_row_hi dec c bne b2 lda #SCREEN/$40|CHARSET/$400 - sta VIC_MEMORY + sta VICII_MEMORY rts } diff --git a/src/test/ref/bitmap-circle-2.asm b/src/test/ref/bitmap-circle-2.asm index fd3e8d0bc..4d133e9cd 100644 --- a/src/test/ref/bitmap-circle-2.asm +++ b/src/test/ref/bitmap-circle-2.asm @@ -9,13 +9,13 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const BLUE = 6 .label BORDER_COLOR = $d020 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .segment Code @@ -46,12 +46,12 @@ main: { // *BORDER_COLOR = BLUE lda #BLUE sta BORDER_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY lda #<1 sta.z i lda #>1 diff --git a/src/test/ref/bitmap-circle-2.cfg b/src/test/ref/bitmap-circle-2.cfg index 8d924835c..ee6da1aa3 100644 --- a/src/test/ref/bitmap-circle-2.cfg +++ b/src/test/ref/bitmap-circle-2.cfg @@ -10,8 +10,8 @@ main::@4: scope:[main] from main to:main::@5 main::@5: scope:[main] from main::@4 [4] *BORDER_COLOR = BLUE - [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 to:main::@1 main::@1: scope:[main] from main::@5 main::@6 [7] main::i#2 = phi( main::@5/1, main::@6/main::i#1 ) diff --git a/src/test/ref/bitmap-circle-2.log b/src/test/ref/bitmap-circle-2.log index 28dae31f7..fbe70dc8b 100644 --- a/src/test/ref/bitmap-circle-2.log +++ b/src/test/ref/bitmap-circle-2.log @@ -17,8 +17,8 @@ main::@4: scope:[main] from main to:main::@5 main::@5: scope:[main] from main::@4 *BORDER_COLOR = BLUE - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 main::i#0 = 1 to:main::@1 main::@1: scope:[main] from main::@5 main::@6 @@ -283,10 +283,10 @@ const nomodify byte BLUE = 6 const nomodify byte* BORDER_COLOR = (byte*)$d020 const nomodify byte* D011 = (byte*)$d011 const nomodify byte* SCREEN = (byte*)$400 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*)$d018 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*)$d018 +const nomodify byte VICII_RSEL = 8 void __start() const byte* bitmask[] = { $80, $40, $20, $10, 8, 4, 2, 1 } void circle(signed word circle::xc , signed word circle::yc , signed word circle::r) @@ -484,10 +484,10 @@ Adding number conversion cast (snumber) $28*$19*8 in fill::size#0 = $28*$19*8 Adding number conversion cast (unumber) 0 in fill::val#0 = 0 Adding number conversion cast (snumber) $28*$19 in fill::size#1 = $28*$19 Adding number conversion cast (unumber) $16 in fill::val#1 = $16 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 Adding number conversion cast (snumber) $b4 in main::$2 = main::i#2 < $b4 Adding number conversion cast (snumber) $a0 in circle::xc#0 = $a0 Adding number conversion cast (snumber) $64 in circle::yc#0 = $64 @@ -518,14 +518,14 @@ Adding number conversion cast (snumber) plot::$12 in plot::$12 = plot::$11 * (sn Adding number conversion cast (snumber) 7 in plot::$13 = plot::x#9 & 7 Adding number conversion cast (snumber) plot::$13 in plot::$13 = plot::x#9 & (snumber)7 Successful SSA optimization PassNAddNumberTypeConversions -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 Successful SSA optimization PassNAddNumberTypeConversions Inlining cast fill::size#0 = (snumber)$28*$19*8 Inlining cast fill::val#0 = (unumber)0 Inlining cast fill::size#1 = (snumber)$28*$19 Inlining cast fill::val#1 = (unumber)$16 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast circle::xc#0 = (snumber)$a0 Inlining cast circle::yc#0 = (snumber)$64 Successful SSA optimization Pass2InlineCast @@ -536,7 +536,7 @@ Simplifying constant pointer cast (byte*) 1024 Simplifying constant pointer cast (byte*) 8192 Simplifying constant integer cast 0 Simplifying constant integer cast $16 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -781,8 +781,8 @@ main::@4: scope:[main] from main to:main::@5 main::@5: scope:[main] from main::@4 [4] *BORDER_COLOR = BLUE - [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 to:main::@1 main::@1: scope:[main] from main::@5 main::@6 [7] main::i#2 = phi( main::@5/1, main::@6/main::i#1 ) @@ -1092,8 +1092,8 @@ Allocated zp[1]:51 [ plot::$13 ] Allocated zp[1]:52 [ plot::$14 ] REGISTER UPLIFT POTENTIAL REGISTERS Statement [4] *BORDER_COLOR = BLUE [ ] ( [ ] { } ) always clobbers reg byte a -Statement [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] if(main::i#2<$b4) goto main::@2 [ main::i#2 ] ( [ main::i#2 ] { } ) always clobbers reg byte a Statement [10] circle::r#0 = main::i#2 [ main::i#2 circle::r#0 ] ( [ main::i#2 circle::r#0 ] { { circle::r#0 = main::i#2 } } ) always clobbers reg byte a Statement [12] main::i#1 = main::i#2 + 5 [ main::i#1 ] ( [ main::i#1 ] { } ) always clobbers reg byte a @@ -1146,8 +1146,8 @@ Statement [75] plot::$13 = plot::x#8 & 7 [ plot::location#3 plot::$13 ] ( circle Statement [76] plot::$14 = *plot::location#3 | bitmask[plot::$13] [ plot::location#3 plot::$14 ] ( circle:11::plot:34 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$14 ] { { circle::r#0 = main::i#2 } { plot::x#0 = plot::x#8 } { plot::y#0 = plot::y#8 } } circle:11::plot:37 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$14 ] { { circle::r#0 = main::i#2 } { plot::x#1 = plot::x#8 } { plot::y#1 = plot::y#8 } } circle:11::plot:40 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$14 ] { { circle::r#0 = main::i#2 } { plot::x#2 = plot::x#8 } { plot::y#2 = plot::y#8 } } circle:11::plot:43 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$14 ] { { circle::r#0 = main::i#2 } { plot::x#3 = plot::x#8 } { plot::y#3 = plot::y#8 } } circle:11::plot:46 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$14 ] { { circle::r#0 = main::i#2 } { plot::x#4 = plot::x#8 } { plot::y#4 = plot::y#8 } } circle:11::plot:49 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$14 ] { { circle::r#0 = main::i#2 } { plot::x#5 = plot::x#8 } { plot::y#5 = plot::y#8 } } circle:11::plot:52 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$14 ] { { circle::r#0 = main::i#2 } { plot::x#6 = plot::x#8 } { plot::y#6 = plot::y#8 } } circle:11::plot:55 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$14 ] { { circle::r#0 = main::i#2 } { plot::x#7 = plot::x#8 } { plot::y#7 = plot::y#8 } } ) always clobbers reg byte a reg byte y Statement [77] *plot::location#3 = plot::$14 [ ] ( circle:11::plot:34 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 ] { { circle::r#0 = main::i#2 } { plot::x#0 = plot::x#8 } { plot::y#0 = plot::y#8 } } circle:11::plot:37 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 ] { { circle::r#0 = main::i#2 } { plot::x#1 = plot::x#8 } { plot::y#1 = plot::y#8 } } circle:11::plot:40 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 ] { { circle::r#0 = main::i#2 } { plot::x#2 = plot::x#8 } { plot::y#2 = plot::y#8 } } circle:11::plot:43 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 ] { { circle::r#0 = main::i#2 } { plot::x#3 = plot::x#8 } { plot::y#3 = plot::y#8 } } circle:11::plot:46 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 ] { { circle::r#0 = main::i#2 } { plot::x#4 = plot::x#8 } { plot::y#4 = plot::y#8 } } circle:11::plot:49 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 ] { { circle::r#0 = main::i#2 } { plot::x#5 = plot::x#8 } { plot::y#5 = plot::y#8 } } circle:11::plot:52 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 ] { { circle::r#0 = main::i#2 } { plot::x#6 = plot::x#8 } { plot::y#6 = plot::y#8 } } circle:11::plot:55 [ main::i#2 circle::x1#10 circle::y#10 circle::p#10 ] { { circle::r#0 = main::i#2 } { plot::x#7 = plot::x#8 } { plot::y#7 = plot::y#8 } } ) always clobbers reg byte y Statement [4] *BORDER_COLOR = BLUE [ ] ( [ ] { } ) always clobbers reg byte a -Statement [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] if(main::i#2<$b4) goto main::@2 [ main::i#2 ] ( [ main::i#2 ] { } ) always clobbers reg byte a Statement [10] circle::r#0 = main::i#2 [ main::i#2 circle::r#0 ] ( [ main::i#2 circle::r#0 ] { { circle::r#0 = main::i#2 } } ) always clobbers reg byte a Statement [12] main::i#1 = main::i#2 + 5 [ main::i#1 ] ( [ main::i#1 ] { } ) always clobbers reg byte a @@ -1283,13 +1283,13 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const BLUE = 6 .label BORDER_COLOR = $d020 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .segment Code @@ -1339,12 +1339,12 @@ main: { // [4] *BORDER_COLOR = BLUE -- _deref_pbuc1=vbuc2 lda #BLUE sta BORDER_COLOR - // [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [7] phi from main::@5 to main::@1 [phi:main::@5->main::@1] __b1_from___b5: // [7] phi main::i#2 = 1 [phi:main::@5->main::@1#0] -- vwsz1=vwsc1 @@ -2022,10 +2022,10 @@ const nomodify byte BLUE = 6 const nomodify byte* BORDER_COLOR = (byte*) 53280 const nomodify byte* D011 = (byte*) 53265 const nomodify byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 const byte* bitmask[] = { $80, $40, $20, $10, 8, 4, 2, 1 } void circle(signed word circle::xc , signed word circle::yc , signed word circle::r) signed word~ circle::$0 zp[2]:8 202.0 @@ -2136,13 +2136,13 @@ Score: 51752 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const BLUE = 6 .label BORDER_COLOR = $d020 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .segment Code @@ -2188,14 +2188,14 @@ main: { // [4] *BORDER_COLOR = BLUE -- _deref_pbuc1=vbuc2 lda #BLUE sta BORDER_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) - // [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + // [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [7] phi from main::@5 to main::@1 [phi:main::@5->main::@1] // [7] phi main::i#2 = 1 [phi:main::@5->main::@1#0] -- vwsz1=vwsc1 lda #<1 diff --git a/src/test/ref/bitmap-circle-2.sym b/src/test/ref/bitmap-circle-2.sym index 83c24c873..14ea7552e 100644 --- a/src/test/ref/bitmap-circle-2.sym +++ b/src/test/ref/bitmap-circle-2.sym @@ -3,10 +3,10 @@ const nomodify byte BLUE = 6 const nomodify byte* BORDER_COLOR = (byte*) 53280 const nomodify byte* D011 = (byte*) 53265 const nomodify byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 const byte* bitmask[] = { $80, $40, $20, $10, 8, 4, 2, 1 } void circle(signed word circle::xc , signed word circle::yc , signed word circle::r) signed word~ circle::$0 zp[2]:8 202.0 diff --git a/src/test/ref/bitmap-circle.asm b/src/test/ref/bitmap-circle.asm index 1ae142076..4e15f8d0c 100644 --- a/src/test/ref/bitmap-circle.asm +++ b/src/test/ref/bitmap-circle.asm @@ -9,13 +9,13 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const BLUE = 6 .label BORDER_COLOR = $d020 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .segment Code @@ -45,12 +45,12 @@ main: { // *BORDER_COLOR = BLUE lda #BLUE sta BORDER_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // circle(100,100,50) jsr circle __b1: diff --git a/src/test/ref/bitmap-circle.cfg b/src/test/ref/bitmap-circle.cfg index 8b5a5c2a8..7cc081890 100644 --- a/src/test/ref/bitmap-circle.cfg +++ b/src/test/ref/bitmap-circle.cfg @@ -10,8 +10,8 @@ main::@2: scope:[main] from main to:main::@3 main::@3: scope:[main] from main::@2 [4] *BORDER_COLOR = BLUE - [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [7] call circle to:main::@1 main::@1: scope:[main] from main::@1 main::@3 diff --git a/src/test/ref/bitmap-circle.log b/src/test/ref/bitmap-circle.log index 63de22f15..31209dbbf 100644 --- a/src/test/ref/bitmap-circle.log +++ b/src/test/ref/bitmap-circle.log @@ -17,8 +17,8 @@ main::@2: scope:[main] from main to:main::@3 main::@3: scope:[main] from main::@2 *BORDER_COLOR = BLUE - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 circle::xc#0 = $64 circle::yc#0 = $64 circle::r#0 = $32 @@ -259,10 +259,10 @@ const nomodify byte BLUE = 6 const nomodify byte* BORDER_COLOR = (byte*)$d020 const nomodify byte* D011 = (byte*)$d011 const nomodify byte* SCREEN = (byte*)$400 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*)$d018 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*)$d018 +const nomodify byte VICII_RSEL = 8 void __start() const byte* bitmask[] = { $80, $40, $20, $10, 8, 4, 2, 1 } void circle(signed word circle::xc , signed word circle::yc , signed word circle::r) @@ -443,10 +443,10 @@ Adding number conversion cast (snumber) $28*$19*8 in fill::size#0 = $28*$19*8 Adding number conversion cast (unumber) 0 in fill::val#0 = 0 Adding number conversion cast (snumber) $28*$19 in fill::size#1 = $28*$19 Adding number conversion cast (unumber) $16 in fill::val#1 = $16 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 Adding number conversion cast (snumber) $64 in circle::xc#0 = $64 Adding number conversion cast (snumber) $64 in circle::yc#0 = $64 Adding number conversion cast (snumber) $32 in circle::r#0 = $32 @@ -472,14 +472,14 @@ Adding number conversion cast (snumber) plot::$4 in plot::$4 = plot::$3 * (snumb Adding number conversion cast (snumber) 7 in plot::$5 = plot::x#8 & 7 Adding number conversion cast (snumber) plot::$5 in plot::$5 = plot::x#8 & (snumber)7 Successful SSA optimization PassNAddNumberTypeConversions -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 Successful SSA optimization PassNAddNumberTypeConversions Inlining cast fill::size#0 = (snumber)$28*$19*8 Inlining cast fill::val#0 = (unumber)0 Inlining cast fill::size#1 = (snumber)$28*$19 Inlining cast fill::val#1 = (unumber)$16 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast circle::xc#0 = (snumber)$64 Inlining cast circle::yc#0 = (snumber)$64 Inlining cast circle::r#0 = (snumber)$32 @@ -491,7 +491,7 @@ Simplifying constant pointer cast (byte*) 1024 Simplifying constant pointer cast (byte*) 8192 Simplifying constant integer cast 0 Simplifying constant integer cast $16 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -713,8 +713,8 @@ main::@2: scope:[main] from main to:main::@3 main::@3: scope:[main] from main::@2 [4] *BORDER_COLOR = BLUE - [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [7] call circle to:main::@1 main::@1: scope:[main] from main::@1 main::@3 @@ -989,8 +989,8 @@ Allocated zp[1]:47 [ plot::$5 ] Allocated zp[1]:48 [ plot::$6 ] REGISTER UPLIFT POTENTIAL REGISTERS Statement [4] *BORDER_COLOR = BLUE [ ] ( [ ] { } ) always clobbers reg byte a -Statement [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] fill::end#0 = fill::addr#0 + fill::size#2 [ fill::addr#0 fill::val#4 fill::end#0 ] ( fill:1 [ fill::addr#0 fill::val#4 fill::end#0 ] { } fill:3 [ fill::addr#0 fill::val#4 fill::end#0 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:4 [ fill::val#4 ] Statement [12] if(fill::addr#2!=fill::end#0) goto fill::@2 [ fill::val#4 fill::end#0 fill::addr#2 ] ( fill:1 [ fill::val#4 fill::end#0 fill::addr#2 ] { } fill:3 [ fill::val#4 fill::end#0 fill::addr#2 ] { } ) always clobbers reg byte a @@ -1034,8 +1034,8 @@ Statement [66] plot::$5 = plot::x#8 & 7 [ plot::location#3 plot::$5 ] ( circle:7 Statement [67] plot::$6 = *plot::location#3 | bitmask[plot::$5] [ plot::location#3 plot::$6 ] ( circle:7::plot:29 [ circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$6 ] { { plot::x#0 = plot::x#8 } { plot::y#0 = plot::y#8 } } circle:7::plot:32 [ circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$6 ] { { plot::x#1 = plot::x#8 } { plot::y#1 = plot::y#8 } } circle:7::plot:35 [ circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$6 ] { { plot::x#2 = plot::x#8 } { plot::y#2 = plot::y#8 } } circle:7::plot:38 [ circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$6 ] { { plot::x#3 = plot::x#8 } { plot::y#3 = plot::y#8 } } circle:7::plot:41 [ circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$6 ] { { plot::x#4 = plot::x#8 } { plot::y#4 = plot::y#8 } } circle:7::plot:44 [ circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$6 ] { { plot::x#5 = plot::x#8 } { plot::y#5 = plot::y#8 } } circle:7::plot:47 [ circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$6 ] { { plot::x#6 = plot::x#8 } { plot::y#6 = plot::y#8 } } circle:7::plot:50 [ circle::x1#10 circle::y#10 circle::p#10 plot::location#3 plot::$6 ] { { plot::x#7 = plot::x#8 } { plot::y#7 = plot::y#8 } } ) always clobbers reg byte a reg byte y Statement [68] *plot::location#3 = plot::$6 [ ] ( circle:7::plot:29 [ circle::x1#10 circle::y#10 circle::p#10 ] { { plot::x#0 = plot::x#8 } { plot::y#0 = plot::y#8 } } circle:7::plot:32 [ circle::x1#10 circle::y#10 circle::p#10 ] { { plot::x#1 = plot::x#8 } { plot::y#1 = plot::y#8 } } circle:7::plot:35 [ circle::x1#10 circle::y#10 circle::p#10 ] { { plot::x#2 = plot::x#8 } { plot::y#2 = plot::y#8 } } circle:7::plot:38 [ circle::x1#10 circle::y#10 circle::p#10 ] { { plot::x#3 = plot::x#8 } { plot::y#3 = plot::y#8 } } circle:7::plot:41 [ circle::x1#10 circle::y#10 circle::p#10 ] { { plot::x#4 = plot::x#8 } { plot::y#4 = plot::y#8 } } circle:7::plot:44 [ circle::x1#10 circle::y#10 circle::p#10 ] { { plot::x#5 = plot::x#8 } { plot::y#5 = plot::y#8 } } circle:7::plot:47 [ circle::x1#10 circle::y#10 circle::p#10 ] { { plot::x#6 = plot::x#8 } { plot::y#6 = plot::y#8 } } circle:7::plot:50 [ circle::x1#10 circle::y#10 circle::p#10 ] { { plot::x#7 = plot::x#8 } { plot::y#7 = plot::y#8 } } ) always clobbers reg byte y Statement [4] *BORDER_COLOR = BLUE [ ] ( [ ] { } ) always clobbers reg byte a -Statement [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] fill::end#0 = fill::addr#0 + fill::size#2 [ fill::addr#0 fill::val#4 fill::end#0 ] ( fill:1 [ fill::addr#0 fill::val#4 fill::end#0 ] { } fill:3 [ fill::addr#0 fill::val#4 fill::end#0 ] { } ) always clobbers reg byte a Statement [12] if(fill::addr#2!=fill::end#0) goto fill::@2 [ fill::val#4 fill::end#0 fill::addr#2 ] ( fill:1 [ fill::val#4 fill::end#0 fill::addr#2 ] { } fill:3 [ fill::val#4 fill::end#0 fill::addr#2 ] { } ) always clobbers reg byte a Statement [14] *fill::addr#2 = fill::val#4 [ fill::val#4 fill::end#0 fill::addr#2 ] ( fill:1 [ fill::val#4 fill::end#0 fill::addr#2 ] { } fill:3 [ fill::val#4 fill::end#0 fill::addr#2 ] { } ) always clobbers reg byte a reg byte y @@ -1159,13 +1159,13 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const BLUE = 6 .label BORDER_COLOR = $d020 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .segment Code @@ -1214,12 +1214,12 @@ main: { // [4] *BORDER_COLOR = BLUE -- _deref_pbuc1=vbuc2 lda #BLUE sta BORDER_COLOR - // [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [7] call circle // [16] phi from main::@3 to circle [phi:main::@3->circle] circle_from___b3: @@ -1798,10 +1798,10 @@ const nomodify byte BLUE = 6 const nomodify byte* BORDER_COLOR = (byte*) 53280 const nomodify byte* D011 = (byte*) 53265 const nomodify byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 const byte* bitmask[] = { $80, $40, $20, $10, 8, 4, 2, 1 } void circle(signed word circle::xc , signed word circle::yc , signed word circle::r) signed word~ circle::$10 zp[2]:6 202.0 @@ -1906,13 +1906,13 @@ Score: 6073 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const BLUE = 6 .label BORDER_COLOR = $d020 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .segment Code @@ -1957,14 +1957,14 @@ main: { // [4] *BORDER_COLOR = BLUE -- _deref_pbuc1=vbuc2 lda #BLUE sta BORDER_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [5] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [5] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) - // [6] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + // [6] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // circle(100,100,50) // [7] call circle // [16] phi from main::@3 to circle [phi:main::@3->circle] diff --git a/src/test/ref/bitmap-circle.sym b/src/test/ref/bitmap-circle.sym index 0d6462a05..1089bcc19 100644 --- a/src/test/ref/bitmap-circle.sym +++ b/src/test/ref/bitmap-circle.sym @@ -3,10 +3,10 @@ const nomodify byte BLUE = 6 const nomodify byte* BORDER_COLOR = (byte*) 53280 const nomodify byte* D011 = (byte*) 53265 const nomodify byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 const byte* bitmask[] = { $80, $40, $20, $10, 8, 4, 2, 1 } void circle(signed word circle::xc , signed word circle::yc , signed word circle::r) signed word~ circle::$10 zp[2]:6 202.0 diff --git a/src/test/ref/bitmap-line-anim-1.asm b/src/test/ref/bitmap-line-anim-1.asm index b443156a9..97b6eef51 100644 --- a/src/test/ref/bitmap-line-anim-1.asm +++ b/src/test/ref/bitmap-line-anim-1.asm @@ -8,13 +8,13 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .label next = 5 @@ -25,12 +25,12 @@ main: { sta BORDER_COLOR // *BG_COLOR = 0 sta BG_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // bitmap_init(BITMAP) jsr bitmap_init // bitmap_clear() diff --git a/src/test/ref/bitmap-line-anim-1.cfg b/src/test/ref/bitmap-line-anim-1.cfg index e47e195af..460c3b2e7 100644 --- a/src/test/ref/bitmap-line-anim-1.cfg +++ b/src/test/ref/bitmap-line-anim-1.cfg @@ -3,8 +3,8 @@ void main() main: scope:[main] from [0] *BORDER_COLOR = 0 [1] *BG_COLOR = 0 - [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [4] call bitmap_init to:main::@2 main::@2: scope:[main] from main diff --git a/src/test/ref/bitmap-line-anim-1.log b/src/test/ref/bitmap-line-anim-1.log index 14f03afff..8b858db5f 100644 --- a/src/test/ref/bitmap-line-anim-1.log +++ b/src/test/ref/bitmap-line-anim-1.log @@ -567,8 +567,8 @@ main: scope:[main] from __start::@1 next#14 = phi( __start::@1/next#11 ) *BORDER_COLOR = 0 *BG_COLOR = 0 - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 bitmap_init::bitmap#0 = BITMAP call bitmap_init to:main::@2 @@ -646,10 +646,10 @@ const nomodify byte* BITMAP = (byte*)$2000 const nomodify byte* BORDER_COLOR = (byte*)$d020 const nomodify byte* D011 = (byte*)$d011 const nomodify byte* SCREEN = (byte*)$400 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*)$d018 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*)$d018 +const nomodify byte VICII_RSEL = 8 void __start() void bitmap_clear() bool~ bitmap_clear::$0 @@ -1137,25 +1137,25 @@ Adding number conversion cast (unumber) 1 in bitmap_line_ydxd::$6 = bitmap_line_ Adding number conversion cast (unumber) bitmap_line_ydxd::$6 in bitmap_line_ydxd::$6 = bitmap_line_ydxd::y1#2 + (unumber)1 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) 0 in *BG_COLOR = 0 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 Adding number conversion cast (unumber) 0 in bitmap_line::x0#0 = 0 Adding number conversion cast (unumber) 0 in bitmap_line::y0#0 = 0 Adding number conversion cast (unumber) $64 in bitmap_line::y1#0 = $64 Adding number conversion cast (unumber) $400 in init_screen::$0 = init_screen::c#2 != SCREEN+$400 Adding number conversion cast (unumber) $14 in *init_screen::c#3 = $14 Successful SSA optimization PassNAddNumberTypeConversions -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 Successful SSA optimization PassNAddNumberTypeConversions Inlining cast bitmap_init::bits#2 = (unumber)$80 Inlining cast *bitmap_clear::bitmap#2 = (unumber)0 Inlining cast bitmap_plot::plotter#0 = (byte*)bitmap_plot::$0 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast *BG_COLOR = (unumber)0 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast bitmap_line::x0#0 = (unumber)0 Inlining cast bitmap_line::y0#0 = (unumber)0 Inlining cast bitmap_line::y1#0 = (unumber)$64 @@ -1194,7 +1194,7 @@ Simplifying constant integer cast 1 Simplifying constant integer cast 1 Simplifying constant integer cast 0 Simplifying constant integer cast 0 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -1776,8 +1776,8 @@ void main() main: scope:[main] from [0] *BORDER_COLOR = 0 [1] *BG_COLOR = 0 - [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [4] call bitmap_init to:main::@2 main::@2: scope:[main] from main @@ -2336,8 +2336,8 @@ REGISTER UPLIFT POTENTIAL REGISTERS Equivalence Class zp[1]:31 [ bitmap_init::$7 ] has ALU potential. Statement [0] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [1] *BG_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [17] bitmap_plot_xhi[bitmap_init::x#2] = >BITMAP [ bitmap_init::x#2 bitmap_init::bits#3 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:3 [ bitmap_init::x#2 bitmap_init::x#1 ] Removing always clobbered register reg byte a as potential for zp[1]:4 [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] @@ -2408,8 +2408,8 @@ Removing always clobbered register reg byte y as potential for zp[1]:25 [ bitmap Statement [129] *((byte*)bitmap_plot::plotter#0) = bitmap_plot::$1 [ ] ( bitmap_line:11::bitmap_line_ydxd:59::bitmap_plot:75 [ next#5 bitmap_line_ydxd::xd#0 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { next#5 = bitmap_line::x1#0 } { bitmap_line_ydxd::xd#0 = bitmap_line::xd#2 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } bitmap_line:11::bitmap_line_xdyd:63::bitmap_plot:88 [ next#5 bitmap_line_xdyd::xd#0 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { next#5 = bitmap_line::x1#0 bitmap_line_xdyd::x#0 } { bitmap_line_xdyd::xd#0 = bitmap_line::xd#2 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } bitmap_line:11::bitmap_line_ydxi:67::bitmap_plot:101 [ next#5 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { next#5 = bitmap_line::x1#0 } { bitmap_line_ydxi::xd#1 = bitmap_line::xd#1 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } bitmap_line:11::bitmap_line_xdyi:70::bitmap_plot:114 [ next#5 bitmap_line_xdyi::x1#1 bitmap_line_xdyi::xd#1 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { next#5 = bitmap_line::x1#0 bitmap_line_xdyi::x1#1 } { bitmap_line_xdyi::xd#1 = bitmap_line::xd#1 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } ) always clobbers reg byte y Statement [0] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [1] *BG_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [15] bitmap_init::$0 = bitmap_init::x#2 & $f8 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] { } ) always clobbers reg byte a Statement [17] bitmap_plot_xhi[bitmap_init::x#2] = >BITMAP [ bitmap_init::x#2 bitmap_init::bits#3 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a Statement [18] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 [ bitmap_init::x#2 bitmap_init::bits#3 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a @@ -2456,8 +2456,8 @@ Statement [128] bitmap_plot::$1 = *((byte*)bitmap_plot::plotter#0) | bitmap_plot Statement [129] *((byte*)bitmap_plot::plotter#0) = bitmap_plot::$1 [ ] ( bitmap_line:11::bitmap_line_ydxd:59::bitmap_plot:75 [ next#5 bitmap_line_ydxd::xd#0 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { next#5 = bitmap_line::x1#0 } { bitmap_line_ydxd::xd#0 = bitmap_line::xd#2 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } bitmap_line:11::bitmap_line_xdyd:63::bitmap_plot:88 [ next#5 bitmap_line_xdyd::xd#0 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { next#5 = bitmap_line::x1#0 bitmap_line_xdyd::x#0 } { bitmap_line_xdyd::xd#0 = bitmap_line::xd#2 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } bitmap_line:11::bitmap_line_ydxi:67::bitmap_plot:101 [ next#5 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { next#5 = bitmap_line::x1#0 } { bitmap_line_ydxi::xd#1 = bitmap_line::xd#1 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } bitmap_line:11::bitmap_line_xdyi:70::bitmap_plot:114 [ next#5 bitmap_line_xdyi::x1#1 bitmap_line_xdyi::xd#1 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { next#5 = bitmap_line::x1#0 bitmap_line_xdyi::x1#1 } { bitmap_line_xdyi::xd#1 = bitmap_line::xd#1 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } ) always clobbers reg byte y Statement [0] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [1] *BG_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [15] bitmap_init::$0 = bitmap_init::x#2 & $f8 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] { } ) always clobbers reg byte a Statement [17] bitmap_plot_xhi[bitmap_init::x#2] = >BITMAP [ bitmap_init::x#2 bitmap_init::bits#3 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a Statement [18] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 [ bitmap_init::x#2 bitmap_init::bits#3 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a @@ -2650,13 +2650,13 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .label next = 5 @@ -2669,12 +2669,12 @@ main: { // [1] *BG_COLOR = 0 -- _deref_pbuc1=vbuc2 lda #0 sta BG_COLOR - // [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [4] call bitmap_init // [13] phi from main to bitmap_init [phi:main->bitmap_init] bitmap_init_from_main: @@ -3552,10 +3552,10 @@ const nomodify byte* BITMAP = (byte*) 8192 const nomodify byte* BORDER_COLOR = (byte*) 53280 const nomodify byte* D011 = (byte*) 53265 const nomodify byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 void bitmap_clear() byte* bitmap_clear::bitmap word bitmap_clear::bitmap#0 bitmap zp[2]:7 11.0 @@ -3750,13 +3750,13 @@ Score: 30221 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .label next = 5 @@ -3770,14 +3770,14 @@ main: { // *BG_COLOR = 0 // [1] *BG_COLOR = 0 -- _deref_pbuc1=vbuc2 sta BG_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) - // [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + // [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // bitmap_init(BITMAP) // [4] call bitmap_init // [13] phi from main to bitmap_init [phi:main->bitmap_init] diff --git a/src/test/ref/bitmap-line-anim-1.sym b/src/test/ref/bitmap-line-anim-1.sym index 55782d6af..5d3a49c37 100644 --- a/src/test/ref/bitmap-line-anim-1.sym +++ b/src/test/ref/bitmap-line-anim-1.sym @@ -3,10 +3,10 @@ const nomodify byte* BITMAP = (byte*) 8192 const nomodify byte* BORDER_COLOR = (byte*) 53280 const nomodify byte* D011 = (byte*) 53265 const nomodify byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 void bitmap_clear() byte* bitmap_clear::bitmap word bitmap_clear::bitmap#0 bitmap zp[2]:7 11.0 diff --git a/src/test/ref/bitmap-line-anim-2.asm b/src/test/ref/bitmap-line-anim-2.asm index 21dc065cd..0688e00bf 100644 --- a/src/test/ref/bitmap-line-anim-2.asm +++ b/src/test/ref/bitmap-line-anim-2.asm @@ -8,15 +8,15 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const WHITE = 1 .const PURPLE = 4 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .label next = 2 @@ -27,12 +27,12 @@ main: { sta BORDER_COLOR // *BG_COLOR = 0 sta BG_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // bitmap_init(BITMAP, SCREEN) jsr bitmap_init // bitmap_clear(PURPLE, WHITE) diff --git a/src/test/ref/bitmap-line-anim-2.cfg b/src/test/ref/bitmap-line-anim-2.cfg index ac4c3554e..8baee8a68 100644 --- a/src/test/ref/bitmap-line-anim-2.cfg +++ b/src/test/ref/bitmap-line-anim-2.cfg @@ -3,8 +3,8 @@ void main() main: scope:[main] from [0] *BORDER_COLOR = 0 [1] *BG_COLOR = 0 - [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [4] call bitmap_init to:main::@3 main::@3: scope:[main] from main diff --git a/src/test/ref/bitmap-line-anim-2.log b/src/test/ref/bitmap-line-anim-2.log index e85c411b8..7ec1468c3 100644 --- a/src/test/ref/bitmap-line-anim-2.log +++ b/src/test/ref/bitmap-line-anim-2.log @@ -463,8 +463,8 @@ main: scope:[main] from __start::@1 bitmap_gfx#15 = phi( __start::@1/bitmap_gfx#17 ) *BORDER_COLOR = 0 *BG_COLOR = 0 - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 bitmap_init::gfx#0 = BITMAP bitmap_init::screen#0 = SCREEN call bitmap_init @@ -563,10 +563,10 @@ const nomodify byte* BORDER_COLOR = (byte*)$d020 const nomodify byte* D011 = (byte*)$d011 const nomodify byte PURPLE = 4 const nomodify byte* SCREEN = (byte*)$400 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*)$d018 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*)$d018 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() word abs_u16(word abs_u16::w) @@ -1014,18 +1014,18 @@ Adding number conversion cast (unumber) -1 in sgn_u16::return#2 = -1 Adding number conversion cast (unumber) 1 in sgn_u16::return#3 = 1 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) 0 in *BG_COLOR = 0 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 Adding number conversion cast (unumber) 0 in bitmap_line::x1#0 = 0 Adding number conversion cast (unumber) 0 in bitmap_line::y1#0 = 0 Adding number conversion cast (unumber) $64 in bitmap_line::y2#0 = $64 Adding number conversion cast (unumber) $140 in main::$3 = next#0 == $140 Adding number conversion cast (unumber) 0 in next#1 = 0 Successful SSA optimization PassNAddNumberTypeConversions -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 Successful SSA optimization PassNAddNumberTypeConversions Inlining cast memset::dst#0 = (byte*)memset::str#3 Inlining cast bitmap_init::bits#2 = (unumber)$80 @@ -1034,7 +1034,7 @@ Inlining cast sgn_u16::return#2 = (unumber)-1 Inlining cast sgn_u16::return#3 = (unumber)1 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast *BG_COLOR = (unumber)0 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast bitmap_line::x1#0 = (unumber)0 Inlining cast bitmap_line::y1#0 = (unumber)0 Inlining cast bitmap_line::y2#0 = (unumber)$64 @@ -1070,7 +1070,7 @@ Simplifying constant integer cast -1 Simplifying constant integer cast 1 Simplifying constant integer cast 0 Simplifying constant integer cast 0 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -1568,8 +1568,8 @@ void main() main: scope:[main] from [0] *BORDER_COLOR = 0 [1] *BG_COLOR = 0 - [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [4] call bitmap_init to:main::@3 main::@3: scope:[main] from main @@ -2063,8 +2063,8 @@ REGISTER UPLIFT POTENTIAL REGISTERS Equivalence Class zp[1]:36 [ bitmap_init::$4 ] has ALU potential. Statement [0] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [1] *BG_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] bitmap_line::x2#0 = next#6 [ next#6 bitmap_line::x2#0 ] ( [ next#6 bitmap_line::x2#0 ] { { next#6 = bitmap_line::x2#0 } } ) always clobbers reg byte a Statement [11] if(next#0!=$140) goto main::@5 [ next#0 ] ( [ next#0 ] { } ) always clobbers reg byte a Statement [31] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] ( bitmap_init:4 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] { } ) always clobbers reg byte a @@ -2116,8 +2116,8 @@ Statement [115] bitmap_plot::plotter#1 = (byte*)bitmap_plot::plotter#0 + bitmap_ Statement [117] *bitmap_plot::plotter#1 = *bitmap_plot::plotter#1 | bitmap_plot_bit[bitmap_plot::$1] [ ] ( bitmap_line:9::bitmap_plot:62 [ next#6 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#13 bitmap_line::y#4 bitmap_line::e#3 ] { { next#6 = bitmap_line::x2#0 } { bitmap_plot::y#1 = bitmap_plot::y#4 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line::x#13 } } bitmap_line:9::bitmap_plot:73 [ next#6 ] { { next#6 = bitmap_line::x2#0 } { bitmap_plot::y#2 = bitmap_plot::y#4 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line::x#6 } } bitmap_line:9::bitmap_plot:79 [ next#6 bitmap_line::x2#0 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#7 bitmap_line::y#15 bitmap_line::e1#3 ] { { next#6 = bitmap_line::x2#0 } { bitmap_plot::y#3 = bitmap_plot::y#4 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line::x#7 } } bitmap_line:9::bitmap_plot:88 [ next#6 ] { { next#6 = bitmap_line::x2#0 } } ) always clobbers reg byte a reg byte y Statement [0] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [1] *BG_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] bitmap_line::x2#0 = next#6 [ next#6 bitmap_line::x2#0 ] ( [ next#6 bitmap_line::x2#0 ] { { next#6 = bitmap_line::x2#0 } } ) always clobbers reg byte a Statement [11] if(next#0!=$140) goto main::@5 [ next#0 ] ( [ next#0 ] { } ) always clobbers reg byte a Statement [24] bitmap_init::$7 = bitmap_init::y#2 & 7 [ bitmap_init::y#2 bitmap_init::yoffs#2 bitmap_init::$7 ] ( bitmap_init:4 [ bitmap_init::y#2 bitmap_init::yoffs#2 bitmap_init::$7 ] { } ) always clobbers reg byte a @@ -2281,15 +2281,15 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const WHITE = 1 .const PURPLE = 4 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .label next = 2 @@ -2302,12 +2302,12 @@ main: { // [1] *BG_COLOR = 0 -- _deref_pbuc1=vbuc2 lda #0 sta BG_COLOR - // [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [4] call bitmap_init // [14] phi from main to bitmap_init [phi:main->bitmap_init] bitmap_init_from_main: @@ -3233,10 +3233,10 @@ const nomodify byte* BORDER_COLOR = (byte*) 53280 const nomodify byte* D011 = (byte*) 53265 const nomodify byte PURPLE = 4 const nomodify byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 word abs_u16(word abs_u16::w) byte~ abs_u16::$0 reg byte a 2002.0 @@ -3412,15 +3412,15 @@ Score: 30180 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const WHITE = 1 .const PURPLE = 4 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 .label SCREEN = $400 .label BITMAP = $2000 .label next = 2 @@ -3434,14 +3434,14 @@ main: { // *BG_COLOR = 0 // [1] *BG_COLOR = 0 -- _deref_pbuc1=vbuc2 sta BG_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) - // [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + // [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // bitmap_init(BITMAP, SCREEN) // [4] call bitmap_init // [14] phi from main to bitmap_init [phi:main->bitmap_init] diff --git a/src/test/ref/bitmap-line-anim-2.sym b/src/test/ref/bitmap-line-anim-2.sym index ae8841489..886cebe39 100644 --- a/src/test/ref/bitmap-line-anim-2.sym +++ b/src/test/ref/bitmap-line-anim-2.sym @@ -4,10 +4,10 @@ const nomodify byte* BORDER_COLOR = (byte*) 53280 const nomodify byte* D011 = (byte*) 53265 const nomodify byte PURPLE = 4 const nomodify byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 word abs_u16(word abs_u16::w) byte~ abs_u16::$0 reg byte a 2002.0 diff --git a/src/test/ref/bitmap-plot-0.asm b/src/test/ref/bitmap-plot-0.asm index af46d7fd5..1ee874010 100644 --- a/src/test/ref/bitmap-plot-0.asm +++ b/src/test/ref/bitmap-plot-0.asm @@ -13,9 +13,9 @@ :BasicUpstart(__start) // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -28,7 +28,7 @@ .const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d .label RASTER = $d012 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -90,8 +90,8 @@ main: { jsr bitmap_init // bitmap_clear(BLACK, WHITE) jsr bitmap_clear - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // *D018 = toD018(SCREEN, BITMAP) lda #toD0181_return @@ -268,11 +268,11 @@ init_irq: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL |=$80 + // *VICII_CONTROL |=$80 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 lda #0 sta RASTER diff --git a/src/test/ref/bitmap-plot-0.cfg b/src/test/ref/bitmap-plot-0.cfg index 895fb5fca..bca903b21 100644 --- a/src/test/ref/bitmap-plot-0.cfg +++ b/src/test/ref/bitmap-plot-0.cfg @@ -40,7 +40,7 @@ main::@8: scope:[main] from main [14] call bitmap_clear to:main::@9 main::@9: scope:[main] from main::@8 - [15] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [15] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::toD0181 main::toD0181: scope:[main] from main::@9 [16] phi() @@ -147,7 +147,7 @@ init_irq: scope:[init_irq] from main::@7 [62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [63] *PROCPORT = PROCPORT_RAM_IO [64] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [65] *VIC_CONTROL = *VIC_CONTROL | $80 + [65] *VICII_CONTROL = *VICII_CONTROL | $80 [66] *RASTER = 0 [67] *IRQ_ENABLE = IRQ_RASTER [68] *HARDWARE_IRQ = &irq diff --git a/src/test/ref/bitmap-plot-0.log b/src/test/ref/bitmap-plot-0.log index e43251406..57b31efc5 100644 --- a/src/test/ref/bitmap-plot-0.log +++ b/src/test/ref/bitmap-plot-0.log @@ -201,7 +201,7 @@ main::@8: scope:[main] from main main::@9: scope:[main] from main::@8 bitmap_screen#33 = phi( main::@8/bitmap_screen#2 ) bitmap_gfx#34 = phi( main::@8/bitmap_gfx#2 ) - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 main::toD0181_screen#0 = SCREEN main::toD0181_gfx#0 = BITMAP to:main::toD0181 @@ -333,7 +333,7 @@ init_irq: scope:[init_irq] from main::@7 *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK *PROCPORT = PROCPORT_RAM_IO *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - *VIC_CONTROL = *VIC_CONTROL | $80 + *VICII_CONTROL = *VICII_CONTROL | $80 *RASTER = 0 *IRQ_ENABLE = IRQ_RASTER *HARDWARE_IRQ = &irq @@ -407,10 +407,10 @@ const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*)$d012 const byte* SCREEN = (byte*)$400 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*)$d011 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*)$d011 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) @@ -695,8 +695,8 @@ Adding number conversion cast (unumber) bitmap_clear::$1 in bitmap_clear::$1 = b Adding number conversion cast (unumber) 0 in memset::c#1 = 0 Adding number conversion cast (unumber) $fff8 in bitmap_plot::$0 = bitmap_plot::x#1 & $fff8 Adding number conversion cast (unumber) bitmap_plot::$0 in bitmap_plot::$0 = bitmap_plot::x#1 & (unumber)$fff8 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) $3fff in main::toD0181_$0 = main::toD0181_$7 & $3fff Adding number conversion cast (unumber) main::toD0181_$0 in main::toD0181_$0 = main::toD0181_$7 & (unumber)$3fff Adding number conversion cast (unumber) 4 in main::toD0181_$1 = main::toD0181_$0 * 4 @@ -711,14 +711,14 @@ Adding number conversion cast (unumber) $13f in main::$5 = main::x#1 == $13f Adding number conversion cast (unumber) 0 in main::$6 = main::x#1 == 0 Adding number conversion cast (unumber) $c7 in main::$10 = main::y#4 == $c7 Adding number conversion cast (unumber) 0 in main::$11 = main::y#4 == 0 -Adding number conversion cast (unumber) $80 in *VIC_CONTROL = *VIC_CONTROL | $80 +Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80 Adding number conversion cast (unumber) 0 in *RASTER = 0 Adding number conversion cast (unumber) 0 in irq::$1 = 0 != frame_cnt Successful SSA optimization PassNAddNumberTypeConversions Inlining cast memset::dst#0 = (byte*)memset::str#3 Inlining cast bitmap_init::bits#2 = (unumber)$80 Inlining cast memset::c#1 = (unumber)0 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *RASTER = (unumber)0 Successful SSA optimization Pass2InlineCast Simplifying constant pointer cast (byte*) 53266 @@ -746,7 +746,7 @@ Simplifying constant integer cast 0 Simplifying constant integer cast bitmap_plot_yhi[bitmap_plot::y#1] Simplifying constant integer cast bitmap_plot_ylo[bitmap_plot::y#1] Simplifying constant integer cast $fff8 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast 4 @@ -1181,7 +1181,7 @@ main::@8: scope:[main] from main [14] call bitmap_clear to:main::@9 main::@9: scope:[main] from main::@8 - [15] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [15] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::toD0181 main::toD0181: scope:[main] from main::@9 [16] phi() @@ -1288,7 +1288,7 @@ init_irq: scope:[init_irq] from main::@7 [62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [63] *PROCPORT = PROCPORT_RAM_IO [64] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [65] *VIC_CONTROL = *VIC_CONTROL | $80 + [65] *VICII_CONTROL = *VICII_CONTROL | $80 [66] *RASTER = 0 [67] *IRQ_ENABLE = IRQ_RASTER [68] *HARDWARE_IRQ = &irq @@ -1491,7 +1491,7 @@ Statement [6] if(0==frame_cnt) goto irq::@1 [ frame_cnt ] ( [ frame_cnt ] { } Statement [8] *BG_COLOR = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y -Statement [15] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [15] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [17] *D018 = main::toD0181_return#0 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [20] bitmap_plot::x#0 = main::x#2 [ frame_cnt main::x#2 main::y#2 main::vx#2 main::vy#2 bitmap_plot::x#0 ] ( main:3 [ frame_cnt main::x#2 main::y#2 main::vx#2 main::vy#2 bitmap_plot::x#0 ] { { bitmap_plot::x#0 = main::x#2 } { bitmap_plot::y#0 = main::y#2 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:4 [ main::y#2 main::y#1 ] @@ -1510,7 +1510,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:10 [ bitmap Statement [62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [63] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [64] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a -Statement [65] *VIC_CONTROL = *VIC_CONTROL | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [65] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [66] *RASTER = 0 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [67] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [68] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a @@ -1533,7 +1533,7 @@ Statement [6] if(0==frame_cnt) goto irq::@1 [ frame_cnt ] ( [ frame_cnt ] { } Statement [8] *BG_COLOR = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y -Statement [15] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [15] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [17] *D018 = main::toD0181_return#0 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [20] bitmap_plot::x#0 = main::x#2 [ frame_cnt main::x#2 main::y#2 main::vx#2 main::vy#2 bitmap_plot::x#0 ] ( main:3 [ frame_cnt main::x#2 main::y#2 main::vx#2 main::vy#2 bitmap_plot::x#0 ] { { bitmap_plot::x#0 = main::x#2 } { bitmap_plot::y#0 = main::y#2 } } ) always clobbers reg byte a Statement [23] main::x#1 = main::x#2 + main::vx#2 [ frame_cnt main::y#2 main::vx#2 main::vy#2 main::x#1 ] ( main:3 [ frame_cnt main::y#2 main::vx#2 main::vy#2 main::x#1 ] { } ) always clobbers reg byte a @@ -1550,7 +1550,7 @@ Statement [51] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitma Statement [62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [63] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [64] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a -Statement [65] *VIC_CONTROL = *VIC_CONTROL | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [65] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [66] *RASTER = 0 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [67] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a Statement [68] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a @@ -1659,9 +1659,9 @@ ASSEMBLER BEFORE OPTIMIZATION // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -1674,7 +1674,7 @@ ASSEMBLER BEFORE OPTIMIZATION .const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d .label RASTER = $d012 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -1776,8 +1776,8 @@ main: { jmp __b9 // main::@9 __b9: - // [15] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [15] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [16] phi from main::@9 to main::toD0181 [phi:main::@9->main::toD0181] toD0181_from___b9: @@ -2083,11 +2083,11 @@ init_irq: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // [65] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // [65] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // [66] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 sta RASTER @@ -2338,10 +2338,10 @@ const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*) 53266 const byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) @@ -2463,9 +2463,9 @@ Score: 3222 // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -2478,7 +2478,7 @@ Score: 3222 .const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d .label RASTER = $d012 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -2569,9 +2569,9 @@ main: { // [56] phi from main::@8 to bitmap_clear [phi:main::@8->bitmap_clear] jsr bitmap_clear // main::@9 - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [15] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [15] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [16] phi from main::@9 to main::toD0181 [phi:main::@9->main::toD0181] // main::toD0181 @@ -2851,12 +2851,12 @@ init_irq: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL |=$80 - // [65] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // *VICII_CONTROL |=$80 + // [65] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 // [66] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 diff --git a/src/test/ref/bitmap-plot-0.sym b/src/test/ref/bitmap-plot-0.sym index 4e94d9bdc..c40049582 100644 --- a/src/test/ref/bitmap-plot-0.sym +++ b/src/test/ref/bitmap-plot-0.sym @@ -16,10 +16,10 @@ const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*) 53266 const byte* SCREEN = (byte*) 1024 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) diff --git a/src/test/ref/bitmap-plot-1.asm b/src/test/ref/bitmap-plot-1.asm index 1a531cc17..fd72d0c0b 100644 --- a/src/test/ref/bitmap-plot-1.asm +++ b/src/test/ref/bitmap-plot-1.asm @@ -13,9 +13,9 @@ :BasicUpstart(__start) // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -35,7 +35,7 @@ .const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d .label RASTER = $d012 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -111,8 +111,8 @@ main: { jsr bitmap_init // bitmap_clear(BLACK, WHITE) jsr bitmap_clear - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // *D018 = toD018(SCREEN, BITMAP) lda #toD0181_return @@ -488,11 +488,11 @@ init_irq: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL |=$80 + // *VICII_CONTROL |=$80 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 lda #0 sta RASTER diff --git a/src/test/ref/bitmap-plot-1.cfg b/src/test/ref/bitmap-plot-1.cfg index 115baf3eb..b7c3d2fac 100644 --- a/src/test/ref/bitmap-plot-1.cfg +++ b/src/test/ref/bitmap-plot-1.cfg @@ -44,7 +44,7 @@ main::@7: scope:[main] from main::@6 [16] call bitmap_clear to:main::@8 main::@8: scope:[main] from main::@7 - [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::toD0181 main::toD0181: scope:[main] from main::@8 [18] phi() @@ -204,7 +204,7 @@ init_irq: scope:[init_irq] from main::@5 [101] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [102] *PROCPORT = PROCPORT_RAM_IO [103] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [104] *VIC_CONTROL = *VIC_CONTROL | $80 + [104] *VICII_CONTROL = *VICII_CONTROL | $80 [105] *RASTER = 0 [106] *IRQ_ENABLE = IRQ_RASTER [107] *HARDWARE_IRQ = &irq diff --git a/src/test/ref/bitmap-plot-1.log b/src/test/ref/bitmap-plot-1.log index bf4cd001e..b582f62e1 100644 --- a/src/test/ref/bitmap-plot-1.log +++ b/src/test/ref/bitmap-plot-1.log @@ -686,7 +686,7 @@ main::@10: scope:[main] from main::@9 bitmap_screen#34 = phi( main::@9/bitmap_screen#2 ) bitmap_gfx#35 = phi( main::@9/bitmap_gfx#2 ) rem16u#41 = phi( main::@9/rem16u#43 ) - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 main::toD0181_screen#0 = SCREEN main::toD0181_gfx#0 = BITMAP to:main::toD0181 @@ -848,7 +848,7 @@ init_irq: scope:[init_irq] from main::@7 *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK *PROCPORT = PROCPORT_RAM_IO *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - *VIC_CONTROL = *VIC_CONTROL | $80 + *VICII_CONTROL = *VICII_CONTROL | $80 *RASTER = 0 *IRQ_ENABLE = IRQ_RASTER *HARDWARE_IRQ = &irq @@ -933,10 +933,10 @@ const nomodify byte* RASTER = (byte*)$d012 const byte* SCREEN = (byte*)$400 const signed word* SINE[$200] = { fill( $200, 0) } const byte SIZEOF_SIGNED_WORD = 2 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*)$d011 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*)$d011 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) @@ -1680,8 +1680,8 @@ Adding number conversion cast (unumber) bitmap_plot::$0 in bitmap_plot::$0 = bit Adding number conversion cast (unumber) $200 in sin16s_gen2::wavelength#0 = $200 Adding number conversion cast (snumber) -$1001 in sin16s_gen2::min#0 = -$1001 Adding number conversion cast (snumber) $1001 in sin16s_gen2::max#0 = $1001 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) $3fff in main::toD0181_$0 = main::toD0181_$7 & $3fff Adding number conversion cast (unumber) main::toD0181_$0 in main::toD0181_$0 = main::toD0181_$7 & (unumber)$3fff Adding number conversion cast (unumber) 4 in main::toD0181_$1 = main::toD0181_$0 * 4 @@ -1704,7 +1704,7 @@ Adding number conversion cast (unumber) $200 in main::$14 = main::idx_x#1 == $20 Adding number conversion cast (unumber) $200 in main::$16 = main::idx_y#1 == $200 Adding number conversion cast (unumber) 0 in main::idx_x#2 = 0 Adding number conversion cast (unumber) 0 in main::idx_y#2 = 0 -Adding number conversion cast (unumber) $80 in *VIC_CONTROL = *VIC_CONTROL | $80 +Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80 Adding number conversion cast (unumber) 0 in *RASTER = 0 Adding number conversion cast (unumber) 0 in irq::$1 = 0 != frame_cnt Successful SSA optimization PassNAddNumberTypeConversions @@ -1722,7 +1722,7 @@ Inlining cast memset::c#1 = (unumber)0 Inlining cast sin16s_gen2::wavelength#0 = (unumber)$200 Inlining cast sin16s_gen2::min#0 = (snumber)-$1001 Inlining cast sin16s_gen2::max#0 = (snumber)$1001 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast mul16s::a#1 = (snumber)$a0 Inlining cast mul16s::a#2 = (snumber)$64 Inlining cast main::idx_x#2 = (unumber)0 @@ -1783,7 +1783,7 @@ Simplifying constant integer cast $fff8 Simplifying constant integer cast $200 Simplifying constant integer cast -$1001 Simplifying constant integer cast $1001 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast 4 @@ -2602,7 +2602,7 @@ main::@7: scope:[main] from main::@6 [16] call bitmap_clear to:main::@8 main::@8: scope:[main] from main::@7 - [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::toD0181 main::toD0181: scope:[main] from main::@8 [18] phi() @@ -2762,7 +2762,7 @@ init_irq: scope:[init_irq] from main::@5 [101] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [102] *PROCPORT = PROCPORT_RAM_IO [103] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [104] *VIC_CONTROL = *VIC_CONTROL | $80 + [104] *VICII_CONTROL = *VICII_CONTROL | $80 [105] *RASTER = 0 [106] *IRQ_ENABLE = IRQ_RASTER [107] *HARDWARE_IRQ = &irq @@ -3581,7 +3581,7 @@ Statement [6] if(0==frame_cnt) goto irq::@1 [ frame_cnt ] ( [ frame_cnt ] { } Statement [8] *BG_COLOR = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y -Statement [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [19] *D018 = main::toD0181_return#0 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [22] main::$19 = main::idx_x#3 << 1 [ frame_cnt main::idx_x#3 main::idx_y#3 main::$19 ] ( main:3 [ frame_cnt main::idx_x#3 main::idx_y#3 main::$19 ] { { mul16s::b#1 = mul16s::b#3 main::cos_x#0 } { mul16s::return#0 = mul16s::return#3 } } ) always clobbers reg byte a Statement [23] main::$21 = SINE + main::$19 [ frame_cnt main::idx_x#3 main::idx_y#3 main::$21 ] ( main:3 [ frame_cnt main::idx_x#3 main::idx_y#3 main::$21 ] { { mul16s::b#1 = mul16s::b#3 main::cos_x#0 } { mul16s::return#0 = mul16s::return#3 } } ) always clobbers reg byte a @@ -3621,7 +3621,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:16 [ bitmap Statement [101] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [102] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [103] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a -Statement [104] *VIC_CONTROL = *VIC_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [104] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [105] *RASTER = 0 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [106] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [107] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a @@ -3708,7 +3708,7 @@ Statement [6] if(0==frame_cnt) goto irq::@1 [ frame_cnt ] ( [ frame_cnt ] { } Statement [8] *BG_COLOR = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y -Statement [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [19] *D018 = main::toD0181_return#0 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [22] main::$19 = main::idx_x#3 << 1 [ frame_cnt main::idx_x#3 main::idx_y#3 main::$19 ] ( main:3 [ frame_cnt main::idx_x#3 main::idx_y#3 main::$19 ] { { mul16s::b#1 = mul16s::b#3 main::cos_x#0 } { mul16s::return#0 = mul16s::return#3 } } ) always clobbers reg byte a Statement [23] main::$21 = SINE + main::$19 [ frame_cnt main::idx_x#3 main::idx_y#3 main::$21 ] ( main:3 [ frame_cnt main::idx_x#3 main::idx_y#3 main::$21 ] { { mul16s::b#1 = mul16s::b#3 main::cos_x#0 } { mul16s::return#0 = mul16s::return#3 } } ) always clobbers reg byte a @@ -3748,7 +3748,7 @@ Statement [90] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitma Statement [101] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [102] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [103] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a -Statement [104] *VIC_CONTROL = *VIC_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [104] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [105] *RASTER = 0 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [106] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [107] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a @@ -4072,9 +4072,9 @@ ASSEMBLER BEFORE OPTIMIZATION // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -4094,7 +4094,7 @@ ASSEMBLER BEFORE OPTIMIZATION .const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d .label RASTER = $d012 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -4217,8 +4217,8 @@ main: { jmp __b8 // main::@8 __b8: - // [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [18] phi from main::@8 to main::toD0181 [phi:main::@8->main::toD0181] toD0181_from___b8: @@ -4782,11 +4782,11 @@ init_irq: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // [104] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // [104] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // [105] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 sta RASTER @@ -5907,10 +5907,10 @@ const nomodify byte* RASTER = (byte*) 53266 const byte* SCREEN = (byte*) 1024 const signed word* SINE[$200] = { fill( $200, 0) } const byte SIZEOF_SIGNED_WORD = 2 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) @@ -6232,9 +6232,9 @@ Score: 20494 // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -6254,7 +6254,7 @@ Score: 20494 .const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d .label RASTER = $d012 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -6363,9 +6363,9 @@ main: { // [95] phi from main::@7 to bitmap_clear [phi:main::@7->bitmap_clear] jsr bitmap_clear // main::@8 - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [18] phi from main::@8 to main::toD0181 [phi:main::@8->main::toD0181] // main::toD0181 @@ -6904,12 +6904,12 @@ init_irq: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL |=$80 - // [104] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // *VICII_CONTROL |=$80 + // [104] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 // [105] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 diff --git a/src/test/ref/bitmap-plot-1.sym b/src/test/ref/bitmap-plot-1.sym index 5fd686198..93e0e6a3d 100644 --- a/src/test/ref/bitmap-plot-1.sym +++ b/src/test/ref/bitmap-plot-1.sym @@ -21,10 +21,10 @@ const nomodify byte* RASTER = (byte*) 53266 const byte* SCREEN = (byte*) 1024 const signed word* SINE[$200] = { fill( $200, 0) } const byte SIZEOF_SIGNED_WORD = 2 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) diff --git a/src/test/ref/bitmap-plot-2.asm b/src/test/ref/bitmap-plot-2.asm index 960d3fd35..75cba7647 100644 --- a/src/test/ref/bitmap-plot-2.asm +++ b/src/test/ref/bitmap-plot-2.asm @@ -13,9 +13,9 @@ :BasicUpstart(__start) // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -36,7 +36,7 @@ .label RASTER = $d012 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -116,8 +116,8 @@ main: { jsr bitmap_init // bitmap_clear(BLACK, WHITE) jsr bitmap_clear - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // *D018 = toD018(SCREEN, BITMAP) lda #toD0181_return @@ -524,11 +524,11 @@ init_irq: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL |=$80 + // *VICII_CONTROL |=$80 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 lda #0 sta RASTER diff --git a/src/test/ref/bitmap-plot-2.cfg b/src/test/ref/bitmap-plot-2.cfg index b2eed0c71..510cdf2f5 100644 --- a/src/test/ref/bitmap-plot-2.cfg +++ b/src/test/ref/bitmap-plot-2.cfg @@ -44,7 +44,7 @@ main::@10: scope:[main] from main::@9 [16] call bitmap_clear to:main::@11 main::@11: scope:[main] from main::@10 - [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::toD0181 main::toD0181: scope:[main] from main::@11 [18] phi() @@ -223,7 +223,7 @@ init_irq: scope:[init_irq] from main::@8 [110] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [111] *PROCPORT = PROCPORT_RAM_IO [112] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [113] *VIC_CONTROL = *VIC_CONTROL | $80 + [113] *VICII_CONTROL = *VICII_CONTROL | $80 [114] *RASTER = 0 [115] *IRQ_ENABLE = IRQ_RASTER [116] *HARDWARE_IRQ = &irq diff --git a/src/test/ref/bitmap-plot-2.log b/src/test/ref/bitmap-plot-2.log index 4737beac5..e5c65216f 100644 --- a/src/test/ref/bitmap-plot-2.log +++ b/src/test/ref/bitmap-plot-2.log @@ -686,7 +686,7 @@ main::@14: scope:[main] from main::@13 bitmap_screen#38 = phi( main::@13/bitmap_screen#2 ) bitmap_gfx#39 = phi( main::@13/bitmap_gfx#2 ) rem16u#45 = phi( main::@13/rem16u#47 ) - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 main::toD0181_screen#0 = SCREEN main::toD0181_gfx#0 = BITMAP to:main::toD0181 @@ -910,7 +910,7 @@ init_irq: scope:[init_irq] from main::@11 *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK *PROCPORT = PROCPORT_RAM_IO *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - *VIC_CONTROL = *VIC_CONTROL | $80 + *VICII_CONTROL = *VICII_CONTROL | $80 *RASTER = 0 *IRQ_ENABLE = IRQ_RASTER *HARDWARE_IRQ = &irq @@ -996,10 +996,10 @@ const nomodify byte* RASTER = (byte*)$d012 const byte* SCREEN = (byte*)$400 const signed word* SINE[$200] = { fill( $200, 0) } const byte SIZEOF_SIGNED_WORD = 2 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*)$d011 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*)$d011 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) @@ -1795,8 +1795,8 @@ Adding number conversion cast (unumber) bitmap_plot::$0 in bitmap_plot::$0 = bit Adding number conversion cast (unumber) $200 in sin16s_gen2::wavelength#0 = $200 Adding number conversion cast (snumber) -$1001 in sin16s_gen2::min#0 = -$1001 Adding number conversion cast (snumber) $1001 in sin16s_gen2::max#0 = $1001 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) $3fff in main::toD0181_$0 = main::toD0181_$7 & $3fff Adding number conversion cast (unumber) main::toD0181_$0 in main::toD0181_$0 = main::toD0181_$7 & (unumber)$3fff Adding number conversion cast (unumber) 4 in main::toD0181_$1 = main::toD0181_$0 * 4 @@ -1821,7 +1821,7 @@ Adding number conversion cast (unumber) 1 in main::$20 = main::r_add#4 != 1 Adding number conversion cast (unumber) 0 in main::idx_y#2 = 0 Adding number conversion cast (snumber) $200*$c+$100 in main::$23 = main::r#5 >= $200*$c+$100 Adding number conversion cast (unumber) 2 in main::r_add#1 = main::r_add#5 / 2 -Adding number conversion cast (unumber) $80 in *VIC_CONTROL = *VIC_CONTROL | $80 +Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80 Adding number conversion cast (unumber) 0 in *RASTER = 0 Adding number conversion cast (unumber) 0 in irq::$1 = 0 != frame_cnt Successful SSA optimization PassNAddNumberTypeConversions @@ -1839,7 +1839,7 @@ Inlining cast memset::c#1 = (unumber)0 Inlining cast sin16s_gen2::wavelength#0 = (unumber)$200 Inlining cast sin16s_gen2::min#0 = (snumber)-$1001 Inlining cast sin16s_gen2::max#0 = (snumber)$1001 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast main::idx_x#2 = (unumber)0 Inlining cast main::idx_y#2 = (unumber)0 Inlining cast *RASTER = (unumber)0 @@ -1899,7 +1899,7 @@ Simplifying constant integer cast $fff8 Simplifying constant integer cast $200 Simplifying constant integer cast -$1001 Simplifying constant integer cast $1001 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast 4 @@ -2773,7 +2773,7 @@ main::@10: scope:[main] from main::@9 [16] call bitmap_clear to:main::@11 main::@11: scope:[main] from main::@10 - [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::toD0181 main::toD0181: scope:[main] from main::@11 [18] phi() @@ -2952,7 +2952,7 @@ init_irq: scope:[init_irq] from main::@8 [110] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [111] *PROCPORT = PROCPORT_RAM_IO [112] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [113] *VIC_CONTROL = *VIC_CONTROL | $80 + [113] *VICII_CONTROL = *VICII_CONTROL | $80 [114] *RASTER = 0 [115] *IRQ_ENABLE = IRQ_RASTER [116] *HARDWARE_IRQ = &irq @@ -3784,7 +3784,7 @@ Statement [6] if(0==frame_cnt) goto irq::@1 [ frame_cnt ] ( [ frame_cnt ] { } Statement [8] *BG_COLOR = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y -Statement [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [19] *D018 = main::toD0181_return#0 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [22] main::$26 = main::idx_x#11 << 1 [ frame_cnt main::idx_x#11 main::r#10 main::idx_y#3 main::r_add#10 main::$26 ] ( main:3 [ frame_cnt main::idx_x#11 main::r#10 main::idx_y#3 main::r_add#10 main::$26 ] { { mul16s::a#1 = mul16s::a#3 main::r#10 } { mul16s::b#1 = mul16s::b#3 main::cos_x#0 } { mul16s::return#0 = mul16s::return#3 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:8 [ main::r_add#10 main::r_add#12 main::r_add#1 ] @@ -3837,7 +3837,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:19 [ bitmap Statement [110] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [111] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [112] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a -Statement [113] *VIC_CONTROL = *VIC_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [113] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [114] *RASTER = 0 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [115] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [116] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a @@ -3924,7 +3924,7 @@ Statement [6] if(0==frame_cnt) goto irq::@1 [ frame_cnt ] ( [ frame_cnt ] { } Statement [8] *BG_COLOR = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y -Statement [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [19] *D018 = main::toD0181_return#0 [ frame_cnt ] ( main:3 [ frame_cnt ] { } ) always clobbers reg byte a Statement [22] main::$26 = main::idx_x#11 << 1 [ frame_cnt main::idx_x#11 main::r#10 main::idx_y#3 main::r_add#10 main::$26 ] ( main:3 [ frame_cnt main::idx_x#11 main::r#10 main::idx_y#3 main::r_add#10 main::$26 ] { { mul16s::a#1 = mul16s::a#3 main::r#10 } { mul16s::b#1 = mul16s::b#3 main::cos_x#0 } { mul16s::return#0 = mul16s::return#3 } } ) always clobbers reg byte a Statement [23] main::$30 = SINE + main::$26 [ frame_cnt main::idx_x#11 main::r#10 main::idx_y#3 main::r_add#10 main::$30 ] ( main:3 [ frame_cnt main::idx_x#11 main::r#10 main::idx_y#3 main::r_add#10 main::$30 ] { { mul16s::a#1 = mul16s::a#3 main::r#10 } { mul16s::b#1 = mul16s::b#3 main::cos_x#0 } { mul16s::return#0 = mul16s::return#3 } } ) always clobbers reg byte a @@ -3974,7 +3974,7 @@ Statement [99] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitma Statement [110] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [111] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [112] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a -Statement [113] *VIC_CONTROL = *VIC_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a +Statement [113] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [114] *RASTER = 0 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [115] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a Statement [116] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a @@ -4304,9 +4304,9 @@ ASSEMBLER BEFORE OPTIMIZATION // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -4327,7 +4327,7 @@ ASSEMBLER BEFORE OPTIMIZATION .label RASTER = $d012 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -4454,8 +4454,8 @@ main: { jmp __b11 // main::@11 __b11: - // [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [18] phi from main::@11 to main::toD0181 [phi:main::@11->main::toD0181] toD0181_from___b11: @@ -5073,11 +5073,11 @@ init_irq: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // [113] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // [113] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // [114] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 sta RASTER @@ -6215,10 +6215,10 @@ const nomodify byte* RASTER = (byte*) 53266 const byte* SCREEN = (byte*) 1024 const signed word* SINE[$200] = { fill( $200, 0) } const byte SIZEOF_SIGNED_WORD = 2 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) @@ -6549,9 +6549,9 @@ Score: 20654 // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -6572,7 +6572,7 @@ Score: 20654 .label RASTER = $d012 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -6685,9 +6685,9 @@ main: { // [104] phi from main::@10 to bitmap_clear [phi:main::@10->bitmap_clear] jsr bitmap_clear // main::@11 - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [17] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [17] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [18] phi from main::@11 to main::toD0181 [phi:main::@11->main::toD0181] // main::toD0181 @@ -7276,12 +7276,12 @@ init_irq: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL |=$80 - // [113] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // *VICII_CONTROL |=$80 + // [113] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 // [114] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 diff --git a/src/test/ref/bitmap-plot-2.sym b/src/test/ref/bitmap-plot-2.sym index 5d1d1a996..85c9fcf65 100644 --- a/src/test/ref/bitmap-plot-2.sym +++ b/src/test/ref/bitmap-plot-2.sym @@ -22,10 +22,10 @@ const nomodify byte* RASTER = (byte*) 53266 const byte* SCREEN = (byte*) 1024 const signed word* SINE[$200] = { fill( $200, 0) } const byte SIZEOF_SIGNED_WORD = 2 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) diff --git a/src/test/ref/bitmap-plot-3.asm b/src/test/ref/bitmap-plot-3.asm index 9b554eaab..c742c5635 100644 --- a/src/test/ref/bitmap-plot-3.asm +++ b/src/test/ref/bitmap-plot-3.asm @@ -11,9 +11,9 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const WHITE = 1 .label D011 = $d011 .label D018 = $d018 @@ -31,8 +31,8 @@ main: { jsr bitmap_init // bitmap_clear(BLACK, WHITE) jsr bitmap_clear - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // *D018 = toD018(SCREEN, BITMAP) lda #toD0181_return diff --git a/src/test/ref/bitmap-plot-3.cfg b/src/test/ref/bitmap-plot-3.cfg index 73c9c3a13..a5adcee3f 100644 --- a/src/test/ref/bitmap-plot-3.cfg +++ b/src/test/ref/bitmap-plot-3.cfg @@ -9,7 +9,7 @@ main::@5: scope:[main] from main [3] call bitmap_clear to:main::@6 main::@6: scope:[main] from main::@5 - [4] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [4] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::toD0181 main::toD0181: scope:[main] from main::@6 [5] phi() diff --git a/src/test/ref/bitmap-plot-3.log b/src/test/ref/bitmap-plot-3.log index 8c3f46726..328860933 100644 --- a/src/test/ref/bitmap-plot-3.log +++ b/src/test/ref/bitmap-plot-3.log @@ -477,7 +477,7 @@ main::@6: scope:[main] from main main::@7: scope:[main] from main::@6 bitmap_screen#30 = phi( main::@6/bitmap_screen#2 ) bitmap_gfx#31 = phi( main::@6/bitmap_gfx#2 ) - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 main::toD0181_screen#0 = SCREEN main::toD0181_gfx#0 = BITMAP to:main::toD0181 @@ -601,9 +601,9 @@ const byte RADIX::HEXADECIMAL = $10 const byte RADIX::OCTAL = 8 const byte* SCREEN = (byte*)$400 const byte* SINTAB[$180] = kickasm {{ .fill $180, 99.5+99.5*sin(i*2*PI/256) }} -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() word abs_u16(word abs_u16::w) @@ -1079,8 +1079,8 @@ Adding number conversion cast (unumber) sgn_u16::$1 in sgn_u16::$1 = sgn_u16::$0 Adding number conversion cast (unumber) 0 in sgn_u16::$2 = 0 != sgn_u16::$1 Adding number conversion cast (unumber) -1 in sgn_u16::return#2 = -1 Adding number conversion cast (unumber) 1 in sgn_u16::return#3 = 1 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) $3fff in main::toD0181_$0 = main::toD0181_$7 & $3fff Adding number conversion cast (unumber) main::toD0181_$0 in main::toD0181_$0 = main::toD0181_$7 & (unumber)$3fff Adding number conversion cast (unumber) 4 in main::toD0181_$1 = main::toD0181_$0 * 4 @@ -1108,7 +1108,7 @@ Inlining cast bitmap_init::bits#2 = (unumber)$80 Inlining cast memset::c#1 = (unumber)0 Inlining cast sgn_u16::return#2 = (unumber)-1 Inlining cast sgn_u16::return#3 = (unumber)1 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Successful SSA optimization Pass2InlineCast Simplifying constant pointer cast (byte*) 53265 Simplifying constant pointer cast (byte*) 53272 @@ -1137,7 +1137,7 @@ Simplifying constant integer cast $80 Simplifying constant integer cast 0 Simplifying constant integer cast -1 Simplifying constant integer cast 1 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast 4 @@ -1689,7 +1689,7 @@ main::@5: scope:[main] from main [3] call bitmap_clear to:main::@6 main::@6: scope:[main] from main::@5 - [4] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [4] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::toD0181 main::toD0181: scope:[main] from main::@6 [5] phi() @@ -2217,7 +2217,7 @@ Allocated zp[2]:71 [ bitmap_plot::plotter#1 ] Allocated zp[1]:73 [ bitmap_plot::$1 ] REGISTER UPLIFT POTENTIAL REGISTERS Equivalence Class zp[1]:42 [ bitmap_init::$4 ] has ALU potential. -Statement [4] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [4] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] main::$13 = (word)COSTAB[main::a#2] [ main::i#2 main::a#2 main::$13 ] ( [ main::i#2 main::a#2 main::$13 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:2 [ main::i#2 main::i#1 ] @@ -2281,7 +2281,7 @@ Statement [123] bitmap_plot::plotter#1 = (byte*)bitmap_plot::plotter#0 + bitmap_ Statement [125] *bitmap_plot::plotter#1 = *bitmap_plot::plotter#1 | bitmap_plot_bit[bitmap_plot::$1] [ ] ( bitmap_line:16::bitmap_plot:69 [ main::i#2 main::a#2 bitmap_line::y2#0 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#13 bitmap_line::y#4 bitmap_line::e#3 ] { { bitmap_plot::y#1 = bitmap_plot::y#4 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line::x#13 } } bitmap_line:16::bitmap_plot:80 [ main::i#2 main::a#2 ] { { bitmap_plot::y#2 = bitmap_plot::y#4 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line::x#6 } } bitmap_line:16::bitmap_plot:86 [ main::i#2 main::a#2 bitmap_line::x2#0 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#7 bitmap_line::y#15 bitmap_line::e1#3 ] { { bitmap_plot::y#3 = bitmap_plot::y#4 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line::x#7 } } bitmap_line:16::bitmap_plot:96 [ main::i#2 main::a#2 ] { { bitmap_plot::y#0 = bitmap_plot::y#4 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line::x1#0 } } ) always clobbers reg byte a reg byte y Removing always clobbered register reg byte y as potential for zp[1]:2 [ main::i#2 main::i#1 ] Removing always clobbered register reg byte y as potential for zp[1]:3 [ main::a#2 main::a#1 ] -Statement [4] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [4] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] main::$13 = (word)COSTAB[main::a#2] [ main::i#2 main::a#2 main::$13 ] ( [ main::i#2 main::a#2 main::$13 ] { } ) always clobbers reg byte a Statement [11] bitmap_line::x1#0 = main::$13 + $78 [ main::i#2 main::a#2 bitmap_line::x1#0 ] ( [ main::i#2 main::a#2 bitmap_line::x1#0 ] { } ) always clobbers reg byte a @@ -2340,7 +2340,7 @@ Statement [121] bitmap_plot::plotter#0 = bitmap_plot_yhi[bitmap_plot::y#4] w= bi Statement [122] bitmap_plot::$0 = bitmap_plot::x#4 & $fff8 [ bitmap_plot::x#4 bitmap_plot::plotter#0 bitmap_plot::$0 ] ( bitmap_line:16::bitmap_plot:69 [ main::i#2 main::a#2 bitmap_line::y2#0 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#13 bitmap_line::y#4 bitmap_line::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 bitmap_plot::$0 ] { { bitmap_plot::y#1 = bitmap_plot::y#4 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line::x#13 } } bitmap_line:16::bitmap_plot:80 [ main::i#2 main::a#2 bitmap_plot::x#4 bitmap_plot::plotter#0 bitmap_plot::$0 ] { { bitmap_plot::y#2 = bitmap_plot::y#4 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line::x#6 } } bitmap_line:16::bitmap_plot:86 [ main::i#2 main::a#2 bitmap_line::x2#0 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#7 bitmap_line::y#15 bitmap_line::e1#3 bitmap_plot::x#4 bitmap_plot::plotter#0 bitmap_plot::$0 ] { { bitmap_plot::y#3 = bitmap_plot::y#4 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line::x#7 } } bitmap_line:16::bitmap_plot:96 [ main::i#2 main::a#2 bitmap_plot::x#4 bitmap_plot::plotter#0 bitmap_plot::$0 ] { { bitmap_plot::y#0 = bitmap_plot::y#4 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line::x1#0 } } ) always clobbers reg byte a Statement [123] bitmap_plot::plotter#1 = (byte*)bitmap_plot::plotter#0 + bitmap_plot::$0 [ bitmap_plot::x#4 bitmap_plot::plotter#1 ] ( bitmap_line:16::bitmap_plot:69 [ main::i#2 main::a#2 bitmap_line::y2#0 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#13 bitmap_line::y#4 bitmap_line::e#3 bitmap_plot::x#4 bitmap_plot::plotter#1 ] { { bitmap_plot::y#1 = bitmap_plot::y#4 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line::x#13 } } bitmap_line:16::bitmap_plot:80 [ main::i#2 main::a#2 bitmap_plot::x#4 bitmap_plot::plotter#1 ] { { bitmap_plot::y#2 = bitmap_plot::y#4 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line::x#6 } } bitmap_line:16::bitmap_plot:86 [ main::i#2 main::a#2 bitmap_line::x2#0 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#7 bitmap_line::y#15 bitmap_line::e1#3 bitmap_plot::x#4 bitmap_plot::plotter#1 ] { { bitmap_plot::y#3 = bitmap_plot::y#4 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line::x#7 } } bitmap_line:16::bitmap_plot:96 [ main::i#2 main::a#2 bitmap_plot::x#4 bitmap_plot::plotter#1 ] { { bitmap_plot::y#0 = bitmap_plot::y#4 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line::x1#0 } } ) always clobbers reg byte a Statement [125] *bitmap_plot::plotter#1 = *bitmap_plot::plotter#1 | bitmap_plot_bit[bitmap_plot::$1] [ ] ( bitmap_line:16::bitmap_plot:69 [ main::i#2 main::a#2 bitmap_line::y2#0 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#13 bitmap_line::y#4 bitmap_line::e#3 ] { { bitmap_plot::y#1 = bitmap_plot::y#4 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line::x#13 } } bitmap_line:16::bitmap_plot:80 [ main::i#2 main::a#2 ] { { bitmap_plot::y#2 = bitmap_plot::y#4 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line::x#6 } } bitmap_line:16::bitmap_plot:86 [ main::i#2 main::a#2 bitmap_line::x2#0 bitmap_line::dx#0 bitmap_line::dy#0 bitmap_line::sx#0 bitmap_line::sy#0 bitmap_line::x#7 bitmap_line::y#15 bitmap_line::e1#3 ] { { bitmap_plot::y#3 = bitmap_plot::y#4 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line::x#7 } } bitmap_line:16::bitmap_plot:96 [ main::i#2 main::a#2 ] { { bitmap_plot::y#0 = bitmap_plot::y#4 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line::x1#0 } } ) always clobbers reg byte a reg byte y -Statement [4] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [4] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] if(main::i#2!=8) goto main::@2 [ main::i#2 main::a#2 ] ( [ main::i#2 main::a#2 ] { } ) always clobbers reg byte a Statement [10] main::$13 = (word)COSTAB[main::a#2] [ main::i#2 main::a#2 main::$13 ] ( [ main::i#2 main::a#2 main::$13 ] { } ) always clobbers reg byte a @@ -2530,9 +2530,9 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const WHITE = 1 .label D011 = $d011 .label D018 = $d018 @@ -2563,8 +2563,8 @@ main: { jmp __b6 // main::@6 __b6: - // [4] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [4] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [5] phi from main::@6 to main::toD0181 [phi:main::@6->main::toD0181] toD0181_from___b6: @@ -3493,9 +3493,9 @@ const byte RADIX::HEXADECIMAL = $10 const byte RADIX::OCTAL = 8 const byte* SCREEN = (byte*) 1024 const byte* SINTAB[$180] = kickasm {{ .fill $180, 99.5+99.5*sin(i*2*PI/256) }} -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 word abs_u16(word abs_u16::w) byte~ abs_u16::$0 reg byte a 2002.0 @@ -3689,9 +3689,9 @@ Score: 26877 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const WHITE = 1 .label D011 = $d011 .label D018 = $d018 @@ -3717,9 +3717,9 @@ main: { // [41] phi from main::@5 to bitmap_clear [phi:main::@5->bitmap_clear] jsr bitmap_clear // main::@6 - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [4] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [4] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [5] phi from main::@6 to main::toD0181 [phi:main::@6->main::toD0181] // main::toD0181 diff --git a/src/test/ref/bitmap-plot-3.sym b/src/test/ref/bitmap-plot-3.sym index 1ab8b3fe3..4cfe1715a 100644 --- a/src/test/ref/bitmap-plot-3.sym +++ b/src/test/ref/bitmap-plot-3.sym @@ -8,9 +8,9 @@ const byte RADIX::HEXADECIMAL = $10 const byte RADIX::OCTAL = 8 const byte* SCREEN = (byte*) 1024 const byte* SINTAB[$180] = kickasm {{ .fill $180, 99.5+99.5*sin(i*2*PI/256) }} -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 word abs_u16(word abs_u16::w) byte~ abs_u16::$0 reg byte a 2002.0 diff --git a/src/test/ref/c64dtv-8bppcharstretch.asm b/src/test/ref/c64dtv-8bppcharstretch.asm index cd9f81737..8df407e5f 100644 --- a/src/test/ref/c64dtv-8bppcharstretch.asm +++ b/src/test/ref/c64dtv-8bppcharstretch.asm @@ -12,11 +12,11 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_ECM = $40 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -31,9 +31,9 @@ .const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2 .label RASTER = $d012 .label BORDER_COLOR = $d020 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -88,12 +88,12 @@ main: { // 8BPP Pixel Cell Mode lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF sta DTV_CONTROL - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_MCM | VIC_CSEL - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_MCM | VICII_CSEL + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // *DTV_PLANEA_START_LO = < SCREEN // Plane A: SCREEN lda #0 @@ -135,11 +135,11 @@ main: { // Set VIC Bank bits to output - all others to input lda #3^SCREEN/$4000 sta CIA2 - // *VIC_MEMORY = (byte)((((word)SCREEN)&$3fff)/$40) | ((>(((word)SCREEN)&$3fff))/4) + // *VICII_MEMORY = (byte)((((word)SCREEN)&$3fff)/$40) | ((>(((word)SCREEN)&$3fff))/4) // Set VIC Bank // VIC memory lda #(SCREEN&$3fff)/$40|(>(SCREEN&$3fff))/4 - sta VIC_MEMORY + sta VICII_MEMORY ldx #0 // DTV Palette - Grey Tones __b1: @@ -189,9 +189,9 @@ main: { inx cpx #8 bne stabilize - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL // *BORDER_COLOR = 0 lda #0 sta BORDER_COLOR @@ -225,10 +225,10 @@ main: { // rst&7 txa and #7 - // VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7) - ora #VIC_DEN|VIC_ECM|VIC_RSEL - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7) - sta VIC_CONTROL + // VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) + ora #VICII_DEN|VICII_ECM|VICII_RSEL + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) + sta VICII_CONTROL // rst*$10 txa asl diff --git a/src/test/ref/c64dtv-8bppcharstretch.cfg b/src/test/ref/c64dtv-8bppcharstretch.cfg index 30abe84a9..9f309e239 100644 --- a/src/test/ref/c64dtv-8bppcharstretch.cfg +++ b/src/test/ref/c64dtv-8bppcharstretch.cfg @@ -9,8 +9,8 @@ main: scope:[main] from main::@6: scope:[main] from main [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF - [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 - [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 + [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [8] *DTV_PLANEA_START_LO = 0 [9] *DTV_PLANEA_START_MI = >SCREEN [10] *DTV_PLANEA_START_HI = 0 @@ -25,7 +25,7 @@ main::@6: scope:[main] from main [19] *DTV_PLANEB_MODULO_HI = 0 [20] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [21] *((byte*)CIA2) = 3^(byte)(word)SCREEN/$4000 - [22] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 + [22] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 to:main::@1 main::@1: scope:[main] from main::@1 main::@6 [23] main::j#2 = phi( main::@1/main::j#1, main::@6/0 ) @@ -35,7 +35,7 @@ main::@1: scope:[main] from main::@1 main::@6 to:main::@2 main::@2: scope:[main] from main::@1 main::@5 asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } - [28] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 + [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [29] *BORDER_COLOR = 0 to:main::@3 main::@3: scope:[main] from main::@2 main::@3 @@ -47,8 +47,8 @@ main::@4: scope:[main] from main::@3 main::@5: scope:[main] from main::@4 main::@5 [32] main::rst#1 = *RASTER [33] main::$3 = main::rst#1 & 7 - [34] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 - [35] *VIC_CONTROL = main::$4 + [34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 + [35] *VICII_CONTROL = main::$4 [36] main::$5 = main::rst#1 << 4 [37] *BORDER_COLOR = main::$5 asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } diff --git a/src/test/ref/c64dtv-8bppcharstretch.log b/src/test/ref/c64dtv-8bppcharstretch.log index 9336bb9d6..78adbcc9f 100644 --- a/src/test/ref/c64dtv-8bppcharstretch.log +++ b/src/test/ref/c64dtv-8bppcharstretch.log @@ -23,8 +23,8 @@ main: scope:[main] from __start::@1 main::@7: scope:[main] from main *DTV_FEATURE = DTV_FEATURE_ENABLE *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF - *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_MCM|VICII_CSEL *DTV_PLANEA_START_LO = SCREEN *DTV_PLANEA_START_HI = 0 @@ -39,7 +39,7 @@ main::@7: scope:[main] from main *DTV_PLANEB_MODULO_HI = 0 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)SCREEN/$4000 - *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 + *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 main::j#0 = 0 to:main::@1 main::@1: scope:[main] from main::@1 main::@7 @@ -54,7 +54,7 @@ main::@2: scope:[main] from main::@1 main::@6 to:main::@return main::@3: scope:[main] from main::@2 asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } - *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 + *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 *BORDER_COLOR = 0 main::rst#0 = $42 to:main::@4 @@ -69,8 +69,8 @@ main::@5: scope:[main] from main::@4 main::@6: scope:[main] from main::@5 main::@6 main::rst#1 = *RASTER main::$3 = main::rst#1 & 7 - main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 - *VIC_CONTROL = main::$4 + main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 + *VICII_CONTROL = main::$4 main::$5 = main::rst#1 * $10 *BORDER_COLOR = main::$5 asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } @@ -281,14 +281,14 @@ const nomodify byte PROCPORT_RAM_CHARROM = 1 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*)$d012 const nomodify byte* SCREEN = (byte*)$7c00 -const nomodify byte* VIC_CONTROL = (byte*)$d011 -const nomodify byte* VIC_CONTROL2 = (byte*)$d016 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*)$d018 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*)$d011 +const nomodify byte* VICII_CONTROL2 = (byte*)$d016 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*)$d018 +const nomodify byte VICII_RSEL = 8 void __start() void dtvSetCpuBankSegment1(byte dtvSetCpuBankSegment1::cpuBankIdx) const byte* dtvSetCpuBankSegment1::cpuBank = (byte*)$ff @@ -412,8 +412,8 @@ byte main::rst#0 byte main::rst#1 byte main::rst#2 -Adding number conversion cast (unumber) VIC_DEN|VIC_ECM|VIC_RSEL|3 in *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_ECM|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_START_HI = 0 Adding number conversion cast (unumber) 1 in *DTV_PLANEA_STEP = 1 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_MODULO_LO = 0 @@ -426,16 +426,16 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)SCREEN/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)SCREEN/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)SCREEN/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)SCREEN/$4000 -Adding number conversion cast (unumber) (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 in *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 -Adding number conversion cast (unumber) >(word)SCREEN&$3fff/4 in *VIC_MEMORY = ((unumber)) (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = ((unumber)) (byte)(word)SCREEN&$3fff/$40|(unumber)>(word)SCREEN&$3fff/4 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = ((unumber)) (byte)(word)SCREEN&(unumber)$3fff/$40|(unumber)>(word)SCREEN&$3fff/4 -Adding number conversion cast (unumber) VIC_DEN|VIC_ECM|VIC_RSEL|3 in *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_ECM|VIC_RSEL|3 +Adding number conversion cast (unumber) (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 in *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 +Adding number conversion cast (unumber) >(word)SCREEN&$3fff/4 in *VICII_MEMORY = ((unumber)) (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (byte)(word)SCREEN&$3fff/$40|(unumber)>(word)SCREEN&$3fff/4 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (byte)(word)SCREEN&(unumber)$3fff/$40|(unumber)>(word)SCREEN&$3fff/4 +Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) 7 in main::$3 = main::rst#1 & 7 Adding number conversion cast (unumber) main::$3 in main::$3 = main::rst#1 & (unumber)7 -Adding number conversion cast (unumber) main::$4 in main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 +Adding number conversion cast (unumber) main::$4 in main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 Adding number conversion cast (unumber) $10 in main::$5 = main::rst#1 * $10 Adding number conversion cast (unumber) main::$5 in main::$5 = main::rst#1 * (unumber)$10 Adding number conversion cast (unumber) $f2 in main::$6 = main::rst#1 != $f2 @@ -455,11 +455,11 @@ Adding number conversion cast (unumber) 0 in gfx_init_plane_charset8::$3 = gfx_i Adding number conversion cast (unumber) 2 in gfx_init_plane_charset8::$5 = gfx_init_plane_charset8::bits#3 * 2 Adding number conversion cast (unumber) gfx_init_plane_charset8::$5 in gfx_init_plane_charset8::$5 = gfx_init_plane_charset8::bits#3 * (unumber)2 Successful SSA optimization PassNAddNumberTypeConversions -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = ((unumber)) (byte)(word)SCREEN&(unumber)$3fff/$40|(unumber)>(word)SCREEN&(unumber)$3fff/4 -Adding number conversion cast (unumber) 4 in *VIC_MEMORY = ((unumber)) (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(unumber)>(word)SCREEN&(unumber)$3fff/4 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = ((unumber)) (byte)(word)SCREEN&(unumber)$3fff/$40|(unumber)>(word)SCREEN&(unumber)$3fff/4 +Adding number conversion cast (unumber) 4 in *VICII_MEMORY = ((unumber)) (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(unumber)>(word)SCREEN&(unumber)$3fff/4 Adding number conversion cast (unumber) $4000 in gfx_init_plane_charset8::gfxa#0 = (byte*)$4000+(word)CHARSET8&(unumber)$3fff Successful SSA optimization PassNAddNumberTypeConversions -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_ECM|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3 Inlining cast *DTV_PLANEA_START_HI = (unumber)0 Inlining cast *DTV_PLANEA_STEP = (unumber)1 Inlining cast *DTV_PLANEA_MODULO_LO = (unumber)0 @@ -470,8 +470,8 @@ Inlining cast *DTV_PLANEB_MODULO_LO = (unumber)0 Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)SCREEN/(unumber)$4000 -Inlining cast *VIC_MEMORY = (unumber)(byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(unumber)>(word)SCREEN&(unumber)$3fff/(unumber)4 -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_ECM|VIC_RSEL|(unumber)3 +Inlining cast *VICII_MEMORY = (unumber)(byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(unumber)>(word)SCREEN&(unumber)$3fff/(unumber)4 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3 Inlining cast *BORDER_COLOR = (unumber)0 Successful SSA optimization Pass2InlineCast Simplifying constant pointer cast (byte*) 53266 @@ -501,7 +501,7 @@ Simplifying constant pointer cast (byte*) 53320 Simplifying constant pointer cast (byte*) 255 Simplifying constant pointer cast (byte*) 31744 Simplifying constant pointer cast (byte*) 32768 -Simplifying constant integer cast VIC_DEN|VIC_ECM|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 0 Simplifying constant integer cast 1 @@ -521,7 +521,7 @@ Simplifying constant integer cast $40 Simplifying constant integer cast >(word)SCREEN&(unumber)$3fff/(unumber)4 Simplifying constant integer cast $3fff Simplifying constant integer cast 4 -Simplifying constant integer cast VIC_DEN|VIC_ECM|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 0 Simplifying constant integer cast 7 @@ -571,7 +571,7 @@ Finalized unsigned number type (byte) 0 Finalized unsigned number type (byte) 2 Successful SSA optimization PassNFinalizeNumberTypeConversions Inferred type updated to byte in main::$3 = main::rst#1 & 7 -Inferred type updated to byte in main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 +Inferred type updated to byte in main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 Inferred type updated to byte in main::$5 = main::rst#1 * $10 Inferred type updated to byte in gfx_init_screen0::$0 = gfx_init_screen0::cy#2 & $f Inferred type updated to byte in gfx_init_screen0::$1 = gfx_init_screen0::$0 * $10 @@ -807,8 +807,8 @@ main: scope:[main] from main::@6: scope:[main] from main [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF - [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 - [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 + [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [8] *DTV_PLANEA_START_LO = 0 [9] *DTV_PLANEA_START_MI = >SCREEN [10] *DTV_PLANEA_START_HI = 0 @@ -823,7 +823,7 @@ main::@6: scope:[main] from main [19] *DTV_PLANEB_MODULO_HI = 0 [20] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [21] *((byte*)CIA2) = 3^(byte)(word)SCREEN/$4000 - [22] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 + [22] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 to:main::@1 main::@1: scope:[main] from main::@1 main::@6 [23] main::j#2 = phi( main::@1/main::j#1, main::@6/0 ) @@ -833,7 +833,7 @@ main::@1: scope:[main] from main::@1 main::@6 to:main::@2 main::@2: scope:[main] from main::@1 main::@5 asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } - [28] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 + [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [29] *BORDER_COLOR = 0 to:main::@3 main::@3: scope:[main] from main::@2 main::@3 @@ -845,8 +845,8 @@ main::@4: scope:[main] from main::@3 main::@5: scope:[main] from main::@4 main::@5 [32] main::rst#1 = *RASTER [33] main::$3 = main::rst#1 & 7 - [34] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 - [35] *VIC_CONTROL = main::$4 + [34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 + [35] *VICII_CONTROL = main::$4 [36] main::$5 = main::rst#1 << 4 [37] *BORDER_COLOR = main::$5 asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } @@ -1099,8 +1099,8 @@ Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] *DTV_PLANEA_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *DTV_PLANEA_START_MI = >SCREEN [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] *DTV_PLANEA_START_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a @@ -1115,12 +1115,12 @@ Statement [18] *DTV_PLANEB_MODULO_LO = 0 [ ] ( [ ] { } ) always clobbers reg b Statement [19] *DTV_PLANEB_MODULO_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [20] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [21] *((byte*)CIA2) = 3^(byte)(word)SCREEN/$4000 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [22] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [22] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 [ ] ( [ ] { } ) always clobbers reg byte a Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x -Statement [28] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [29] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [30] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [34] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a +Statement [34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:18 [ main::rst#1 ] Statement [36] main::$5 = main::rst#1 << 4 [ main::rst#1 main::$5 ] ( [ main::rst#1 main::$5 ] { } ) always clobbers reg byte a Statement [49] gfx_init_screen0::$1 = gfx_init_screen0::$0 << 4 [ gfx_init_screen0::cy#4 gfx_init_screen0::cx#2 gfx_init_screen0::ch#2 gfx_init_screen0::$1 ] ( gfx_init:3::gfx_init_screen0:41 [ gfx_init_screen0::cy#4 gfx_init_screen0::cx#2 gfx_init_screen0::ch#2 gfx_init_screen0::$1 ] { } ) always clobbers reg byte a @@ -1148,8 +1148,8 @@ Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] *DTV_PLANEA_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *DTV_PLANEA_START_MI = >SCREEN [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] *DTV_PLANEA_START_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a @@ -1164,13 +1164,13 @@ Statement [18] *DTV_PLANEB_MODULO_LO = 0 [ ] ( [ ] { } ) always clobbers reg b Statement [19] *DTV_PLANEB_MODULO_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [20] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [21] *((byte*)CIA2) = 3^(byte)(word)SCREEN/$4000 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [22] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [22] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 [ ] ( [ ] { } ) always clobbers reg byte a Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x -Statement [28] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [29] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [30] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [33] main::$3 = main::rst#1 & 7 [ main::rst#1 main::$3 ] ( [ main::rst#1 main::$3 ] { } ) always clobbers reg byte a -Statement [34] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a +Statement [34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a Statement [36] main::$5 = main::rst#1 << 4 [ main::rst#1 main::$5 ] ( [ main::rst#1 main::$5 ] { } ) always clobbers reg byte a Statement [48] gfx_init_screen0::$0 = gfx_init_screen0::cy#4 & $f [ gfx_init_screen0::cy#4 gfx_init_screen0::cx#2 gfx_init_screen0::ch#2 gfx_init_screen0::$0 ] ( gfx_init:3::gfx_init_screen0:41 [ gfx_init_screen0::cy#4 gfx_init_screen0::cx#2 gfx_init_screen0::ch#2 gfx_init_screen0::$0 ] { } ) always clobbers reg byte a Statement [49] gfx_init_screen0::$1 = gfx_init_screen0::$0 << 4 [ gfx_init_screen0::cy#4 gfx_init_screen0::cx#2 gfx_init_screen0::ch#2 gfx_init_screen0::$1 ] ( gfx_init:3::gfx_init_screen0:41 [ gfx_init_screen0::cy#4 gfx_init_screen0::cx#2 gfx_init_screen0::ch#2 gfx_init_screen0::$1 ] { } ) always clobbers reg byte a @@ -1269,11 +1269,11 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_ECM = $40 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -1288,9 +1288,9 @@ ASSEMBLER BEFORE OPTIMIZATION .const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2 .label RASTER = $d012 .label BORDER_COLOR = $d020 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -1351,12 +1351,12 @@ main: { // 8BPP Pixel Cell Mode lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF sta DTV_CONTROL - // [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL - // [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + // [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL + // [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // [8] *DTV_PLANEA_START_LO = 0 -- _deref_pbuc1=vbuc2 // Plane A: SCREEN lda #0 @@ -1403,11 +1403,11 @@ main: { // Set VIC Bank bits to output - all others to input lda #3^SCREEN/$4000 sta CIA2 - // [22] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 -- _deref_pbuc1=vbuc2 + // [22] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC memory lda #(SCREEN&$3fff)/$40|(>(SCREEN&$3fff))/4 - sta VIC_MEMORY + sta VICII_MEMORY // [23] phi from main::@6 to main::@1 [phi:main::@6->main::@1] __b1_from___b6: // [23] phi main::j#2 = 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1 @@ -1469,9 +1469,9 @@ main: { inx cpx #8 bne stabilize - // [28] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL + // [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL // [29] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2 lda #0 sta BORDER_COLOR @@ -1512,10 +1512,10 @@ main: { // [33] main::$3 = main::rst#1 & 7 -- vbuaa=vbuxx_band_vbuc1 txa and #7 - // [34] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa - ora #VIC_DEN|VIC_ECM|VIC_RSEL - // [35] *VIC_CONTROL = main::$4 -- _deref_pbuc1=vbuaa - sta VIC_CONTROL + // [34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa + ora #VICII_DEN|VICII_ECM|VICII_RSEL + // [35] *VICII_CONTROL = main::$4 -- _deref_pbuc1=vbuaa + sta VICII_CONTROL // [36] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4 txa asl @@ -1954,14 +1954,14 @@ const nomodify byte PROCPORT_RAM_CHARROM = 1 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*) 53266 const nomodify byte* SCREEN = (byte*) 31744 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte* VIC_CONTROL2 = (byte*) 53270 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL2 = (byte*) 53270 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 void dtvSetCpuBankSegment1(byte dtvSetCpuBankSegment1::cpuBankIdx) const byte* dtvSetCpuBankSegment1::cpuBank = (byte*) 255 byte dtvSetCpuBankSegment1::cpuBankIdx @@ -2067,11 +2067,11 @@ Score: 75375 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_ECM = $40 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -2086,9 +2086,9 @@ Score: 75375 .const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2 .label RASTER = $d012 .label BORDER_COLOR = $d020 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -2152,14 +2152,14 @@ main: { // 8BPP Pixel Cell Mode lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF sta DTV_CONTROL - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3 - // [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_MCM | VIC_CSEL - // [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3 + // [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_MCM | VICII_CSEL + // [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // *DTV_PLANEA_START_LO = < SCREEN // [8] *DTV_PLANEA_START_LO = 0 -- _deref_pbuc1=vbuc2 // Plane A: SCREEN @@ -2215,12 +2215,12 @@ main: { // Set VIC Bank bits to output - all others to input lda #3^SCREEN/$4000 sta CIA2 - // *VIC_MEMORY = (byte)((((word)SCREEN)&$3fff)/$40) | ((>(((word)SCREEN)&$3fff))/4) - // [22] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = (byte)((((word)SCREEN)&$3fff)/$40) | ((>(((word)SCREEN)&$3fff))/4) + // [22] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC memory lda #(SCREEN&$3fff)/$40|(>(SCREEN&$3fff))/4 - sta VIC_MEMORY + sta VICII_MEMORY // [23] phi from main::@6 to main::@1 [phi:main::@6->main::@1] // [23] phi main::j#2 = 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1 ldx #0 @@ -2280,10 +2280,10 @@ main: { inx cpx #8 bne stabilize - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3 - // [28] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3 + // [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL // *BORDER_COLOR = 0 // [29] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2 lda #0 @@ -2325,12 +2325,12 @@ main: { // [33] main::$3 = main::rst#1 & 7 -- vbuaa=vbuxx_band_vbuc1 txa and #7 - // VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7) - // [34] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa - ora #VIC_DEN|VIC_ECM|VIC_RSEL - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7) - // [35] *VIC_CONTROL = main::$4 -- _deref_pbuc1=vbuaa - sta VIC_CONTROL + // VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) + // [34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa + ora #VICII_DEN|VICII_ECM|VICII_RSEL + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) + // [35] *VICII_CONTROL = main::$4 -- _deref_pbuc1=vbuaa + sta VICII_CONTROL // rst*$10 // [36] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4 txa diff --git a/src/test/ref/c64dtv-8bppcharstretch.sym b/src/test/ref/c64dtv-8bppcharstretch.sym index 81cfb9106..b56956bf1 100644 --- a/src/test/ref/c64dtv-8bppcharstretch.sym +++ b/src/test/ref/c64dtv-8bppcharstretch.sym @@ -30,14 +30,14 @@ const nomodify byte PROCPORT_RAM_CHARROM = 1 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*) 53266 const nomodify byte* SCREEN = (byte*) 31744 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte* VIC_CONTROL2 = (byte*) 53270 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL2 = (byte*) 53270 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 void dtvSetCpuBankSegment1(byte dtvSetCpuBankSegment1::cpuBankIdx) const byte* dtvSetCpuBankSegment1::cpuBank = (byte*) 255 byte dtvSetCpuBankSegment1::cpuBankIdx diff --git a/src/test/ref/c64dtv-8bppchunkystretch.asm b/src/test/ref/c64dtv-8bppchunkystretch.asm index 3172ea32c..73403e292 100644 --- a/src/test/ref/c64dtv-8bppchunkystretch.asm +++ b/src/test/ref/c64dtv-8bppchunkystretch.asm @@ -12,11 +12,11 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_ECM = $40 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -30,9 +30,9 @@ .const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2 .label RASTER = $d012 .label BORDER_COLOR = $d020 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -76,12 +76,12 @@ main: { // 8BPP Pixel Cell Mode lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF sta DTV_CONTROL - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_MCM | VIC_CSEL - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_MCM | VICII_CSEL + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // *DTV_PLANEB_START_LO = < CHUNKY // Plane B: CHUNKY lda #0 @@ -108,11 +108,11 @@ main: { // Set VIC Bank bits to output - all others to input lda #3^CHUNKY/$4000 sta CIA2 - // *VIC_MEMORY = (byte)((((word)CHUNKY)&$3fff)/$40) | ((>(((word)CHUNKY)&$3fff))/4) + // *VICII_MEMORY = (byte)((((word)CHUNKY)&$3fff)/$40) | ((>(((word)CHUNKY)&$3fff))/4) // Set VIC Bank // VIC memory lda #0 - sta VIC_MEMORY + sta VICII_MEMORY tax // DTV Palette - Grey Tones __b1: @@ -162,9 +162,9 @@ main: { inx cpx #8 bne stabilize - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL // *BORDER_COLOR = 0 lda #0 sta BORDER_COLOR @@ -198,10 +198,10 @@ main: { // rst&7 txa and #7 - // VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7) - ora #VIC_DEN|VIC_ECM|VIC_RSEL - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7) - sta VIC_CONTROL + // VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) + ora #VICII_DEN|VICII_ECM|VICII_RSEL + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) + sta VICII_CONTROL // rst*$10 txa asl diff --git a/src/test/ref/c64dtv-8bppchunkystretch.cfg b/src/test/ref/c64dtv-8bppchunkystretch.cfg index 93fa65ff8..6214271a8 100644 --- a/src/test/ref/c64dtv-8bppchunkystretch.cfg +++ b/src/test/ref/c64dtv-8bppchunkystretch.cfg @@ -9,8 +9,8 @@ main: scope:[main] from main::@6: scope:[main] from main [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF - [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 - [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 + [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [8] *DTV_PLANEB_START_LO = 0 [9] *DTV_PLANEB_START_MI = >CHUNKY [10] *DTV_PLANEB_START_HI = 0 @@ -19,7 +19,7 @@ main::@6: scope:[main] from main [13] *DTV_PLANEB_MODULO_HI = 0 [14] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [15] *((byte*)CIA2) = 3^(byte)(word)CHUNKY/$4000 - [16] *VIC_MEMORY = 0 + [16] *VICII_MEMORY = 0 to:main::@1 main::@1: scope:[main] from main::@1 main::@6 [17] main::j#2 = phi( main::@1/main::j#1, main::@6/0 ) @@ -29,7 +29,7 @@ main::@1: scope:[main] from main::@1 main::@6 to:main::@2 main::@2: scope:[main] from main::@1 main::@5 asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } - [22] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 + [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [23] *BORDER_COLOR = 0 to:main::@3 main::@3: scope:[main] from main::@2 main::@3 @@ -41,8 +41,8 @@ main::@4: scope:[main] from main::@3 main::@5: scope:[main] from main::@4 main::@5 [26] main::rst#1 = *RASTER [27] main::$3 = main::rst#1 & 7 - [28] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 - [29] *VIC_CONTROL = main::$4 + [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 + [29] *VICII_CONTROL = main::$4 [30] main::$5 = main::rst#1 << 4 [31] *BORDER_COLOR = main::$5 asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } diff --git a/src/test/ref/c64dtv-8bppchunkystretch.log b/src/test/ref/c64dtv-8bppchunkystretch.log index 21029f5e7..125d20d03 100644 --- a/src/test/ref/c64dtv-8bppchunkystretch.log +++ b/src/test/ref/c64dtv-8bppchunkystretch.log @@ -23,8 +23,8 @@ main: scope:[main] from __start::@1 main::@7: scope:[main] from main *DTV_FEATURE = DTV_FEATURE_ENABLE *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF - *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_MCM|VICII_CSEL *DTV_PLANEB_START_LO = CHUNKY *DTV_PLANEB_START_HI = 0 @@ -33,7 +33,7 @@ main::@7: scope:[main] from main *DTV_PLANEB_MODULO_HI = 0 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)CHUNKY/$4000 - *VIC_MEMORY = (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 + *VICII_MEMORY = (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 main::j#0 = 0 to:main::@1 main::@1: scope:[main] from main::@1 main::@7 @@ -48,7 +48,7 @@ main::@2: scope:[main] from main::@1 main::@6 to:main::@return main::@3: scope:[main] from main::@2 asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } - *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 + *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 *BORDER_COLOR = 0 main::rst#0 = $42 to:main::@4 @@ -63,8 +63,8 @@ main::@5: scope:[main] from main::@4 main::@6: scope:[main] from main::@5 main::@6 main::rst#1 = *RASTER main::$3 = main::rst#1 & 7 - main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 - *VIC_CONTROL = main::$4 + main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 + *VICII_CONTROL = main::$4 main::$5 = main::rst#1 * $10 *BORDER_COLOR = main::$5 asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } @@ -187,14 +187,14 @@ const nomodify byte* PROCPORT_DDR = (byte*)0 const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*)$d012 -const nomodify byte* VIC_CONTROL = (byte*)$d011 -const nomodify byte* VIC_CONTROL2 = (byte*)$d016 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*)$d018 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*)$d011 +const nomodify byte* VICII_CONTROL2 = (byte*)$d016 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*)$d018 +const nomodify byte VICII_RSEL = 8 void __start() void dtvSetCpuBankSegment1(byte dtvSetCpuBankSegment1::cpuBankIdx) const byte* dtvSetCpuBankSegment1::cpuBank = (byte*)$ff @@ -262,8 +262,8 @@ byte main::rst#0 byte main::rst#1 byte main::rst#2 -Adding number conversion cast (unumber) VIC_DEN|VIC_ECM|VIC_RSEL|3 in *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_ECM|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in *DTV_PLANEB_START_HI = 0 Adding number conversion cast (unumber) 8 in *DTV_PLANEB_STEP = 8 Adding number conversion cast (unumber) 0 in *DTV_PLANEB_MODULO_LO = 0 @@ -272,34 +272,34 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)CHUNKY/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)CHUNKY/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)CHUNKY/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)CHUNKY/$4000 -Adding number conversion cast (unumber) (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 in *VIC_MEMORY = (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 -Adding number conversion cast (unumber) >(word)CHUNKY&$3fff/4 in *VIC_MEMORY = ((unumber)) (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = ((unumber)) (byte)(word)CHUNKY&$3fff/$40|(unumber)>(word)CHUNKY&$3fff/4 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = ((unumber)) (byte)(word)CHUNKY&(unumber)$3fff/$40|(unumber)>(word)CHUNKY&$3fff/4 -Adding number conversion cast (unumber) VIC_DEN|VIC_ECM|VIC_RSEL|3 in *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_ECM|VIC_RSEL|3 +Adding number conversion cast (unumber) (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 in *VICII_MEMORY = (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 +Adding number conversion cast (unumber) >(word)CHUNKY&$3fff/4 in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&$3fff/$40|(unumber)>(word)CHUNKY&$3fff/4 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&(unumber)$3fff/$40|(unumber)>(word)CHUNKY&$3fff/4 +Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) 7 in main::$3 = main::rst#1 & 7 Adding number conversion cast (unumber) main::$3 in main::$3 = main::rst#1 & (unumber)7 -Adding number conversion cast (unumber) main::$4 in main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 +Adding number conversion cast (unumber) main::$4 in main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 Adding number conversion cast (unumber) $10 in main::$5 = main::rst#1 * $10 Adding number conversion cast (unumber) main::$5 in main::$5 = main::rst#1 * (unumber)$10 Adding number conversion cast (unumber) $f2 in main::$6 = main::rst#1 != $f2 Adding number conversion cast (unumber) $4000 in gfx_init_chunky::gfxbCpuBank#0 = (byte)CHUNKY/$4000 Adding number conversion cast (unumber) $8000 in gfx_init_chunky::$2 = gfx_init_chunky::gfxb#3 == $8000 Successful SSA optimization PassNAddNumberTypeConversions -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = ((unumber)) (byte)(word)CHUNKY&(unumber)$3fff/$40|(unumber)>(word)CHUNKY&(unumber)$3fff/4 -Adding number conversion cast (unumber) 4 in *VIC_MEMORY = ((unumber)) (byte)(word)CHUNKY&(unumber)$3fff/(unumber)$40|(unumber)>(word)CHUNKY&(unumber)$3fff/4 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&(unumber)$3fff/$40|(unumber)>(word)CHUNKY&(unumber)$3fff/4 +Adding number conversion cast (unumber) 4 in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&(unumber)$3fff/(unumber)$40|(unumber)>(word)CHUNKY&(unumber)$3fff/4 Successful SSA optimization PassNAddNumberTypeConversions -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_ECM|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3 Inlining cast *DTV_PLANEB_START_HI = (unumber)0 Inlining cast *DTV_PLANEB_STEP = (unumber)8 Inlining cast *DTV_PLANEB_MODULO_LO = (unumber)0 Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)CHUNKY/(unumber)$4000 -Inlining cast *VIC_MEMORY = (unumber)(byte)(word)CHUNKY&(unumber)$3fff/(unumber)$40|(unumber)>(word)CHUNKY&(unumber)$3fff/(unumber)4 -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_ECM|VIC_RSEL|(unumber)3 +Inlining cast *VICII_MEMORY = (unumber)(byte)(word)CHUNKY&(unumber)$3fff/(unumber)$40|(unumber)>(word)CHUNKY&(unumber)$3fff/(unumber)4 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast gfx_init_chunky::gfxb#2 = (byte*)$4000 Successful SSA optimization Pass2InlineCast @@ -322,7 +322,7 @@ Simplifying constant pointer cast (byte*) 53319 Simplifying constant pointer cast (byte*) 53320 Simplifying constant pointer cast (byte*) 255 Simplifying constant pointer cast (byte*) 32768 -Simplifying constant integer cast VIC_DEN|VIC_ECM|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 0 Simplifying constant integer cast 8 @@ -338,7 +338,7 @@ Simplifying constant integer cast $40 Simplifying constant integer cast >(word)CHUNKY&(unumber)$3fff/(unumber)4 Simplifying constant integer cast $3fff Simplifying constant integer cast 4 -Simplifying constant integer cast VIC_DEN|VIC_ECM|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 0 Simplifying constant integer cast 7 @@ -370,7 +370,7 @@ Finalized unsigned number type (word) $4000 Finalized unsigned number type (word) $8000 Successful SSA optimization PassNFinalizeNumberTypeConversions Inferred type updated to byte in main::$3 = main::rst#1 & 7 -Inferred type updated to byte in main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 +Inferred type updated to byte in main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 Inferred type updated to byte in main::$5 = main::rst#1 * $10 Inversing boolean not [57] gfx_init_chunky::$3 = gfx_init_chunky::gfxb#3 != $8000 from [56] gfx_init_chunky::$2 = gfx_init_chunky::gfxb#3 == $8000 Successful SSA optimization Pass2UnaryNotSimplification @@ -415,7 +415,7 @@ Resolved ranged comparison value [64] if(gfx_init_chunky::x#1!=rangelast(0,$13f) Resolved ranged next value [69] gfx_init_chunky::y#1 = ++ gfx_init_chunky::y#6 to ++ Resolved ranged comparison value [71] if(gfx_init_chunky::y#1!=rangelast(0,$32)) goto gfx_init_chunky::@1 to $33 Simplifying constant evaluating to zero (word)CHUNKY&$3fff/4 in [20] *VIC_MEMORY = (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 +Simplifying constant evaluating to zero (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 in [20] *VICII_MEMORY = (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4 Successful SSA optimization PassNSimplifyConstantZero Simplifying expression containing zero (byte*)CIA2 in [19] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)CHUNKY/$4000 Successful SSA optimization PassNSimplifyExpressionWithZero @@ -528,8 +528,8 @@ main: scope:[main] from main::@6: scope:[main] from main [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF - [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 - [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 + [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [8] *DTV_PLANEB_START_LO = 0 [9] *DTV_PLANEB_START_MI = >CHUNKY [10] *DTV_PLANEB_START_HI = 0 @@ -538,7 +538,7 @@ main::@6: scope:[main] from main [13] *DTV_PLANEB_MODULO_HI = 0 [14] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [15] *((byte*)CIA2) = 3^(byte)(word)CHUNKY/$4000 - [16] *VIC_MEMORY = 0 + [16] *VICII_MEMORY = 0 to:main::@1 main::@1: scope:[main] from main::@1 main::@6 [17] main::j#2 = phi( main::@1/main::j#1, main::@6/0 ) @@ -548,7 +548,7 @@ main::@1: scope:[main] from main::@1 main::@6 to:main::@2 main::@2: scope:[main] from main::@1 main::@5 asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } - [22] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 + [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [23] *BORDER_COLOR = 0 to:main::@3 main::@3: scope:[main] from main::@2 main::@3 @@ -560,8 +560,8 @@ main::@4: scope:[main] from main::@3 main::@5: scope:[main] from main::@4 main::@5 [26] main::rst#1 = *RASTER [27] main::$3 = main::rst#1 & 7 - [28] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 - [29] *VIC_CONTROL = main::$4 + [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 + [29] *VICII_CONTROL = main::$4 [30] main::$5 = main::rst#1 << 4 [31] *BORDER_COLOR = main::$5 asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop } @@ -702,8 +702,8 @@ Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] *DTV_PLANEB_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *DTV_PLANEB_START_MI = >CHUNKY [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] *DTV_PLANEB_START_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a @@ -712,12 +712,12 @@ Statement [12] *DTV_PLANEB_MODULO_LO = 0 [ ] ( [ ] { } ) always clobbers reg b Statement [13] *DTV_PLANEB_MODULO_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [14] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [15] *((byte*)CIA2) = 3^(byte)(word)CHUNKY/$4000 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [16] *VIC_MEMORY = 0 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [16] *VICII_MEMORY = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x -Statement [22] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [23] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [24] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [28] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a +Statement [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:10 [ main::rst#1 ] Statement [30] main::$5 = main::rst#1 << 4 [ main::rst#1 main::$5 ] ( [ main::rst#1 main::$5 ] { } ) always clobbers reg byte a Statement [38] if(gfx_init_chunky::gfxb#3!=$8000) goto gfx_init_chunky::@3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] { } ) always clobbers reg byte a @@ -734,8 +734,8 @@ Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] *DTV_PLANEB_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *DTV_PLANEB_START_MI = >CHUNKY [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] *DTV_PLANEB_START_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a @@ -744,13 +744,13 @@ Statement [12] *DTV_PLANEB_MODULO_LO = 0 [ ] ( [ ] { } ) always clobbers reg b Statement [13] *DTV_PLANEB_MODULO_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [14] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [15] *((byte*)CIA2) = 3^(byte)(word)CHUNKY/$4000 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [16] *VIC_MEMORY = 0 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [16] *VICII_MEMORY = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x -Statement [22] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [23] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [24] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [27] main::$3 = main::rst#1 & 7 [ main::rst#1 main::$3 ] ( [ main::rst#1 main::$3 ] { } ) always clobbers reg byte a -Statement [28] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a +Statement [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a Statement [30] main::$5 = main::rst#1 << 4 [ main::rst#1 main::$5 ] ( [ main::rst#1 main::$5 ] { } ) always clobbers reg byte a Statement [38] if(gfx_init_chunky::gfxb#3!=$8000) goto gfx_init_chunky::@3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] { } ) always clobbers reg byte a Statement [43] gfx_init_chunky::$5 = gfx_init_chunky::x#2 + gfx_init_chunky::y#6 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] { } ) always clobbers reg byte a @@ -815,11 +815,11 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_ECM = $40 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -833,9 +833,9 @@ ASSEMBLER BEFORE OPTIMIZATION .const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2 .label RASTER = $d012 .label BORDER_COLOR = $d020 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -885,12 +885,12 @@ main: { // 8BPP Pixel Cell Mode lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF sta DTV_CONTROL - // [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL - // [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + // [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL + // [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // [8] *DTV_PLANEB_START_LO = 0 -- _deref_pbuc1=vbuc2 // Plane B: CHUNKY lda #0 @@ -918,11 +918,11 @@ main: { // Set VIC Bank bits to output - all others to input lda #3^CHUNKY/$4000 sta CIA2 - // [16] *VIC_MEMORY = 0 -- _deref_pbuc1=vbuc2 + // [16] *VICII_MEMORY = 0 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC memory lda #0 - sta VIC_MEMORY + sta VICII_MEMORY // [17] phi from main::@6 to main::@1 [phi:main::@6->main::@1] __b1_from___b6: // [17] phi main::j#2 = 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1 @@ -984,9 +984,9 @@ main: { inx cpx #8 bne stabilize - // [22] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL + // [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL // [23] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2 lda #0 sta BORDER_COLOR @@ -1027,10 +1027,10 @@ main: { // [27] main::$3 = main::rst#1 & 7 -- vbuaa=vbuxx_band_vbuc1 txa and #7 - // [28] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa - ora #VIC_DEN|VIC_ECM|VIC_RSEL - // [29] *VIC_CONTROL = main::$4 -- _deref_pbuc1=vbuaa - sta VIC_CONTROL + // [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa + ora #VICII_DEN|VICII_ECM|VICII_RSEL + // [29] *VICII_CONTROL = main::$4 -- _deref_pbuc1=vbuaa + sta VICII_CONTROL // [30] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4 txa asl @@ -1310,14 +1310,14 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0 const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*) 53266 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte* VIC_CONTROL2 = (byte*) 53270 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL2 = (byte*) 53270 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 void dtvSetCpuBankSegment1(byte dtvSetCpuBankSegment1::cpuBankIdx) const byte* dtvSetCpuBankSegment1::cpuBank = (byte*) 255 byte dtvSetCpuBankSegment1::cpuBankIdx @@ -1387,11 +1387,11 @@ Score: 19882 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_ECM = $40 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -1405,9 +1405,9 @@ Score: 19882 .const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2 .label RASTER = $d012 .label BORDER_COLOR = $d020 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -1460,14 +1460,14 @@ main: { // 8BPP Pixel Cell Mode lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF sta DTV_CONTROL - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3 - // [6] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_MCM | VIC_CSEL - // [7] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3 + // [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_MCM | VICII_CSEL + // [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // *DTV_PLANEB_START_LO = < CHUNKY // [8] *DTV_PLANEB_START_LO = 0 -- _deref_pbuc1=vbuc2 // Plane B: CHUNKY @@ -1502,12 +1502,12 @@ main: { // Set VIC Bank bits to output - all others to input lda #3^CHUNKY/$4000 sta CIA2 - // *VIC_MEMORY = (byte)((((word)CHUNKY)&$3fff)/$40) | ((>(((word)CHUNKY)&$3fff))/4) - // [16] *VIC_MEMORY = 0 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = (byte)((((word)CHUNKY)&$3fff)/$40) | ((>(((word)CHUNKY)&$3fff))/4) + // [16] *VICII_MEMORY = 0 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC memory lda #0 - sta VIC_MEMORY + sta VICII_MEMORY // [17] phi from main::@6 to main::@1 [phi:main::@6->main::@1] // [17] phi main::j#2 = 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1 tax @@ -1567,10 +1567,10 @@ main: { inx cpx #8 bne stabilize - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | 3 - // [22] *VIC_CONTROL = VIC_DEN|VIC_ECM|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_ECM|VIC_RSEL|3 - sta VIC_CONTROL + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3 + // [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_ECM|VICII_RSEL|3 + sta VICII_CONTROL // *BORDER_COLOR = 0 // [23] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2 lda #0 @@ -1612,12 +1612,12 @@ main: { // [27] main::$3 = main::rst#1 & 7 -- vbuaa=vbuxx_band_vbuc1 txa and #7 - // VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7) - // [28] main::$4 = VIC_DEN|VIC_ECM|VIC_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa - ora #VIC_DEN|VIC_ECM|VIC_RSEL - // *VIC_CONTROL = VIC_DEN | VIC_ECM | VIC_RSEL | (rst&7) - // [29] *VIC_CONTROL = main::$4 -- _deref_pbuc1=vbuaa - sta VIC_CONTROL + // VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) + // [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa + ora #VICII_DEN|VICII_ECM|VICII_RSEL + // *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7) + // [29] *VICII_CONTROL = main::$4 -- _deref_pbuc1=vbuaa + sta VICII_CONTROL // rst*$10 // [30] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4 txa diff --git a/src/test/ref/c64dtv-8bppchunkystretch.sym b/src/test/ref/c64dtv-8bppchunkystretch.sym index 3c4c9e836..9e20f8da2 100644 --- a/src/test/ref/c64dtv-8bppchunkystretch.sym +++ b/src/test/ref/c64dtv-8bppchunkystretch.sym @@ -22,14 +22,14 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0 const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*) 53266 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte* VIC_CONTROL2 = (byte*) 53270 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL2 = (byte*) 53270 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 void dtvSetCpuBankSegment1(byte dtvSetCpuBankSegment1::cpuBankIdx) const byte* dtvSetCpuBankSegment1::cpuBank = (byte*) 255 byte dtvSetCpuBankSegment1::cpuBankIdx diff --git a/src/test/ref/c64dtv-gfxexplorer.asm b/src/test/ref/c64dtv-gfxexplorer.asm index 50aaab111..9e38367a1 100644 --- a/src/test/ref/c64dtv-gfxexplorer.asm +++ b/src/test/ref/c64dtv-gfxexplorer.asm @@ -12,12 +12,12 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_ECM = $40 - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -81,9 +81,9 @@ .const OFFSET_STRUCT_MOS6569_VICII_MEMORY = $18 // Number of form fields .const form_fields_cnt = $24 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -126,15 +126,15 @@ // Memory address of VIC Graphics is GraphicsBank*$10000 .label DTV_GRAPHICS_VIC_BANK = $d03d // VIC Screens - .label VIC_SCREEN0 = $4000 - .label VIC_SCREEN1 = $4400 - .label VIC_SCREEN2 = $4800 - .label VIC_SCREEN3 = $4c00 - .label VIC_SCREEN4 = $5000 + .label VICII_SCREEN0 = $4000 + .label VICII_SCREEN1 = $4400 + .label VICII_SCREEN2 = $4800 + .label VICII_SCREEN3 = $4c00 + .label VICII_SCREEN4 = $5000 // VIC Charset from ROM - .label VIC_CHARSET_ROM = $5800 + .label VICII_CHARSET_ROM = $5800 // VIC Bitmap - .label VIC_BITMAP = $6000 + .label VICII_BITMAP = $6000 // Screen containing the FORM .label FORM_SCREEN = $400 // Charset used for the FORM @@ -162,18 +162,18 @@ .label form_b_step_lo = form_fields_val+$15 .label form_b_mod_hi = form_fields_val+$16 .label form_b_mod_lo = form_fields_val+$17 - .label form_vic_screen = form_fields_val+$18 - .label form_vic_gfx = form_fields_val+$19 - .label form_vic_cols = form_fields_val+$1a + .label form_VICII_screen = form_fields_val+$18 + .label form_VICII_gfx = form_fields_val+$19 + .label form_VICII_cols = form_fields_val+$1a .label form_dtv_palet = form_fields_val+$1b - .label form_vic_bg0_hi = form_fields_val+$1c - .label form_vic_bg0_lo = form_fields_val+$1d - .label form_vic_bg1_hi = form_fields_val+$1e - .label form_vic_bg1_lo = form_fields_val+$1f - .label form_vic_bg2_hi = form_fields_val+$20 - .label form_vic_bg2_lo = form_fields_val+$21 - .label form_vic_bg3_hi = form_fields_val+$22 - .label form_vic_bg3_lo = form_fields_val+$23 + .label form_VICII_bg0_hi = form_fields_val+$1c + .label form_VICII_bg0_lo = form_fields_val+$1d + .label form_VICII_bg1_hi = form_fields_val+$1e + .label form_VICII_bg1_lo = form_fields_val+$1f + .label form_VICII_bg2_hi = form_fields_val+$20 + .label form_VICII_bg2_lo = form_fields_val+$21 + .label form_VICII_bg3_hi = form_fields_val+$22 + .label form_VICII_bg3_lo = form_fields_val+$23 .label print_char_cursor = $1a .label print_line_cursor = 7 .label print_screen = 7 @@ -245,8 +245,8 @@ gfx_init: { jsr gfx_init_screen4 // gfx_init_charset() jsr gfx_init_charset - // gfx_init_vic_bitmap() - jsr gfx_init_vic_bitmap + // gfx_init_VICII_bitmap() + jsr gfx_init_VICII_bitmap // gfx_init_plane_8bppchunky() jsr gfx_init_plane_8bppchunky // gfx_init_plane_charset8() @@ -330,12 +330,12 @@ form_mode: { // DTV Graphics Mode lda #0 sta DTV_CONTROL - // VICII->CONTROL1 = VIC_DEN|VIC_RSEL|3 + // VICII->CONTROL1 = VICII_DEN|VICII_RSEL|3 // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 + lda #VICII_DEN|VICII_RSEL|3 sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 - // VICII->CONTROL2 = VIC_CSEL - lda #VIC_CSEL + // VICII->CONTROL2 = VICII_CSEL + lda #VICII_CSEL sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2 // VICII->MEMORY = (byte)((((word)FORM_SCREEN&$3fff)/$40)|(((word)FORM_CHARSET&$3fff)/$400)) // VIC Memory Pointers @@ -421,7 +421,7 @@ gfx_mode: { .label __83 = 7 .label plane_a = 9 .label plane_b = 9 - .label vic_colors = 3 + .label VICII_colors = 3 .label col = 5 .label cy = $e // if(*form_ctrl_line!=0) @@ -484,33 +484,33 @@ gfx_mode: { lda form_ctrl_ecm cmp #0 beq __b11 - ldx #VIC_DEN|VIC_RSEL|3|VIC_ECM + ldx #VICII_DEN|VICII_RSEL|3|VICII_ECM jmp __b7 __b11: - ldx #VIC_DEN|VIC_RSEL|3 + ldx #VICII_DEN|VICII_RSEL|3 __b7: // if(*form_ctrl_bmm!=0) lda form_ctrl_bmm cmp #0 beq __b8 - // vic_control = vic_control | VIC_BMM + // VICII_control = VICII_control | VICII_BMM txa - ora #VIC_BMM + ora #VICII_BMM tax __b8: - // *VIC_CONTROL = vic_control - stx VIC_CONTROL + // *VICII_CONTROL = VICII_control + stx VICII_CONTROL // if(*form_ctrl_mcm!=0) lda form_ctrl_mcm cmp #0 beq __b12 - lda #VIC_CSEL|VIC_MCM + lda #VICII_CSEL|VICII_MCM jmp __b9 __b12: - lda #VIC_CSEL + lda #VICII_CSEL __b9: - // *VIC_CONTROL2 = vic_control2 - sta VIC_CONTROL2 + // *VICII_CONTROL2 = VICII_control2 + sta VICII_CONTROL2 // *form_a_start_hi*$10 lda form_a_start_hi asl @@ -667,22 +667,22 @@ gfx_mode: { // VIC Graphics Bank lda #3 sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR - // CIA2->PORT_A = %00000011 ^ (byte)((word)VIC_SCREEN0/$4000) + // CIA2->PORT_A = %00000011 ^ (byte)((word)VICII_SCREEN0/$4000) // Set VIC Bank bits to output - all others to input - lda #3^VIC_SCREEN0/$4000 + lda #3^VICII_SCREEN0/$4000 sta CIA2 - // get_vic_screen(*form_vic_screen) - lda form_vic_screen - jsr get_vic_screen - // get_vic_screen(*form_vic_screen) - // (word)get_vic_screen(*form_vic_screen)&$3fff + // get_VICII_screen(*form_VICII_screen) + lda form_VICII_screen + jsr get_VICII_screen + // get_VICII_screen(*form_VICII_screen) + // (word)get_VICII_screen(*form_VICII_screen)&$3fff lda.z __47 and #<$3fff sta.z __47 lda.z __47+1 and #>$3fff sta.z __47+1 - // ((word)get_vic_screen(*form_vic_screen)&$3fff)/$40 + // ((word)get_VICII_screen(*form_VICII_screen)&$3fff)/$40 lda.z __48 asl sta.z $ff @@ -695,33 +695,33 @@ gfx_mode: { asl.z $ff rol.z __48 rol.z __48+1 - // get_vic_charset(*form_vic_gfx) - lda form_vic_gfx - jsr get_vic_charset - // (word)get_vic_charset(*form_vic_gfx)&$3fff + // get_VICII_charset(*form_VICII_gfx) + lda form_VICII_gfx + jsr get_VICII_charset + // (word)get_VICII_charset(*form_VICII_gfx)&$3fff lda.z __50 and #<$3fff sta.z __50 lda.z __50+1 and #>$3fff sta.z __50+1 - // >((word)get_vic_charset(*form_vic_gfx)&$3fff) - // (>((word)get_vic_charset(*form_vic_gfx)&$3fff))/4 + // >((word)get_VICII_charset(*form_VICII_gfx)&$3fff) + // (>((word)get_VICII_charset(*form_VICII_gfx)&$3fff))/4 lsr lsr sta.z __52 - // (byte)(((word)get_vic_screen(*form_vic_screen)&$3fff)/$40) | ((>((word)get_vic_charset(*form_vic_gfx)&$3fff))/4) + // (byte)(((word)get_VICII_screen(*form_VICII_screen)&$3fff)/$40) | ((>((word)get_VICII_charset(*form_VICII_gfx)&$3fff))/4) lda.z __48 ora.z __52 - // *VIC_MEMORY = (byte)(((word)get_vic_screen(*form_vic_screen)&$3fff)/$40) | ((>((word)get_vic_charset(*form_vic_gfx)&$3fff))/4) + // *VICII_MEMORY = (byte)(((word)get_VICII_screen(*form_VICII_screen)&$3fff)/$40) | ((>((word)get_VICII_charset(*form_VICII_gfx)&$3fff))/4) // Set VIC Bank // VIC memory - sta VIC_MEMORY - // get_vic_screen(*form_vic_cols) - lda form_vic_cols - jsr get_vic_screen - // get_vic_screen(*form_vic_cols) - // vic_colors = get_vic_screen(*form_vic_cols) + sta VICII_MEMORY + // get_VICII_screen(*form_VICII_cols) + lda form_VICII_cols + jsr get_VICII_screen + // get_VICII_screen(*form_VICII_cols) + // VICII_colors = get_VICII_screen(*form_VICII_cols) lda #0 sta.z cy lda #BG_COLOR = *form_vic_bg0_hi*$10|*form_vic_bg0_lo + // *form_VICII_bg0_hi*$10|*form_VICII_bg0_lo + ora form_VICII_bg0_lo + // VICII->BG_COLOR = *form_VICII_bg0_hi*$10|*form_VICII_bg0_lo sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR - // *form_vic_bg1_hi*$10 - lda form_vic_bg1_hi + // *form_VICII_bg1_hi*$10 + lda form_VICII_bg1_hi asl asl asl asl - // *form_vic_bg1_hi*$10|*form_vic_bg1_lo - ora form_vic_bg1_lo - // VICII->BG_COLOR1 = *form_vic_bg1_hi*$10|*form_vic_bg1_lo + // *form_VICII_bg1_hi*$10|*form_VICII_bg1_lo + ora form_VICII_bg1_lo + // VICII->BG_COLOR1 = *form_VICII_bg1_hi*$10|*form_VICII_bg1_lo sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1 - // *form_vic_bg2_hi*$10 - lda form_vic_bg2_hi + // *form_VICII_bg2_hi*$10 + lda form_VICII_bg2_hi asl asl asl asl - // *form_vic_bg2_hi*$10|*form_vic_bg2_lo - ora form_vic_bg2_lo - // VICII->BG_COLOR2 = *form_vic_bg2_hi*$10|*form_vic_bg2_lo + // *form_VICII_bg2_hi*$10|*form_VICII_bg2_lo + ora form_VICII_bg2_lo + // VICII->BG_COLOR2 = *form_VICII_bg2_hi*$10|*form_VICII_bg2_lo sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2 - // *form_vic_bg3_hi*$10 - lda form_vic_bg3_hi + // *form_VICII_bg3_hi*$10 + lda form_VICII_bg3_hi asl asl asl asl - // *form_vic_bg3_hi*$10|*form_vic_bg3_lo - ora form_vic_bg3_lo - // VICII->BG_COLOR3 = *form_vic_bg3_hi*$10|*form_vic_bg3_lo + // *form_VICII_bg3_hi*$10|*form_VICII_bg3_lo + ora form_VICII_bg3_lo + // VICII->BG_COLOR3 = *form_VICII_bg3_hi*$10|*form_VICII_bg3_lo sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR3 // if(*form_dtv_palet==0) // DTV Palette @@ -847,9 +847,9 @@ gfx_init_screen0: { .label __1 = $10 .label ch = 3 .label cy = $11 - lda #VIC_SCREEN0 + lda #>VICII_SCREEN0 sta.z ch+1 lda #0 sta.z cy @@ -894,9 +894,9 @@ gfx_init_screen0: { gfx_init_screen1: { .label ch = 5 .label cy = 2 - lda #VIC_SCREEN1 + lda #>VICII_SCREEN1 sta.z ch+1 lda #0 sta.z cy @@ -934,9 +934,9 @@ gfx_init_screen2: { .label col2 = $11 .label ch = 3 .label cy = $e - lda #VIC_SCREEN2 + lda #>VICII_SCREEN2 sta.z ch+1 lda #0 sta.z cy @@ -989,9 +989,9 @@ gfx_init_screen3: { .label __1 = $12 .label ch = 3 .label cy = $e - lda #VIC_SCREEN3 + lda #>VICII_SCREEN3 sta.z ch+1 lda #0 sta.z cy @@ -1038,9 +1038,9 @@ gfx_init_screen4: { .label cy = $11 lda #0 sta.z cy - lda #VIC_SCREEN4 + lda #>VICII_SCREEN4 sta.z ch+1 __b1: ldx #0 @@ -1075,9 +1075,9 @@ gfx_init_charset: { sta PROCPORT lda #0 sta.z c - lda #VIC_CHARSET_ROM + lda #>VICII_CHARSET_ROM sta.z charset+1 lda #VIC_SCREEN0 + lda #>VICII_SCREEN0 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN0>>$10 + lda #>VICII_SCREEN0>>$10 sta.z return+3 rts __b2: @@ -2149,53 +2149,53 @@ get_plane: { sta.z return+3 rts __b6: - lda #VIC_SCREEN1 + lda #>VICII_SCREEN1 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN1>>$10 + lda #>VICII_SCREEN1>>$10 sta.z return+3 rts __b7: - lda #VIC_SCREEN2 + lda #>VICII_SCREEN2 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN2>>$10 + lda #>VICII_SCREEN2>>$10 sta.z return+3 rts __b8: - lda #VIC_SCREEN3 + lda #>VICII_SCREEN3 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN3>>$10 + lda #>VICII_SCREEN3>>$10 sta.z return+3 rts __b9: - lda #VIC_BITMAP + lda #>VICII_BITMAP sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_BITMAP>>$10 + lda #>VICII_BITMAP>>$10 sta.z return+3 rts __b10: - lda #VIC_CHARSET_ROM + lda #>VICII_CHARSET_ROM sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_CHARSET_ROM>>$10 + lda #>VICII_CHARSET_ROM>>$10 sta.z return+3 rts __b11: @@ -2231,8 +2231,8 @@ get_plane: { rts } // Get the VIC screen address from the screen index -// get_vic_screen(byte register(A) idx) -get_vic_screen: { +// get_VICII_screen(byte register(A) idx) +get_VICII_screen: { .label return = 3 // if(idx==0) cmp #0 @@ -2249,40 +2249,40 @@ get_vic_screen: { // if(idx==4) cmp #4 bne __b1 - lda #VIC_SCREEN4 + lda #>VICII_SCREEN4 sta.z return+1 rts __b1: - lda #VIC_SCREEN0 + lda #>VICII_SCREEN0 sta.z return+1 rts __b2: - lda #VIC_SCREEN1 + lda #>VICII_SCREEN1 sta.z return+1 rts __b3: - lda #VIC_SCREEN2 + lda #>VICII_SCREEN2 sta.z return+1 rts __b4: - lda #VIC_SCREEN3 + lda #>VICII_SCREEN3 sta.z return+1 // } rts } // Get the VIC charset/bitmap address from the index -// get_vic_charset(byte register(A) idx) -get_vic_charset: { +// get_VICII_charset(byte register(A) idx) +get_VICII_charset: { .label return = 7 // if(idx==0) cmp #0 @@ -2290,15 +2290,15 @@ get_vic_charset: { // if(idx==1) cmp #1 bne __b1 - lda #VIC_BITMAP + lda #>VICII_BITMAP sta.z return+1 rts __b1: - lda #VIC_CHARSET_ROM + lda #>VICII_CHARSET_ROM sta.z return+1 // } rts @@ -2474,7 +2474,7 @@ bitmap_init: { // bitmap_plot_xlo[x] = x&$f8 sta bitmap_plot_xlo,x // bitmap_plot_xhi[x] = >bitmap - lda #>VIC_BITMAP + lda #>VICII_BITMAP sta bitmap_plot_xhi,x // bitmap_plot_bit[x] = bits tya diff --git a/src/test/ref/c64dtv-gfxexplorer.cfg b/src/test/ref/c64dtv-gfxexplorer.cfg index 3489694f3..b49941bce 100644 --- a/src/test/ref/c64dtv-gfxexplorer.cfg +++ b/src/test/ref/c64dtv-gfxexplorer.cfg @@ -61,7 +61,7 @@ gfx_init::@5: scope:[gfx_init] from gfx_init::@4 to:gfx_init::@6 gfx_init::@6: scope:[gfx_init] from gfx_init::@5 [27] phi() - [28] call gfx_init_vic_bitmap + [28] call gfx_init_VICII_bitmap to:gfx_init::@7 gfx_init::@7: scope:[gfx_init] from gfx_init::@6 [29] phi() @@ -143,8 +143,8 @@ form_mode::@16: scope:[form_mode] from form_mode::@15 [67] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [68] *((byte*)CIA2) = 3 [69] *DTV_CONTROL = 0 - [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VIC_DEN|VIC_RSEL|3 - [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VIC_CSEL + [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VICII_DEN|VICII_RSEL|3 + [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VICII_CSEL [72] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = (byte)(word)FORM_SCREEN&$3fff/$40|(word)FORM_CHARSET&$3fff/$400 [73] *DTV_PLANEA_START_LO = 0 [74] *DTV_PLANEA_START_MI = >FORM_SCREEN @@ -249,23 +249,23 @@ gfx_mode::@16: scope:[gfx_mode] from gfx_mode::@6 [118] phi() to:gfx_mode::@7 gfx_mode::@7: scope:[gfx_mode] from gfx_mode::@16 gfx_mode::@6 - [119] gfx_mode::vic_control#5 = phi( gfx_mode::@16/VIC_DEN|VIC_RSEL|3|VIC_ECM, gfx_mode::@6/VIC_DEN|VIC_RSEL|3 ) + [119] gfx_mode::VICII_control#5 = phi( gfx_mode::@16/VICII_DEN|VICII_RSEL|3|VICII_ECM, gfx_mode::@6/VICII_DEN|VICII_RSEL|3 ) [120] if(*form_ctrl_bmm==0) goto gfx_mode::@8 to:gfx_mode::@17 gfx_mode::@17: scope:[gfx_mode] from gfx_mode::@7 - [121] gfx_mode::vic_control#2 = gfx_mode::vic_control#5 | VIC_BMM + [121] gfx_mode::VICII_control#2 = gfx_mode::VICII_control#5 | VICII_BMM to:gfx_mode::@8 gfx_mode::@8: scope:[gfx_mode] from gfx_mode::@17 gfx_mode::@7 - [122] gfx_mode::vic_control#4 = phi( gfx_mode::@17/gfx_mode::vic_control#2, gfx_mode::@7/gfx_mode::vic_control#5 ) - [123] *VIC_CONTROL = gfx_mode::vic_control#4 + [122] gfx_mode::VICII_control#4 = phi( gfx_mode::@17/gfx_mode::VICII_control#2, gfx_mode::@7/gfx_mode::VICII_control#5 ) + [123] *VICII_CONTROL = gfx_mode::VICII_control#4 [124] if(*form_ctrl_mcm==0) goto gfx_mode::@9 to:gfx_mode::@18 gfx_mode::@18: scope:[gfx_mode] from gfx_mode::@8 [125] phi() to:gfx_mode::@9 gfx_mode::@9: scope:[gfx_mode] from gfx_mode::@18 gfx_mode::@8 - [126] gfx_mode::vic_control2#2 = phi( gfx_mode::@18/VIC_CSEL|VIC_MCM, gfx_mode::@8/VIC_CSEL ) - [127] *VIC_CONTROL2 = gfx_mode::vic_control2#2 + [126] gfx_mode::VICII_control2#2 = phi( gfx_mode::@18/VICII_CSEL|VICII_MCM, gfx_mode::@8/VICII_CSEL ) + [127] *VICII_CONTROL2 = gfx_mode::VICII_control2#2 [128] gfx_mode::$18 = *form_a_start_hi << 4 [129] gfx_mode::plane_a_offs#0 = gfx_mode::$18 | *form_a_start_lo [130] get_plane::idx#0 = *form_a_pattern @@ -317,46 +317,46 @@ gfx_mode::@28: scope:[gfx_mode] from gfx_mode::@27 [172] *DTV_PLANEB_MODULO_LO = gfx_mode::$45 [173] *DTV_PLANEB_MODULO_HI = 0 [174] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 - [175] *((byte*)CIA2) = 3^(byte)(word)VIC_SCREEN0/$4000 - [176] get_vic_screen::idx#0 = *form_vic_screen - [177] call get_vic_screen - [178] get_vic_screen::return#10 = get_vic_screen::return#5 + [175] *((byte*)CIA2) = 3^(byte)(word)VICII_SCREEN0/$4000 + [176] get_VICII_screen::idx#0 = *form_VICII_screen + [177] call get_VICII_screen + [178] get_VICII_screen::return#10 = get_VICII_screen::return#5 to:gfx_mode::@29 gfx_mode::@29: scope:[gfx_mode] from gfx_mode::@28 - [179] gfx_mode::$82 = get_vic_screen::return#10 + [179] gfx_mode::$82 = get_VICII_screen::return#10 [180] gfx_mode::$47 = (word)gfx_mode::$82 & $3fff [181] gfx_mode::$48 = gfx_mode::$47 >> 6 - [182] get_vic_charset::idx#0 = *form_vic_gfx - [183] call get_vic_charset - [184] get_vic_charset::return#4 = get_vic_charset::return#2 + [182] get_VICII_charset::idx#0 = *form_VICII_gfx + [183] call get_VICII_charset + [184] get_VICII_charset::return#4 = get_VICII_charset::return#2 to:gfx_mode::@30 gfx_mode::@30: scope:[gfx_mode] from gfx_mode::@29 - [185] gfx_mode::$83 = get_vic_charset::return#4 + [185] gfx_mode::$83 = get_VICII_charset::return#4 [186] gfx_mode::$50 = (word)gfx_mode::$83 & $3fff [187] gfx_mode::$51 = > gfx_mode::$50 [188] gfx_mode::$52 = gfx_mode::$51 >> 2 [189] gfx_mode::$84 = (byte)gfx_mode::$48 [190] gfx_mode::$53 = gfx_mode::$84 | gfx_mode::$52 - [191] *VIC_MEMORY = gfx_mode::$53 - [192] get_vic_screen::idx#1 = *form_vic_cols - [193] call get_vic_screen - [194] get_vic_screen::return#11 = get_vic_screen::return#5 + [191] *VICII_MEMORY = gfx_mode::$53 + [192] get_VICII_screen::idx#1 = *form_VICII_cols + [193] call get_VICII_screen + [194] get_VICII_screen::return#11 = get_VICII_screen::return#5 to:gfx_mode::@31 gfx_mode::@31: scope:[gfx_mode] from gfx_mode::@30 - [195] gfx_mode::vic_colors#0 = get_vic_screen::return#11 + [195] gfx_mode::VICII_colors#0 = get_VICII_screen::return#11 to:gfx_mode::@19 gfx_mode::@19: scope:[gfx_mode] from gfx_mode::@21 gfx_mode::@31 [196] gfx_mode::cy#4 = phi( gfx_mode::@21/gfx_mode::cy#1, gfx_mode::@31/0 ) [196] gfx_mode::col#3 = phi( gfx_mode::@21/gfx_mode::col#1, gfx_mode::@31/COLS ) - [196] gfx_mode::vic_colors#3 = phi( gfx_mode::@21/gfx_mode::vic_colors#1, gfx_mode::@31/gfx_mode::vic_colors#0 ) + [196] gfx_mode::VICII_colors#3 = phi( gfx_mode::@21/gfx_mode::VICII_colors#1, gfx_mode::@31/gfx_mode::VICII_colors#0 ) to:gfx_mode::@20 gfx_mode::@20: scope:[gfx_mode] from gfx_mode::@19 gfx_mode::@20 [197] gfx_mode::cx#2 = phi( gfx_mode::@19/0, gfx_mode::@20/gfx_mode::cx#1 ) [197] gfx_mode::col#2 = phi( gfx_mode::@19/gfx_mode::col#3, gfx_mode::@20/gfx_mode::col#1 ) - [197] gfx_mode::vic_colors#2 = phi( gfx_mode::@19/gfx_mode::vic_colors#3, gfx_mode::@20/gfx_mode::vic_colors#1 ) - [198] *gfx_mode::col#2 = *gfx_mode::vic_colors#2 + [197] gfx_mode::VICII_colors#2 = phi( gfx_mode::@19/gfx_mode::VICII_colors#3, gfx_mode::@20/gfx_mode::VICII_colors#1 ) + [198] *gfx_mode::col#2 = *gfx_mode::VICII_colors#2 [199] gfx_mode::col#1 = ++ gfx_mode::col#2 - [200] gfx_mode::vic_colors#1 = ++ gfx_mode::vic_colors#2 + [200] gfx_mode::VICII_colors#1 = ++ gfx_mode::VICII_colors#2 [201] gfx_mode::cx#1 = ++ gfx_mode::cx#2 [202] if(gfx_mode::cx#1!=$28) goto gfx_mode::@20 to:gfx_mode::@21 @@ -366,17 +366,17 @@ gfx_mode::@21: scope:[gfx_mode] from gfx_mode::@20 to:gfx_mode::@22 gfx_mode::@22: scope:[gfx_mode] from gfx_mode::@21 [205] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 - [206] gfx_mode::$55 = *form_vic_bg0_hi << 4 - [207] gfx_mode::$56 = gfx_mode::$55 | *form_vic_bg0_lo + [206] gfx_mode::$55 = *form_VICII_bg0_hi << 4 + [207] gfx_mode::$56 = gfx_mode::$55 | *form_VICII_bg0_lo [208] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = gfx_mode::$56 - [209] gfx_mode::$57 = *form_vic_bg1_hi << 4 - [210] gfx_mode::$58 = gfx_mode::$57 | *form_vic_bg1_lo + [209] gfx_mode::$57 = *form_VICII_bg1_hi << 4 + [210] gfx_mode::$58 = gfx_mode::$57 | *form_VICII_bg1_lo [211] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) = gfx_mode::$58 - [212] gfx_mode::$59 = *form_vic_bg2_hi << 4 - [213] gfx_mode::$60 = gfx_mode::$59 | *form_vic_bg2_lo + [212] gfx_mode::$59 = *form_VICII_bg2_hi << 4 + [213] gfx_mode::$60 = gfx_mode::$59 | *form_VICII_bg2_lo [214] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2) = gfx_mode::$60 - [215] gfx_mode::$61 = *form_vic_bg3_hi << 4 - [216] gfx_mode::$62 = gfx_mode::$61 | *form_vic_bg3_lo + [215] gfx_mode::$61 = *form_VICII_bg3_hi << 4 + [216] gfx_mode::$62 = gfx_mode::$61 | *form_VICII_bg3_lo [217] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR3) = gfx_mode::$62 [218] if(*form_dtv_palet==0) goto gfx_mode::@24 to:gfx_mode::@23 @@ -417,7 +417,7 @@ gfx_init_screen0: scope:[gfx_init_screen0] from gfx_init [236] phi() to:gfx_init_screen0::@1 gfx_init_screen0::@1: scope:[gfx_init_screen0] from gfx_init_screen0 gfx_init_screen0::@3 - [237] gfx_init_screen0::ch#3 = phi( gfx_init_screen0/VIC_SCREEN0, gfx_init_screen0::@3/gfx_init_screen0::ch#1 ) + [237] gfx_init_screen0::ch#3 = phi( gfx_init_screen0/VICII_SCREEN0, gfx_init_screen0::@3/gfx_init_screen0::ch#1 ) [237] gfx_init_screen0::cy#4 = phi( gfx_init_screen0/0, gfx_init_screen0::@3/gfx_init_screen0::cy#1 ) to:gfx_init_screen0::@2 gfx_init_screen0::@2: scope:[gfx_init_screen0] from gfx_init_screen0::@1 gfx_init_screen0::@2 @@ -445,7 +445,7 @@ gfx_init_screen1: scope:[gfx_init_screen1] from gfx_init::@1 [250] phi() to:gfx_init_screen1::@1 gfx_init_screen1::@1: scope:[gfx_init_screen1] from gfx_init_screen1 gfx_init_screen1::@3 - [251] gfx_init_screen1::ch#3 = phi( gfx_init_screen1/VIC_SCREEN1, gfx_init_screen1::@3/gfx_init_screen1::ch#1 ) + [251] gfx_init_screen1::ch#3 = phi( gfx_init_screen1/VICII_SCREEN1, gfx_init_screen1::@3/gfx_init_screen1::ch#1 ) [251] gfx_init_screen1::cy#4 = phi( gfx_init_screen1/0, gfx_init_screen1::@3/gfx_init_screen1::cy#1 ) to:gfx_init_screen1::@2 gfx_init_screen1::@2: scope:[gfx_init_screen1] from gfx_init_screen1::@1 gfx_init_screen1::@2 @@ -471,7 +471,7 @@ gfx_init_screen2: scope:[gfx_init_screen2] from gfx_init::@2 [262] phi() to:gfx_init_screen2::@1 gfx_init_screen2::@1: scope:[gfx_init_screen2] from gfx_init_screen2 gfx_init_screen2::@3 - [263] gfx_init_screen2::ch#3 = phi( gfx_init_screen2/VIC_SCREEN2, gfx_init_screen2::@3/gfx_init_screen2::ch#1 ) + [263] gfx_init_screen2::ch#3 = phi( gfx_init_screen2/VICII_SCREEN2, gfx_init_screen2::@3/gfx_init_screen2::ch#1 ) [263] gfx_init_screen2::cy#4 = phi( gfx_init_screen2/0, gfx_init_screen2::@3/gfx_init_screen2::cy#1 ) to:gfx_init_screen2::@2 gfx_init_screen2::@2: scope:[gfx_init_screen2] from gfx_init_screen2::@1 gfx_init_screen2::@2 @@ -500,7 +500,7 @@ gfx_init_screen3: scope:[gfx_init_screen3] from gfx_init::@3 [277] phi() to:gfx_init_screen3::@1 gfx_init_screen3::@1: scope:[gfx_init_screen3] from gfx_init_screen3 gfx_init_screen3::@3 - [278] gfx_init_screen3::ch#3 = phi( gfx_init_screen3/VIC_SCREEN3, gfx_init_screen3::@3/gfx_init_screen3::ch#1 ) + [278] gfx_init_screen3::ch#3 = phi( gfx_init_screen3/VICII_SCREEN3, gfx_init_screen3::@3/gfx_init_screen3::ch#1 ) [278] gfx_init_screen3::cy#4 = phi( gfx_init_screen3/0, gfx_init_screen3::@3/gfx_init_screen3::cy#1 ) to:gfx_init_screen3::@2 gfx_init_screen3::@2: scope:[gfx_init_screen3] from gfx_init_screen3::@1 gfx_init_screen3::@2 @@ -529,7 +529,7 @@ gfx_init_screen4: scope:[gfx_init_screen4] from gfx_init::@4 to:gfx_init_screen4::@1 gfx_init_screen4::@1: scope:[gfx_init_screen4] from gfx_init_screen4 gfx_init_screen4::@3 [292] gfx_init_screen4::cy#4 = phi( gfx_init_screen4/0, gfx_init_screen4::@3/gfx_init_screen4::cy#1 ) - [292] gfx_init_screen4::ch#3 = phi( gfx_init_screen4/VIC_SCREEN4, gfx_init_screen4::@3/gfx_init_screen4::ch#1 ) + [292] gfx_init_screen4::ch#3 = phi( gfx_init_screen4/VICII_SCREEN4, gfx_init_screen4::@3/gfx_init_screen4::ch#1 ) to:gfx_init_screen4::@2 gfx_init_screen4::@2: scope:[gfx_init_screen4] from gfx_init_screen4::@1 gfx_init_screen4::@2 [293] gfx_init_screen4::cx#2 = phi( gfx_init_screen4::@1/0, gfx_init_screen4::@2/gfx_init_screen4::cx#1 ) @@ -553,7 +553,7 @@ gfx_init_charset: scope:[gfx_init_charset] from gfx_init::@5 to:gfx_init_charset::@1 gfx_init_charset::@1: scope:[gfx_init_charset] from gfx_init_charset gfx_init_charset::@3 [302] gfx_init_charset::c#4 = phi( gfx_init_charset/0, gfx_init_charset::@3/gfx_init_charset::c#1 ) - [302] gfx_init_charset::charset#3 = phi( gfx_init_charset/VIC_CHARSET_ROM, gfx_init_charset::@3/gfx_init_charset::charset#1 ) + [302] gfx_init_charset::charset#3 = phi( gfx_init_charset/VICII_CHARSET_ROM, gfx_init_charset::@3/gfx_init_charset::charset#1 ) [302] gfx_init_charset::chargen#3 = phi( gfx_init_charset/CHARGEN, gfx_init_charset::@3/gfx_init_charset::chargen#1 ) to:gfx_init_charset::@2 gfx_init_charset::@2: scope:[gfx_init_charset] from gfx_init_charset::@1 gfx_init_charset::@2 @@ -577,32 +577,32 @@ gfx_init_charset::@return: scope:[gfx_init_charset] from gfx_init_charset::@4 [312] return to:@return -void gfx_init_vic_bitmap() -gfx_init_vic_bitmap: scope:[gfx_init_vic_bitmap] from gfx_init::@6 +void gfx_init_VICII_bitmap() +gfx_init_VICII_bitmap: scope:[gfx_init_VICII_bitmap] from gfx_init::@6 [313] phi() [314] call bitmap_init - to:gfx_init_vic_bitmap::@3 -gfx_init_vic_bitmap::@3: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap + to:gfx_init_VICII_bitmap::@3 +gfx_init_VICII_bitmap::@3: scope:[gfx_init_VICII_bitmap] from gfx_init_VICII_bitmap [315] phi() [316] call bitmap_clear - to:gfx_init_vic_bitmap::@1 -gfx_init_vic_bitmap::@1: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap::@3 gfx_init_vic_bitmap::@4 - [317] gfx_init_vic_bitmap::l#2 = phi( gfx_init_vic_bitmap::@3/0, gfx_init_vic_bitmap::@4/gfx_init_vic_bitmap::l#1 ) - [318] if(gfx_init_vic_bitmap::l#2VIC_BITMAP + [641] bitmap_plot_xhi[bitmap_init::x#2] = >VICII_BITMAP [642] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 [643] bitmap_init::bits#1 = bitmap_init::bits#3 >> 1 [644] if(bitmap_init::bits#1!=0) goto bitmap_init::@6 @@ -1389,7 +1389,7 @@ bitmap_init::@return: scope:[bitmap_init] from bitmap_init::@4 to:@return void bitmap_clear() -bitmap_clear: scope:[bitmap_clear] from gfx_init_vic_bitmap::@3 +bitmap_clear: scope:[bitmap_clear] from gfx_init_VICII_bitmap::@3 [662] bitmap_clear::bitmap#0 = *bitmap_plot_xhi w= *bitmap_plot_xlo [663] bitmap_clear::bitmap#5 = (byte*)bitmap_clear::bitmap#0 to:bitmap_clear::@1 @@ -1414,7 +1414,7 @@ bitmap_clear::@return: scope:[bitmap_clear] from bitmap_clear::@3 to:@return void bitmap_line(byte bitmap_line::x0 , byte bitmap_line::x1 , byte bitmap_line::y0 , byte bitmap_line::y1) -bitmap_line: scope:[bitmap_line] from gfx_init_vic_bitmap::@2 +bitmap_line: scope:[bitmap_line] from gfx_init_VICII_bitmap::@2 [673] if(bitmap_line::x0#0 gfx_mode::$50 gfx_mode::$52 = gfx_mode::$51 / 4 gfx_mode::$84 = (byte)gfx_mode::$48 gfx_mode::$53 = gfx_mode::$84 | gfx_mode::$52 - *VIC_MEMORY = gfx_mode::$53 - get_vic_screen::idx#1 = *form_vic_cols - call get_vic_screen - get_vic_screen::return#8 = get_vic_screen::return#5 + *VICII_MEMORY = gfx_mode::$53 + get_VICII_screen::idx#1 = *form_VICII_cols + call get_VICII_screen + get_VICII_screen::return#8 = get_VICII_screen::return#5 to:gfx_mode::@34 gfx_mode::@34: scope:[gfx_mode] from gfx_mode::@33 keyboard_modifiers#97 = phi( gfx_mode::@33/keyboard_modifiers#99 ) keyboard_events_size#116 = phi( gfx_mode::@33/keyboard_events_size#118 ) - get_vic_screen::return#11 = phi( gfx_mode::@33/get_vic_screen::return#8 ) - gfx_mode::$54 = get_vic_screen::return#11 - gfx_mode::vic_colors#0 = gfx_mode::$54 + get_VICII_screen::return#11 = phi( gfx_mode::@33/get_VICII_screen::return#8 ) + gfx_mode::$54 = get_VICII_screen::return#11 + gfx_mode::VICII_colors#0 = gfx_mode::$54 gfx_mode::col#0 = COLS gfx_mode::cy#0 = 0 to:gfx_mode::@20 gfx_mode::@19: scope:[gfx_mode] from gfx_mode::@8 keyboard_modifiers#109 = phi( gfx_mode::@8/keyboard_modifiers#110 ) keyboard_events_size#128 = phi( gfx_mode::@8/keyboard_events_size#129 ) - gfx_mode::vic_control2#3 = phi( gfx_mode::@8/gfx_mode::vic_control2#0 ) - gfx_mode::$72 = gfx_mode::vic_control2#3 | VIC_MCM - gfx_mode::vic_control2#1 = gfx_mode::$72 + gfx_mode::VICII_control2#3 = phi( gfx_mode::@8/gfx_mode::VICII_control2#0 ) + gfx_mode::$72 = gfx_mode::VICII_control2#3 | VICII_MCM + gfx_mode::VICII_control2#1 = gfx_mode::$72 to:gfx_mode::@9 gfx_mode::@20: scope:[gfx_mode] from gfx_mode::@22 gfx_mode::@34 keyboard_modifiers#95 = phi( gfx_mode::@22/keyboard_modifiers#89, gfx_mode::@34/keyboard_modifiers#97 ) keyboard_events_size#113 = phi( gfx_mode::@22/keyboard_events_size#102, gfx_mode::@34/keyboard_events_size#116 ) gfx_mode::cy#4 = phi( gfx_mode::@22/gfx_mode::cy#1, gfx_mode::@34/gfx_mode::cy#0 ) gfx_mode::col#3 = phi( gfx_mode::@22/gfx_mode::col#4, gfx_mode::@34/gfx_mode::col#0 ) - gfx_mode::vic_colors#3 = phi( gfx_mode::@22/gfx_mode::vic_colors#4, gfx_mode::@34/gfx_mode::vic_colors#0 ) + gfx_mode::VICII_colors#3 = phi( gfx_mode::@22/gfx_mode::VICII_colors#4, gfx_mode::@34/gfx_mode::VICII_colors#0 ) gfx_mode::cx#0 = 0 to:gfx_mode::@21 gfx_mode::@21: scope:[gfx_mode] from gfx_mode::@20 gfx_mode::@21 @@ -1838,10 +1838,10 @@ gfx_mode::@21: scope:[gfx_mode] from gfx_mode::@20 gfx_mode::@21 gfx_mode::cy#3 = phi( gfx_mode::@20/gfx_mode::cy#4, gfx_mode::@21/gfx_mode::cy#3 ) gfx_mode::cx#2 = phi( gfx_mode::@20/gfx_mode::cx#0, gfx_mode::@21/gfx_mode::cx#1 ) gfx_mode::col#2 = phi( gfx_mode::@20/gfx_mode::col#3, gfx_mode::@21/gfx_mode::col#1 ) - gfx_mode::vic_colors#2 = phi( gfx_mode::@20/gfx_mode::vic_colors#3, gfx_mode::@21/gfx_mode::vic_colors#1 ) - *gfx_mode::col#2 = *gfx_mode::vic_colors#2 + gfx_mode::VICII_colors#2 = phi( gfx_mode::@20/gfx_mode::VICII_colors#3, gfx_mode::@21/gfx_mode::VICII_colors#1 ) + *gfx_mode::col#2 = *gfx_mode::VICII_colors#2 gfx_mode::col#1 = ++ gfx_mode::col#2 - gfx_mode::vic_colors#1 = ++ gfx_mode::vic_colors#2 + gfx_mode::VICII_colors#1 = ++ gfx_mode::VICII_colors#2 gfx_mode::cx#1 = gfx_mode::cx#2 + rangenext(0,$27) gfx_mode::$73 = gfx_mode::cx#1 != rangelast(0,$27) if(gfx_mode::$73) goto gfx_mode::@21 @@ -1850,7 +1850,7 @@ gfx_mode::@22: scope:[gfx_mode] from gfx_mode::@21 keyboard_modifiers#89 = phi( gfx_mode::@21/keyboard_modifiers#93 ) keyboard_events_size#102 = phi( gfx_mode::@21/keyboard_events_size#109 ) gfx_mode::col#4 = phi( gfx_mode::@21/gfx_mode::col#1 ) - gfx_mode::vic_colors#4 = phi( gfx_mode::@21/gfx_mode::vic_colors#1 ) + gfx_mode::VICII_colors#4 = phi( gfx_mode::@21/gfx_mode::VICII_colors#1 ) gfx_mode::cy#2 = phi( gfx_mode::@21/gfx_mode::cy#3 ) gfx_mode::cy#1 = gfx_mode::cy#2 + rangenext(0,$18) gfx_mode::$74 = gfx_mode::cy#1 != rangelast(0,$18) @@ -1860,17 +1860,17 @@ gfx_mode::@23: scope:[gfx_mode] from gfx_mode::@22 keyboard_modifiers#84 = phi( gfx_mode::@22/keyboard_modifiers#89 ) keyboard_events_size#93 = phi( gfx_mode::@22/keyboard_events_size#102 ) *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 - gfx_mode::$55 = *form_vic_bg0_hi * $10 - gfx_mode::$56 = gfx_mode::$55 | *form_vic_bg0_lo + gfx_mode::$55 = *form_VICII_bg0_hi * $10 + gfx_mode::$56 = gfx_mode::$55 | *form_VICII_bg0_lo *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = gfx_mode::$56 - gfx_mode::$57 = *form_vic_bg1_hi * $10 - gfx_mode::$58 = gfx_mode::$57 | *form_vic_bg1_lo + gfx_mode::$57 = *form_VICII_bg1_hi * $10 + gfx_mode::$58 = gfx_mode::$57 | *form_VICII_bg1_lo *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) = gfx_mode::$58 - gfx_mode::$59 = *form_vic_bg2_hi * $10 - gfx_mode::$60 = gfx_mode::$59 | *form_vic_bg2_lo + gfx_mode::$59 = *form_VICII_bg2_hi * $10 + gfx_mode::$60 = gfx_mode::$59 | *form_VICII_bg2_lo *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2) = gfx_mode::$60 - gfx_mode::$61 = *form_vic_bg3_hi * $10 - gfx_mode::$62 = gfx_mode::$61 | *form_vic_bg3_lo + gfx_mode::$61 = *form_VICII_bg3_hi * $10 + gfx_mode::$62 = gfx_mode::$61 | *form_VICII_bg3_lo *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR3) = gfx_mode::$62 gfx_mode::$63 = *form_dtv_palet == 0 if(gfx_mode::$63) goto gfx_mode::@10 @@ -1966,7 +1966,7 @@ gfx_init::@5: scope:[gfx_init] from gfx_init::@4 call gfx_init_charset to:gfx_init::@6 gfx_init::@6: scope:[gfx_init] from gfx_init::@5 - call gfx_init_vic_bitmap + call gfx_init_VICII_bitmap to:gfx_init::@7 gfx_init::@7: scope:[gfx_init] from gfx_init::@6 call gfx_init_plane_8bppchunky @@ -2002,7 +2002,7 @@ void gfx_init_charset() gfx_init_charset: scope:[gfx_init_charset] from gfx_init::@5 *PROCPORT = $32 gfx_init_charset::chargen#0 = CHARGEN - gfx_init_charset::charset#0 = VIC_CHARSET_ROM + gfx_init_charset::charset#0 = VICII_CHARSET_ROM gfx_init_charset::c#0 = 0 to:gfx_init_charset::@1 gfx_init_charset::@1: scope:[gfx_init_charset] from gfx_init_charset gfx_init_charset::@3 @@ -2040,7 +2040,7 @@ gfx_init_charset::@return: scope:[gfx_init_charset] from gfx_init_charset::@4 void gfx_init_screen0() gfx_init_screen0: scope:[gfx_init_screen0] from gfx_init - gfx_init_screen0::ch#0 = VIC_SCREEN0 + gfx_init_screen0::ch#0 = VICII_SCREEN0 gfx_init_screen0::cy#0 = 0 to:gfx_init_screen0::@1 gfx_init_screen0::@1: scope:[gfx_init_screen0] from gfx_init_screen0 gfx_init_screen0::@3 @@ -2075,7 +2075,7 @@ gfx_init_screen0::@return: scope:[gfx_init_screen0] from gfx_init_screen0::@3 void gfx_init_screen1() gfx_init_screen1: scope:[gfx_init_screen1] from gfx_init::@1 - gfx_init_screen1::ch#0 = VIC_SCREEN1 + gfx_init_screen1::ch#0 = VICII_SCREEN1 gfx_init_screen1::cy#0 = 0 to:gfx_init_screen1::@1 gfx_init_screen1::@1: scope:[gfx_init_screen1] from gfx_init_screen1 gfx_init_screen1::@3 @@ -2108,7 +2108,7 @@ gfx_init_screen1::@return: scope:[gfx_init_screen1] from gfx_init_screen1::@3 void gfx_init_screen2() gfx_init_screen2: scope:[gfx_init_screen2] from gfx_init::@2 - gfx_init_screen2::ch#0 = VIC_SCREEN2 + gfx_init_screen2::ch#0 = VICII_SCREEN2 gfx_init_screen2::cy#0 = 0 to:gfx_init_screen2::@1 gfx_init_screen2::@1: scope:[gfx_init_screen2] from gfx_init_screen2 gfx_init_screen2::@3 @@ -2146,7 +2146,7 @@ gfx_init_screen2::@return: scope:[gfx_init_screen2] from gfx_init_screen2::@3 void gfx_init_screen3() gfx_init_screen3: scope:[gfx_init_screen3] from gfx_init::@3 - gfx_init_screen3::ch#0 = VIC_SCREEN3 + gfx_init_screen3::ch#0 = VICII_SCREEN3 gfx_init_screen3::cy#0 = 0 to:gfx_init_screen3::@1 gfx_init_screen3::@1: scope:[gfx_init_screen3] from gfx_init_screen3 gfx_init_screen3::@3 @@ -2181,7 +2181,7 @@ gfx_init_screen3::@return: scope:[gfx_init_screen3] from gfx_init_screen3::@3 void gfx_init_screen4() gfx_init_screen4: scope:[gfx_init_screen4] from gfx_init::@4 - gfx_init_screen4::ch#0 = VIC_SCREEN4 + gfx_init_screen4::ch#0 = VICII_SCREEN4 gfx_init_screen4::cy#0 = 0 to:gfx_init_screen4::@1 gfx_init_screen4::@1: scope:[gfx_init_screen4] from gfx_init_screen4 gfx_init_screen4::@3 @@ -2210,37 +2210,37 @@ gfx_init_screen4::@return: scope:[gfx_init_screen4] from gfx_init_screen4::@3 return to:@return -void gfx_init_vic_bitmap() -gfx_init_vic_bitmap: scope:[gfx_init_vic_bitmap] from gfx_init::@6 - bitmap_init::bitmap#0 = VIC_BITMAP +void gfx_init_VICII_bitmap() +gfx_init_VICII_bitmap: scope:[gfx_init_VICII_bitmap] from gfx_init::@6 + bitmap_init::bitmap#0 = VICII_BITMAP call bitmap_init - to:gfx_init_vic_bitmap::@3 -gfx_init_vic_bitmap::@3: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap + to:gfx_init_VICII_bitmap::@3 +gfx_init_VICII_bitmap::@3: scope:[gfx_init_VICII_bitmap] from gfx_init_VICII_bitmap call bitmap_clear - to:gfx_init_vic_bitmap::@4 -gfx_init_vic_bitmap::@4: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap::@3 - gfx_init_vic_bitmap::l#0 = 0 - to:gfx_init_vic_bitmap::@1 -gfx_init_vic_bitmap::@1: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap::@4 gfx_init_vic_bitmap::@5 - gfx_init_vic_bitmap::l#2 = phi( gfx_init_vic_bitmap::@4/gfx_init_vic_bitmap::l#0, gfx_init_vic_bitmap::@5/gfx_init_vic_bitmap::l#1 ) - gfx_init_vic_bitmap::$2 = gfx_init_vic_bitmap::l#2 < gfx_init_vic_bitmap::lines_cnt - if(gfx_init_vic_bitmap::$2) goto gfx_init_vic_bitmap::@2 - to:gfx_init_vic_bitmap::@return -gfx_init_vic_bitmap::@2: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap::@1 - gfx_init_vic_bitmap::l#3 = phi( gfx_init_vic_bitmap::@1/gfx_init_vic_bitmap::l#2 ) - gfx_init_vic_bitmap::$3 = gfx_init_vic_bitmap::l#3 + 1 - gfx_init_vic_bitmap::$4 = gfx_init_vic_bitmap::l#3 + 1 - bitmap_line::x0#0 = gfx_init_vic_bitmap::lines_x[gfx_init_vic_bitmap::l#3] - bitmap_line::x1#0 = gfx_init_vic_bitmap::lines_x[gfx_init_vic_bitmap::$3] - bitmap_line::y0#0 = gfx_init_vic_bitmap::lines_y[gfx_init_vic_bitmap::l#3] - bitmap_line::y1#0 = gfx_init_vic_bitmap::lines_y[gfx_init_vic_bitmap::$4] + to:gfx_init_VICII_bitmap::@4 +gfx_init_VICII_bitmap::@4: scope:[gfx_init_VICII_bitmap] from gfx_init_VICII_bitmap::@3 + gfx_init_VICII_bitmap::l#0 = 0 + to:gfx_init_VICII_bitmap::@1 +gfx_init_VICII_bitmap::@1: scope:[gfx_init_VICII_bitmap] from gfx_init_VICII_bitmap::@4 gfx_init_VICII_bitmap::@5 + gfx_init_VICII_bitmap::l#2 = phi( gfx_init_VICII_bitmap::@4/gfx_init_VICII_bitmap::l#0, gfx_init_VICII_bitmap::@5/gfx_init_VICII_bitmap::l#1 ) + gfx_init_VICII_bitmap::$2 = gfx_init_VICII_bitmap::l#2 < gfx_init_VICII_bitmap::lines_cnt + if(gfx_init_VICII_bitmap::$2) goto gfx_init_VICII_bitmap::@2 + to:gfx_init_VICII_bitmap::@return +gfx_init_VICII_bitmap::@2: scope:[gfx_init_VICII_bitmap] from gfx_init_VICII_bitmap::@1 + gfx_init_VICII_bitmap::l#3 = phi( gfx_init_VICII_bitmap::@1/gfx_init_VICII_bitmap::l#2 ) + gfx_init_VICII_bitmap::$3 = gfx_init_VICII_bitmap::l#3 + 1 + gfx_init_VICII_bitmap::$4 = gfx_init_VICII_bitmap::l#3 + 1 + bitmap_line::x0#0 = gfx_init_VICII_bitmap::lines_x[gfx_init_VICII_bitmap::l#3] + bitmap_line::x1#0 = gfx_init_VICII_bitmap::lines_x[gfx_init_VICII_bitmap::$3] + bitmap_line::y0#0 = gfx_init_VICII_bitmap::lines_y[gfx_init_VICII_bitmap::l#3] + bitmap_line::y1#0 = gfx_init_VICII_bitmap::lines_y[gfx_init_VICII_bitmap::$4] call bitmap_line - to:gfx_init_vic_bitmap::@5 -gfx_init_vic_bitmap::@5: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap::@2 - gfx_init_vic_bitmap::l#4 = phi( gfx_init_vic_bitmap::@2/gfx_init_vic_bitmap::l#3 ) - gfx_init_vic_bitmap::l#1 = ++ gfx_init_vic_bitmap::l#4 - to:gfx_init_vic_bitmap::@1 -gfx_init_vic_bitmap::@return: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap::@1 + to:gfx_init_VICII_bitmap::@5 +gfx_init_VICII_bitmap::@5: scope:[gfx_init_VICII_bitmap] from gfx_init_VICII_bitmap::@2 + gfx_init_VICII_bitmap::l#4 = phi( gfx_init_VICII_bitmap::@2/gfx_init_VICII_bitmap::l#3 ) + gfx_init_VICII_bitmap::l#1 = ++ gfx_init_VICII_bitmap::l#4 + to:gfx_init_VICII_bitmap::@1 +gfx_init_VICII_bitmap::@return: scope:[gfx_init_VICII_bitmap] from gfx_init_VICII_bitmap::@1 return to:@return @@ -2793,8 +2793,8 @@ form_mode::@16: scope:[form_mode] from form_mode::@15 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)FORM_CHARSET/$4000 *DTV_CONTROL = 0 - *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VIC_DEN|VIC_RSEL|3 - *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VIC_CSEL + *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VICII_DEN|VICII_RSEL|3 + *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VICII_CSEL *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = (byte)(word)FORM_SCREEN&$3fff/$40|(word)FORM_CHARSET&$3fff/$400 *DTV_PLANEA_START_LO = FORM_SCREEN @@ -3401,22 +3401,22 @@ const byte RADIX::DECIMAL = $a const byte RADIX::HEXADECIMAL = $10 const byte RADIX::OCTAL = 8 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*)$d000 -const nomodify byte* VIC_BITMAP = (byte*)$6000 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CHARSET_ROM = (byte*)$5800 -const nomodify byte* VIC_CONTROL = (byte*)$d011 -const nomodify byte* VIC_CONTROL2 = (byte*)$d016 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*)$d018 -const nomodify byte VIC_RSEL = 8 -const nomodify byte* VIC_SCREEN0 = (byte*)$4000 -const nomodify byte* VIC_SCREEN1 = (byte*)$4400 -const nomodify byte* VIC_SCREEN2 = (byte*)$4800 -const nomodify byte* VIC_SCREEN3 = (byte*)$4c00 -const nomodify byte* VIC_SCREEN4 = (byte*)$5000 +const nomodify byte* VICII_BITMAP = (byte*)$6000 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CHARSET_ROM = (byte*)$5800 +const nomodify byte* VICII_CONTROL = (byte*)$d011 +const nomodify byte* VICII_CONTROL2 = (byte*)$d016 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*)$d018 +const nomodify byte VICII_RSEL = 8 +const nomodify byte* VICII_SCREEN0 = (byte*)$4000 +const nomodify byte* VICII_SCREEN1 = (byte*)$4400 +const nomodify byte* VICII_SCREEN2 = (byte*)$4800 +const nomodify byte* VICII_SCREEN3 = (byte*)$4c00 +const nomodify byte* VICII_SCREEN4 = (byte*)$5000 void __start() void apply_preset(byte apply_preset::idx) bool~ apply_preset::$0 @@ -3911,6 +3911,17 @@ byte dtvSetCpuBankSegment1::cpuBankIdx#6 byte dtvSetCpuBankSegment1::cpuBankIdx#7 byte dtvSetCpuBankSegment1::cpuBankIdx#8 byte dtvSetCpuBankSegment1::cpuBankIdx#9 +const nomodify byte* form_VICII_bg0_hi = form_fields_val+$1c +const nomodify byte* form_VICII_bg0_lo = form_fields_val+$1d +const nomodify byte* form_VICII_bg1_hi = form_fields_val+$1e +const nomodify byte* form_VICII_bg1_lo = form_fields_val+$1f +const nomodify byte* form_VICII_bg2_hi = form_fields_val+$20 +const nomodify byte* form_VICII_bg2_lo = form_fields_val+$21 +const nomodify byte* form_VICII_bg3_hi = form_fields_val+$22 +const nomodify byte* form_VICII_bg3_lo = form_fields_val+$23 +const nomodify byte* form_VICII_cols = form_fields_val+$1a +const nomodify byte* form_VICII_gfx = form_fields_val+$19 +const nomodify byte* form_VICII_screen = form_fields_val+$18 const nomodify byte* form_a_mod_hi = form_fields_val+$f const nomodify byte* form_a_mod_lo = form_fields_val+$10 const nomodify byte* form_a_pattern = form_fields_val+$a @@ -4206,17 +4217,50 @@ byte form_set_screen::y byte form_set_screen::y#0 byte form_set_screen::y#1 byte form_set_screen::y#2 -const nomodify byte* form_vic_bg0_hi = form_fields_val+$1c -const nomodify byte* form_vic_bg0_lo = form_fields_val+$1d -const nomodify byte* form_vic_bg1_hi = form_fields_val+$1e -const nomodify byte* form_vic_bg1_lo = form_fields_val+$1f -const nomodify byte* form_vic_bg2_hi = form_fields_val+$20 -const nomodify byte* form_vic_bg2_lo = form_fields_val+$21 -const nomodify byte* form_vic_bg3_hi = form_fields_val+$22 -const nomodify byte* form_vic_bg3_lo = form_fields_val+$23 -const nomodify byte* form_vic_cols = form_fields_val+$1a -const nomodify byte* form_vic_gfx = form_fields_val+$19 -const nomodify byte* form_vic_screen = form_fields_val+$18 +byte* get_VICII_charset(byte get_VICII_charset::idx) +bool~ get_VICII_charset::$0 +bool~ get_VICII_charset::$1 +bool~ get_VICII_charset::$2 +byte get_VICII_charset::idx +byte get_VICII_charset::idx#0 +byte get_VICII_charset::idx#1 +byte get_VICII_charset::idx#2 +byte* get_VICII_charset::return +byte* get_VICII_charset::return#0 +byte* get_VICII_charset::return#1 +byte* get_VICII_charset::return#2 +byte* get_VICII_charset::return#3 +byte* get_VICII_charset::return#4 +byte* get_VICII_charset::return#5 +byte* get_VICII_charset::return#6 +byte* get_VICII_screen(byte get_VICII_screen::idx) +bool~ get_VICII_screen::$0 +bool~ get_VICII_screen::$1 +bool~ get_VICII_screen::$2 +bool~ get_VICII_screen::$3 +bool~ get_VICII_screen::$4 +bool~ get_VICII_screen::$5 +byte get_VICII_screen::idx +byte get_VICII_screen::idx#0 +byte get_VICII_screen::idx#1 +byte get_VICII_screen::idx#2 +byte get_VICII_screen::idx#3 +byte get_VICII_screen::idx#4 +byte get_VICII_screen::idx#5 +byte get_VICII_screen::idx#6 +byte* get_VICII_screen::return +byte* get_VICII_screen::return#0 +byte* get_VICII_screen::return#1 +byte* get_VICII_screen::return#10 +byte* get_VICII_screen::return#11 +byte* get_VICII_screen::return#2 +byte* get_VICII_screen::return#3 +byte* get_VICII_screen::return#4 +byte* get_VICII_screen::return#5 +byte* get_VICII_screen::return#6 +byte* get_VICII_screen::return#7 +byte* get_VICII_screen::return#8 +byte* get_VICII_screen::return#9 dword get_plane(byte get_plane::idx) bool~ get_plane::$0 bool~ get_plane::$1 @@ -4272,51 +4316,20 @@ dword get_plane::return#6 dword get_plane::return#7 dword get_plane::return#8 dword get_plane::return#9 -byte* get_vic_charset(byte get_vic_charset::idx) -bool~ get_vic_charset::$0 -bool~ get_vic_charset::$1 -bool~ get_vic_charset::$2 -byte get_vic_charset::idx -byte get_vic_charset::idx#0 -byte get_vic_charset::idx#1 -byte get_vic_charset::idx#2 -byte* get_vic_charset::return -byte* get_vic_charset::return#0 -byte* get_vic_charset::return#1 -byte* get_vic_charset::return#2 -byte* get_vic_charset::return#3 -byte* get_vic_charset::return#4 -byte* get_vic_charset::return#5 -byte* get_vic_charset::return#6 -byte* get_vic_screen(byte get_vic_screen::idx) -bool~ get_vic_screen::$0 -bool~ get_vic_screen::$1 -bool~ get_vic_screen::$2 -bool~ get_vic_screen::$3 -bool~ get_vic_screen::$4 -bool~ get_vic_screen::$5 -byte get_vic_screen::idx -byte get_vic_screen::idx#0 -byte get_vic_screen::idx#1 -byte get_vic_screen::idx#2 -byte get_vic_screen::idx#3 -byte get_vic_screen::idx#4 -byte get_vic_screen::idx#5 -byte get_vic_screen::idx#6 -byte* get_vic_screen::return -byte* get_vic_screen::return#0 -byte* get_vic_screen::return#1 -byte* get_vic_screen::return#10 -byte* get_vic_screen::return#11 -byte* get_vic_screen::return#2 -byte* get_vic_screen::return#3 -byte* get_vic_screen::return#4 -byte* get_vic_screen::return#5 -byte* get_vic_screen::return#6 -byte* get_vic_screen::return#7 -byte* get_vic_screen::return#8 -byte* get_vic_screen::return#9 void gfx_init() +void gfx_init_VICII_bitmap() +bool~ gfx_init_VICII_bitmap::$2 +number~ gfx_init_VICII_bitmap::$3 +number~ gfx_init_VICII_bitmap::$4 +byte gfx_init_VICII_bitmap::l +byte gfx_init_VICII_bitmap::l#0 +byte gfx_init_VICII_bitmap::l#1 +byte gfx_init_VICII_bitmap::l#2 +byte gfx_init_VICII_bitmap::l#3 +byte gfx_init_VICII_bitmap::l#4 +const byte gfx_init_VICII_bitmap::lines_cnt = 9 +const byte* gfx_init_VICII_bitmap::lines_x[] = { 0, $ff, $ff, 0, 0, $80, $ff, $80, 0, $80 } +const byte* gfx_init_VICII_bitmap::lines_y[] = { 0, 0, $c7, $c7, 0, 0, $64, $c7, $64, 0 } void gfx_init_charset() bool~ gfx_init_charset::$0 bool~ gfx_init_charset::$1 @@ -4708,19 +4721,6 @@ byte gfx_init_screen4::cy#1 byte gfx_init_screen4::cy#2 byte gfx_init_screen4::cy#3 byte gfx_init_screen4::cy#4 -void gfx_init_vic_bitmap() -bool~ gfx_init_vic_bitmap::$2 -number~ gfx_init_vic_bitmap::$3 -number~ gfx_init_vic_bitmap::$4 -byte gfx_init_vic_bitmap::l -byte gfx_init_vic_bitmap::l#0 -byte gfx_init_vic_bitmap::l#1 -byte gfx_init_vic_bitmap::l#2 -byte gfx_init_vic_bitmap::l#3 -byte gfx_init_vic_bitmap::l#4 -const byte gfx_init_vic_bitmap::lines_cnt = 9 -const byte* gfx_init_vic_bitmap::lines_x[] = { 0, $ff, $ff, 0, 0, $80, $ff, $80, 0, $80 } -const byte* gfx_init_vic_bitmap::lines_y[] = { 0, 0, $c7, $c7, 0, 0, $64, $c7, $64, 0 } void gfx_mode() bool~ gfx_mode::$0 bool~ gfx_mode::$1 @@ -4806,6 +4806,25 @@ word~ gfx_mode::$82 word~ gfx_mode::$83 byte~ gfx_mode::$84 bool~ gfx_mode::$9 +byte* gfx_mode::VICII_colors +byte* gfx_mode::VICII_colors#0 +byte* gfx_mode::VICII_colors#1 +byte* gfx_mode::VICII_colors#2 +byte* gfx_mode::VICII_colors#3 +byte* gfx_mode::VICII_colors#4 +byte gfx_mode::VICII_control +byte gfx_mode::VICII_control#0 +byte gfx_mode::VICII_control#1 +byte gfx_mode::VICII_control#2 +byte gfx_mode::VICII_control#3 +byte gfx_mode::VICII_control#4 +byte gfx_mode::VICII_control#5 +byte gfx_mode::VICII_control#6 +byte gfx_mode::VICII_control2 +byte gfx_mode::VICII_control2#0 +byte gfx_mode::VICII_control2#1 +byte gfx_mode::VICII_control2#2 +byte gfx_mode::VICII_control2#3 byte* gfx_mode::col byte* gfx_mode::col#0 byte* gfx_mode::col#1 @@ -4862,25 +4881,6 @@ dword gfx_mode::plane_b#0 byte gfx_mode::plane_b_offs byte gfx_mode::plane_b_offs#0 byte gfx_mode::plane_b_offs#1 -byte* gfx_mode::vic_colors -byte* gfx_mode::vic_colors#0 -byte* gfx_mode::vic_colors#1 -byte* gfx_mode::vic_colors#2 -byte* gfx_mode::vic_colors#3 -byte* gfx_mode::vic_colors#4 -byte gfx_mode::vic_control -byte gfx_mode::vic_control#0 -byte gfx_mode::vic_control#1 -byte gfx_mode::vic_control#2 -byte gfx_mode::vic_control#3 -byte gfx_mode::vic_control#4 -byte gfx_mode::vic_control#5 -byte gfx_mode::vic_control#6 -byte gfx_mode::vic_control2 -byte gfx_mode::vic_control2#0 -byte gfx_mode::vic_control2#1 -byte gfx_mode::vic_control2#2 -byte gfx_mode::vic_control2#3 byte keyboard_event_get() bool~ keyboard_event_get::$0 byte keyboard_event_get::return @@ -5742,13 +5742,13 @@ Adding number conversion cast (unumber) $a in get_plane::$10 = get_plane::idx#12 Adding number conversion cast (unumber) $b in get_plane::$11 = get_plane::idx#13 == $b Adding number conversion cast (unumber) $c in get_plane::$12 = get_plane::idx#14 == $c Adding number conversion cast (unumber) $d in get_plane::$13 = get_plane::idx#15 == $d -Adding number conversion cast (unumber) 0 in get_vic_screen::$0 = get_vic_screen::idx#2 == 0 -Adding number conversion cast (unumber) 1 in get_vic_screen::$1 = get_vic_screen::idx#3 == 1 -Adding number conversion cast (unumber) 2 in get_vic_screen::$2 = get_vic_screen::idx#4 == 2 -Adding number conversion cast (unumber) 3 in get_vic_screen::$3 = get_vic_screen::idx#5 == 3 -Adding number conversion cast (unumber) 4 in get_vic_screen::$4 = get_vic_screen::idx#6 == 4 -Adding number conversion cast (unumber) 0 in get_vic_charset::$0 = get_vic_charset::idx#1 == 0 -Adding number conversion cast (unumber) 1 in get_vic_charset::$1 = get_vic_charset::idx#2 == 1 +Adding number conversion cast (unumber) 0 in get_VICII_screen::$0 = get_VICII_screen::idx#2 == 0 +Adding number conversion cast (unumber) 1 in get_VICII_screen::$1 = get_VICII_screen::idx#3 == 1 +Adding number conversion cast (unumber) 2 in get_VICII_screen::$2 = get_VICII_screen::idx#4 == 2 +Adding number conversion cast (unumber) 3 in get_VICII_screen::$3 = get_VICII_screen::idx#5 == 3 +Adding number conversion cast (unumber) 4 in get_VICII_screen::$4 = get_VICII_screen::idx#6 == 4 +Adding number conversion cast (unumber) 0 in get_VICII_charset::$0 = get_VICII_charset::idx#1 == 0 +Adding number conversion cast (unumber) 1 in get_VICII_charset::$1 = get_VICII_charset::idx#2 == 1 Adding number conversion cast (unumber) 0 in apply_preset::$0 = apply_preset::idx#1 == 0 Adding number conversion cast (unumber) 1 in apply_preset::$1 = apply_preset::idx#2 == 1 Adding number conversion cast (unumber) 2 in apply_preset::$2 = apply_preset::idx#3 == 2 @@ -5779,7 +5779,7 @@ Adding number conversion cast (unumber) 0 in gfx_mode::$4 = *form_ctrl_hicol != Adding number conversion cast (unumber) 0 in gfx_mode::$6 = *form_ctrl_overs != 0 Adding number conversion cast (unumber) 0 in gfx_mode::$8 = *form_ctrl_colof != 0 Adding number conversion cast (unumber) 0 in gfx_mode::$10 = *form_ctrl_chunk != 0 -Adding number conversion cast (unumber) 3 in gfx_mode::vic_control#0 = (byte)VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) 3 in gfx_mode::VICII_control#0 = (byte)VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in gfx_mode::$12 = *form_ctrl_ecm != 0 Adding number conversion cast (unumber) 0 in gfx_mode::$14 = *form_ctrl_bmm != 0 Adding number conversion cast (unumber) 0 in gfx_mode::$16 = *form_ctrl_mcm != 0 @@ -5804,9 +5804,9 @@ Adding number conversion cast (unumber) gfx_mode::$44 in gfx_mode::$44 = *form_b Adding number conversion cast (unumber) gfx_mode::$45 in gfx_mode::$45 = gfx_mode::$44 | *form_b_mod_lo Adding number conversion cast (unumber) 0 in *DTV_PLANEB_MODULO_HI = 0 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 -Adding number conversion cast (unumber) 3^(byte)(word)VIC_SCREEN0/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)VIC_SCREEN0/$4000 -Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)VIC_SCREEN0/$4000 -Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)VIC_SCREEN0/$4000 +Adding number conversion cast (unumber) 3^(byte)(word)VICII_SCREEN0/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)VICII_SCREEN0/$4000 +Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)VICII_SCREEN0/$4000 +Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)VICII_SCREEN0/$4000 Adding number conversion cast (unumber) $3fff in gfx_mode::$47 = gfx_mode::$82 & $3fff Adding number conversion cast (unumber) gfx_mode::$47 in gfx_mode::$47 = gfx_mode::$82 & (unumber)$3fff Adding number conversion cast (unumber) $40 in gfx_mode::$48 = gfx_mode::$47 / $40 @@ -5818,18 +5818,18 @@ Adding number conversion cast (unumber) 4 in gfx_mode::$52 = gfx_mode::$51 / 4 Adding number conversion cast (unumber) gfx_mode::$52 in gfx_mode::$52 = gfx_mode::$51 / (unumber)4 Adding number conversion cast (unumber) gfx_mode::$53 in gfx_mode::$53 = gfx_mode::$84 | gfx_mode::$52 Adding number conversion cast (unumber) 0 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 -Adding number conversion cast (unumber) $10 in gfx_mode::$55 = *form_vic_bg0_hi * $10 -Adding number conversion cast (unumber) gfx_mode::$55 in gfx_mode::$55 = *form_vic_bg0_hi * (unumber)$10 -Adding number conversion cast (unumber) gfx_mode::$56 in gfx_mode::$56 = gfx_mode::$55 | *form_vic_bg0_lo -Adding number conversion cast (unumber) $10 in gfx_mode::$57 = *form_vic_bg1_hi * $10 -Adding number conversion cast (unumber) gfx_mode::$57 in gfx_mode::$57 = *form_vic_bg1_hi * (unumber)$10 -Adding number conversion cast (unumber) gfx_mode::$58 in gfx_mode::$58 = gfx_mode::$57 | *form_vic_bg1_lo -Adding number conversion cast (unumber) $10 in gfx_mode::$59 = *form_vic_bg2_hi * $10 -Adding number conversion cast (unumber) gfx_mode::$59 in gfx_mode::$59 = *form_vic_bg2_hi * (unumber)$10 -Adding number conversion cast (unumber) gfx_mode::$60 in gfx_mode::$60 = gfx_mode::$59 | *form_vic_bg2_lo -Adding number conversion cast (unumber) $10 in gfx_mode::$61 = *form_vic_bg3_hi * $10 -Adding number conversion cast (unumber) gfx_mode::$61 in gfx_mode::$61 = *form_vic_bg3_hi * (unumber)$10 -Adding number conversion cast (unumber) gfx_mode::$62 in gfx_mode::$62 = gfx_mode::$61 | *form_vic_bg3_lo +Adding number conversion cast (unumber) $10 in gfx_mode::$55 = *form_VICII_bg0_hi * $10 +Adding number conversion cast (unumber) gfx_mode::$55 in gfx_mode::$55 = *form_VICII_bg0_hi * (unumber)$10 +Adding number conversion cast (unumber) gfx_mode::$56 in gfx_mode::$56 = gfx_mode::$55 | *form_VICII_bg0_lo +Adding number conversion cast (unumber) $10 in gfx_mode::$57 = *form_VICII_bg1_hi * $10 +Adding number conversion cast (unumber) gfx_mode::$57 in gfx_mode::$57 = *form_VICII_bg1_hi * (unumber)$10 +Adding number conversion cast (unumber) gfx_mode::$58 in gfx_mode::$58 = gfx_mode::$57 | *form_VICII_bg1_lo +Adding number conversion cast (unumber) $10 in gfx_mode::$59 = *form_VICII_bg2_hi * $10 +Adding number conversion cast (unumber) gfx_mode::$59 in gfx_mode::$59 = *form_VICII_bg2_hi * (unumber)$10 +Adding number conversion cast (unumber) gfx_mode::$60 in gfx_mode::$60 = gfx_mode::$59 | *form_VICII_bg2_lo +Adding number conversion cast (unumber) $10 in gfx_mode::$61 = *form_VICII_bg3_hi * $10 +Adding number conversion cast (unumber) gfx_mode::$61 in gfx_mode::$61 = *form_VICII_bg3_hi * (unumber)$10 +Adding number conversion cast (unumber) gfx_mode::$62 in gfx_mode::$62 = gfx_mode::$61 | *form_VICII_bg3_lo Adding number conversion cast (unumber) 0 in gfx_mode::$63 = *form_dtv_palet == 0 Adding number conversion cast (unumber) $ff in gfx_mode::$77 = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) != $ff Adding number conversion cast (unumber) $32 in *PROCPORT = $32 @@ -5858,10 +5858,10 @@ Adding number conversion cast (unumber) 3 in gfx_init_screen3::$2 = gfx_init_scr Adding number conversion cast (unumber) gfx_init_screen3::$2 in gfx_init_screen3::$2 = gfx_init_screen3::cy#2 & (unumber)3 Adding number conversion cast (unumber) gfx_init_screen3::$3 in gfx_init_screen3::$3 = gfx_init_screen3::$1 | gfx_init_screen3::$2 Adding number conversion cast (unumber) 0 in *gfx_init_screen4::ch#2 = 0 -Adding number conversion cast (unumber) 1 in gfx_init_vic_bitmap::$3 = gfx_init_vic_bitmap::l#3 + 1 -Adding number conversion cast (unumber) gfx_init_vic_bitmap::$3 in gfx_init_vic_bitmap::$3 = gfx_init_vic_bitmap::l#3 + (unumber)1 -Adding number conversion cast (unumber) 1 in gfx_init_vic_bitmap::$4 = gfx_init_vic_bitmap::l#3 + 1 -Adding number conversion cast (unumber) gfx_init_vic_bitmap::$4 in gfx_init_vic_bitmap::$4 = gfx_init_vic_bitmap::l#3 + (unumber)1 +Adding number conversion cast (unumber) 1 in gfx_init_VICII_bitmap::$3 = gfx_init_VICII_bitmap::l#3 + 1 +Adding number conversion cast (unumber) gfx_init_VICII_bitmap::$3 in gfx_init_VICII_bitmap::$3 = gfx_init_VICII_bitmap::l#3 + (unumber)1 +Adding number conversion cast (unumber) 1 in gfx_init_VICII_bitmap::$4 = gfx_init_VICII_bitmap::l#3 + 1 +Adding number conversion cast (unumber) gfx_init_VICII_bitmap::$4 in gfx_init_VICII_bitmap::$4 = gfx_init_VICII_bitmap::l#3 + (unumber)1 Adding number conversion cast (unumber) $4000 in gfx_init_plane_8bppchunky::gfxbCpuBank#0 = (byte)PLANE_8BPP_CHUNKY/$4000 Adding number conversion cast (unumber) $8000 in gfx_init_plane_8bppchunky::$2 = gfx_init_plane_8bppchunky::gfxb#3 == $8000 Adding number conversion cast (unumber) $4000 in gfx_init_plane_horisontal::gfxbCpuBank#0 = (byte)PLANE_HORISONTAL/$4000 @@ -5906,8 +5906,8 @@ Adding number conversion cast (unumber) 3^(byte)(word)FORM_CHARSET/$4000 in *((b Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)FORM_CHARSET/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)FORM_CHARSET/$4000 Adding number conversion cast (unumber) 0 in *DTV_CONTROL = 0 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|3 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = ((unumber)) VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|3 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = ((unumber)) VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) $3fff in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = (byte)(word)FORM_SCREEN&$3fff/$40|(word)FORM_CHARSET&$3fff/$400 Adding number conversion cast (unumber) $3fff in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = (byte)(word)FORM_SCREEN&(unumber)$3fff/$40|(word)FORM_CHARSET&$3fff/$400 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_START_HI = 0 @@ -5960,7 +5960,7 @@ Inlining cast bitmap_plot::plotter#0 = (byte*)bitmap_plot::$0 Inlining cast *DTV_PLANEA_MODULO_HI = (unumber)0 Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 -Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)VIC_SCREEN0/(unumber)$4000 +Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)VICII_SCREEN0/(unumber)$4000 Inlining cast *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = (unumber)0 Inlining cast *PROCPORT = (unumber)$32 Inlining cast *PROCPORT = (unumber)$37 @@ -5976,7 +5976,7 @@ Inlining cast gfx_init_plane_fill::gfxb#0 = (byte*)gfx_init_plane_fill::$6 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)FORM_CHARSET/(unumber)$4000 Inlining cast *DTV_CONTROL = (unumber)0 -Inlining cast *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = (unumber)VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = (unumber)VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *DTV_PLANEA_START_HI = (unumber)0 Inlining cast *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = (unumber)0 Inlining cast *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = (unumber)0 @@ -6181,7 +6181,7 @@ Simplifying constant integer cast $10 Simplifying constant integer cast $10 Simplifying constant integer cast 0 Simplifying constant integer cast 3 -Simplifying constant integer cast (unumber)3^(byte)(word)VIC_SCREEN0/(unumber)$4000 +Simplifying constant integer cast (unumber)3^(byte)(word)VICII_SCREEN0/(unumber)$4000 Simplifying constant integer cast 3 Simplifying constant integer cast $4000 Simplifying constant integer cast $3fff @@ -6250,7 +6250,7 @@ Simplifying constant integer cast (unumber)3^(byte)(word)FORM_CHARSET/(unumber)$ Simplifying constant integer cast 3 Simplifying constant integer cast $4000 Simplifying constant integer cast 0 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -6550,14 +6550,14 @@ Inferred type updated to word in gfx_mode::$50 = gfx_mode::$83 & $3fff Inferred type updated to byte in gfx_mode::$51 = > gfx_mode::$50 Inferred type updated to byte in gfx_mode::$52 = gfx_mode::$51 / 4 Inferred type updated to byte in gfx_mode::$53 = gfx_mode::$84 | gfx_mode::$52 -Inferred type updated to byte in gfx_mode::$55 = *form_vic_bg0_hi * $10 -Inferred type updated to byte in gfx_mode::$56 = gfx_mode::$55 | *form_vic_bg0_lo -Inferred type updated to byte in gfx_mode::$57 = *form_vic_bg1_hi * $10 -Inferred type updated to byte in gfx_mode::$58 = gfx_mode::$57 | *form_vic_bg1_lo -Inferred type updated to byte in gfx_mode::$59 = *form_vic_bg2_hi * $10 -Inferred type updated to byte in gfx_mode::$60 = gfx_mode::$59 | *form_vic_bg2_lo -Inferred type updated to byte in gfx_mode::$61 = *form_vic_bg3_hi * $10 -Inferred type updated to byte in gfx_mode::$62 = gfx_mode::$61 | *form_vic_bg3_lo +Inferred type updated to byte in gfx_mode::$55 = *form_VICII_bg0_hi * $10 +Inferred type updated to byte in gfx_mode::$56 = gfx_mode::$55 | *form_VICII_bg0_lo +Inferred type updated to byte in gfx_mode::$57 = *form_VICII_bg1_hi * $10 +Inferred type updated to byte in gfx_mode::$58 = gfx_mode::$57 | *form_VICII_bg1_lo +Inferred type updated to byte in gfx_mode::$59 = *form_VICII_bg2_hi * $10 +Inferred type updated to byte in gfx_mode::$60 = gfx_mode::$59 | *form_VICII_bg2_lo +Inferred type updated to byte in gfx_mode::$61 = *form_VICII_bg3_hi * $10 +Inferred type updated to byte in gfx_mode::$62 = gfx_mode::$61 | *form_VICII_bg3_lo Inferred type updated to byte in gfx_init_screen0::$0 = gfx_init_screen0::cy#2 & $f Inferred type updated to byte in gfx_init_screen0::$1 = gfx_init_screen0::$0 * $10 Inferred type updated to byte in gfx_init_screen0::$2 = gfx_init_screen0::cx#2 & $f @@ -6571,8 +6571,8 @@ Inferred type updated to byte in gfx_init_screen3::$0 = gfx_init_screen3::cx#2 & Inferred type updated to byte in gfx_init_screen3::$1 = gfx_init_screen3::$0 * $10 Inferred type updated to byte in gfx_init_screen3::$2 = gfx_init_screen3::cy#2 & 3 Inferred type updated to byte in gfx_init_screen3::$3 = gfx_init_screen3::$1 | gfx_init_screen3::$2 -Inferred type updated to byte in gfx_init_vic_bitmap::$3 = gfx_init_vic_bitmap::l#3 + 1 -Inferred type updated to byte in gfx_init_vic_bitmap::$4 = gfx_init_vic_bitmap::l#3 + 1 +Inferred type updated to byte in gfx_init_VICII_bitmap::$3 = gfx_init_VICII_bitmap::l#3 + 1 +Inferred type updated to byte in gfx_init_VICII_bitmap::$4 = gfx_init_VICII_bitmap::l#3 + 1 Inferred type updated to byte in gfx_init_plane_horisontal::$2 = gfx_init_plane_horisontal::ay#2 & 4 Inferred type updated to byte in gfx_init_plane_horisontal2::$2 = gfx_init_plane_horisontal2::ay#2 / 2 Inferred type updated to byte in gfx_init_plane_horisontal2::$3 = gfx_init_plane_horisontal2::$2 & 3 @@ -6605,8 +6605,8 @@ Inversing boolean not [430] bitmap_line_xdyd::$4 = bitmap_line_xdyd::xd#2 >= bit Inversing boolean not [453] bitmap_line_ydxi::$4 = bitmap_line_ydxi::yd#2 >= bitmap_line_ydxi::e#1 from [452] bitmap_line_ydxi::$3 = bitmap_line_ydxi::yd#2 < bitmap_line_ydxi::e#1 Inversing boolean not [477] bitmap_line_ydxd::$4 = bitmap_line_ydxd::yd#2 >= bitmap_line_ydxd::e#1 from [476] bitmap_line_ydxd::$3 = bitmap_line_ydxd::yd#2 < bitmap_line_ydxd::e#1 Inversing boolean not [576] get_plane::$14 = get_plane::idx#15 != $d from [575] get_plane::$13 = get_plane::idx#15 == $d -Inversing boolean not [601] get_vic_screen::$5 = get_vic_screen::idx#6 != 4 from [600] get_vic_screen::$4 = get_vic_screen::idx#6 == 4 -Inversing boolean not [614] get_vic_charset::$2 = get_vic_charset::idx#2 != 1 from [613] get_vic_charset::$1 = get_vic_charset::idx#2 == 1 +Inversing boolean not [601] get_VICII_screen::$5 = get_VICII_screen::idx#6 != 4 from [600] get_VICII_screen::$4 = get_VICII_screen::idx#6 == 4 +Inversing boolean not [614] get_VICII_charset::$2 = get_VICII_charset::idx#2 != 1 from [613] get_VICII_charset::$1 = get_VICII_charset::idx#2 == 1 Inversing boolean not [730] gfx_mode::$1 = *form_ctrl_line == 0 from [729] gfx_mode::$0 = *form_ctrl_line != 0 Inversing boolean not [734] gfx_mode::$3 = *form_ctrl_borof == 0 from [733] gfx_mode::$2 = *form_ctrl_borof != 0 Inversing boolean not [741] gfx_mode::$5 = *form_ctrl_hicol == 0 from [740] gfx_mode::$4 = *form_ctrl_hicol != 0 @@ -6782,10 +6782,10 @@ Alias keyboard_events_size#27 = keyboard_events_size#6 Alias keyboard_modifiers#24 = keyboard_modifiers#7 Alias get_plane::idx#10 = get_plane::idx#3 get_plane::idx#2 get_plane::idx#4 get_plane::idx#5 get_plane::idx#6 get_plane::idx#7 get_plane::idx#8 get_plane::idx#9 get_plane::idx#11 get_plane::idx#12 get_plane::idx#13 get_plane::idx#14 get_plane::idx#15 Alias get_plane::return#14 = get_plane::return#18 -Alias get_vic_screen::idx#2 = get_vic_screen::idx#3 get_vic_screen::idx#4 get_vic_screen::idx#5 get_vic_screen::idx#6 -Alias get_vic_screen::return#5 = get_vic_screen::return#9 -Alias get_vic_charset::idx#1 = get_vic_charset::idx#2 -Alias get_vic_charset::return#2 = get_vic_charset::return#5 +Alias get_VICII_screen::idx#2 = get_VICII_screen::idx#3 get_VICII_screen::idx#4 get_VICII_screen::idx#5 get_VICII_screen::idx#6 +Alias get_VICII_screen::return#5 = get_VICII_screen::return#9 +Alias get_VICII_charset::idx#1 = get_VICII_charset::idx#2 +Alias get_VICII_charset::return#2 = get_VICII_charset::return#5 Alias apply_preset::idx#1 = apply_preset::idx#2 apply_preset::idx#3 apply_preset::idx#4 apply_preset::idx#5 apply_preset::idx#6 apply_preset::idx#7 apply_preset::idx#8 apply_preset::idx#9 apply_preset::idx#10 apply_preset::idx#11 Alias apply_preset::preset#13 = apply_preset::preset#14 Alias apply_preset::i#2 = apply_preset::i#3 @@ -6814,14 +6814,14 @@ Alias gfx_mode::dtv_control#13 = gfx_mode::dtv_control#18 Alias keyboard_events_size#134 = keyboard_events_size#135 Alias keyboard_modifiers#115 = keyboard_modifiers#116 Alias gfx_mode::dtv_control#6 = gfx_mode::$69 -Alias gfx_mode::vic_control#0 = gfx_mode::vic_control#3 +Alias gfx_mode::VICII_control#0 = gfx_mode::VICII_control#3 Alias keyboard_events_size#132 = keyboard_events_size#133 Alias keyboard_modifiers#113 = keyboard_modifiers#114 -Alias gfx_mode::vic_control#1 = gfx_mode::$70 -Alias gfx_mode::vic_control#5 = gfx_mode::vic_control#6 +Alias gfx_mode::VICII_control#1 = gfx_mode::$70 +Alias gfx_mode::VICII_control#5 = gfx_mode::VICII_control#6 Alias keyboard_events_size#130 = keyboard_events_size#131 Alias keyboard_modifiers#111 = keyboard_modifiers#112 -Alias gfx_mode::vic_control#2 = gfx_mode::$71 +Alias gfx_mode::VICII_control#2 = gfx_mode::$71 Alias gfx_mode::plane_a_offs#0 = gfx_mode::$19 gfx_mode::plane_a_offs#1 Alias get_plane::return#16 = get_plane::return#19 Alias keyboard_events_size#116 = keyboard_events_size#124 keyboard_events_size#126 keyboard_events_size#122 keyboard_events_size#120 keyboard_events_size#118 @@ -6830,16 +6830,16 @@ Alias gfx_mode::plane_a#0 = gfx_mode::$21 Alias gfx_mode::plane_b_offs#0 = gfx_mode::$33 gfx_mode::plane_b_offs#1 Alias get_plane::return#17 = get_plane::return#20 Alias gfx_mode::plane_b#0 = gfx_mode::$35 -Alias get_vic_screen::return#10 = get_vic_screen::return#7 -Alias get_vic_charset::return#4 = get_vic_charset::return#6 -Alias get_vic_screen::return#11 = get_vic_screen::return#8 -Alias gfx_mode::vic_colors#0 = gfx_mode::$54 -Alias gfx_mode::vic_control2#0 = gfx_mode::vic_control2#3 +Alias get_VICII_screen::return#10 = get_VICII_screen::return#7 +Alias get_VICII_charset::return#4 = get_VICII_charset::return#6 +Alias get_VICII_screen::return#11 = get_VICII_screen::return#8 +Alias gfx_mode::VICII_colors#0 = gfx_mode::$54 +Alias gfx_mode::VICII_control2#0 = gfx_mode::VICII_control2#3 Alias keyboard_events_size#128 = keyboard_events_size#129 Alias keyboard_modifiers#109 = keyboard_modifiers#110 -Alias gfx_mode::vic_control2#1 = gfx_mode::$72 +Alias gfx_mode::VICII_control2#1 = gfx_mode::$72 Alias gfx_mode::cy#2 = gfx_mode::cy#3 -Alias gfx_mode::vic_colors#1 = gfx_mode::vic_colors#4 +Alias gfx_mode::VICII_colors#1 = gfx_mode::VICII_colors#4 Alias gfx_mode::col#1 = gfx_mode::col#4 Alias keyboard_events_size#102 = keyboard_events_size#109 keyboard_events_size#93 keyboard_events_size#83 keyboard_events_size#82 Alias keyboard_modifiers#78 = keyboard_modifiers#89 keyboard_modifiers#93 keyboard_modifiers#84 keyboard_modifiers#79 @@ -6867,7 +6867,7 @@ Alias gfx_init_screen3::cy#2 = gfx_init_screen3::cy#3 Alias gfx_init_screen3::ch#1 = gfx_init_screen3::ch#4 Alias gfx_init_screen4::cy#2 = gfx_init_screen4::cy#3 Alias gfx_init_screen4::ch#1 = gfx_init_screen4::ch#4 -Alias gfx_init_vic_bitmap::l#2 = gfx_init_vic_bitmap::l#3 gfx_init_vic_bitmap::l#4 +Alias gfx_init_VICII_bitmap::l#2 = gfx_init_VICII_bitmap::l#3 gfx_init_VICII_bitmap::l#4 Alias gfx_init_plane_8bppchunky::gfxbCpuBank#0 = gfx_init_plane_8bppchunky::gfxbCpuBank#3 Alias gfx_init_plane_8bppchunky::gfxbCpuBank#4 = gfx_init_plane_8bppchunky::gfxbCpuBank#6 gfx_init_plane_8bppchunky::gfxbCpuBank#5 Alias gfx_init_plane_8bppchunky::x#3 = gfx_init_plane_8bppchunky::x#5 gfx_init_plane_8bppchunky::x#4 @@ -7105,7 +7105,7 @@ Identical Phi Values keyboard_modifiers#23 keyboard_modifiers#12 Identical Phi Values form_field_idx#0 form_field_idx#15 Identical Phi Values keyboard_events_size#27 keyboard_events_size#10 Identical Phi Values keyboard_modifiers#24 keyboard_modifiers#10 -Identical Phi Values get_vic_charset::idx#1 get_vic_charset::idx#0 +Identical Phi Values get_VICII_charset::idx#1 get_VICII_charset::idx#0 Identical Phi Values apply_preset::idx#1 apply_preset::idx#0 Identical Phi Values apply_preset::preset#13 apply_preset::preset#15 Identical Phi Values keyboard_events_size#116 keyboard_events_size#26 @@ -7265,13 +7265,13 @@ Simple Condition get_plane::$10 [399] if(get_plane::idx#10==$a) goto get_plane:: Simple Condition get_plane::$11 [402] if(get_plane::idx#10==$b) goto get_plane::@12 Simple Condition get_plane::$12 [405] if(get_plane::idx#10==$c) goto get_plane::@13 Simple Condition get_plane::$14 [408] if(get_plane::idx#10!=$d) goto get_plane::@14 -Simple Condition get_vic_screen::$0 [415] if(get_vic_screen::idx#2==0) goto get_vic_screen::@1 -Simple Condition get_vic_screen::$1 [418] if(get_vic_screen::idx#2==1) goto get_vic_screen::@2 -Simple Condition get_vic_screen::$2 [421] if(get_vic_screen::idx#2==2) goto get_vic_screen::@3 -Simple Condition get_vic_screen::$3 [424] if(get_vic_screen::idx#2==3) goto get_vic_screen::@4 -Simple Condition get_vic_screen::$5 [427] if(get_vic_screen::idx#2!=4) goto get_vic_screen::@5 -Simple Condition get_vic_charset::$0 [434] if(get_vic_charset::idx#0==0) goto get_vic_charset::@1 -Simple Condition get_vic_charset::$2 [437] if(get_vic_charset::idx#0!=1) goto get_vic_charset::@2 +Simple Condition get_VICII_screen::$0 [415] if(get_VICII_screen::idx#2==0) goto get_VICII_screen::@1 +Simple Condition get_VICII_screen::$1 [418] if(get_VICII_screen::idx#2==1) goto get_VICII_screen::@2 +Simple Condition get_VICII_screen::$2 [421] if(get_VICII_screen::idx#2==2) goto get_VICII_screen::@3 +Simple Condition get_VICII_screen::$3 [424] if(get_VICII_screen::idx#2==3) goto get_VICII_screen::@4 +Simple Condition get_VICII_screen::$5 [427] if(get_VICII_screen::idx#2!=4) goto get_VICII_screen::@5 +Simple Condition get_VICII_charset::$0 [434] if(get_VICII_charset::idx#0==0) goto get_VICII_charset::@1 +Simple Condition get_VICII_charset::$2 [437] if(get_VICII_charset::idx#0!=1) goto get_VICII_charset::@2 Simple Condition apply_preset::$0 [445] if(apply_preset::idx#0==0) goto apply_preset::@1 Simple Condition apply_preset::$1 [448] if(apply_preset::idx#0==1) goto apply_preset::@2 Simple Condition apply_preset::$2 [451] if(apply_preset::idx#0==2) goto apply_preset::@3 @@ -7323,7 +7323,7 @@ Simple Condition gfx_init_screen3::$4 [796] if(gfx_init_screen3::cx#1!=rangelast Simple Condition gfx_init_screen3::$5 [799] if(gfx_init_screen3::cy#1!=rangelast(0,$18)) goto gfx_init_screen3::@1 Simple Condition gfx_init_screen4::$0 [810] if(gfx_init_screen4::cx#1!=rangelast(0,$27)) goto gfx_init_screen4::@2 Simple Condition gfx_init_screen4::$1 [813] if(gfx_init_screen4::cy#1!=rangelast(0,$18)) goto gfx_init_screen4::@1 -Simple Condition gfx_init_vic_bitmap::$2 [821] if(gfx_init_vic_bitmap::l#2 bitmap_init::bitmap#0 -Constant right-side identified [372] gfx_mode::vic_control#1 = gfx_mode::vic_control#0 | VIC_ECM -Constant right-side identified [449] gfx_mode::vic_control2#1 = gfx_mode::vic_control2#0 | VIC_MCM +Constant right-side identified [372] gfx_mode::VICII_control#1 = gfx_mode::VICII_control#0 | VICII_ECM +Constant right-side identified [449] gfx_mode::VICII_control2#1 = gfx_mode::VICII_control2#0 | VICII_MCM Constant right-side identified [592] gfx_init_plane_8bppchunky::gfxbCpuBank#1 = ++ gfx_init_plane_8bppchunky::gfxbCpuBank#0 Successful SSA optimization Pass2ConstantRValueConsolidation Constant keyboard_modifiers#1 = KEY_MODIFIER_LSHIFT Constant bitmap_init::$1 = >bitmap_init::bitmap#0 Constant gfx_mode::dtv_control#1 = DTV_LINEAR -Constant gfx_mode::vic_control#1 = gfx_mode::vic_control#0|VIC_ECM -Constant gfx_mode::vic_control2#1 = gfx_mode::vic_control2#0|VIC_MCM +Constant gfx_mode::VICII_control#1 = gfx_mode::VICII_control#0|VICII_ECM +Constant gfx_mode::VICII_control2#1 = gfx_mode::VICII_control2#0|VICII_MCM Constant gfx_init_plane_8bppchunky::gfxbCpuBank#1 = ++gfx_init_plane_8bppchunky::gfxbCpuBank#0 Successful SSA optimization Pass2ConstantIdentification Inlining Noop Cast [4] memset::$4 = (byte*)memset::str#0 keeping memset::str#0 @@ -7833,10 +7833,10 @@ Rewriting multiplication to use shift [414] gfx_mode::$42 = *form_b_step_hi * $1 Rewriting multiplication to use shift [417] gfx_mode::$44 = *form_b_mod_hi * $10 Rewriting division to use shift [429] gfx_mode::$48 = gfx_mode::$47 / $40 Rewriting division to use shift [437] gfx_mode::$52 = gfx_mode::$51 / 4 -Rewriting multiplication to use shift [455] gfx_mode::$55 = *form_vic_bg0_hi * $10 -Rewriting multiplication to use shift [458] gfx_mode::$57 = *form_vic_bg1_hi * $10 -Rewriting multiplication to use shift [461] gfx_mode::$59 = *form_vic_bg2_hi * $10 -Rewriting multiplication to use shift [464] gfx_mode::$61 = *form_vic_bg3_hi * $10 +Rewriting multiplication to use shift [455] gfx_mode::$55 = *form_VICII_bg0_hi * $10 +Rewriting multiplication to use shift [458] gfx_mode::$57 = *form_VICII_bg1_hi * $10 +Rewriting multiplication to use shift [461] gfx_mode::$59 = *form_VICII_bg2_hi * $10 +Rewriting multiplication to use shift [464] gfx_mode::$61 = *form_VICII_bg3_hi * $10 Rewriting multiplication to use shift [514] gfx_init_screen0::$1 = gfx_init_screen0::$0 * $10 Rewriting multiplication to use shift [540] gfx_init_screen2::$3 = gfx_init_screen2::col#0 * $10 Rewriting multiplication to use shift [552] gfx_init_screen3::$1 = gfx_init_screen3::$0 * $10 @@ -7890,15 +7890,15 @@ Inlining constant with var siblings get_plane::return#11 Inlining constant with var siblings get_plane::return#12 Inlining constant with var siblings get_plane::return#13 Inlining constant with var siblings get_plane::return#15 -Inlining constant with var siblings get_vic_screen::return#0 -Inlining constant with var siblings get_vic_screen::return#1 -Inlining constant with var siblings get_vic_screen::return#2 -Inlining constant with var siblings get_vic_screen::return#3 -Inlining constant with var siblings get_vic_screen::return#4 -Inlining constant with var siblings get_vic_screen::return#6 -Inlining constant with var siblings get_vic_charset::return#0 -Inlining constant with var siblings get_vic_charset::return#1 -Inlining constant with var siblings get_vic_charset::return#3 +Inlining constant with var siblings get_VICII_screen::return#0 +Inlining constant with var siblings get_VICII_screen::return#1 +Inlining constant with var siblings get_VICII_screen::return#2 +Inlining constant with var siblings get_VICII_screen::return#3 +Inlining constant with var siblings get_VICII_screen::return#4 +Inlining constant with var siblings get_VICII_screen::return#6 +Inlining constant with var siblings get_VICII_charset::return#0 +Inlining constant with var siblings get_VICII_charset::return#1 +Inlining constant with var siblings get_VICII_charset::return#3 Inlining constant with var siblings apply_preset::preset#1 Inlining constant with var siblings apply_preset::preset#2 Inlining constant with var siblings apply_preset::preset#3 @@ -7925,16 +7925,16 @@ Inlining constant with var siblings render_preset_name::name#10 Inlining constant with var siblings render_preset_name::name#11 Inlining constant with var siblings render_preset_name::name#12 Inlining constant with var siblings gfx_mode::dtv_control#0 -Inlining constant with var siblings gfx_mode::vic_control#0 -Inlining constant with var siblings gfx_mode::vic_control2#0 +Inlining constant with var siblings gfx_mode::VICII_control#0 +Inlining constant with var siblings gfx_mode::VICII_control2#0 Inlining constant with var siblings gfx_mode::col#0 Inlining constant with var siblings gfx_mode::cy#0 Inlining constant with var siblings gfx_mode::cx#0 Inlining constant with var siblings gfx_mode::i#0 Inlining constant with var siblings gfx_mode::j#0 Inlining constant with var siblings gfx_mode::dtv_control#1 -Inlining constant with var siblings gfx_mode::vic_control#1 -Inlining constant with var siblings gfx_mode::vic_control2#1 +Inlining constant with var siblings gfx_mode::VICII_control#1 +Inlining constant with var siblings gfx_mode::VICII_control2#1 Inlining constant with var siblings gfx_init_charset::chargen#0 Inlining constant with var siblings gfx_init_charset::charset#0 Inlining constant with var siblings gfx_init_charset::c#0 @@ -7954,7 +7954,7 @@ Inlining constant with var siblings gfx_init_screen3::cx#0 Inlining constant with var siblings gfx_init_screen4::ch#0 Inlining constant with var siblings gfx_init_screen4::cy#0 Inlining constant with var siblings gfx_init_screen4::cx#0 -Inlining constant with var siblings gfx_init_vic_bitmap::l#0 +Inlining constant with var siblings gfx_init_VICII_bitmap::l#0 Inlining constant with var siblings gfx_init_plane_8bppchunky::gfxbCpuBank#0 Inlining constant with var siblings gfx_init_plane_8bppchunky::gfxb#0 Inlining constant with var siblings gfx_init_plane_8bppchunky::y#0 @@ -8012,23 +8012,24 @@ Constant inlined gfx_init_screen3::cx#0 = 0 Constant inlined apply_preset::i#0 = 0 Constant inlined gfx_init_plane_horisontal::ax#0 = 0 Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#9 = gfx_init_plane_charset8::gfxbCpuBank#0 -Constant inlined gfx_init_charset::charset#0 = VIC_CHARSET_ROM +Constant inlined get_VICII_charset::return#1 = VICII_BITMAP +Constant inlined gfx_init_charset::charset#0 = VICII_CHARSET_ROM Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#8 = (byte)$4000/$4000 Constant inlined gfx_init_plane_charset8::ch#0 = 0 +Constant inlined get_VICII_charset::return#0 = VICII_CHARSET_ROM Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#5 = gfx_init_plane_horisontal2::gfxbCpuBank#0 Constant inlined gfx_mode::dtv_control#0 = 0 -Constant inlined gfx_mode::vic_control#1 = VIC_DEN|VIC_RSEL|3|VIC_ECM Constant inlined gfx_mode::dtv_control#1 = DTV_LINEAR Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#4 = (byte)$4000/$4000 -Constant inlined gfx_mode::vic_control#0 = VIC_DEN|VIC_RSEL|3 Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#7 = gfx_init_plane_vertical::gfxbCpuBank#0 +Constant inlined get_VICII_charset::return#3 = VICII_CHARSET_ROM Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#6 = (byte)$4000/$4000 Constant inlined gfx_init_charset::chargen#0 = CHARGEN Constant inlined bitmap_init::yoffs#0 = (byte*) 0 Constant inlined gfx_init_plane_horisontal2::ax#0 = 0 Constant inlined gfx_mode::cy#0 = 0 Constant inlined gfx_init_plane_fill::bx#0 = 0 -Constant inlined gfx_init_screen1::ch#0 = VIC_SCREEN1 +Constant inlined gfx_init_screen1::ch#0 = VICII_SCREEN1 Constant inlined gfx_init_charset::c#0 = 0 Constant inlined print_str_lines::str#2 = FORM_TEXT Constant inlined print_str_lines::str#1 = FORM_COLS @@ -8042,28 +8043,30 @@ Constant inlined apply_preset::preset#7 = preset_twoplane Constant inlined apply_preset::preset#6 = preset_hi_ecmchar Constant inlined apply_preset::preset#9 = preset_sixsfred Constant inlined apply_preset::preset#8 = preset_chunky +Constant inlined gfx_mode::VICII_control2#1 = VICII_CSEL|VICII_MCM Constant inlined gfx_init_plane_horisontal::ay#0 = 0 +Constant inlined gfx_mode::VICII_control2#0 = VICII_CSEL Constant inlined keyboard_events_size#16 = 0 Constant inlined gfx_init_plane_horisontal2::ay#0 = 0 Constant inlined gfx_init_plane_vertical::gfxb#0 = (byte*)$4000+PLANE_VERTICAL&$3fff -Constant inlined get_vic_screen::return#4 = VIC_SCREEN4 +Constant inlined get_VICII_screen::return#2 = VICII_SCREEN2 Constant inlined apply_preset::preset#11 = preset_8bpppixelcell Constant inlined gfx_init_screen0::cx#0 = 0 Constant inlined form_render_values::idx#0 = 0 -Constant inlined get_vic_screen::return#3 = VIC_SCREEN3 +Constant inlined get_VICII_screen::return#1 = VICII_SCREEN1 Constant inlined apply_preset::preset#12 = preset_stdchar -Constant inlined get_vic_screen::return#6 = VIC_SCREEN0 +Constant inlined get_VICII_screen::return#0 = VICII_SCREEN0 Constant inlined gfx_mode::cx#0 = 0 -Constant inlined get_vic_screen::return#0 = VIC_SCREEN0 -Constant inlined get_vic_screen::return#2 = VIC_SCREEN2 -Constant inlined get_vic_screen::return#1 = VIC_SCREEN1 +Constant inlined get_VICII_screen::return#6 = VICII_SCREEN0 +Constant inlined get_VICII_screen::return#4 = VICII_SCREEN4 +Constant inlined get_VICII_screen::return#3 = VICII_SCREEN3 Constant inlined apply_preset::preset#10 = preset_sixsfred2 Constant inlined bitmap_clear::y#0 = 0 Constant inlined keyboard_event_pressed::keycode#3 = KEY_COMMODORE Constant inlined keyboard_event_pressed::keycode#2 = KEY_CTRL Constant inlined keyboard_event_pressed::keycode#1 = KEY_RSHIFT Constant inlined keyboard_event_pressed::keycode#0 = KEY_LSHIFT -Constant inlined gfx_init_screen0::ch#0 = VIC_SCREEN0 +Constant inlined gfx_init_screen0::ch#0 = VICII_SCREEN0 Constant inlined apply_preset::preset#1 = preset_stdchar Constant inlined gfx_mode::col#0 = COLS Constant inlined apply_preset::preset#3 = preset_stdbm @@ -8071,7 +8074,7 @@ Constant inlined apply_preset::preset#2 = preset_ecmchar Constant inlined bitmap_init::y#0 = 0 Constant inlined gfx_init_plane_charset8::col#0 = 0 Constant inlined form_cursor_count#5 = FORM_CURSOR_BLINK -Constant inlined get_plane::return#15 = (dword)VIC_SCREEN0 +Constant inlined get_plane::return#15 = (dword)VICII_SCREEN0 Constant inlined gfx_init_screen1::cy#0 = 0 Constant inlined gfx_init_plane_vertical::bx#0 = 0 Constant inlined form_cursor_count#6 = FORM_CURSOR_BLINK/2 @@ -8079,23 +8082,23 @@ Constant inlined get_plane::return#13 = PLANE_FULL Constant inlined get_plane::return#12 = PLANE_BLANK Constant inlined get_plane::return#11 = PLANE_CHARSET8 Constant inlined get_plane::return#10 = PLANE_VERTICAL2 -Constant inlined get_plane::return#2 = (dword)VIC_SCREEN2 -Constant inlined get_plane::return#3 = (dword)VIC_SCREEN3 +Constant inlined get_plane::return#2 = (dword)VICII_SCREEN2 +Constant inlined get_plane::return#3 = (dword)VICII_SCREEN3 Constant inlined form_control::return#5 = $ff -Constant inlined get_plane::return#0 = (dword)VIC_SCREEN0 +Constant inlined get_plane::return#0 = (dword)VICII_SCREEN0 Constant inlined print_str_at::at#1 = FORM_SCREEN+(byte)$28*2+$a -Constant inlined get_plane::return#1 = (dword)VIC_SCREEN1 +Constant inlined get_plane::return#1 = (dword)VICII_SCREEN1 Constant inlined gfx_init_plane_horisontal2::gfxa#0 = (byte*)$4000 Constant inlined get_plane::return#6 = PLANE_8BPP_CHUNKY Constant inlined keyboard_modifiers#0 = 0 Constant inlined get_plane::return#7 = PLANE_HORISONTAL Constant inlined gfx_init_plane_charset8::cr#0 = 0 Constant inlined form_control::return#1 = 0 -Constant inlined gfx_init_screen2::ch#0 = VIC_SCREEN2 -Constant inlined get_plane::return#4 = (dword)VIC_BITMAP +Constant inlined gfx_init_screen2::ch#0 = VICII_SCREEN2 +Constant inlined get_plane::return#4 = (dword)VICII_BITMAP Constant inlined form_control::return#4 = 0 Constant inlined keyboard_modifiers#1 = KEY_MODIFIER_LSHIFT -Constant inlined get_plane::return#5 = (dword)VIC_CHARSET_ROM +Constant inlined get_plane::return#5 = (dword)VICII_CHARSET_ROM Constant inlined form_control::return#3 = 0 Constant inlined get_plane::return#8 = PLANE_VERTICAL Constant inlined form_field_idx#7 = 0 @@ -8114,21 +8117,18 @@ Constant inlined bitmap_clear::x#0 = 0 Constant inlined gfx_init_screen2::cy#0 = 0 Constant inlined keyboard_event_scan::keycode#0 = 0 Constant inlined form_cursor_count#28 = FORM_CURSOR_BLINK/2 -Constant inlined gfx_init_vic_bitmap::l#0 = 0 Constant inlined gfx_init_plane_8bppchunky::gfxbCpuBank#0 = (byte)PLANE_8BPP_CHUNKY/$4000 Constant inlined gfx_init_plane_8bppchunky::gfxbCpuBank#1 = ++(byte)PLANE_8BPP_CHUNKY/$4000 Constant inlined gfx_init_screen4::cx#0 = 0 Constant inlined bitmap_init::x#0 = 0 -Constant inlined bitmap_init::bitmap#0 = VIC_BITMAP -Constant inlined get_vic_charset::return#3 = VIC_CHARSET_ROM +Constant inlined bitmap_init::bitmap#0 = VICII_BITMAP Constant inlined render_preset_name::$13 = render_preset_name::name#2 Constant inlined render_preset_name::$14 = render_preset_name::name#3 Constant inlined gfx_init_plane_charset8::gfxa#0 = (byte*)$4000 Constant inlined render_preset_name::$15 = render_preset_name::name#4 Constant inlined render_preset_name::$16 = render_preset_name::name#5 -Constant inlined gfx_init_screen4::ch#0 = VIC_SCREEN4 -Constant inlined get_vic_charset::return#0 = VIC_CHARSET_ROM -Constant inlined get_vic_charset::return#1 = VIC_BITMAP +Constant inlined gfx_init_VICII_bitmap::l#0 = 0 +Constant inlined gfx_init_screen4::ch#0 = VICII_SCREEN4 Constant inlined render_preset_name::$12 = render_preset_name::name#1 Constant inlined keyboard_event_scan::row#0 = 0 Constant inlined bitmap_init::bits#0 = $80 @@ -8143,6 +8143,8 @@ Constant inlined form_set_screen::screen#0 = FORM_SCREEN Constant inlined print_set_screen::screen#0 = COLS Constant inlined print_set_screen::screen#1 = FORM_SCREEN Constant inlined gfx_init_plane_8bppchunky::y#0 = 0 +Constant inlined gfx_mode::VICII_control#1 = VICII_DEN|VICII_RSEL|3|VICII_ECM +Constant inlined gfx_mode::VICII_control#0 = VICII_DEN|VICII_RSEL|3 Constant inlined render_preset_name::$20 = render_preset_name::name#9 Constant inlined render_preset_name::$21 = render_preset_name::name#10 Constant inlined render_preset_name::$22 = render_preset_name::name#11 @@ -8152,16 +8154,14 @@ Constant inlined gfx_init_plane_fill::fill#0 = $1b Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#12 = (byte)$4000/$4000 Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#10 = (byte)$4000/$4000 Constant inlined form_preset = form_fields_val -Constant inlined gfx_mode::vic_control2#1 = VIC_CSEL|VIC_MCM -Constant inlined gfx_mode::vic_control2#0 = VIC_CSEL Constant inlined gfx_init_charset::l#0 = 0 Constant inlined gfx_init_screen4::cy#0 = 0 -Constant inlined bitmap_init::$1 = >VIC_BITMAP +Constant inlined bitmap_init::$1 = >VICII_BITMAP Constant inlined gfx_init_plane_fill::plane_addr#2 = PLANE_FULL Constant inlined gfx_init_plane_fill::plane_addr#0 = PLANE_VERTICAL2 Constant inlined gfx_init_plane_fill::plane_addr#1 = PLANE_BLANK Constant inlined keyboard_event_get::return#0 = $ff -Constant inlined gfx_init_screen3::ch#0 = VIC_SCREEN3 +Constant inlined gfx_init_screen3::ch#0 = VICII_SCREEN3 Successful SSA optimization Pass2ConstantInlining Inlining constant with var siblings render_preset_name::name#1 Inlining constant with var siblings render_preset_name::name#2 @@ -8175,10 +8175,10 @@ Inlining constant with var siblings render_preset_name::name#9 Inlining constant with var siblings render_preset_name::name#10 Inlining constant with var siblings render_preset_name::name#11 Inlining constant with var siblings render_preset_name::name#12 -Consolidated array index constant in assignment (gfx_init_vic_bitmap::lines_x+1)[gfx_init_vic_bitmap::$3] -Consolidated array index constant in assignment (gfx_init_vic_bitmap::lines_y+1)[gfx_init_vic_bitmap::$4] +Consolidated array index constant in assignment (gfx_init_VICII_bitmap::lines_x+1)[gfx_init_VICII_bitmap::$3] +Consolidated array index constant in assignment (gfx_init_VICII_bitmap::lines_y+1)[gfx_init_VICII_bitmap::$4] Successful SSA optimization Pass2ConstantAdditionElimination -Alias gfx_init_vic_bitmap::l#2 = gfx_init_vic_bitmap::$3 gfx_init_vic_bitmap::$4 +Alias gfx_init_VICII_bitmap::l#2 = gfx_init_VICII_bitmap::$3 gfx_init_VICII_bitmap::$4 Successful SSA optimization Pass2AliasElimination Consolidated constant strings into render_preset_name::name#1 Successful SSA optimization Pass2ConstantStringConsolidation @@ -8370,9 +8370,9 @@ Adding NOP phi() at start of gfx_init_screen1 Adding NOP phi() at start of gfx_init_screen2 Adding NOP phi() at start of gfx_init_screen3 Adding NOP phi() at start of gfx_init_screen4 -Adding NOP phi() at start of gfx_init_vic_bitmap -Adding NOP phi() at start of gfx_init_vic_bitmap::@3 -Adding NOP phi() at start of gfx_init_vic_bitmap::@4 +Adding NOP phi() at start of gfx_init_VICII_bitmap +Adding NOP phi() at start of gfx_init_VICII_bitmap::@3 +Adding NOP phi() at start of gfx_init_VICII_bitmap::@4 Adding NOP phi() at start of gfx_init_plane_8bppchunky Adding NOP phi() at start of gfx_init_plane_8bppchunky::@7 Adding NOP phi() at start of gfx_init_plane_8bppchunky::@6 @@ -8445,15 +8445,15 @@ Adding NOP phi() at start of get_plane::@4 Adding NOP phi() at start of get_plane::@3 Adding NOP phi() at start of get_plane::@2 Adding NOP phi() at start of get_plane::@1 -Adding NOP phi() at start of get_vic_screen::@10 -Adding NOP phi() at start of get_vic_screen::@5 -Adding NOP phi() at start of get_vic_screen::@4 -Adding NOP phi() at start of get_vic_screen::@3 -Adding NOP phi() at start of get_vic_screen::@2 -Adding NOP phi() at start of get_vic_screen::@1 -Adding NOP phi() at start of get_vic_charset::@4 -Adding NOP phi() at start of get_vic_charset::@2 -Adding NOP phi() at start of get_vic_charset::@1 +Adding NOP phi() at start of get_VICII_screen::@10 +Adding NOP phi() at start of get_VICII_screen::@5 +Adding NOP phi() at start of get_VICII_screen::@4 +Adding NOP phi() at start of get_VICII_screen::@3 +Adding NOP phi() at start of get_VICII_screen::@2 +Adding NOP phi() at start of get_VICII_screen::@1 +Adding NOP phi() at start of get_VICII_charset::@4 +Adding NOP phi() at start of get_VICII_charset::@2 +Adding NOP phi() at start of get_VICII_charset::@1 Adding NOP phi() at start of keyboard_event_scan::@18 Adding NOP phi() at start of keyboard_event_scan::@19 Adding NOP phi() at start of bitmap_init @@ -8474,10 +8474,10 @@ Adding NOP phi() at start of memset::@1 Adding NOP phi() at start of print_ln::@2 CALL GRAPH Calls in [main] to keyboard_init:4 gfx_init:6 form_mode:10 gfx_mode:12 -Calls in [gfx_init] to gfx_init_screen0:20 gfx_init_screen1:22 gfx_init_screen2:24 gfx_init_screen3:26 gfx_init_screen4:28 gfx_init_charset:30 gfx_init_vic_bitmap:32 gfx_init_plane_8bppchunky:34 gfx_init_plane_charset8:36 gfx_init_plane_horisontal:38 gfx_init_plane_vertical:40 gfx_init_plane_horisontal2:42 gfx_init_plane_vertical2:44 gfx_init_plane_blank:46 gfx_init_plane_full:48 +Calls in [gfx_init] to gfx_init_screen0:20 gfx_init_screen1:22 gfx_init_screen2:24 gfx_init_screen3:26 gfx_init_screen4:28 gfx_init_charset:30 gfx_init_VICII_bitmap:32 gfx_init_plane_8bppchunky:34 gfx_init_plane_charset8:36 gfx_init_plane_horisontal:38 gfx_init_plane_vertical:40 gfx_init_plane_horisontal2:42 gfx_init_plane_vertical2:44 gfx_init_plane_blank:46 gfx_init_plane_full:48 Calls in [form_mode] to print_set_screen:52 print_cls:54 print_str_lines:56 print_set_screen:58 print_cls:60 print_str_lines:62 form_set_screen:64 form_render_values:66 render_preset_name:69 form_control:96 apply_preset:103 form_render_values:105 render_preset_name:108 -Calls in [gfx_mode] to get_plane:158 get_plane:182 get_vic_screen:206 get_vic_charset:212 get_vic_screen:223 keyboard_event_scan:260 keyboard_event_get:262 -Calls in [gfx_init_vic_bitmap] to bitmap_init:397 bitmap_clear:399 bitmap_line:408 +Calls in [gfx_mode] to get_plane:158 get_plane:182 get_VICII_screen:206 get_VICII_charset:212 get_VICII_screen:223 keyboard_event_scan:260 keyboard_event_get:262 +Calls in [gfx_init_VICII_bitmap] to bitmap_init:397 bitmap_clear:399 bitmap_line:408 Calls in [gfx_init_plane_8bppchunky] to dtvSetCpuBankSegment1:412 dtvSetCpuBankSegment1:421 dtvSetCpuBankSegment1:434 Calls in [gfx_init_plane_charset8] to dtvSetCpuBankSegment1:446 dtvSetCpuBankSegment1:474 Calls in [gfx_init_plane_horisontal] to dtvSetCpuBankSegment1:490 dtvSetCpuBankSegment1:506 @@ -8523,24 +8523,24 @@ Coalesced [127] gfx_mode::dtv_control#21 = gfx_mode::dtv_control#3 Coalesced [131] gfx_mode::dtv_control#23 = gfx_mode::dtv_control#4 Coalesced [135] gfx_mode::dtv_control#25 = gfx_mode::dtv_control#5 Coalesced [139] gfx_mode::dtv_control#27 = gfx_mode::dtv_control#6 -Coalesced [147] gfx_mode::vic_control#7 = gfx_mode::vic_control#2 +Coalesced [147] gfx_mode::VICII_control#7 = gfx_mode::VICII_control#2 Coalesced [157] get_plane::idx#17 = get_plane::idx#0 Coalesced [181] get_plane::idx#16 = get_plane::idx#1 -Coalesced [205] get_vic_screen::idx#7 = get_vic_screen::idx#0 -Coalesced [222] get_vic_screen::idx#8 = get_vic_screen::idx#1 -Coalesced [226] gfx_mode::vic_colors#6 = gfx_mode::vic_colors#0 -Coalesced [228] gfx_mode::vic_colors#7 = gfx_mode::vic_colors#3 +Coalesced [205] get_VICII_screen::idx#7 = get_VICII_screen::idx#0 +Coalesced [222] get_VICII_screen::idx#8 = get_VICII_screen::idx#1 +Coalesced [226] gfx_mode::VICII_colors#6 = gfx_mode::VICII_colors#0 +Coalesced [228] gfx_mode::VICII_colors#7 = gfx_mode::VICII_colors#3 Coalesced [229] gfx_mode::col#6 = gfx_mode::col#3 Coalesced [259] keyboard_events_size#147 = keyboard_events_size#25 Coalesced [267] gfx_mode::j#3 = gfx_mode::j#1 Coalesced [273] gfx_mode::i#3 = gfx_mode::i#1 -Coalesced [274] gfx_mode::vic_colors#5 = gfx_mode::vic_colors#1 +Coalesced [274] gfx_mode::VICII_colors#5 = gfx_mode::VICII_colors#1 Coalesced [275] gfx_mode::col#5 = gfx_mode::col#1 Coalesced [276] gfx_mode::cy#5 = gfx_mode::cy#1 -Coalesced (already) [277] gfx_mode::vic_colors#8 = gfx_mode::vic_colors#1 +Coalesced (already) [277] gfx_mode::VICII_colors#8 = gfx_mode::VICII_colors#1 Coalesced (already) [278] gfx_mode::col#7 = gfx_mode::col#1 Coalesced [279] gfx_mode::cx#3 = gfx_mode::cx#1 -Coalesced [280] gfx_mode::vic_control#8 = gfx_mode::vic_control#5 +Coalesced [280] gfx_mode::VICII_control#8 = gfx_mode::VICII_control#5 Coalesced [281] gfx_mode::dtv_control#28 = gfx_mode::dtv_control#13 Coalesced [282] gfx_mode::dtv_control#26 = gfx_mode::dtv_control#11 Coalesced [283] gfx_mode::dtv_control#24 = gfx_mode::dtv_control#10 @@ -8579,7 +8579,7 @@ Coalesced [392] gfx_init_charset::c#5 = gfx_init_charset::c#1 Coalesced (already) [393] gfx_init_charset::chargen#7 = gfx_init_charset::chargen#1 Coalesced (already) [394] gfx_init_charset::charset#7 = gfx_init_charset::charset#1 Coalesced [395] gfx_init_charset::l#3 = gfx_init_charset::l#1 -Coalesced [410] gfx_init_vic_bitmap::l#5 = gfx_init_vic_bitmap::l#1 +Coalesced [410] gfx_init_VICII_bitmap::l#5 = gfx_init_VICII_bitmap::l#1 Coalesced [415] gfx_init_plane_8bppchunky::gfxb#8 = gfx_init_plane_8bppchunky::gfxb#5 Coalesced [416] gfx_init_plane_8bppchunky::gfxbCpuBank#11 = gfx_init_plane_8bppchunky::gfxbCpuBank#7 Coalesced [420] dtvSetCpuBankSegment1::cpuBankIdx#14 = dtvSetCpuBankSegment1::cpuBankIdx#1 @@ -8827,7 +8827,7 @@ Culled Empty Block label gfx_init_screen4::@4 Culled Empty Block label gfx_init_screen4::@5 Culled Empty Block label gfx_init_charset::@5 Culled Empty Block label gfx_init_charset::@6 -Culled Empty Block label gfx_init_vic_bitmap::@4 +Culled Empty Block label gfx_init_VICII_bitmap::@4 Culled Empty Block label gfx_init_plane_8bppchunky::@7 Culled Empty Block label gfx_init_plane_8bppchunky::@9 Culled Empty Block label gfx_init_plane_8bppchunky::@10 @@ -8899,13 +8899,13 @@ Culled Empty Block label get_plane::@4 Culled Empty Block label get_plane::@3 Culled Empty Block label get_plane::@2 Culled Empty Block label get_plane::@1 -Culled Empty Block label get_vic_screen::@10 -Culled Empty Block label get_vic_screen::@4 -Culled Empty Block label get_vic_screen::@3 -Culled Empty Block label get_vic_screen::@2 -Culled Empty Block label get_vic_screen::@1 -Culled Empty Block label get_vic_charset::@4 -Culled Empty Block label get_vic_charset::@1 +Culled Empty Block label get_VICII_screen::@10 +Culled Empty Block label get_VICII_screen::@4 +Culled Empty Block label get_VICII_screen::@3 +Culled Empty Block label get_VICII_screen::@2 +Culled Empty Block label get_VICII_screen::@1 +Culled Empty Block label get_VICII_charset::@4 +Culled Empty Block label get_VICII_charset::@1 Culled Empty Block label keyboard_event_scan::@31 Culled Empty Block label keyboard_event_scan::@30 Culled Empty Block label keyboard_event_scan::@29 @@ -8984,13 +8984,13 @@ Renumbering block get_plane::@24 to get_plane::@11 Renumbering block get_plane::@25 to get_plane::@12 Renumbering block get_plane::@26 to get_plane::@13 Renumbering block get_plane::@27 to get_plane::@14 -Renumbering block get_vic_screen::@5 to get_vic_screen::@1 -Renumbering block get_vic_screen::@6 to get_vic_screen::@2 -Renumbering block get_vic_screen::@7 to get_vic_screen::@3 -Renumbering block get_vic_screen::@8 to get_vic_screen::@4 -Renumbering block get_vic_screen::@9 to get_vic_screen::@5 -Renumbering block get_vic_charset::@2 to get_vic_charset::@1 -Renumbering block get_vic_charset::@3 to get_vic_charset::@2 +Renumbering block get_VICII_screen::@5 to get_VICII_screen::@1 +Renumbering block get_VICII_screen::@6 to get_VICII_screen::@2 +Renumbering block get_VICII_screen::@7 to get_VICII_screen::@3 +Renumbering block get_VICII_screen::@8 to get_VICII_screen::@4 +Renumbering block get_VICII_screen::@9 to get_VICII_screen::@5 +Renumbering block get_VICII_charset::@2 to get_VICII_charset::@1 +Renumbering block get_VICII_charset::@3 to get_VICII_charset::@2 Renumbering block apply_preset::@11 to apply_preset::@1 Renumbering block apply_preset::@12 to apply_preset::@2 Renumbering block apply_preset::@13 to apply_preset::@3 @@ -9041,7 +9041,7 @@ Renumbering block gfx_mode::@33 to gfx_mode::@30 Renumbering block gfx_mode::@34 to gfx_mode::@31 Renumbering block gfx_mode::@35 to gfx_mode::@32 Renumbering block gfx_mode::@36 to gfx_mode::@33 -Renumbering block gfx_init_vic_bitmap::@5 to gfx_init_vic_bitmap::@4 +Renumbering block gfx_init_VICII_bitmap::@5 to gfx_init_VICII_bitmap::@4 Renumbering block gfx_init_plane_8bppchunky::@8 to gfx_init_plane_8bppchunky::@7 Renumbering block form_control::@8 to form_control::@7 Renumbering block form_control::@9 to form_control::@8 @@ -9097,8 +9097,8 @@ Adding NOP phi() at start of gfx_init_screen1 Adding NOP phi() at start of gfx_init_screen2 Adding NOP phi() at start of gfx_init_screen3 Adding NOP phi() at start of gfx_init_screen4 -Adding NOP phi() at start of gfx_init_vic_bitmap -Adding NOP phi() at start of gfx_init_vic_bitmap::@3 +Adding NOP phi() at start of gfx_init_VICII_bitmap +Adding NOP phi() at start of gfx_init_VICII_bitmap::@3 Adding NOP phi() at start of gfx_init_plane_8bppchunky Adding NOP phi() at start of gfx_init_plane_8bppchunky::@6 Adding NOP phi() at start of gfx_init_plane_charset8 @@ -9123,8 +9123,8 @@ Adding NOP phi() at start of form_control::@23 Adding NOP phi() at start of form_control::@6 Adding NOP phi() at start of apply_preset::@1 Adding NOP phi() at start of get_plane::@1 -Adding NOP phi() at start of get_vic_screen::@1 -Adding NOP phi() at start of get_vic_charset::@1 +Adding NOP phi() at start of get_VICII_screen::@1 +Adding NOP phi() at start of get_VICII_charset::@1 Adding NOP phi() at start of keyboard_event_scan::@17 Adding NOP phi() at start of keyboard_event_scan::@18 Adding NOP phi() at start of bitmap_init @@ -9198,7 +9198,7 @@ gfx_init::@5: scope:[gfx_init] from gfx_init::@4 to:gfx_init::@6 gfx_init::@6: scope:[gfx_init] from gfx_init::@5 [27] phi() - [28] call gfx_init_vic_bitmap + [28] call gfx_init_VICII_bitmap to:gfx_init::@7 gfx_init::@7: scope:[gfx_init] from gfx_init::@6 [29] phi() @@ -9280,8 +9280,8 @@ form_mode::@16: scope:[form_mode] from form_mode::@15 [67] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [68] *((byte*)CIA2) = 3 [69] *DTV_CONTROL = 0 - [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VIC_DEN|VIC_RSEL|3 - [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VIC_CSEL + [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VICII_DEN|VICII_RSEL|3 + [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VICII_CSEL [72] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = (byte)(word)FORM_SCREEN&$3fff/$40|(word)FORM_CHARSET&$3fff/$400 [73] *DTV_PLANEA_START_LO = 0 [74] *DTV_PLANEA_START_MI = >FORM_SCREEN @@ -9386,23 +9386,23 @@ gfx_mode::@16: scope:[gfx_mode] from gfx_mode::@6 [118] phi() to:gfx_mode::@7 gfx_mode::@7: scope:[gfx_mode] from gfx_mode::@16 gfx_mode::@6 - [119] gfx_mode::vic_control#5 = phi( gfx_mode::@16/VIC_DEN|VIC_RSEL|3|VIC_ECM, gfx_mode::@6/VIC_DEN|VIC_RSEL|3 ) + [119] gfx_mode::VICII_control#5 = phi( gfx_mode::@16/VICII_DEN|VICII_RSEL|3|VICII_ECM, gfx_mode::@6/VICII_DEN|VICII_RSEL|3 ) [120] if(*form_ctrl_bmm==0) goto gfx_mode::@8 to:gfx_mode::@17 gfx_mode::@17: scope:[gfx_mode] from gfx_mode::@7 - [121] gfx_mode::vic_control#2 = gfx_mode::vic_control#5 | VIC_BMM + [121] gfx_mode::VICII_control#2 = gfx_mode::VICII_control#5 | VICII_BMM to:gfx_mode::@8 gfx_mode::@8: scope:[gfx_mode] from gfx_mode::@17 gfx_mode::@7 - [122] gfx_mode::vic_control#4 = phi( gfx_mode::@17/gfx_mode::vic_control#2, gfx_mode::@7/gfx_mode::vic_control#5 ) - [123] *VIC_CONTROL = gfx_mode::vic_control#4 + [122] gfx_mode::VICII_control#4 = phi( gfx_mode::@17/gfx_mode::VICII_control#2, gfx_mode::@7/gfx_mode::VICII_control#5 ) + [123] *VICII_CONTROL = gfx_mode::VICII_control#4 [124] if(*form_ctrl_mcm==0) goto gfx_mode::@9 to:gfx_mode::@18 gfx_mode::@18: scope:[gfx_mode] from gfx_mode::@8 [125] phi() to:gfx_mode::@9 gfx_mode::@9: scope:[gfx_mode] from gfx_mode::@18 gfx_mode::@8 - [126] gfx_mode::vic_control2#2 = phi( gfx_mode::@18/VIC_CSEL|VIC_MCM, gfx_mode::@8/VIC_CSEL ) - [127] *VIC_CONTROL2 = gfx_mode::vic_control2#2 + [126] gfx_mode::VICII_control2#2 = phi( gfx_mode::@18/VICII_CSEL|VICII_MCM, gfx_mode::@8/VICII_CSEL ) + [127] *VICII_CONTROL2 = gfx_mode::VICII_control2#2 [128] gfx_mode::$18 = *form_a_start_hi << 4 [129] gfx_mode::plane_a_offs#0 = gfx_mode::$18 | *form_a_start_lo [130] get_plane::idx#0 = *form_a_pattern @@ -9454,46 +9454,46 @@ gfx_mode::@28: scope:[gfx_mode] from gfx_mode::@27 [172] *DTV_PLANEB_MODULO_LO = gfx_mode::$45 [173] *DTV_PLANEB_MODULO_HI = 0 [174] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 - [175] *((byte*)CIA2) = 3^(byte)(word)VIC_SCREEN0/$4000 - [176] get_vic_screen::idx#0 = *form_vic_screen - [177] call get_vic_screen - [178] get_vic_screen::return#10 = get_vic_screen::return#5 + [175] *((byte*)CIA2) = 3^(byte)(word)VICII_SCREEN0/$4000 + [176] get_VICII_screen::idx#0 = *form_VICII_screen + [177] call get_VICII_screen + [178] get_VICII_screen::return#10 = get_VICII_screen::return#5 to:gfx_mode::@29 gfx_mode::@29: scope:[gfx_mode] from gfx_mode::@28 - [179] gfx_mode::$82 = get_vic_screen::return#10 + [179] gfx_mode::$82 = get_VICII_screen::return#10 [180] gfx_mode::$47 = (word)gfx_mode::$82 & $3fff [181] gfx_mode::$48 = gfx_mode::$47 >> 6 - [182] get_vic_charset::idx#0 = *form_vic_gfx - [183] call get_vic_charset - [184] get_vic_charset::return#4 = get_vic_charset::return#2 + [182] get_VICII_charset::idx#0 = *form_VICII_gfx + [183] call get_VICII_charset + [184] get_VICII_charset::return#4 = get_VICII_charset::return#2 to:gfx_mode::@30 gfx_mode::@30: scope:[gfx_mode] from gfx_mode::@29 - [185] gfx_mode::$83 = get_vic_charset::return#4 + [185] gfx_mode::$83 = get_VICII_charset::return#4 [186] gfx_mode::$50 = (word)gfx_mode::$83 & $3fff [187] gfx_mode::$51 = > gfx_mode::$50 [188] gfx_mode::$52 = gfx_mode::$51 >> 2 [189] gfx_mode::$84 = (byte)gfx_mode::$48 [190] gfx_mode::$53 = gfx_mode::$84 | gfx_mode::$52 - [191] *VIC_MEMORY = gfx_mode::$53 - [192] get_vic_screen::idx#1 = *form_vic_cols - [193] call get_vic_screen - [194] get_vic_screen::return#11 = get_vic_screen::return#5 + [191] *VICII_MEMORY = gfx_mode::$53 + [192] get_VICII_screen::idx#1 = *form_VICII_cols + [193] call get_VICII_screen + [194] get_VICII_screen::return#11 = get_VICII_screen::return#5 to:gfx_mode::@31 gfx_mode::@31: scope:[gfx_mode] from gfx_mode::@30 - [195] gfx_mode::vic_colors#0 = get_vic_screen::return#11 + [195] gfx_mode::VICII_colors#0 = get_VICII_screen::return#11 to:gfx_mode::@19 gfx_mode::@19: scope:[gfx_mode] from gfx_mode::@21 gfx_mode::@31 [196] gfx_mode::cy#4 = phi( gfx_mode::@21/gfx_mode::cy#1, gfx_mode::@31/0 ) [196] gfx_mode::col#3 = phi( gfx_mode::@21/gfx_mode::col#1, gfx_mode::@31/COLS ) - [196] gfx_mode::vic_colors#3 = phi( gfx_mode::@21/gfx_mode::vic_colors#1, gfx_mode::@31/gfx_mode::vic_colors#0 ) + [196] gfx_mode::VICII_colors#3 = phi( gfx_mode::@21/gfx_mode::VICII_colors#1, gfx_mode::@31/gfx_mode::VICII_colors#0 ) to:gfx_mode::@20 gfx_mode::@20: scope:[gfx_mode] from gfx_mode::@19 gfx_mode::@20 [197] gfx_mode::cx#2 = phi( gfx_mode::@19/0, gfx_mode::@20/gfx_mode::cx#1 ) [197] gfx_mode::col#2 = phi( gfx_mode::@19/gfx_mode::col#3, gfx_mode::@20/gfx_mode::col#1 ) - [197] gfx_mode::vic_colors#2 = phi( gfx_mode::@19/gfx_mode::vic_colors#3, gfx_mode::@20/gfx_mode::vic_colors#1 ) - [198] *gfx_mode::col#2 = *gfx_mode::vic_colors#2 + [197] gfx_mode::VICII_colors#2 = phi( gfx_mode::@19/gfx_mode::VICII_colors#3, gfx_mode::@20/gfx_mode::VICII_colors#1 ) + [198] *gfx_mode::col#2 = *gfx_mode::VICII_colors#2 [199] gfx_mode::col#1 = ++ gfx_mode::col#2 - [200] gfx_mode::vic_colors#1 = ++ gfx_mode::vic_colors#2 + [200] gfx_mode::VICII_colors#1 = ++ gfx_mode::VICII_colors#2 [201] gfx_mode::cx#1 = ++ gfx_mode::cx#2 [202] if(gfx_mode::cx#1!=$28) goto gfx_mode::@20 to:gfx_mode::@21 @@ -9503,17 +9503,17 @@ gfx_mode::@21: scope:[gfx_mode] from gfx_mode::@20 to:gfx_mode::@22 gfx_mode::@22: scope:[gfx_mode] from gfx_mode::@21 [205] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 - [206] gfx_mode::$55 = *form_vic_bg0_hi << 4 - [207] gfx_mode::$56 = gfx_mode::$55 | *form_vic_bg0_lo + [206] gfx_mode::$55 = *form_VICII_bg0_hi << 4 + [207] gfx_mode::$56 = gfx_mode::$55 | *form_VICII_bg0_lo [208] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = gfx_mode::$56 - [209] gfx_mode::$57 = *form_vic_bg1_hi << 4 - [210] gfx_mode::$58 = gfx_mode::$57 | *form_vic_bg1_lo + [209] gfx_mode::$57 = *form_VICII_bg1_hi << 4 + [210] gfx_mode::$58 = gfx_mode::$57 | *form_VICII_bg1_lo [211] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) = gfx_mode::$58 - [212] gfx_mode::$59 = *form_vic_bg2_hi << 4 - [213] gfx_mode::$60 = gfx_mode::$59 | *form_vic_bg2_lo + [212] gfx_mode::$59 = *form_VICII_bg2_hi << 4 + [213] gfx_mode::$60 = gfx_mode::$59 | *form_VICII_bg2_lo [214] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2) = gfx_mode::$60 - [215] gfx_mode::$61 = *form_vic_bg3_hi << 4 - [216] gfx_mode::$62 = gfx_mode::$61 | *form_vic_bg3_lo + [215] gfx_mode::$61 = *form_VICII_bg3_hi << 4 + [216] gfx_mode::$62 = gfx_mode::$61 | *form_VICII_bg3_lo [217] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR3) = gfx_mode::$62 [218] if(*form_dtv_palet==0) goto gfx_mode::@24 to:gfx_mode::@23 @@ -9554,7 +9554,7 @@ gfx_init_screen0: scope:[gfx_init_screen0] from gfx_init [236] phi() to:gfx_init_screen0::@1 gfx_init_screen0::@1: scope:[gfx_init_screen0] from gfx_init_screen0 gfx_init_screen0::@3 - [237] gfx_init_screen0::ch#3 = phi( gfx_init_screen0/VIC_SCREEN0, gfx_init_screen0::@3/gfx_init_screen0::ch#1 ) + [237] gfx_init_screen0::ch#3 = phi( gfx_init_screen0/VICII_SCREEN0, gfx_init_screen0::@3/gfx_init_screen0::ch#1 ) [237] gfx_init_screen0::cy#4 = phi( gfx_init_screen0/0, gfx_init_screen0::@3/gfx_init_screen0::cy#1 ) to:gfx_init_screen0::@2 gfx_init_screen0::@2: scope:[gfx_init_screen0] from gfx_init_screen0::@1 gfx_init_screen0::@2 @@ -9582,7 +9582,7 @@ gfx_init_screen1: scope:[gfx_init_screen1] from gfx_init::@1 [250] phi() to:gfx_init_screen1::@1 gfx_init_screen1::@1: scope:[gfx_init_screen1] from gfx_init_screen1 gfx_init_screen1::@3 - [251] gfx_init_screen1::ch#3 = phi( gfx_init_screen1/VIC_SCREEN1, gfx_init_screen1::@3/gfx_init_screen1::ch#1 ) + [251] gfx_init_screen1::ch#3 = phi( gfx_init_screen1/VICII_SCREEN1, gfx_init_screen1::@3/gfx_init_screen1::ch#1 ) [251] gfx_init_screen1::cy#4 = phi( gfx_init_screen1/0, gfx_init_screen1::@3/gfx_init_screen1::cy#1 ) to:gfx_init_screen1::@2 gfx_init_screen1::@2: scope:[gfx_init_screen1] from gfx_init_screen1::@1 gfx_init_screen1::@2 @@ -9608,7 +9608,7 @@ gfx_init_screen2: scope:[gfx_init_screen2] from gfx_init::@2 [262] phi() to:gfx_init_screen2::@1 gfx_init_screen2::@1: scope:[gfx_init_screen2] from gfx_init_screen2 gfx_init_screen2::@3 - [263] gfx_init_screen2::ch#3 = phi( gfx_init_screen2/VIC_SCREEN2, gfx_init_screen2::@3/gfx_init_screen2::ch#1 ) + [263] gfx_init_screen2::ch#3 = phi( gfx_init_screen2/VICII_SCREEN2, gfx_init_screen2::@3/gfx_init_screen2::ch#1 ) [263] gfx_init_screen2::cy#4 = phi( gfx_init_screen2/0, gfx_init_screen2::@3/gfx_init_screen2::cy#1 ) to:gfx_init_screen2::@2 gfx_init_screen2::@2: scope:[gfx_init_screen2] from gfx_init_screen2::@1 gfx_init_screen2::@2 @@ -9637,7 +9637,7 @@ gfx_init_screen3: scope:[gfx_init_screen3] from gfx_init::@3 [277] phi() to:gfx_init_screen3::@1 gfx_init_screen3::@1: scope:[gfx_init_screen3] from gfx_init_screen3 gfx_init_screen3::@3 - [278] gfx_init_screen3::ch#3 = phi( gfx_init_screen3/VIC_SCREEN3, gfx_init_screen3::@3/gfx_init_screen3::ch#1 ) + [278] gfx_init_screen3::ch#3 = phi( gfx_init_screen3/VICII_SCREEN3, gfx_init_screen3::@3/gfx_init_screen3::ch#1 ) [278] gfx_init_screen3::cy#4 = phi( gfx_init_screen3/0, gfx_init_screen3::@3/gfx_init_screen3::cy#1 ) to:gfx_init_screen3::@2 gfx_init_screen3::@2: scope:[gfx_init_screen3] from gfx_init_screen3::@1 gfx_init_screen3::@2 @@ -9666,7 +9666,7 @@ gfx_init_screen4: scope:[gfx_init_screen4] from gfx_init::@4 to:gfx_init_screen4::@1 gfx_init_screen4::@1: scope:[gfx_init_screen4] from gfx_init_screen4 gfx_init_screen4::@3 [292] gfx_init_screen4::cy#4 = phi( gfx_init_screen4/0, gfx_init_screen4::@3/gfx_init_screen4::cy#1 ) - [292] gfx_init_screen4::ch#3 = phi( gfx_init_screen4/VIC_SCREEN4, gfx_init_screen4::@3/gfx_init_screen4::ch#1 ) + [292] gfx_init_screen4::ch#3 = phi( gfx_init_screen4/VICII_SCREEN4, gfx_init_screen4::@3/gfx_init_screen4::ch#1 ) to:gfx_init_screen4::@2 gfx_init_screen4::@2: scope:[gfx_init_screen4] from gfx_init_screen4::@1 gfx_init_screen4::@2 [293] gfx_init_screen4::cx#2 = phi( gfx_init_screen4::@1/0, gfx_init_screen4::@2/gfx_init_screen4::cx#1 ) @@ -9690,7 +9690,7 @@ gfx_init_charset: scope:[gfx_init_charset] from gfx_init::@5 to:gfx_init_charset::@1 gfx_init_charset::@1: scope:[gfx_init_charset] from gfx_init_charset gfx_init_charset::@3 [302] gfx_init_charset::c#4 = phi( gfx_init_charset/0, gfx_init_charset::@3/gfx_init_charset::c#1 ) - [302] gfx_init_charset::charset#3 = phi( gfx_init_charset/VIC_CHARSET_ROM, gfx_init_charset::@3/gfx_init_charset::charset#1 ) + [302] gfx_init_charset::charset#3 = phi( gfx_init_charset/VICII_CHARSET_ROM, gfx_init_charset::@3/gfx_init_charset::charset#1 ) [302] gfx_init_charset::chargen#3 = phi( gfx_init_charset/CHARGEN, gfx_init_charset::@3/gfx_init_charset::chargen#1 ) to:gfx_init_charset::@2 gfx_init_charset::@2: scope:[gfx_init_charset] from gfx_init_charset::@1 gfx_init_charset::@2 @@ -9714,32 +9714,32 @@ gfx_init_charset::@return: scope:[gfx_init_charset] from gfx_init_charset::@4 [312] return to:@return -void gfx_init_vic_bitmap() -gfx_init_vic_bitmap: scope:[gfx_init_vic_bitmap] from gfx_init::@6 +void gfx_init_VICII_bitmap() +gfx_init_VICII_bitmap: scope:[gfx_init_VICII_bitmap] from gfx_init::@6 [313] phi() [314] call bitmap_init - to:gfx_init_vic_bitmap::@3 -gfx_init_vic_bitmap::@3: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap + to:gfx_init_VICII_bitmap::@3 +gfx_init_VICII_bitmap::@3: scope:[gfx_init_VICII_bitmap] from gfx_init_VICII_bitmap [315] phi() [316] call bitmap_clear - to:gfx_init_vic_bitmap::@1 -gfx_init_vic_bitmap::@1: scope:[gfx_init_vic_bitmap] from gfx_init_vic_bitmap::@3 gfx_init_vic_bitmap::@4 - [317] gfx_init_vic_bitmap::l#2 = phi( gfx_init_vic_bitmap::@3/0, gfx_init_vic_bitmap::@4/gfx_init_vic_bitmap::l#1 ) - [318] if(gfx_init_vic_bitmap::l#2VIC_BITMAP + [641] bitmap_plot_xhi[bitmap_init::x#2] = >VICII_BITMAP [642] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 [643] bitmap_init::bits#1 = bitmap_init::bits#3 >> 1 [644] if(bitmap_init::bits#1!=0) goto bitmap_init::@6 @@ -10526,7 +10526,7 @@ bitmap_init::@return: scope:[bitmap_init] from bitmap_init::@4 to:@return void bitmap_clear() -bitmap_clear: scope:[bitmap_clear] from gfx_init_vic_bitmap::@3 +bitmap_clear: scope:[bitmap_clear] from gfx_init_VICII_bitmap::@3 [662] bitmap_clear::bitmap#0 = *bitmap_plot_xhi w= *bitmap_plot_xlo [663] bitmap_clear::bitmap#5 = (byte*)bitmap_clear::bitmap#0 to:bitmap_clear::@1 @@ -10551,7 +10551,7 @@ bitmap_clear::@return: scope:[bitmap_clear] from bitmap_clear::@3 to:@return void bitmap_line(byte bitmap_line::x0 , byte bitmap_line::x1 , byte bitmap_line::y0 , byte bitmap_line::y1) -bitmap_line: scope:[bitmap_line] from gfx_init_vic_bitmap::@2 +bitmap_line: scope:[bitmap_line] from gfx_init_VICII_bitmap::@2 [673] if(bitmap_line::x0#0FORM_SCREEN [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a @@ -12531,9 +12531,9 @@ Statement [111] gfx_mode::dtv_control#5 = gfx_mode::dtv_control#11 | DTV_COLORRA Statement [113] if(*form_ctrl_chunk==0) goto gfx_mode::@6 [ keyboard_events_size#25 gfx_mode::dtv_control#13 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::dtv_control#13 ] { } ) always clobbers reg byte a Statement [114] gfx_mode::dtv_control#6 = gfx_mode::dtv_control#13 | DTV_CHUNKY [ keyboard_events_size#25 gfx_mode::dtv_control#6 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::dtv_control#6 ] { } ) always clobbers reg byte a Statement [117] if(*form_ctrl_ecm==0) goto gfx_mode::@7 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a -Statement [120] if(*form_ctrl_bmm==0) goto gfx_mode::@8 [ keyboard_events_size#25 gfx_mode::vic_control#5 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::vic_control#5 ] { } ) always clobbers reg byte a -Removing always clobbered register reg byte a as potential for zp[1]:7 [ gfx_mode::vic_control#4 gfx_mode::vic_control#2 gfx_mode::vic_control#5 ] -Statement [121] gfx_mode::vic_control#2 = gfx_mode::vic_control#5 | VIC_BMM [ keyboard_events_size#25 gfx_mode::vic_control#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::vic_control#2 ] { } ) always clobbers reg byte a +Statement [120] if(*form_ctrl_bmm==0) goto gfx_mode::@8 [ keyboard_events_size#25 gfx_mode::VICII_control#5 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::VICII_control#5 ] { } ) always clobbers reg byte a +Removing always clobbered register reg byte a as potential for zp[1]:7 [ gfx_mode::VICII_control#4 gfx_mode::VICII_control#2 gfx_mode::VICII_control#5 ] +Statement [121] gfx_mode::VICII_control#2 = gfx_mode::VICII_control#5 | VICII_BMM [ keyboard_events_size#25 gfx_mode::VICII_control#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::VICII_control#2 ] { } ) always clobbers reg byte a Statement [124] if(*form_ctrl_mcm==0) goto gfx_mode::@9 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a Statement [128] gfx_mode::$18 = *form_a_start_hi << 4 [ keyboard_events_size#25 gfx_mode::$18 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$18 ] { { get_plane::idx#0 = get_plane::idx#10 } { get_plane::return#14 = get_plane::return#16 } } ) always clobbers reg byte a Statement [129] gfx_mode::plane_a_offs#0 = gfx_mode::$18 | *form_a_start_lo [ keyboard_events_size#25 gfx_mode::plane_a_offs#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_a_offs#0 ] { { get_plane::idx#0 = get_plane::idx#10 } { get_plane::return#14 = get_plane::return#16 } } ) always clobbers reg byte a @@ -12553,31 +12553,31 @@ Statement [151] gfx_mode::$32 = *form_b_start_hi << 4 [ keyboard_events_size#25 Statement [152] gfx_mode::plane_b_offs#0 = gfx_mode::$32 | *form_b_start_lo [ keyboard_events_size#25 gfx_mode::plane_b_offs#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b_offs#0 ] { { get_plane::idx#1 = get_plane::idx#10 } { get_plane::return#14 = get_plane::return#17 } } ) always clobbers reg byte a Statement [155] get_plane::return#17 = get_plane::return#14 [ keyboard_events_size#25 gfx_mode::plane_b_offs#0 get_plane::return#17 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b_offs#0 get_plane::return#17 ] { { get_plane::idx#1 = get_plane::idx#10 } { get_plane::return#14 = get_plane::return#17 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:191 [ gfx_mode::plane_b_offs#0 ] -Statement [156] gfx_mode::$34 = get_plane::return#17 [ keyboard_events_size#25 gfx_mode::plane_b_offs#0 gfx_mode::$34 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b_offs#0 gfx_mode::$34 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [157] gfx_mode::plane_b#0 = gfx_mode::$34 + gfx_mode::plane_b_offs#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [158] gfx_mode::$36 = < gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$36 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$36 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [161] gfx_mode::$38 = < gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$38 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$38 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [164] gfx_mode::$40 = > gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::$40 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$40 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [167] gfx_mode::$42 = *form_b_step_hi << 4 [ keyboard_events_size#25 gfx_mode::$42 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$42 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [168] gfx_mode::$43 = gfx_mode::$42 | *form_b_step_lo [ keyboard_events_size#25 gfx_mode::$43 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$43 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [170] gfx_mode::$44 = *form_b_mod_hi << 4 [ keyboard_events_size#25 gfx_mode::$44 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$44 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [171] gfx_mode::$45 = gfx_mode::$44 | *form_b_mod_lo [ keyboard_events_size#25 gfx_mode::$45 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$45 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [173] *DTV_PLANEB_MODULO_HI = 0 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [174] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [175] *((byte*)CIA2) = 3^(byte)(word)VIC_SCREEN0/$4000 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [178] get_vic_screen::return#10 = get_vic_screen::return#5 [ keyboard_events_size#25 get_vic_screen::return#10 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 get_vic_screen::return#10 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [179] gfx_mode::$82 = get_vic_screen::return#10 [ keyboard_events_size#25 gfx_mode::$82 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$82 ] { { get_vic_charset::return#2 = get_vic_charset::return#4 } } ) always clobbers reg byte a -Statement [180] gfx_mode::$47 = (word)gfx_mode::$82 & $3fff [ keyboard_events_size#25 gfx_mode::$47 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$47 ] { { get_vic_charset::return#2 = get_vic_charset::return#4 } } ) always clobbers reg byte a -Statement [181] gfx_mode::$48 = gfx_mode::$47 >> 6 [ keyboard_events_size#25 gfx_mode::$48 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 ] { { get_vic_charset::return#2 = get_vic_charset::return#4 } } ) always clobbers reg byte a -Statement [184] get_vic_charset::return#4 = get_vic_charset::return#2 [ keyboard_events_size#25 gfx_mode::$48 get_vic_charset::return#4 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 get_vic_charset::return#4 ] { { get_vic_charset::return#2 = get_vic_charset::return#4 } } ) always clobbers reg byte a -Statement [185] gfx_mode::$83 = get_vic_charset::return#4 [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$83 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$83 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [186] gfx_mode::$50 = (word)gfx_mode::$83 & $3fff [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$50 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$50 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [188] gfx_mode::$52 = gfx_mode::$51 >> 2 [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$52 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$52 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [189] gfx_mode::$84 = (byte)gfx_mode::$48 [ keyboard_events_size#25 gfx_mode::$52 gfx_mode::$84 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$52 gfx_mode::$84 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a +Statement [156] gfx_mode::$34 = get_plane::return#17 [ keyboard_events_size#25 gfx_mode::plane_b_offs#0 gfx_mode::$34 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b_offs#0 gfx_mode::$34 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [157] gfx_mode::plane_b#0 = gfx_mode::$34 + gfx_mode::plane_b_offs#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [158] gfx_mode::$36 = < gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$36 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$36 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [161] gfx_mode::$38 = < gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$38 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$38 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [164] gfx_mode::$40 = > gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::$40 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$40 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [167] gfx_mode::$42 = *form_b_step_hi << 4 [ keyboard_events_size#25 gfx_mode::$42 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$42 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [168] gfx_mode::$43 = gfx_mode::$42 | *form_b_step_lo [ keyboard_events_size#25 gfx_mode::$43 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$43 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [170] gfx_mode::$44 = *form_b_mod_hi << 4 [ keyboard_events_size#25 gfx_mode::$44 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$44 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [171] gfx_mode::$45 = gfx_mode::$44 | *form_b_mod_lo [ keyboard_events_size#25 gfx_mode::$45 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$45 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [173] *DTV_PLANEB_MODULO_HI = 0 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [174] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [175] *((byte*)CIA2) = 3^(byte)(word)VICII_SCREEN0/$4000 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [178] get_VICII_screen::return#10 = get_VICII_screen::return#5 [ keyboard_events_size#25 get_VICII_screen::return#10 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 get_VICII_screen::return#10 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [179] gfx_mode::$82 = get_VICII_screen::return#10 [ keyboard_events_size#25 gfx_mode::$82 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$82 ] { { get_VICII_charset::return#2 = get_VICII_charset::return#4 } } ) always clobbers reg byte a +Statement [180] gfx_mode::$47 = (word)gfx_mode::$82 & $3fff [ keyboard_events_size#25 gfx_mode::$47 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$47 ] { { get_VICII_charset::return#2 = get_VICII_charset::return#4 } } ) always clobbers reg byte a +Statement [181] gfx_mode::$48 = gfx_mode::$47 >> 6 [ keyboard_events_size#25 gfx_mode::$48 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 ] { { get_VICII_charset::return#2 = get_VICII_charset::return#4 } } ) always clobbers reg byte a +Statement [184] get_VICII_charset::return#4 = get_VICII_charset::return#2 [ keyboard_events_size#25 gfx_mode::$48 get_VICII_charset::return#4 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 get_VICII_charset::return#4 ] { { get_VICII_charset::return#2 = get_VICII_charset::return#4 } } ) always clobbers reg byte a +Statement [185] gfx_mode::$83 = get_VICII_charset::return#4 [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$83 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$83 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [186] gfx_mode::$50 = (word)gfx_mode::$83 & $3fff [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$50 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$50 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [188] gfx_mode::$52 = gfx_mode::$51 >> 2 [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$52 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$52 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [189] gfx_mode::$84 = (byte)gfx_mode::$48 [ keyboard_events_size#25 gfx_mode::$52 gfx_mode::$84 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$52 gfx_mode::$84 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:233 [ gfx_mode::$52 ] -Statement [194] get_vic_screen::return#11 = get_vic_screen::return#5 [ keyboard_events_size#25 get_vic_screen::return#11 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 get_vic_screen::return#11 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [195] gfx_mode::vic_colors#0 = get_vic_screen::return#11 [ keyboard_events_size#25 gfx_mode::vic_colors#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::vic_colors#0 ] { } ) always clobbers reg byte a -Statement [198] *gfx_mode::col#2 = *gfx_mode::vic_colors#2 [ keyboard_events_size#25 gfx_mode::cy#4 gfx_mode::vic_colors#2 gfx_mode::col#2 gfx_mode::cx#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::cy#4 gfx_mode::vic_colors#2 gfx_mode::col#2 gfx_mode::cx#2 ] { } ) always clobbers reg byte a reg byte y +Statement [194] get_VICII_screen::return#11 = get_VICII_screen::return#5 [ keyboard_events_size#25 get_VICII_screen::return#11 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 get_VICII_screen::return#11 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [195] gfx_mode::VICII_colors#0 = get_VICII_screen::return#11 [ keyboard_events_size#25 gfx_mode::VICII_colors#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::VICII_colors#0 ] { } ) always clobbers reg byte a +Statement [198] *gfx_mode::col#2 = *gfx_mode::VICII_colors#2 [ keyboard_events_size#25 gfx_mode::cy#4 gfx_mode::VICII_colors#2 gfx_mode::col#2 gfx_mode::cx#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::cy#4 gfx_mode::VICII_colors#2 gfx_mode::col#2 gfx_mode::cx#2 ] { } ) always clobbers reg byte a reg byte y Removing always clobbered register reg byte y as potential for zp[1]:3 [ form_cursor_count#23 form_cursor_count#1 form_cursor_count#17 form_cursor_count#16 form_cursor_count#4 ] Removing always clobbered register reg byte y as potential for zp[1]:4 [ form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] Removing always clobbered register reg byte y as potential for zp[1]:103 [ keyboard_events_size#19 keyboard_events_size#107 keyboard_events_size#98 keyboard_events_size#49 keyboard_events_size#28 keyboard_events_size#25 keyboard_events_size#100 keyboard_events_size#106 keyboard_events_size#0 keyboard_events_size#1 keyboard_events_size#3 ] @@ -12586,14 +12586,14 @@ Removing always clobbered register reg byte y as potential for zp[1]:9 [ gfx_mod Removing always clobbered register reg byte a as potential for zp[1]:14 [ gfx_mode::cx#2 gfx_mode::cx#1 ] Removing always clobbered register reg byte y as potential for zp[1]:14 [ gfx_mode::cx#2 gfx_mode::cx#1 ] Statement [205] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a -Statement [206] gfx_mode::$55 = *form_vic_bg0_hi << 4 [ keyboard_events_size#25 gfx_mode::$55 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$55 ] { } ) always clobbers reg byte a -Statement [207] gfx_mode::$56 = gfx_mode::$55 | *form_vic_bg0_lo [ keyboard_events_size#25 gfx_mode::$56 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$56 ] { } ) always clobbers reg byte a -Statement [209] gfx_mode::$57 = *form_vic_bg1_hi << 4 [ keyboard_events_size#25 gfx_mode::$57 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$57 ] { } ) always clobbers reg byte a -Statement [210] gfx_mode::$58 = gfx_mode::$57 | *form_vic_bg1_lo [ keyboard_events_size#25 gfx_mode::$58 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$58 ] { } ) always clobbers reg byte a -Statement [212] gfx_mode::$59 = *form_vic_bg2_hi << 4 [ keyboard_events_size#25 gfx_mode::$59 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$59 ] { } ) always clobbers reg byte a -Statement [213] gfx_mode::$60 = gfx_mode::$59 | *form_vic_bg2_lo [ keyboard_events_size#25 gfx_mode::$60 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$60 ] { } ) always clobbers reg byte a -Statement [215] gfx_mode::$61 = *form_vic_bg3_hi << 4 [ keyboard_events_size#25 gfx_mode::$61 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$61 ] { } ) always clobbers reg byte a -Statement [216] gfx_mode::$62 = gfx_mode::$61 | *form_vic_bg3_lo [ keyboard_events_size#25 gfx_mode::$62 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$62 ] { } ) always clobbers reg byte a +Statement [206] gfx_mode::$55 = *form_VICII_bg0_hi << 4 [ keyboard_events_size#25 gfx_mode::$55 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$55 ] { } ) always clobbers reg byte a +Statement [207] gfx_mode::$56 = gfx_mode::$55 | *form_VICII_bg0_lo [ keyboard_events_size#25 gfx_mode::$56 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$56 ] { } ) always clobbers reg byte a +Statement [209] gfx_mode::$57 = *form_VICII_bg1_hi << 4 [ keyboard_events_size#25 gfx_mode::$57 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$57 ] { } ) always clobbers reg byte a +Statement [210] gfx_mode::$58 = gfx_mode::$57 | *form_VICII_bg1_lo [ keyboard_events_size#25 gfx_mode::$58 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$58 ] { } ) always clobbers reg byte a +Statement [212] gfx_mode::$59 = *form_VICII_bg2_hi << 4 [ keyboard_events_size#25 gfx_mode::$59 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$59 ] { } ) always clobbers reg byte a +Statement [213] gfx_mode::$60 = gfx_mode::$59 | *form_VICII_bg2_lo [ keyboard_events_size#25 gfx_mode::$60 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$60 ] { } ) always clobbers reg byte a +Statement [215] gfx_mode::$61 = *form_VICII_bg3_hi << 4 [ keyboard_events_size#25 gfx_mode::$61 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$61 ] { } ) always clobbers reg byte a +Statement [216] gfx_mode::$62 = gfx_mode::$61 | *form_VICII_bg3_lo [ keyboard_events_size#25 gfx_mode::$62 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$62 ] { } ) always clobbers reg byte a Statement [218] if(*form_dtv_palet==0) goto gfx_mode::@24 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a Statement [223] if(*((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER)!=$ff) goto gfx_mode::@25 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a Statement [233] DTV_PALETTE[gfx_mode::i#2] = DTV_PALETTE_DEFAULT[gfx_mode::i#2] [ keyboard_events_size#25 gfx_mode::i#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::i#2 ] { } ) always clobbers reg byte a @@ -12725,32 +12725,32 @@ Statement [620] keyboard_event_scan::event_type#0 = keyboard_event_scan::row_sca Statement [622] keyboard_events[keyboard_events_size#19] = keyboard_event_scan::keycode#10 [ keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 ] ( gfx_mode:11::keyboard_event_scan:225 [ form_cursor_count#17 form_field_idx#19 keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 ] { { keyboard_events_size#25 = keyboard_events_size#98 } } form_mode:9::form_control:86::keyboard_event_scan:495 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } } ) always clobbers reg byte a Statement [628] keyboard_scan_values[keyboard_event_scan::row#2] = keyboard_event_scan::row_scan#0 [ keyboard_event_scan::row#2 keyboard_event_scan::keycode#14 keyboard_events_size#106 ] ( gfx_mode:11::keyboard_event_scan:225 [ form_cursor_count#17 form_field_idx#19 keyboard_event_scan::row#2 keyboard_event_scan::keycode#14 keyboard_events_size#106 ] { { keyboard_events_size#25 = keyboard_events_size#98 } } form_mode:9::form_control:86::keyboard_event_scan:495 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_event_scan::row#2 keyboard_event_scan::keycode#14 keyboard_events_size#106 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } } ) always clobbers reg byte a Statement [629] keyboard_event_scan::$23 = keyboard_event_scan::keycode#10 | $40 [ keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 keyboard_event_scan::$23 ] ( gfx_mode:11::keyboard_event_scan:225 [ form_cursor_count#17 form_field_idx#19 keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 keyboard_event_scan::$23 ] { { keyboard_events_size#25 = keyboard_events_size#98 } } form_mode:9::form_control:86::keyboard_event_scan:495 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 keyboard_event_scan::$23 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } } ) always clobbers reg byte a -Statement [641] bitmap_plot_xhi[bitmap_init::x#2] = >VIC_BITMAP [ bitmap_init::x#2 bitmap_init::bits#3 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a +Statement [641] bitmap_plot_xhi[bitmap_init::x#2] = >VICII_BITMAP [ bitmap_init::x#2 bitmap_init::bits#3 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:105 [ bitmap_init::x#2 bitmap_init::x#1 ] Removing always clobbered register reg byte a as potential for zp[1]:106 [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] -Statement [642] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 [ bitmap_init::x#2 bitmap_init::bits#3 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a -Statement [657] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_init:314 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] { } ) always clobbers reg byte a +Statement [642] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 [ bitmap_init::x#2 bitmap_init::bits#3 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a +Statement [657] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_init:314 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:107 [ bitmap_init::y#2 bitmap_init::y#1 ] -Statement [662] bitmap_clear::bitmap#0 = *bitmap_plot_xhi w= *bitmap_plot_xlo [ bitmap_clear::bitmap#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_clear:316 [ bitmap_clear::bitmap#0 ] { } ) always clobbers reg byte a -Statement [663] bitmap_clear::bitmap#5 = (byte*)bitmap_clear::bitmap#0 [ bitmap_clear::bitmap#5 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_clear:316 [ bitmap_clear::bitmap#5 ] { } ) always clobbers reg byte a -Statement [666] *bitmap_clear::bitmap#2 = 0 [ bitmap_clear::y#4 bitmap_clear::bitmap#2 bitmap_clear::x#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_clear:316 [ bitmap_clear::y#4 bitmap_clear::bitmap#2 bitmap_clear::x#2 ] { } ) always clobbers reg byte a reg byte y +Statement [662] bitmap_clear::bitmap#0 = *bitmap_plot_xhi w= *bitmap_plot_xlo [ bitmap_clear::bitmap#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_clear:316 [ bitmap_clear::bitmap#0 ] { } ) always clobbers reg byte a +Statement [663] bitmap_clear::bitmap#5 = (byte*)bitmap_clear::bitmap#0 [ bitmap_clear::bitmap#5 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_clear:316 [ bitmap_clear::bitmap#5 ] { } ) always clobbers reg byte a +Statement [666] *bitmap_clear::bitmap#2 = 0 [ bitmap_clear::y#4 bitmap_clear::bitmap#2 bitmap_clear::x#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_clear:316 [ bitmap_clear::y#4 bitmap_clear::bitmap#2 bitmap_clear::x#2 ] { } ) always clobbers reg byte a reg byte y Removing always clobbered register reg byte a as potential for zp[1]:110 [ bitmap_clear::y#4 bitmap_clear::y#1 ] Removing always clobbered register reg byte y as potential for zp[1]:110 [ bitmap_clear::y#4 bitmap_clear::y#1 ] Removing always clobbered register reg byte a as potential for zp[1]:113 [ bitmap_clear::x#2 bitmap_clear::x#1 ] Removing always clobbered register reg byte y as potential for zp[1]:113 [ bitmap_clear::x#2 bitmap_clear::x#1 ] -Statement [674] bitmap_line::xd#2 = bitmap_line::x0#0 - bitmap_line::x1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 ] { } ) always clobbers reg byte a -Removing always clobbered register reg byte a as potential for zp[1]:43 [ gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 ] +Statement [674] bitmap_line::xd#2 = bitmap_line::x0#0 - bitmap_line::x1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 ] { } ) always clobbers reg byte a +Removing always clobbered register reg byte a as potential for zp[1]:43 [ gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 ] Removing always clobbered register reg byte a as potential for zp[1]:263 [ bitmap_line::x0#0 ] Removing always clobbered register reg byte a as potential for zp[1]:264 [ bitmap_line::x1#0 ] Removing always clobbered register reg byte a as potential for zp[1]:265 [ bitmap_line::y0#0 ] Removing always clobbered register reg byte a as potential for zp[1]:266 [ bitmap_line::y1#0 ] -Statement [676] bitmap_line::yd#2 = bitmap_line::y0#0 - bitmap_line::y1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#2 ] { } ) always clobbers reg byte a +Statement [676] bitmap_line::yd#2 = bitmap_line::y0#0 - bitmap_line::y1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:313 [ bitmap_line::xd#2 ] -Statement [691] bitmap_line::yd#1 = bitmap_line::y1#0 - bitmap_line::y0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#1 ] { } ) always clobbers reg byte a -Statement [705] bitmap_line::xd#1 = bitmap_line::x1#0 - bitmap_line::x0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 ] { } ) always clobbers reg byte a -Statement [707] bitmap_line::yd#10 = bitmap_line::y0#0 - bitmap_line::y1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#10 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#10 ] { } ) always clobbers reg byte a +Statement [691] bitmap_line::yd#1 = bitmap_line::y1#0 - bitmap_line::y0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#1 ] { } ) always clobbers reg byte a +Statement [705] bitmap_line::xd#1 = bitmap_line::x1#0 - bitmap_line::x0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 ] { } ) always clobbers reg byte a +Statement [707] bitmap_line::yd#10 = bitmap_line::y0#0 - bitmap_line::y1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#10 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#10 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:316 [ bitmap_line::xd#1 ] -Statement [721] bitmap_line::yd#11 = bitmap_line::y1#0 - bitmap_line::y0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#11 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#11 ] { } ) always clobbers reg byte a +Statement [721] bitmap_line::yd#11 = bitmap_line::y1#0 - bitmap_line::y0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#11 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#11 ] { } ) always clobbers reg byte a Statement asm { .byte$32,$dd lda$ff .byte$32,$00 } always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:119 [ gfx_init_plane_fill::fill#6 ] Statement [740] gfx_init_plane_fill::$0 = gfx_init_plane_fill::plane_addr#3 << 2 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$0 ] ( gfx_init:6::gfx_init_plane_vertical2:40::gfx_init_plane_fill:418 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$0 ] { { dtvSetCpuBankSegment1::cpuBankIdx#11 = dtvSetCpuBankSegment1::cpuBankIdx#13 gfx_init_plane_fill::gfxbCpuBank#0 } } gfx_init:6::gfx_init_plane_blank:42::gfx_init_plane_fill:421 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$0 ] { { dtvSetCpuBankSegment1::cpuBankIdx#11 = dtvSetCpuBankSegment1::cpuBankIdx#13 gfx_init_plane_fill::gfxbCpuBank#0 } } gfx_init:6::gfx_init_plane_full:44::gfx_init_plane_fill:424 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$0 ] { { dtvSetCpuBankSegment1::cpuBankIdx#11 = dtvSetCpuBankSegment1::cpuBankIdx#13 gfx_init_plane_fill::gfxbCpuBank#0 } } ) always clobbers reg byte a @@ -12786,49 +12786,49 @@ Removing always clobbered register reg byte a as potential for zp[1]:133 [ keybo Statement [795] keyboard_event_pressed::$1 = keyboard_event_pressed::keycode#4 & 7 [ keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] ( gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:590 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:590 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:596 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:596 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:602 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:602 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:608 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:608 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:342 [ keyboard_event_pressed::row_bits#0 ] Statement [796] keyboard_event_pressed::return#10 = keyboard_event_pressed::row_bits#0 & keyboard_matrix_col_bitmask[keyboard_event_pressed::$1] [ keyboard_event_pressed::return#10 ] ( gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:590 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_event_pressed::return#10 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:590 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_event_pressed::return#10 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:596 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::return#10 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:596 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::return#10 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:602 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::return#10 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:602 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::return#10 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:608 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::return#10 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:608 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::return#10 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } ) always clobbers reg byte a -Statement [799] bitmap_line_ydxi::e#0 = bitmap_line_ydxi::xd#2 >> 1 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a +Statement [799] bitmap_line_ydxi::e#0 = bitmap_line_ydxi::xd#2 >> 1 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:134 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::xd#0 ] Removing always clobbered register reg byte a as potential for zp[1]:137 [ bitmap_line_ydxi::x#3 bitmap_line_ydxi::x#5 bitmap_line_ydxi::x#1 bitmap_line_ydxi::x#0 bitmap_line_ydxi::x#6 bitmap_line_ydxi::x#2 ] Removing always clobbered register reg byte a as potential for zp[1]:138 [ bitmap_line_ydxi::y#3 bitmap_line_ydxi::y#6 bitmap_line_ydxi::y#1 bitmap_line_ydxi::y#0 bitmap_line_ydxi::y#2 ] Removing always clobbered register reg byte a as potential for zp[1]:135 [ bitmap_line_ydxi::yd#5 bitmap_line_ydxi::yd#1 bitmap_line_ydxi::yd#0 ] Removing always clobbered register reg byte a as potential for zp[1]:136 [ bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y1#1 bitmap_line_ydxi::y1#0 ] -Statement [805] bitmap_line_ydxi::e#1 = bitmap_line_ydxi::e#3 + bitmap_line_ydxi::xd#2 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a -Statement [808] bitmap_line_ydxi::e#2 = bitmap_line_ydxi::e#1 - bitmap_line_ydxi::yd#5 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a -Statement [814] bitmap_line_xdyi::e#0 = bitmap_line_xdyi::yd#2 >> 1 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [805] bitmap_line_ydxi::e#1 = bitmap_line_ydxi::e#3 + bitmap_line_ydxi::xd#2 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a +Statement [808] bitmap_line_ydxi::e#2 = bitmap_line_ydxi::e#1 - bitmap_line_ydxi::yd#5 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a +Statement [814] bitmap_line_xdyi::e#0 = bitmap_line_xdyi::yd#2 >> 1 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:140 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::yd#1 bitmap_line_xdyi::yd#0 ] Removing always clobbered register reg byte a as potential for zp[1]:143 [ bitmap_line_xdyi::x#3 bitmap_line_xdyi::x#6 bitmap_line_xdyi::x#1 bitmap_line_xdyi::x#0 bitmap_line_xdyi::x#2 ] Removing always clobbered register reg byte a as potential for zp[1]:144 [ bitmap_line_xdyi::y#3 bitmap_line_xdyi::y#5 bitmap_line_xdyi::y#1 bitmap_line_xdyi::y#0 bitmap_line_xdyi::y#6 bitmap_line_xdyi::y#2 ] Removing always clobbered register reg byte a as potential for zp[1]:141 [ bitmap_line_xdyi::xd#5 bitmap_line_xdyi::xd#1 bitmap_line_xdyi::xd#0 ] Removing always clobbered register reg byte a as potential for zp[1]:142 [ bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x1#1 bitmap_line_xdyi::x1#0 ] -Statement [820] bitmap_line_xdyi::e#1 = bitmap_line_xdyi::e#3 + bitmap_line_xdyi::yd#2 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [823] bitmap_line_xdyi::e#2 = bitmap_line_xdyi::e#1 - bitmap_line_xdyi::xd#5 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [829] bitmap_line_ydxd::e#0 = bitmap_line_ydxd::xd#2 >> 1 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a +Statement [820] bitmap_line_xdyi::e#1 = bitmap_line_xdyi::e#3 + bitmap_line_xdyi::yd#2 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [823] bitmap_line_xdyi::e#2 = bitmap_line_xdyi::e#1 - bitmap_line_xdyi::xd#5 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [829] bitmap_line_ydxd::e#0 = bitmap_line_ydxd::xd#2 >> 1 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:146 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::xd#0 bitmap_line_ydxd::xd#1 ] Removing always clobbered register reg byte a as potential for zp[1]:149 [ bitmap_line_ydxd::x#3 bitmap_line_ydxd::x#5 bitmap_line_ydxd::x#0 bitmap_line_ydxd::x#1 bitmap_line_ydxd::x#6 bitmap_line_ydxd::x#2 ] Removing always clobbered register reg byte a as potential for zp[1]:150 [ bitmap_line_ydxd::y#2 bitmap_line_ydxd::y#7 bitmap_line_ydxd::y#0 bitmap_line_ydxd::y#1 bitmap_line_ydxd::y#3 ] Removing always clobbered register reg byte a as potential for zp[1]:147 [ bitmap_line_ydxd::yd#5 bitmap_line_ydxd::yd#0 bitmap_line_ydxd::yd#1 ] Removing always clobbered register reg byte a as potential for zp[1]:148 [ bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y1#0 bitmap_line_ydxd::y1#1 ] -Statement [835] bitmap_line_ydxd::e#1 = bitmap_line_ydxd::e#3 + bitmap_line_ydxd::xd#2 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a -Statement [838] bitmap_line_ydxd::e#2 = bitmap_line_ydxd::e#1 - bitmap_line_ydxd::yd#5 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a -Statement [844] bitmap_line_xdyd::e#0 = bitmap_line_xdyd::yd#2 >> 1 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [835] bitmap_line_ydxd::e#1 = bitmap_line_ydxd::e#3 + bitmap_line_ydxd::xd#2 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a +Statement [838] bitmap_line_ydxd::e#2 = bitmap_line_ydxd::e#1 - bitmap_line_ydxd::yd#5 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a +Statement [844] bitmap_line_xdyd::e#0 = bitmap_line_xdyd::yd#2 >> 1 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:152 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::yd#1 bitmap_line_xdyd::yd#0 ] Removing always clobbered register reg byte a as potential for zp[1]:155 [ bitmap_line_xdyd::x#3 bitmap_line_xdyd::x#6 bitmap_line_xdyd::x#1 bitmap_line_xdyd::x#0 bitmap_line_xdyd::x#2 ] Removing always clobbered register reg byte a as potential for zp[1]:156 [ bitmap_line_xdyd::y#3 bitmap_line_xdyd::y#5 bitmap_line_xdyd::y#1 bitmap_line_xdyd::y#0 bitmap_line_xdyd::y#6 bitmap_line_xdyd::y#2 ] Removing always clobbered register reg byte a as potential for zp[1]:153 [ bitmap_line_xdyd::xd#5 bitmap_line_xdyd::xd#1 bitmap_line_xdyd::xd#0 ] Removing always clobbered register reg byte a as potential for zp[1]:154 [ bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x1#1 bitmap_line_xdyd::x1#0 ] -Statement [850] bitmap_line_xdyd::e#1 = bitmap_line_xdyd::e#3 + bitmap_line_xdyd::yd#2 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [853] bitmap_line_xdyd::e#2 = bitmap_line_xdyd::e#1 - bitmap_line_xdyd::xd#5 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [859] bitmap_plot::plotter_x#0 = bitmap_plot_xhi[bitmap_plot::x#4] w= bitmap_plot_xlo[bitmap_plot::x#4] [ bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a +Statement [850] bitmap_line_xdyd::e#1 = bitmap_line_xdyd::e#3 + bitmap_line_xdyd::yd#2 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [853] bitmap_line_xdyd::e#2 = bitmap_line_xdyd::e#1 - bitmap_line_xdyd::xd#5 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [859] bitmap_plot::plotter_x#0 = bitmap_plot_xhi[bitmap_plot::x#4] w= bitmap_plot_xlo[bitmap_plot::x#4] [ bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:139 [ bitmap_line_ydxi::e#3 bitmap_line_ydxi::e#0 bitmap_line_ydxi::e#6 bitmap_line_ydxi::e#2 bitmap_line_ydxi::e#1 ] Removing always clobbered register reg byte a as potential for zp[1]:158 [ bitmap_plot::x#4 bitmap_plot::x#1 bitmap_plot::x#0 bitmap_plot::x#3 bitmap_plot::x#2 ] Removing always clobbered register reg byte a as potential for zp[1]:159 [ bitmap_plot::y#4 bitmap_plot::y#1 bitmap_plot::y#0 bitmap_plot::y#3 bitmap_plot::y#2 ] Removing always clobbered register reg byte a as potential for zp[1]:145 [ bitmap_line_xdyi::e#3 bitmap_line_xdyi::e#0 bitmap_line_xdyi::e#6 bitmap_line_xdyi::e#2 bitmap_line_xdyi::e#1 ] Removing always clobbered register reg byte a as potential for zp[1]:151 [ bitmap_line_ydxd::e#3 bitmap_line_ydxd::e#0 bitmap_line_ydxd::e#6 bitmap_line_ydxd::e#2 bitmap_line_ydxd::e#1 ] Removing always clobbered register reg byte a as potential for zp[1]:157 [ bitmap_line_xdyd::e#3 bitmap_line_xdyd::e#0 bitmap_line_xdyd::e#6 bitmap_line_xdyd::e#2 bitmap_line_xdyd::e#1 ] -Statement [860] bitmap_plot::plotter_y#0 = bitmap_plot_yhi[bitmap_plot::y#4] w= bitmap_plot_ylo[bitmap_plot::y#4] [ bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a -Statement [861] bitmap_plot::plotter#0 = bitmap_plot::plotter_x#0 + bitmap_plot::plotter_y#0 [ bitmap_plot::x#4 bitmap_plot::plotter#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a -Statement [862] bitmap_plot::$1 = *((byte*)bitmap_plot::plotter#0) | bitmap_plot_bit[bitmap_plot::x#4] [ bitmap_plot::plotter#0 bitmap_plot::$1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a reg byte y -Removing always clobbered register reg byte y as potential for zp[1]:43 [ gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 ] +Statement [860] bitmap_plot::plotter_y#0 = bitmap_plot_yhi[bitmap_plot::y#4] w= bitmap_plot_ylo[bitmap_plot::y#4] [ bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a +Statement [861] bitmap_plot::plotter#0 = bitmap_plot::plotter_x#0 + bitmap_plot::plotter_y#0 [ bitmap_plot::x#4 bitmap_plot::plotter#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a +Statement [862] bitmap_plot::$1 = *((byte*)bitmap_plot::plotter#0) | bitmap_plot_bit[bitmap_plot::x#4] [ bitmap_plot::plotter#0 bitmap_plot::$1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a reg byte y +Removing always clobbered register reg byte y as potential for zp[1]:43 [ gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 ] Removing always clobbered register reg byte y as potential for zp[1]:134 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::xd#0 ] Removing always clobbered register reg byte y as potential for zp[1]:135 [ bitmap_line_ydxi::yd#5 bitmap_line_ydxi::yd#1 bitmap_line_ydxi::yd#0 ] Removing always clobbered register reg byte y as potential for zp[1]:136 [ bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y1#1 bitmap_line_ydxi::y1#0 ] @@ -12853,7 +12853,7 @@ Removing always clobbered register reg byte y as potential for zp[1]:154 [ bitma Removing always clobbered register reg byte y as potential for zp[1]:155 [ bitmap_line_xdyd::x#3 bitmap_line_xdyd::x#6 bitmap_line_xdyd::x#1 bitmap_line_xdyd::x#0 bitmap_line_xdyd::x#2 ] Removing always clobbered register reg byte y as potential for zp[1]:156 [ bitmap_line_xdyd::y#3 bitmap_line_xdyd::y#5 bitmap_line_xdyd::y#1 bitmap_line_xdyd::y#0 bitmap_line_xdyd::y#6 bitmap_line_xdyd::y#2 ] Removing always clobbered register reg byte y as potential for zp[1]:157 [ bitmap_line_xdyd::e#3 bitmap_line_xdyd::e#0 bitmap_line_xdyd::e#6 bitmap_line_xdyd::e#2 bitmap_line_xdyd::e#1 ] -Statement [863] *((byte*)bitmap_plot::plotter#0) = bitmap_plot::$1 [ ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte y +Statement [863] *((byte*)bitmap_plot::plotter#0) = bitmap_plot::$1 [ ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte y Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a @@ -12865,8 +12865,8 @@ Statement [66] *DTV_COLOR_BANK_HI = 0 [ form_cursor_count#1 keyboard_events_size Statement [67] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a Statement [68] *((byte*)CIA2) = 3 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a Statement [69] *DTV_CONTROL = 0 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a -Statement [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VIC_DEN|VIC_RSEL|3 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a -Statement [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VIC_CSEL [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a +Statement [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VICII_DEN|VICII_RSEL|3 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a +Statement [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VICII_CSEL [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a Statement [72] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = (byte)(word)FORM_SCREEN&$3fff/$40|(word)FORM_CHARSET&$3fff/$400 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a Statement [73] *DTV_PLANEA_START_LO = 0 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a Statement [74] *DTV_PLANEA_START_MI = >FORM_SCREEN [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] ( form_mode:9 [ form_cursor_count#1 keyboard_events_size#28 form_field_idx#1 ] { } ) always clobbers reg byte a @@ -12887,8 +12887,8 @@ Statement [111] gfx_mode::dtv_control#5 = gfx_mode::dtv_control#11 | DTV_COLORRA Statement [113] if(*form_ctrl_chunk==0) goto gfx_mode::@6 [ keyboard_events_size#25 gfx_mode::dtv_control#13 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::dtv_control#13 ] { } ) always clobbers reg byte a Statement [114] gfx_mode::dtv_control#6 = gfx_mode::dtv_control#13 | DTV_CHUNKY [ keyboard_events_size#25 gfx_mode::dtv_control#6 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::dtv_control#6 ] { } ) always clobbers reg byte a Statement [117] if(*form_ctrl_ecm==0) goto gfx_mode::@7 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a -Statement [120] if(*form_ctrl_bmm==0) goto gfx_mode::@8 [ keyboard_events_size#25 gfx_mode::vic_control#5 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::vic_control#5 ] { } ) always clobbers reg byte a -Statement [121] gfx_mode::vic_control#2 = gfx_mode::vic_control#5 | VIC_BMM [ keyboard_events_size#25 gfx_mode::vic_control#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::vic_control#2 ] { } ) always clobbers reg byte a +Statement [120] if(*form_ctrl_bmm==0) goto gfx_mode::@8 [ keyboard_events_size#25 gfx_mode::VICII_control#5 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::VICII_control#5 ] { } ) always clobbers reg byte a +Statement [121] gfx_mode::VICII_control#2 = gfx_mode::VICII_control#5 | VICII_BMM [ keyboard_events_size#25 gfx_mode::VICII_control#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::VICII_control#2 ] { } ) always clobbers reg byte a Statement [124] if(*form_ctrl_mcm==0) goto gfx_mode::@9 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a Statement [128] gfx_mode::$18 = *form_a_start_hi << 4 [ keyboard_events_size#25 gfx_mode::$18 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$18 ] { { get_plane::idx#0 = get_plane::idx#10 } { get_plane::return#14 = get_plane::return#16 } } ) always clobbers reg byte a Statement [129] gfx_mode::plane_a_offs#0 = gfx_mode::$18 | *form_a_start_lo [ keyboard_events_size#25 gfx_mode::plane_a_offs#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_a_offs#0 ] { { get_plane::idx#0 = get_plane::idx#10 } { get_plane::return#14 = get_plane::return#16 } } ) always clobbers reg byte a @@ -12906,39 +12906,39 @@ Statement [150] *DTV_PLANEA_MODULO_HI = 0 [ keyboard_events_size#25 ] ( gfx_mode Statement [151] gfx_mode::$32 = *form_b_start_hi << 4 [ keyboard_events_size#25 gfx_mode::$32 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$32 ] { { get_plane::idx#1 = get_plane::idx#10 } { get_plane::return#14 = get_plane::return#17 } } ) always clobbers reg byte a Statement [152] gfx_mode::plane_b_offs#0 = gfx_mode::$32 | *form_b_start_lo [ keyboard_events_size#25 gfx_mode::plane_b_offs#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b_offs#0 ] { { get_plane::idx#1 = get_plane::idx#10 } { get_plane::return#14 = get_plane::return#17 } } ) always clobbers reg byte a Statement [155] get_plane::return#17 = get_plane::return#14 [ keyboard_events_size#25 gfx_mode::plane_b_offs#0 get_plane::return#17 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b_offs#0 get_plane::return#17 ] { { get_plane::idx#1 = get_plane::idx#10 } { get_plane::return#14 = get_plane::return#17 } } ) always clobbers reg byte a -Statement [156] gfx_mode::$34 = get_plane::return#17 [ keyboard_events_size#25 gfx_mode::plane_b_offs#0 gfx_mode::$34 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b_offs#0 gfx_mode::$34 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [157] gfx_mode::plane_b#0 = gfx_mode::$34 + gfx_mode::plane_b_offs#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [158] gfx_mode::$36 = < gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$36 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$36 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [161] gfx_mode::$38 = < gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$38 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$38 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [164] gfx_mode::$40 = > gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::$40 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$40 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [167] gfx_mode::$42 = *form_b_step_hi << 4 [ keyboard_events_size#25 gfx_mode::$42 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$42 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [168] gfx_mode::$43 = gfx_mode::$42 | *form_b_step_lo [ keyboard_events_size#25 gfx_mode::$43 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$43 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [170] gfx_mode::$44 = *form_b_mod_hi << 4 [ keyboard_events_size#25 gfx_mode::$44 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$44 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [171] gfx_mode::$45 = gfx_mode::$44 | *form_b_mod_lo [ keyboard_events_size#25 gfx_mode::$45 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$45 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [173] *DTV_PLANEB_MODULO_HI = 0 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [174] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [175] *((byte*)CIA2) = 3^(byte)(word)VIC_SCREEN0/$4000 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [178] get_vic_screen::return#10 = get_vic_screen::return#5 [ keyboard_events_size#25 get_vic_screen::return#10 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 get_vic_screen::return#10 ] { { get_vic_screen::idx#0 = get_vic_screen::idx#2 } { get_vic_screen::return#10 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [179] gfx_mode::$82 = get_vic_screen::return#10 [ keyboard_events_size#25 gfx_mode::$82 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$82 ] { { get_vic_charset::return#2 = get_vic_charset::return#4 } } ) always clobbers reg byte a -Statement [180] gfx_mode::$47 = (word)gfx_mode::$82 & $3fff [ keyboard_events_size#25 gfx_mode::$47 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$47 ] { { get_vic_charset::return#2 = get_vic_charset::return#4 } } ) always clobbers reg byte a -Statement [181] gfx_mode::$48 = gfx_mode::$47 >> 6 [ keyboard_events_size#25 gfx_mode::$48 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 ] { { get_vic_charset::return#2 = get_vic_charset::return#4 } } ) always clobbers reg byte a -Statement [184] get_vic_charset::return#4 = get_vic_charset::return#2 [ keyboard_events_size#25 gfx_mode::$48 get_vic_charset::return#4 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 get_vic_charset::return#4 ] { { get_vic_charset::return#2 = get_vic_charset::return#4 } } ) always clobbers reg byte a -Statement [185] gfx_mode::$83 = get_vic_charset::return#4 [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$83 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$83 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [186] gfx_mode::$50 = (word)gfx_mode::$83 & $3fff [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$50 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$50 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [188] gfx_mode::$52 = gfx_mode::$51 >> 2 [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$52 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$52 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [189] gfx_mode::$84 = (byte)gfx_mode::$48 [ keyboard_events_size#25 gfx_mode::$52 gfx_mode::$84 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$52 gfx_mode::$84 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [194] get_vic_screen::return#11 = get_vic_screen::return#5 [ keyboard_events_size#25 get_vic_screen::return#11 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 get_vic_screen::return#11 ] { { get_vic_screen::idx#1 = get_vic_screen::idx#2 } { get_vic_screen::return#11 = get_vic_screen::return#5 } } ) always clobbers reg byte a -Statement [195] gfx_mode::vic_colors#0 = get_vic_screen::return#11 [ keyboard_events_size#25 gfx_mode::vic_colors#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::vic_colors#0 ] { } ) always clobbers reg byte a -Statement [198] *gfx_mode::col#2 = *gfx_mode::vic_colors#2 [ keyboard_events_size#25 gfx_mode::cy#4 gfx_mode::vic_colors#2 gfx_mode::col#2 gfx_mode::cx#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::cy#4 gfx_mode::vic_colors#2 gfx_mode::col#2 gfx_mode::cx#2 ] { } ) always clobbers reg byte a reg byte y +Statement [156] gfx_mode::$34 = get_plane::return#17 [ keyboard_events_size#25 gfx_mode::plane_b_offs#0 gfx_mode::$34 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b_offs#0 gfx_mode::$34 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [157] gfx_mode::plane_b#0 = gfx_mode::$34 + gfx_mode::plane_b_offs#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [158] gfx_mode::$36 = < gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$36 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$36 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [161] gfx_mode::$38 = < gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$38 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::plane_b#0 gfx_mode::$38 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [164] gfx_mode::$40 = > gfx_mode::plane_b#0 [ keyboard_events_size#25 gfx_mode::$40 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$40 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [167] gfx_mode::$42 = *form_b_step_hi << 4 [ keyboard_events_size#25 gfx_mode::$42 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$42 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [168] gfx_mode::$43 = gfx_mode::$42 | *form_b_step_lo [ keyboard_events_size#25 gfx_mode::$43 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$43 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [170] gfx_mode::$44 = *form_b_mod_hi << 4 [ keyboard_events_size#25 gfx_mode::$44 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$44 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [171] gfx_mode::$45 = gfx_mode::$44 | *form_b_mod_lo [ keyboard_events_size#25 gfx_mode::$45 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$45 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [173] *DTV_PLANEB_MODULO_HI = 0 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [174] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [175] *((byte*)CIA2) = 3^(byte)(word)VICII_SCREEN0/$4000 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [178] get_VICII_screen::return#10 = get_VICII_screen::return#5 [ keyboard_events_size#25 get_VICII_screen::return#10 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 get_VICII_screen::return#10 ] { { get_VICII_screen::idx#0 = get_VICII_screen::idx#2 } { get_VICII_screen::return#10 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [179] gfx_mode::$82 = get_VICII_screen::return#10 [ keyboard_events_size#25 gfx_mode::$82 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$82 ] { { get_VICII_charset::return#2 = get_VICII_charset::return#4 } } ) always clobbers reg byte a +Statement [180] gfx_mode::$47 = (word)gfx_mode::$82 & $3fff [ keyboard_events_size#25 gfx_mode::$47 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$47 ] { { get_VICII_charset::return#2 = get_VICII_charset::return#4 } } ) always clobbers reg byte a +Statement [181] gfx_mode::$48 = gfx_mode::$47 >> 6 [ keyboard_events_size#25 gfx_mode::$48 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 ] { { get_VICII_charset::return#2 = get_VICII_charset::return#4 } } ) always clobbers reg byte a +Statement [184] get_VICII_charset::return#4 = get_VICII_charset::return#2 [ keyboard_events_size#25 gfx_mode::$48 get_VICII_charset::return#4 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 get_VICII_charset::return#4 ] { { get_VICII_charset::return#2 = get_VICII_charset::return#4 } } ) always clobbers reg byte a +Statement [185] gfx_mode::$83 = get_VICII_charset::return#4 [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$83 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$83 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [186] gfx_mode::$50 = (word)gfx_mode::$83 & $3fff [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$50 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$50 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [188] gfx_mode::$52 = gfx_mode::$51 >> 2 [ keyboard_events_size#25 gfx_mode::$48 gfx_mode::$52 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$48 gfx_mode::$52 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [189] gfx_mode::$84 = (byte)gfx_mode::$48 [ keyboard_events_size#25 gfx_mode::$52 gfx_mode::$84 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$52 gfx_mode::$84 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [194] get_VICII_screen::return#11 = get_VICII_screen::return#5 [ keyboard_events_size#25 get_VICII_screen::return#11 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 get_VICII_screen::return#11 ] { { get_VICII_screen::idx#1 = get_VICII_screen::idx#2 } { get_VICII_screen::return#11 = get_VICII_screen::return#5 } } ) always clobbers reg byte a +Statement [195] gfx_mode::VICII_colors#0 = get_VICII_screen::return#11 [ keyboard_events_size#25 gfx_mode::VICII_colors#0 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::VICII_colors#0 ] { } ) always clobbers reg byte a +Statement [198] *gfx_mode::col#2 = *gfx_mode::VICII_colors#2 [ keyboard_events_size#25 gfx_mode::cy#4 gfx_mode::VICII_colors#2 gfx_mode::col#2 gfx_mode::cx#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::cy#4 gfx_mode::VICII_colors#2 gfx_mode::col#2 gfx_mode::cx#2 ] { } ) always clobbers reg byte a reg byte y Statement [205] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a -Statement [206] gfx_mode::$55 = *form_vic_bg0_hi << 4 [ keyboard_events_size#25 gfx_mode::$55 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$55 ] { } ) always clobbers reg byte a -Statement [207] gfx_mode::$56 = gfx_mode::$55 | *form_vic_bg0_lo [ keyboard_events_size#25 gfx_mode::$56 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$56 ] { } ) always clobbers reg byte a -Statement [209] gfx_mode::$57 = *form_vic_bg1_hi << 4 [ keyboard_events_size#25 gfx_mode::$57 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$57 ] { } ) always clobbers reg byte a -Statement [210] gfx_mode::$58 = gfx_mode::$57 | *form_vic_bg1_lo [ keyboard_events_size#25 gfx_mode::$58 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$58 ] { } ) always clobbers reg byte a -Statement [212] gfx_mode::$59 = *form_vic_bg2_hi << 4 [ keyboard_events_size#25 gfx_mode::$59 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$59 ] { } ) always clobbers reg byte a -Statement [213] gfx_mode::$60 = gfx_mode::$59 | *form_vic_bg2_lo [ keyboard_events_size#25 gfx_mode::$60 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$60 ] { } ) always clobbers reg byte a -Statement [215] gfx_mode::$61 = *form_vic_bg3_hi << 4 [ keyboard_events_size#25 gfx_mode::$61 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$61 ] { } ) always clobbers reg byte a -Statement [216] gfx_mode::$62 = gfx_mode::$61 | *form_vic_bg3_lo [ keyboard_events_size#25 gfx_mode::$62 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$62 ] { } ) always clobbers reg byte a +Statement [206] gfx_mode::$55 = *form_VICII_bg0_hi << 4 [ keyboard_events_size#25 gfx_mode::$55 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$55 ] { } ) always clobbers reg byte a +Statement [207] gfx_mode::$56 = gfx_mode::$55 | *form_VICII_bg0_lo [ keyboard_events_size#25 gfx_mode::$56 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$56 ] { } ) always clobbers reg byte a +Statement [209] gfx_mode::$57 = *form_VICII_bg1_hi << 4 [ keyboard_events_size#25 gfx_mode::$57 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$57 ] { } ) always clobbers reg byte a +Statement [210] gfx_mode::$58 = gfx_mode::$57 | *form_VICII_bg1_lo [ keyboard_events_size#25 gfx_mode::$58 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$58 ] { } ) always clobbers reg byte a +Statement [212] gfx_mode::$59 = *form_VICII_bg2_hi << 4 [ keyboard_events_size#25 gfx_mode::$59 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$59 ] { } ) always clobbers reg byte a +Statement [213] gfx_mode::$60 = gfx_mode::$59 | *form_VICII_bg2_lo [ keyboard_events_size#25 gfx_mode::$60 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$60 ] { } ) always clobbers reg byte a +Statement [215] gfx_mode::$61 = *form_VICII_bg3_hi << 4 [ keyboard_events_size#25 gfx_mode::$61 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$61 ] { } ) always clobbers reg byte a +Statement [216] gfx_mode::$62 = gfx_mode::$61 | *form_VICII_bg3_lo [ keyboard_events_size#25 gfx_mode::$62 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::$62 ] { } ) always clobbers reg byte a Statement [218] if(*form_dtv_palet==0) goto gfx_mode::@24 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a Statement [223] if(*((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER)!=$ff) goto gfx_mode::@25 [ keyboard_events_size#25 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 ] { } ) always clobbers reg byte a Statement [233] DTV_PALETTE[gfx_mode::i#2] = DTV_PALETTE_DEFAULT[gfx_mode::i#2] [ keyboard_events_size#25 gfx_mode::i#2 ] ( gfx_mode:11 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#25 gfx_mode::i#2 ] { } ) always clobbers reg byte a @@ -13011,20 +13011,20 @@ Statement [620] keyboard_event_scan::event_type#0 = keyboard_event_scan::row_sca Statement [622] keyboard_events[keyboard_events_size#19] = keyboard_event_scan::keycode#10 [ keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 ] ( gfx_mode:11::keyboard_event_scan:225 [ form_cursor_count#17 form_field_idx#19 keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 ] { { keyboard_events_size#25 = keyboard_events_size#98 } } form_mode:9::form_control:86::keyboard_event_scan:495 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } } ) always clobbers reg byte a Statement [628] keyboard_scan_values[keyboard_event_scan::row#2] = keyboard_event_scan::row_scan#0 [ keyboard_event_scan::row#2 keyboard_event_scan::keycode#14 keyboard_events_size#106 ] ( gfx_mode:11::keyboard_event_scan:225 [ form_cursor_count#17 form_field_idx#19 keyboard_event_scan::row#2 keyboard_event_scan::keycode#14 keyboard_events_size#106 ] { { keyboard_events_size#25 = keyboard_events_size#98 } } form_mode:9::form_control:86::keyboard_event_scan:495 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_event_scan::row#2 keyboard_event_scan::keycode#14 keyboard_events_size#106 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } } ) always clobbers reg byte a Statement [629] keyboard_event_scan::$23 = keyboard_event_scan::keycode#10 | $40 [ keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 keyboard_event_scan::$23 ] ( gfx_mode:11::keyboard_event_scan:225 [ form_cursor_count#17 form_field_idx#19 keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 keyboard_event_scan::$23 ] { { keyboard_events_size#25 = keyboard_events_size#98 } } form_mode:9::form_control:86::keyboard_event_scan:495 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_event_scan::row#2 keyboard_event_scan::row_scan#0 keyboard_event_scan::col#2 keyboard_event_scan::keycode#10 keyboard_events_size#19 keyboard_event_scan::$23 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } } ) always clobbers reg byte a -Statement [639] bitmap_init::$0 = bitmap_init::x#2 & $f8 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] { } ) always clobbers reg byte a -Statement [641] bitmap_plot_xhi[bitmap_init::x#2] = >VIC_BITMAP [ bitmap_init::x#2 bitmap_init::bits#3 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a -Statement [642] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 [ bitmap_init::x#2 bitmap_init::bits#3 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a -Statement [650] bitmap_init::$10 = bitmap_init::y#2 & 7 [ bitmap_init::y#2 bitmap_init::yoffs#2 bitmap_init::$10 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_init:314 [ bitmap_init::y#2 bitmap_init::yoffs#2 bitmap_init::$10 ] { } ) always clobbers reg byte a -Statement [657] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_init:314 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] { } ) always clobbers reg byte a -Statement [662] bitmap_clear::bitmap#0 = *bitmap_plot_xhi w= *bitmap_plot_xlo [ bitmap_clear::bitmap#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_clear:316 [ bitmap_clear::bitmap#0 ] { } ) always clobbers reg byte a -Statement [663] bitmap_clear::bitmap#5 = (byte*)bitmap_clear::bitmap#0 [ bitmap_clear::bitmap#5 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_clear:316 [ bitmap_clear::bitmap#5 ] { } ) always clobbers reg byte a -Statement [666] *bitmap_clear::bitmap#2 = 0 [ bitmap_clear::y#4 bitmap_clear::bitmap#2 bitmap_clear::x#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_clear:316 [ bitmap_clear::y#4 bitmap_clear::bitmap#2 bitmap_clear::x#2 ] { } ) always clobbers reg byte a reg byte y -Statement [674] bitmap_line::xd#2 = bitmap_line::x0#0 - bitmap_line::x1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 ] { } ) always clobbers reg byte a -Statement [676] bitmap_line::yd#2 = bitmap_line::y0#0 - bitmap_line::y1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#2 ] { } ) always clobbers reg byte a -Statement [691] bitmap_line::yd#1 = bitmap_line::y1#0 - bitmap_line::y0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#1 ] { } ) always clobbers reg byte a -Statement [705] bitmap_line::xd#1 = bitmap_line::x1#0 - bitmap_line::x0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 ] { } ) always clobbers reg byte a -Statement [707] bitmap_line::yd#10 = bitmap_line::y0#0 - bitmap_line::y1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#10 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#10 ] { } ) always clobbers reg byte a -Statement [721] bitmap_line::yd#11 = bitmap_line::y1#0 - bitmap_line::y0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#11 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324 [ gfx_init_vic_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#11 ] { } ) always clobbers reg byte a +Statement [639] bitmap_init::$0 = bitmap_init::x#2 & $f8 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] { } ) always clobbers reg byte a +Statement [641] bitmap_plot_xhi[bitmap_init::x#2] = >VICII_BITMAP [ bitmap_init::x#2 bitmap_init::bits#3 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a +Statement [642] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 [ bitmap_init::x#2 bitmap_init::bits#3 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_init:314 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a +Statement [650] bitmap_init::$10 = bitmap_init::y#2 & 7 [ bitmap_init::y#2 bitmap_init::yoffs#2 bitmap_init::$10 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_init:314 [ bitmap_init::y#2 bitmap_init::yoffs#2 bitmap_init::$10 ] { } ) always clobbers reg byte a +Statement [657] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_init:314 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] { } ) always clobbers reg byte a +Statement [662] bitmap_clear::bitmap#0 = *bitmap_plot_xhi w= *bitmap_plot_xlo [ bitmap_clear::bitmap#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_clear:316 [ bitmap_clear::bitmap#0 ] { } ) always clobbers reg byte a +Statement [663] bitmap_clear::bitmap#5 = (byte*)bitmap_clear::bitmap#0 [ bitmap_clear::bitmap#5 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_clear:316 [ bitmap_clear::bitmap#5 ] { } ) always clobbers reg byte a +Statement [666] *bitmap_clear::bitmap#2 = 0 [ bitmap_clear::y#4 bitmap_clear::bitmap#2 bitmap_clear::x#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_clear:316 [ bitmap_clear::y#4 bitmap_clear::bitmap#2 bitmap_clear::x#2 ] { } ) always clobbers reg byte a reg byte y +Statement [674] bitmap_line::xd#2 = bitmap_line::x0#0 - bitmap_line::x1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 ] { } ) always clobbers reg byte a +Statement [676] bitmap_line::yd#2 = bitmap_line::y0#0 - bitmap_line::y1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#2 ] { } ) always clobbers reg byte a +Statement [691] bitmap_line::yd#1 = bitmap_line::y1#0 - bitmap_line::y0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#2 bitmap_line::yd#1 ] { } ) always clobbers reg byte a +Statement [705] bitmap_line::xd#1 = bitmap_line::x1#0 - bitmap_line::x0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 ] { } ) always clobbers reg byte a +Statement [707] bitmap_line::yd#10 = bitmap_line::y0#0 - bitmap_line::y1#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#10 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#10 ] { } ) always clobbers reg byte a +Statement [721] bitmap_line::yd#11 = bitmap_line::y1#0 - bitmap_line::y0#0 [ bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#11 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324 [ gfx_init_VICII_bitmap::l#2 bitmap_line::x0#0 bitmap_line::x1#0 bitmap_line::y0#0 bitmap_line::y1#0 bitmap_line::xd#1 bitmap_line::yd#11 ] { } ) always clobbers reg byte a Statement asm { .byte$32,$dd lda$ff .byte$32,$00 } always clobbers reg byte a Statement [740] gfx_init_plane_fill::$0 = gfx_init_plane_fill::plane_addr#3 << 2 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$0 ] ( gfx_init:6::gfx_init_plane_vertical2:40::gfx_init_plane_fill:418 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$0 ] { { dtvSetCpuBankSegment1::cpuBankIdx#11 = dtvSetCpuBankSegment1::cpuBankIdx#13 gfx_init_plane_fill::gfxbCpuBank#0 } } gfx_init:6::gfx_init_plane_blank:42::gfx_init_plane_fill:421 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$0 ] { { dtvSetCpuBankSegment1::cpuBankIdx#11 = dtvSetCpuBankSegment1::cpuBankIdx#13 gfx_init_plane_fill::gfxbCpuBank#0 } } gfx_init:6::gfx_init_plane_full:44::gfx_init_plane_fill:424 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$0 ] { { dtvSetCpuBankSegment1::cpuBankIdx#11 = dtvSetCpuBankSegment1::cpuBankIdx#13 gfx_init_plane_fill::gfxbCpuBank#0 } } ) always clobbers reg byte a Statement [741] gfx_init_plane_fill::$1 = > gfx_init_plane_fill::$0 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$1 ] ( gfx_init:6::gfx_init_plane_vertical2:40::gfx_init_plane_fill:418 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$1 ] { { dtvSetCpuBankSegment1::cpuBankIdx#11 = dtvSetCpuBankSegment1::cpuBankIdx#13 gfx_init_plane_fill::gfxbCpuBank#0 } } gfx_init:6::gfx_init_plane_blank:42::gfx_init_plane_fill:421 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$1 ] { { dtvSetCpuBankSegment1::cpuBankIdx#11 = dtvSetCpuBankSegment1::cpuBankIdx#13 gfx_init_plane_fill::gfxbCpuBank#0 } } gfx_init:6::gfx_init_plane_full:44::gfx_init_plane_fill:424 [ gfx_init_plane_fill::plane_addr#3 gfx_init_plane_fill::fill#6 gfx_init_plane_fill::$1 ] { { dtvSetCpuBankSegment1::cpuBankIdx#11 = dtvSetCpuBankSegment1::cpuBankIdx#13 gfx_init_plane_fill::gfxbCpuBank#0 } } ) always clobbers reg byte a @@ -13049,32 +13049,32 @@ Statement [790] keyboard_matrix_read::return#0 = ~ *((byte*)CIA1+OFFSET_STRUCT_M Statement [793] keyboard_event_pressed::$0 = keyboard_event_pressed::keycode#4 >> 3 [ keyboard_event_pressed::keycode#4 keyboard_event_pressed::$0 ] ( gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:590 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_event_pressed::keycode#4 keyboard_event_pressed::$0 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:590 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_event_pressed::keycode#4 keyboard_event_pressed::$0 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:596 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::keycode#4 keyboard_event_pressed::$0 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:596 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::keycode#4 keyboard_event_pressed::$0 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:602 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::keycode#4 keyboard_event_pressed::$0 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:602 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::keycode#4 keyboard_event_pressed::$0 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:608 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::keycode#4 keyboard_event_pressed::$0 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:608 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::keycode#4 keyboard_event_pressed::$0 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } ) always clobbers reg byte a Statement [795] keyboard_event_pressed::$1 = keyboard_event_pressed::keycode#4 & 7 [ keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] ( gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:590 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:590 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:596 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:596 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:602 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:602 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:608 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:608 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::row_bits#0 keyboard_event_pressed::$1 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } ) always clobbers reg byte a Statement [796] keyboard_event_pressed::return#10 = keyboard_event_pressed::row_bits#0 & keyboard_matrix_col_bitmask[keyboard_event_pressed::$1] [ keyboard_event_pressed::return#10 ] ( gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:590 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_event_pressed::return#10 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:590 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_event_pressed::return#10 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#0 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:596 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::return#10 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:596 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#19 keyboard_event_pressed::return#10 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#1 = keyboard_event_pressed::return#10 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:602 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::return#10 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:602 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#20 keyboard_event_pressed::return#10 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#2 } } gfx_mode:11::keyboard_event_scan:225::keyboard_event_pressed:608 [ form_cursor_count#17 form_field_idx#19 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::return#10 ] { { keyboard_events_size#25 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } form_mode:9::form_control:86::keyboard_event_scan:495::keyboard_event_pressed:608 [ form_mode::preset_current#6 form_field_idx#30 form_control::field#0 form_cursor_count#16 keyboard_events_size#100 keyboard_modifiers#21 keyboard_event_pressed::return#10 ] { { form_control::return#0 = form_control::return#2 } { keyboard_events_size#49 = keyboard_events_size#98 } { keyboard_event_pressed::return#10 = keyboard_event_pressed::return#3 } } ) always clobbers reg byte a -Statement [799] bitmap_line_ydxi::e#0 = bitmap_line_ydxi::xd#2 >> 1 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a -Statement [805] bitmap_line_ydxi::e#1 = bitmap_line_ydxi::e#3 + bitmap_line_ydxi::xd#2 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a -Statement [808] bitmap_line_ydxi::e#2 = bitmap_line_ydxi::e#1 - bitmap_line_ydxi::yd#5 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a -Statement [814] bitmap_line_xdyi::e#0 = bitmap_line_xdyi::yd#2 >> 1 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [820] bitmap_line_xdyi::e#1 = bitmap_line_xdyi::e#3 + bitmap_line_xdyi::yd#2 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [823] bitmap_line_xdyi::e#2 = bitmap_line_xdyi::e#1 - bitmap_line_xdyi::xd#5 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [829] bitmap_line_ydxd::e#0 = bitmap_line_ydxd::xd#2 >> 1 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a -Statement [835] bitmap_line_ydxd::e#1 = bitmap_line_ydxd::e#3 + bitmap_line_ydxd::xd#2 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a -Statement [838] bitmap_line_ydxd::e#2 = bitmap_line_ydxd::e#1 - bitmap_line_ydxd::yd#5 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a -Statement [844] bitmap_line_xdyd::e#0 = bitmap_line_xdyd::yd#2 >> 1 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [850] bitmap_line_xdyd::e#1 = bitmap_line_xdyd::e#3 + bitmap_line_xdyd::yd#2 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [853] bitmap_line_xdyd::e#2 = bitmap_line_xdyd::e#1 - bitmap_line_xdyd::xd#5 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a -Statement [859] bitmap_plot::plotter_x#0 = bitmap_plot_xhi[bitmap_plot::x#4] w= bitmap_plot_xlo[bitmap_plot::x#4] [ bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a -Statement [860] bitmap_plot::plotter_y#0 = bitmap_plot_yhi[bitmap_plot::y#4] w= bitmap_plot_ylo[bitmap_plot::y#4] [ bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a -Statement [861] bitmap_plot::plotter#0 = bitmap_plot::plotter_x#0 + bitmap_plot::plotter_y#0 [ bitmap_plot::x#4 bitmap_plot::plotter#0 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a -Statement [862] bitmap_plot::$1 = *((byte*)bitmap_plot::plotter#0) | bitmap_plot_bit[bitmap_plot::x#4] [ bitmap_plot::plotter#0 bitmap_plot::$1 ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a reg byte y -Statement [863] *((byte*)bitmap_plot::plotter#0) = bitmap_plot::$1 [ ] ( gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_vic_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_vic_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_vic_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte y +Statement [799] bitmap_line_ydxi::e#0 = bitmap_line_ydxi::xd#2 >> 1 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::x#5 bitmap_line_ydxi::y#6 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::e#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a +Statement [805] bitmap_line_ydxi::e#1 = bitmap_line_ydxi::e#3 + bitmap_line_ydxi::xd#2 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#2 bitmap_line_ydxi::e#1 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a +Statement [808] bitmap_line_ydxi::e#2 = bitmap_line_ydxi::e#1 - bitmap_line_ydxi::yd#5 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y#2 bitmap_line_ydxi::x#2 bitmap_line_ydxi::e#2 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } } ) always clobbers reg byte a +Statement [814] bitmap_line_xdyi::e#0 = bitmap_line_xdyi::yd#2 >> 1 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::x#6 bitmap_line_xdyi::y#5 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::e#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [820] bitmap_line_xdyi::e#1 = bitmap_line_xdyi::e#3 + bitmap_line_xdyi::yd#2 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::y#3 bitmap_line_xdyi::x#2 bitmap_line_xdyi::e#1 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [823] bitmap_line_xdyi::e#2 = bitmap_line_xdyi::e#1 - bitmap_line_xdyi::xd#5 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#2 bitmap_line_xdyi::y#2 bitmap_line_xdyi::e#2 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [829] bitmap_line_ydxd::e#0 = bitmap_line_ydxd::xd#2 >> 1 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::x#5 bitmap_line_ydxd::y#7 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::e#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a +Statement [835] bitmap_line_ydxd::e#1 = bitmap_line_ydxd::e#3 + bitmap_line_ydxd::xd#2 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#3 bitmap_line_ydxd::e#1 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a +Statement [838] bitmap_line_ydxd::e#2 = bitmap_line_ydxd::e#1 - bitmap_line_ydxd::yd#5 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y#3 bitmap_line_ydxd::x#2 bitmap_line_ydxd::e#2 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } } ) always clobbers reg byte a +Statement [844] bitmap_line_xdyd::e#0 = bitmap_line_xdyd::yd#2 >> 1 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::x#6 bitmap_line_xdyd::y#5 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::e#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [850] bitmap_line_xdyd::e#1 = bitmap_line_xdyd::e#3 + bitmap_line_xdyd::yd#2 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::y#3 bitmap_line_xdyd::x#2 bitmap_line_xdyd::e#1 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [853] bitmap_line_xdyd::e#2 = bitmap_line_xdyd::e#1 - bitmap_line_xdyd::xd#5 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#2 bitmap_line_xdyd::y#2 bitmap_line_xdyd::e#2 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } } ) always clobbers reg byte a +Statement [859] bitmap_plot::plotter_x#0 = bitmap_plot_xhi[bitmap_plot::x#4] w= bitmap_plot_xlo[bitmap_plot::x#4] [ bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::y#4 bitmap_plot::plotter_x#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a +Statement [860] bitmap_plot::plotter_y#0 = bitmap_plot_yhi[bitmap_plot::y#4] w= bitmap_plot_ylo[bitmap_plot::y#4] [ bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter_x#0 bitmap_plot::plotter_y#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a +Statement [861] bitmap_plot::plotter#0 = bitmap_plot::plotter_x#0 + bitmap_plot::plotter_y#0 [ bitmap_plot::x#4 bitmap_plot::plotter#0 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::x#4 bitmap_plot::plotter#0 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a +Statement [862] bitmap_plot::$1 = *((byte*)bitmap_plot::plotter#0) | bitmap_plot_bit[bitmap_plot::x#4] [ bitmap_plot::plotter#0 bitmap_plot::$1 ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 bitmap_plot::plotter#0 bitmap_plot::$1 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte a reg byte y +Statement [863] *((byte*)bitmap_plot::plotter#0) = bitmap_plot::$1 [ ] ( gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:683::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxi:728::bitmap_plot:803 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:690::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyi:734::bitmap_plot:818 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:698::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_ydxd:714::bitmap_plot:833 [ gfx_init_VICII_bitmap::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:704::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } gfx_init:6::gfx_init_VICII_bitmap:28::bitmap_line:324::bitmap_line_xdyd:720::bitmap_plot:848 [ gfx_init_VICII_bitmap::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte y Potential registers zp[1]:2 [ form_mode::i#2 form_mode::i#1 ] : zp[1]:2 , reg byte x , reg byte y , Potential registers zp[1]:3 [ form_cursor_count#23 form_cursor_count#1 form_cursor_count#17 form_cursor_count#16 form_cursor_count#4 ] : zp[1]:3 , reg byte x , Potential registers zp[1]:4 [ form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] : zp[1]:4 , reg byte x , Potential registers zp[1]:5 [ form_mode::preset_current#6 form_mode::preset_current#0 form_mode::preset_current#1 ] : zp[1]:5 , reg byte x , Potential registers zp[1]:6 [ gfx_mode::dtv_control#12 gfx_mode::dtv_control#6 gfx_mode::dtv_control#13 gfx_mode::dtv_control#5 gfx_mode::dtv_control#11 gfx_mode::dtv_control#4 gfx_mode::dtv_control#10 gfx_mode::dtv_control#3 gfx_mode::dtv_control#15 gfx_mode::dtv_control#14 gfx_mode::dtv_control#2 ] : zp[1]:6 , reg byte x , reg byte y , -Potential registers zp[1]:7 [ gfx_mode::vic_control#4 gfx_mode::vic_control#2 gfx_mode::vic_control#5 ] : zp[1]:7 , reg byte x , reg byte y , -Potential registers zp[1]:8 [ gfx_mode::vic_control2#2 ] : zp[1]:8 , reg byte a , reg byte x , reg byte y , +Potential registers zp[1]:7 [ gfx_mode::VICII_control#4 gfx_mode::VICII_control#2 gfx_mode::VICII_control#5 ] : zp[1]:7 , reg byte x , reg byte y , +Potential registers zp[1]:8 [ gfx_mode::VICII_control2#2 ] : zp[1]:8 , reg byte a , reg byte x , reg byte y , Potential registers zp[1]:9 [ gfx_mode::cy#4 gfx_mode::cy#1 ] : zp[1]:9 , reg byte x , -Potential registers zp[2]:10 [ gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 ] : zp[2]:10 , +Potential registers zp[2]:10 [ gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 ] : zp[2]:10 , Potential registers zp[2]:12 [ gfx_mode::col#2 gfx_mode::col#3 gfx_mode::col#1 ] : zp[2]:12 , Potential registers zp[1]:14 [ gfx_mode::cx#2 gfx_mode::cx#1 ] : zp[1]:14 , reg byte x , Potential registers zp[1]:15 [ gfx_mode::j#2 gfx_mode::j#1 ] : zp[1]:15 , reg byte a , reg byte x , reg byte y , @@ -13098,7 +13098,7 @@ Potential registers zp[1]:37 [ gfx_init_charset::c#4 gfx_init_charset::c#1 ] : z Potential registers zp[2]:38 [ gfx_init_charset::chargen#2 gfx_init_charset::chargen#3 gfx_init_charset::chargen#1 ] : zp[2]:38 , Potential registers zp[2]:40 [ gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 ] : zp[2]:40 , Potential registers zp[1]:42 [ gfx_init_charset::l#2 gfx_init_charset::l#1 ] : zp[1]:42 , reg byte x , -Potential registers zp[1]:43 [ gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 ] : zp[1]:43 , reg byte x , +Potential registers zp[1]:43 [ gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 ] : zp[1]:43 , reg byte x , Potential registers zp[1]:44 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 ] : zp[1]:44 , reg byte x , Potential registers zp[2]:45 [ gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 ] : zp[2]:45 , Potential registers zp[1]:47 [ gfx_init_plane_8bppchunky::gfxbCpuBank#4 gfx_init_plane_8bppchunky::gfxbCpuBank#7 gfx_init_plane_8bppchunky::gfxbCpuBank#8 gfx_init_plane_8bppchunky::gfxbCpuBank#2 ] : zp[1]:47 , reg byte x , @@ -13133,9 +13133,9 @@ Potential registers zp[2]:86 [ apply_preset::preset#15 ] : zp[2]:86 , Potential registers zp[1]:88 [ apply_preset::i#2 apply_preset::i#1 ] : zp[1]:88 , reg byte x , reg byte y , Potential registers zp[1]:89 [ get_plane::idx#10 get_plane::idx#1 get_plane::idx#0 ] : zp[1]:89 , reg byte a , reg byte x , reg byte y , Potential registers zp[4]:90 [ get_plane::return#14 ] : zp[4]:90 , -Potential registers zp[1]:94 [ get_vic_screen::idx#2 get_vic_screen::idx#0 get_vic_screen::idx#1 ] : zp[1]:94 , reg byte a , reg byte x , reg byte y , -Potential registers zp[2]:95 [ get_vic_screen::return#5 ] : zp[2]:95 , -Potential registers zp[2]:97 [ get_vic_charset::return#2 ] : zp[2]:97 , +Potential registers zp[1]:94 [ get_VICII_screen::idx#2 get_VICII_screen::idx#0 get_VICII_screen::idx#1 ] : zp[1]:94 , reg byte a , reg byte x , reg byte y , +Potential registers zp[2]:95 [ get_VICII_screen::return#5 ] : zp[2]:95 , +Potential registers zp[2]:97 [ get_VICII_charset::return#2 ] : zp[2]:97 , Potential registers zp[1]:99 [ keyboard_event_scan::row#2 keyboard_event_scan::row#1 ] : zp[1]:99 , reg byte x , reg byte y , Potential registers zp[1]:100 [ keyboard_modifiers#22 keyboard_modifiers#21 keyboard_modifiers#20 keyboard_modifiers#19 keyboard_modifiers#2 keyboard_modifiers#3 keyboard_modifiers#4 ] : zp[1]:100 , reg byte x , Potential registers zp[1]:101 [ keyboard_event_scan::col#2 keyboard_event_scan::col#1 ] : zp[1]:101 , reg byte x , reg byte y , @@ -13220,19 +13220,19 @@ Potential registers zp[1]:213 [ gfx_mode::$42 ] : zp[1]:213 , reg byte a , reg b Potential registers zp[1]:214 [ gfx_mode::$43 ] : zp[1]:214 , reg byte a , reg byte x , reg byte y , Potential registers zp[1]:215 [ gfx_mode::$44 ] : zp[1]:215 , reg byte a , reg byte x , reg byte y , Potential registers zp[1]:216 [ gfx_mode::$45 ] : zp[1]:216 , reg byte a , reg byte x , reg byte y , -Potential registers zp[2]:217 [ get_vic_screen::return#10 ] : zp[2]:217 , +Potential registers zp[2]:217 [ get_VICII_screen::return#10 ] : zp[2]:217 , Potential registers zp[2]:219 [ gfx_mode::$82 ] : zp[2]:219 , Potential registers zp[2]:221 [ gfx_mode::$47 ] : zp[2]:221 , Potential registers zp[2]:223 [ gfx_mode::$48 ] : zp[2]:223 , -Potential registers zp[1]:225 [ get_vic_charset::idx#0 ] : zp[1]:225 , reg byte a , reg byte x , reg byte y , -Potential registers zp[2]:226 [ get_vic_charset::return#4 ] : zp[2]:226 , +Potential registers zp[1]:225 [ get_VICII_charset::idx#0 ] : zp[1]:225 , reg byte a , reg byte x , reg byte y , +Potential registers zp[2]:226 [ get_VICII_charset::return#4 ] : zp[2]:226 , Potential registers zp[2]:228 [ gfx_mode::$83 ] : zp[2]:228 , Potential registers zp[2]:230 [ gfx_mode::$50 ] : zp[2]:230 , Potential registers zp[1]:232 [ gfx_mode::$51 ] : zp[1]:232 , reg byte a , reg byte x , reg byte y , Potential registers zp[1]:233 [ gfx_mode::$52 ] : zp[1]:233 , reg byte x , reg byte y , Potential registers zp[1]:234 [ gfx_mode::$84 ] : zp[1]:234 , reg byte a , reg byte x , reg byte y , Potential registers zp[1]:235 [ gfx_mode::$53 ] : zp[1]:235 , reg byte a , reg byte x , reg byte y , -Potential registers zp[2]:236 [ get_vic_screen::return#11 ] : zp[2]:236 , +Potential registers zp[2]:236 [ get_VICII_screen::return#11 ] : zp[2]:236 , Potential registers zp[1]:238 [ gfx_mode::$55 ] : zp[1]:238 , reg byte a , reg byte x , reg byte y , Potential registers zp[1]:239 [ gfx_mode::$56 ] : zp[1]:239 , reg byte a , reg byte x , reg byte y , Potential registers zp[1]:240 [ gfx_mode::$57 ] : zp[1]:240 , reg byte a , reg byte x , reg byte y , @@ -13355,7 +13355,7 @@ Uplift Scope [memset] 3,356,672.33: zp[2]:124 [ memset::dst#2 memset::dst#4 mems Uplift Scope [print_str_lines] 1,934,338.17: zp[2]:74 [ print_str_lines::str#4 print_str_lines::str#3 print_str_lines::str#5 print_str_lines::str#0 ] 666,667.33: zp[1]:276 [ print_str_lines::ch#0 ] Uplift Scope [gfx_init_plane_charset8] 400,004: zp[1]:59 [ gfx_init_plane_charset8::c#2 gfx_init_plane_charset8::c#3 ] 200,002: zp[1]:270 [ gfx_init_plane_charset8::$2 ] 172,223.94: zp[1]:58 [ gfx_init_plane_charset8::cp#2 gfx_init_plane_charset8::cp#1 ] 104,287.79: zp[1]:54 [ gfx_init_plane_charset8::bits#2 gfx_init_plane_charset8::bits#0 gfx_init_plane_charset8::bits#1 ] 84,115.22: zp[2]:55 [ gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 ] 77,896.93: zp[1]:57 [ gfx_init_plane_charset8::col#2 gfx_init_plane_charset8::col#5 gfx_init_plane_charset8::col#6 gfx_init_plane_charset8::col#1 ] 18,816.69: zp[2]:51 [ gfx_init_plane_charset8::chargen#2 gfx_init_plane_charset8::chargen#3 gfx_init_plane_charset8::chargen#1 ] 16,430.21: zp[1]:53 [ gfx_init_plane_charset8::cr#6 gfx_init_plane_charset8::cr#1 ] 1,619.26: zp[1]:50 [ gfx_init_plane_charset8::ch#8 gfx_init_plane_charset8::ch#1 ] Uplift Scope [form_set_screen] 216,668.83: zp[1]:80 [ form_set_screen::y#2 form_set_screen::y#1 ] 200,002: zp[1]:278 [ form_set_screen::$0 ] 200,002: zp[1]:279 [ form_set_screen::$1 ] 146,668.13: zp[2]:78 [ form_set_screen::line#2 form_set_screen::line#1 ] -Uplift Scope [gfx_mode] 210,004.5: zp[2]:12 [ gfx_mode::col#2 gfx_mode::col#3 gfx_mode::col#1 ] 200,002: zp[1]:14 [ gfx_mode::cx#2 gfx_mode::cx#1 ] 165,640.27: zp[2]:10 [ gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 ] 35,003.5: zp[1]:15 [ gfx_mode::j#2 gfx_mode::j#1 ] 35,003.5: zp[1]:16 [ gfx_mode::i#2 gfx_mode::i#1 ] 20,002: zp[1]:247 [ gfx_mode::keyboard_event#0 ] 17,858.93: zp[1]:9 [ gfx_mode::cy#4 gfx_mode::cy#1 ] 2,222: zp[1]:6 [ gfx_mode::dtv_control#12 gfx_mode::dtv_control#6 gfx_mode::dtv_control#13 gfx_mode::dtv_control#5 gfx_mode::dtv_control#11 gfx_mode::dtv_control#4 gfx_mode::dtv_control#10 gfx_mode::dtv_control#3 gfx_mode::dtv_control#15 gfx_mode::dtv_control#14 gfx_mode::dtv_control#2 ] 606: zp[1]:7 [ gfx_mode::vic_control#4 gfx_mode::vic_control#2 gfx_mode::vic_control#5 ] 202: zp[1]:163 [ gfx_mode::$18 ] 202: zp[4]:169 [ gfx_mode::$20 ] 202: zp[2]:177 [ gfx_mode::$22 ] 202: zp[1]:179 [ gfx_mode::$23 ] 202: zp[2]:180 [ gfx_mode::$24 ] 202: zp[1]:182 [ gfx_mode::$25 ] 202: zp[2]:183 [ gfx_mode::$26 ] 202: zp[1]:185 [ gfx_mode::$27 ] 202: zp[1]:186 [ gfx_mode::$28 ] 202: zp[1]:187 [ gfx_mode::$29 ] 202: zp[1]:188 [ gfx_mode::$30 ] 202: zp[1]:189 [ gfx_mode::$31 ] 202: zp[1]:190 [ gfx_mode::$32 ] 202: zp[4]:196 [ gfx_mode::$34 ] 202: zp[2]:204 [ gfx_mode::$36 ] 202: zp[1]:206 [ gfx_mode::$37 ] 202: zp[2]:207 [ gfx_mode::$38 ] 202: zp[1]:209 [ gfx_mode::$39 ] 202: zp[2]:210 [ gfx_mode::$40 ] 202: zp[1]:212 [ gfx_mode::$41 ] 202: zp[1]:213 [ gfx_mode::$42 ] 202: zp[1]:214 [ gfx_mode::$43 ] 202: zp[1]:215 [ gfx_mode::$44 ] 202: zp[1]:216 [ gfx_mode::$45 ] 202: zp[2]:221 [ gfx_mode::$47 ] 202: zp[2]:230 [ gfx_mode::$50 ] 202: zp[1]:232 [ gfx_mode::$51 ] 202: zp[1]:234 [ gfx_mode::$84 ] 202: zp[1]:235 [ gfx_mode::$53 ] 202: zp[1]:238 [ gfx_mode::$55 ] 202: zp[1]:239 [ gfx_mode::$56 ] 202: zp[1]:240 [ gfx_mode::$57 ] 202: zp[1]:241 [ gfx_mode::$58 ] 202: zp[1]:242 [ gfx_mode::$59 ] 202: zp[1]:243 [ gfx_mode::$60 ] 202: zp[1]:244 [ gfx_mode::$61 ] 202: zp[1]:245 [ gfx_mode::$62 ] 101: zp[1]:8 [ gfx_mode::vic_control2#2 ] 101: zp[2]:219 [ gfx_mode::$82 ] 101: zp[2]:228 [ gfx_mode::$83 ] 101: zp[1]:233 [ gfx_mode::$52 ] 57.71: zp[4]:173 [ gfx_mode::plane_a#0 ] 57.71: zp[4]:200 [ gfx_mode::plane_b#0 ] 40.4: zp[1]:164 [ gfx_mode::plane_a_offs#0 ] 40.4: zp[1]:191 [ gfx_mode::plane_b_offs#0 ] 12.62: zp[2]:223 [ gfx_mode::$48 ] +Uplift Scope [gfx_mode] 210,004.5: zp[2]:12 [ gfx_mode::col#2 gfx_mode::col#3 gfx_mode::col#1 ] 200,002: zp[1]:14 [ gfx_mode::cx#2 gfx_mode::cx#1 ] 165,640.27: zp[2]:10 [ gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 ] 35,003.5: zp[1]:15 [ gfx_mode::j#2 gfx_mode::j#1 ] 35,003.5: zp[1]:16 [ gfx_mode::i#2 gfx_mode::i#1 ] 20,002: zp[1]:247 [ gfx_mode::keyboard_event#0 ] 17,858.93: zp[1]:9 [ gfx_mode::cy#4 gfx_mode::cy#1 ] 2,222: zp[1]:6 [ gfx_mode::dtv_control#12 gfx_mode::dtv_control#6 gfx_mode::dtv_control#13 gfx_mode::dtv_control#5 gfx_mode::dtv_control#11 gfx_mode::dtv_control#4 gfx_mode::dtv_control#10 gfx_mode::dtv_control#3 gfx_mode::dtv_control#15 gfx_mode::dtv_control#14 gfx_mode::dtv_control#2 ] 606: zp[1]:7 [ gfx_mode::VICII_control#4 gfx_mode::VICII_control#2 gfx_mode::VICII_control#5 ] 202: zp[1]:163 [ gfx_mode::$18 ] 202: zp[4]:169 [ gfx_mode::$20 ] 202: zp[2]:177 [ gfx_mode::$22 ] 202: zp[1]:179 [ gfx_mode::$23 ] 202: zp[2]:180 [ gfx_mode::$24 ] 202: zp[1]:182 [ gfx_mode::$25 ] 202: zp[2]:183 [ gfx_mode::$26 ] 202: zp[1]:185 [ gfx_mode::$27 ] 202: zp[1]:186 [ gfx_mode::$28 ] 202: zp[1]:187 [ gfx_mode::$29 ] 202: zp[1]:188 [ gfx_mode::$30 ] 202: zp[1]:189 [ gfx_mode::$31 ] 202: zp[1]:190 [ gfx_mode::$32 ] 202: zp[4]:196 [ gfx_mode::$34 ] 202: zp[2]:204 [ gfx_mode::$36 ] 202: zp[1]:206 [ gfx_mode::$37 ] 202: zp[2]:207 [ gfx_mode::$38 ] 202: zp[1]:209 [ gfx_mode::$39 ] 202: zp[2]:210 [ gfx_mode::$40 ] 202: zp[1]:212 [ gfx_mode::$41 ] 202: zp[1]:213 [ gfx_mode::$42 ] 202: zp[1]:214 [ gfx_mode::$43 ] 202: zp[1]:215 [ gfx_mode::$44 ] 202: zp[1]:216 [ gfx_mode::$45 ] 202: zp[2]:221 [ gfx_mode::$47 ] 202: zp[2]:230 [ gfx_mode::$50 ] 202: zp[1]:232 [ gfx_mode::$51 ] 202: zp[1]:234 [ gfx_mode::$84 ] 202: zp[1]:235 [ gfx_mode::$53 ] 202: zp[1]:238 [ gfx_mode::$55 ] 202: zp[1]:239 [ gfx_mode::$56 ] 202: zp[1]:240 [ gfx_mode::$57 ] 202: zp[1]:241 [ gfx_mode::$58 ] 202: zp[1]:242 [ gfx_mode::$59 ] 202: zp[1]:243 [ gfx_mode::$60 ] 202: zp[1]:244 [ gfx_mode::$61 ] 202: zp[1]:245 [ gfx_mode::$62 ] 101: zp[1]:8 [ gfx_mode::VICII_control2#2 ] 101: zp[2]:219 [ gfx_mode::$82 ] 101: zp[2]:228 [ gfx_mode::$83 ] 101: zp[1]:233 [ gfx_mode::$52 ] 57.71: zp[4]:173 [ gfx_mode::plane_a#0 ] 57.71: zp[4]:200 [ gfx_mode::plane_b#0 ] 40.4: zp[1]:164 [ gfx_mode::plane_a_offs#0 ] 40.4: zp[1]:191 [ gfx_mode::plane_b_offs#0 ] 12.62: zp[2]:223 [ gfx_mode::$48 ] Uplift Scope [gfx_init_plane_fill] 220,007.6: zp[2]:121 [ gfx_init_plane_fill::gfxb#2 gfx_init_plane_fill::gfxb#3 gfx_init_plane_fill::gfxb#1 gfx_init_plane_fill::gfxb#6 ] 216,668.83: zp[1]:123 [ gfx_init_plane_fill::bx#2 gfx_init_plane_fill::bx#1 ] 18,335.17: zp[1]:120 [ gfx_init_plane_fill::by#4 gfx_init_plane_fill::by#1 ] 5,555.61: zp[1]:119 [ gfx_init_plane_fill::fill#6 ] 2,002: zp[4]:319 [ gfx_init_plane_fill::$0 ] 2,002: zp[2]:323 [ gfx_init_plane_fill::$1 ] 2,002: zp[1]:325 [ gfx_init_plane_fill::gfxbCpuBank#0 ] 2,002: zp[2]:326 [ gfx_init_plane_fill::$4 ] 2,002: zp[2]:328 [ gfx_init_plane_fill::$5 ] 1,001: zp[2]:330 [ gfx_init_plane_fill::gfxb#0 ] 333.67: zp[4]:115 [ gfx_init_plane_fill::plane_addr#3 ] Uplift Scope [bitmap_clear] 220,007.6: zp[2]:111 [ bitmap_clear::bitmap#2 bitmap_clear::bitmap#3 bitmap_clear::bitmap#5 bitmap_clear::bitmap#1 ] 216,668.83: zp[1]:113 [ bitmap_clear::x#2 bitmap_clear::x#1 ] 18,335.17: zp[1]:110 [ bitmap_clear::y#4 bitmap_clear::y#1 ] 1,001: zp[2]:311 [ bitmap_clear::bitmap#0 ] Uplift Scope [form_mode] 200,002: zp[1]:161 [ form_mode::$11 ] 43,965.62: zp[1]:5 [ form_mode::preset_current#6 form_mode::preset_current#0 form_mode::preset_current#1 ] 35,003.5: zp[1]:2 [ form_mode::i#2 form_mode::i#1 ] @@ -13373,10 +13373,10 @@ Uplift Scope [gfx_init_charset] 21,004.5: zp[2]:40 [ gfx_init_charset::charset#2 Uplift Scope [gfx_init_screen4] 21,704.6: zp[2]:34 [ gfx_init_screen4::ch#2 gfx_init_screen4::ch#3 gfx_init_screen4::ch#1 ] 21,668.83: zp[1]:36 [ gfx_init_screen4::cx#2 gfx_init_screen4::cx#1 ] 1,835.17: zp[1]:33 [ gfx_init_screen4::cy#4 gfx_init_screen4::cy#1 ] Uplift Scope [gfx_init_plane_vertical] 21,704.6: zp[2]:65 [ gfx_init_plane_vertical::gfxb#2 gfx_init_plane_vertical::gfxb#3 gfx_init_plane_vertical::gfxb#1 ] 21,668.83: zp[1]:67 [ gfx_init_plane_vertical::bx#2 gfx_init_plane_vertical::bx#1 ] 1,835.17: zp[1]:64 [ gfx_init_plane_vertical::by#4 gfx_init_plane_vertical::by#1 ] Uplift Scope [bitmap_line] 6,050.65: zp[1]:266 [ bitmap_line::y1#0 ] 5,762.52: zp[1]:265 [ bitmap_line::y0#0 ] 4,444.89: zp[1]:314 [ bitmap_line::yd#2 ] 4,444.89: zp[1]:315 [ bitmap_line::yd#1 ] 4,444.89: zp[1]:317 [ bitmap_line::yd#10 ] 4,444.89: zp[1]:318 [ bitmap_line::yd#11 ] 4,136.82: zp[1]:264 [ bitmap_line::x1#0 ] 3,956.96: zp[1]:263 [ bitmap_line::x0#0 ] 3,500.35: zp[1]:313 [ bitmap_line::xd#2 ] 3,500.35: zp[1]:316 [ bitmap_line::xd#1 ] -Uplift Scope [gfx_init_vic_bitmap] 3,003: zp[1]:43 [ gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 ] -Uplift Scope [get_vic_screen] 1,445.4: zp[1]:94 [ get_vic_screen::idx#2 get_vic_screen::idx#0 get_vic_screen::idx#1 ] 202: zp[2]:217 [ get_vic_screen::return#10 ] 202: zp[2]:236 [ get_vic_screen::return#11 ] 50.5: zp[2]:95 [ get_vic_screen::return#5 ] +Uplift Scope [gfx_init_VICII_bitmap] 3,003: zp[1]:43 [ gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 ] +Uplift Scope [get_VICII_screen] 1,445.4: zp[1]:94 [ get_VICII_screen::idx#2 get_VICII_screen::idx#0 get_VICII_screen::idx#1 ] 202: zp[2]:217 [ get_VICII_screen::return#10 ] 202: zp[2]:236 [ get_VICII_screen::return#11 ] 50.5: zp[2]:95 [ get_VICII_screen::return#5 ] Uplift Scope [get_plane] 1,419.43: zp[1]:89 [ get_plane::idx#10 get_plane::idx#1 get_plane::idx#0 ] 202: zp[4]:165 [ get_plane::return#16 ] 202: zp[4]:192 [ get_plane::return#17 ] 50.5: zp[4]:90 [ get_plane::return#14 ] -Uplift Scope [get_vic_charset] 1,051.5: zp[1]:225 [ get_vic_charset::idx#0 ] 202: zp[2]:226 [ get_vic_charset::return#4 ] 33.67: zp[2]:97 [ get_vic_charset::return#2 ] +Uplift Scope [get_VICII_charset] 1,051.5: zp[1]:225 [ get_VICII_charset::idx#0 ] 202: zp[2]:226 [ get_VICII_charset::return#4 ] 33.67: zp[2]:97 [ get_VICII_charset::return#2 ] Uplift Scope [print_set_screen] 1,001: zp[2]:72 [ print_set_screen::screen#2 ] Uplift Scope [MOS6526_CIA] Uplift Scope [MOS6569_VICII] @@ -13454,10 +13454,10 @@ Uplifting [gfx_init_screen4] best 15321767 combination zp[2]:34 [ gfx_init_scree Uplifting [gfx_init_plane_vertical] best 15320867 combination zp[2]:65 [ gfx_init_plane_vertical::gfxb#2 gfx_init_plane_vertical::gfxb#3 gfx_init_plane_vertical::gfxb#1 ] reg byte x [ gfx_init_plane_vertical::bx#2 gfx_init_plane_vertical::bx#1 ] zp[1]:64 [ gfx_init_plane_vertical::by#4 gfx_init_plane_vertical::by#1 ] Uplifting [bitmap_line] best 15320813 combination zp[1]:266 [ bitmap_line::y1#0 ] reg byte x [ bitmap_line::y0#0 ] zp[1]:314 [ bitmap_line::yd#2 ] zp[1]:315 [ bitmap_line::yd#1 ] zp[1]:317 [ bitmap_line::yd#10 ] zp[1]:318 [ bitmap_line::yd#11 ] zp[1]:264 [ bitmap_line::x1#0 ] zp[1]:263 [ bitmap_line::x0#0 ] zp[1]:313 [ bitmap_line::xd#2 ] zp[1]:316 [ bitmap_line::xd#1 ] Limited combination testing to 10 combinations of 186624 possible. -Uplifting [gfx_init_vic_bitmap] best 15320813 combination zp[1]:43 [ gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 ] -Uplifting [get_vic_screen] best 15320792 combination reg byte a [ get_vic_screen::idx#2 get_vic_screen::idx#0 get_vic_screen::idx#1 ] zp[2]:217 [ get_vic_screen::return#10 ] zp[2]:236 [ get_vic_screen::return#11 ] zp[2]:95 [ get_vic_screen::return#5 ] +Uplifting [gfx_init_VICII_bitmap] best 15320813 combination zp[1]:43 [ gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 ] +Uplifting [get_VICII_screen] best 15320792 combination reg byte a [ get_VICII_screen::idx#2 get_VICII_screen::idx#0 get_VICII_screen::idx#1 ] zp[2]:217 [ get_VICII_screen::return#10 ] zp[2]:236 [ get_VICII_screen::return#11 ] zp[2]:95 [ get_VICII_screen::return#5 ] Uplifting [get_plane] best 15320744 combination reg byte a [ get_plane::idx#10 get_plane::idx#1 get_plane::idx#0 ] zp[4]:165 [ get_plane::return#16 ] zp[4]:192 [ get_plane::return#17 ] zp[4]:90 [ get_plane::return#14 ] -Uplifting [get_vic_charset] best 15320735 combination reg byte a [ get_vic_charset::idx#0 ] zp[2]:226 [ get_vic_charset::return#4 ] zp[2]:97 [ get_vic_charset::return#2 ] +Uplifting [get_VICII_charset] best 15320735 combination reg byte a [ get_VICII_charset::idx#0 ] zp[2]:226 [ get_VICII_charset::return#4 ] zp[2]:97 [ get_VICII_charset::return#2 ] Uplifting [print_set_screen] best 15320735 combination zp[2]:72 [ print_set_screen::screen#2 ] Uplifting [MOS6526_CIA] best 15320735 combination Uplifting [MOS6569_VICII] best 15320735 combination @@ -13657,8 +13657,8 @@ Attempting to uplift remaining variables inzp[1]:313 [ bitmap_line::xd#2 ] Uplifting [bitmap_line] best 12523391 combination zp[1]:313 [ bitmap_line::xd#2 ] Attempting to uplift remaining variables inzp[1]:316 [ bitmap_line::xd#1 ] Uplifting [bitmap_line] best 12523391 combination zp[1]:316 [ bitmap_line::xd#1 ] -Attempting to uplift remaining variables inzp[1]:43 [ gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 ] -Uplifting [gfx_init_vic_bitmap] best 12523391 combination zp[1]:43 [ gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 ] +Attempting to uplift remaining variables inzp[1]:43 [ gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 ] +Uplifting [gfx_init_VICII_bitmap] best 12523391 combination zp[1]:43 [ gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 ] Attempting to uplift remaining variables inzp[1]:21 [ gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 ] Uplifting [gfx_init_screen1] best 12523391 combination zp[1]:21 [ gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 ] Attempting to uplift remaining variables inzp[1]:68 [ gfx_init_plane_horisontal2::ay#4 gfx_init_plane_horisontal2::ay#1 ] @@ -13683,8 +13683,8 @@ Attempting to uplift remaining variables inzp[1]:37 [ gfx_init_charset::c#4 gfx_ Uplifting [gfx_init_charset] best 12523372 combination zp[1]:37 [ gfx_init_charset::c#4 gfx_init_charset::c#1 ] Attempting to uplift remaining variables inzp[1]:50 [ gfx_init_plane_charset8::ch#8 gfx_init_plane_charset8::ch#1 ] Uplifting [gfx_init_plane_charset8] best 12523372 combination zp[1]:50 [ gfx_init_plane_charset8::ch#8 gfx_init_plane_charset8::ch#1 ] -Attempting to uplift remaining variables inzp[1]:7 [ gfx_mode::vic_control#4 gfx_mode::vic_control#2 gfx_mode::vic_control#5 ] -Uplifting [gfx_mode] best 12523361 combination reg byte x [ gfx_mode::vic_control#4 gfx_mode::vic_control#2 gfx_mode::vic_control#5 ] +Attempting to uplift remaining variables inzp[1]:7 [ gfx_mode::VICII_control#4 gfx_mode::VICII_control#2 gfx_mode::VICII_control#5 ] +Uplifting [gfx_mode] best 12523361 combination reg byte x [ gfx_mode::VICII_control#4 gfx_mode::VICII_control#2 gfx_mode::VICII_control#5 ] Attempting to uplift remaining variables inzp[1]:163 [ gfx_mode::$18 ] Uplifting [gfx_mode] best 12523355 combination reg byte a [ gfx_mode::$18 ] Attempting to uplift remaining variables inzp[1]:179 [ gfx_mode::$23 ] @@ -13739,21 +13739,21 @@ Attempting to uplift remaining variables inzp[1]:244 [ gfx_mode::$61 ] Uplifting [gfx_mode] best 12523205 combination reg byte a [ gfx_mode::$61 ] Attempting to uplift remaining variables inzp[1]:245 [ gfx_mode::$62 ] Uplifting [gfx_mode] best 12523199 combination reg byte a [ gfx_mode::$62 ] -Attempting to uplift remaining variables inzp[1]:8 [ gfx_mode::vic_control2#2 ] -Uplifting [gfx_mode] best 12523190 combination reg byte a [ gfx_mode::vic_control2#2 ] +Attempting to uplift remaining variables inzp[1]:8 [ gfx_mode::VICII_control2#2 ] +Uplifting [gfx_mode] best 12523190 combination reg byte a [ gfx_mode::VICII_control2#2 ] Attempting to uplift remaining variables inzp[1]:233 [ gfx_mode::$52 ] Uplifting [gfx_mode] best 12523190 combination zp[1]:233 [ gfx_mode::$52 ] Attempting to uplift remaining variables inzp[1]:164 [ gfx_mode::plane_a_offs#0 ] Uplifting [gfx_mode] best 12523188 combination reg byte x [ gfx_mode::plane_a_offs#0 ] Attempting to uplift remaining variables inzp[1]:191 [ gfx_mode::plane_b_offs#0 ] Uplifting [gfx_mode] best 12523186 combination reg byte x [ gfx_mode::plane_b_offs#0 ] -Coalescing zero page register [ zp[2]:10 [ gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 ] ] with [ zp[2]:236 [ get_vic_screen::return#11 ] ] - score: 1 +Coalescing zero page register [ zp[2]:10 [ gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 ] ] with [ zp[2]:236 [ get_VICII_screen::return#11 ] ] - score: 1 Coalescing zero page register [ zp[2]:72 [ print_set_screen::screen#2 ] ] with [ zp[2]:126 [ print_line_cursor#22 print_line_cursor#1 print_screen#0 print_line_cursor#2 ] ] - score: 1 Coalescing zero page register [ zp[2]:83 [ render_preset_name::name#13 ] ] with [ zp[2]:129 [ print_str_at::str#2 print_str_at::str#1 print_str_at::str#0 ] ] - score: 1 Coalescing zero page register [ zp[4]:90 [ get_plane::return#14 ] ] with [ zp[4]:165 [ get_plane::return#16 ] ] - score: 1 Coalescing zero page register [ zp[4]:90 [ get_plane::return#14 get_plane::return#16 ] ] with [ zp[4]:192 [ get_plane::return#17 ] ] - score: 1 -Coalescing zero page register [ zp[2]:95 [ get_vic_screen::return#5 ] ] with [ zp[2]:217 [ get_vic_screen::return#10 ] ] - score: 1 -Coalescing zero page register [ zp[2]:97 [ get_vic_charset::return#2 ] ] with [ zp[2]:226 [ get_vic_charset::return#4 ] ] - score: 1 +Coalescing zero page register [ zp[2]:95 [ get_VICII_screen::return#5 ] ] with [ zp[2]:217 [ get_VICII_screen::return#10 ] ] - score: 1 +Coalescing zero page register [ zp[2]:97 [ get_VICII_charset::return#2 ] ] with [ zp[2]:226 [ get_VICII_charset::return#4 ] ] - score: 1 Coalescing zero page register [ zp[2]:111 [ bitmap_clear::bitmap#2 bitmap_clear::bitmap#3 bitmap_clear::bitmap#5 bitmap_clear::bitmap#1 ] ] with [ zp[2]:311 [ bitmap_clear::bitmap#0 ] ] - score: 1 Coalescing zero page register [ zp[2]:121 [ gfx_init_plane_fill::gfxb#2 gfx_init_plane_fill::gfxb#3 gfx_init_plane_fill::gfxb#1 gfx_init_plane_fill::gfxb#6 ] ] with [ zp[2]:330 [ gfx_init_plane_fill::gfxb#0 ] ] - score: 1 Coalescing zero page register [ zp[2]:124 [ memset::dst#2 memset::dst#4 memset::dst#1 ] ] with [ zp[2]:274 [ memset::str#0 ] ] - score: 1 @@ -13773,26 +13773,26 @@ Coalescing zero page register [ zp[2]:349 [ bitmap_plot::plotter_x#0 ] ] with [ Coalescing zero page register [ zp[1]:134 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::xd#0 bitmap_line::xd#2 bitmap_line::xd#1 ] ] with [ zp[1]:141 [ bitmap_line_xdyi::xd#5 bitmap_line_xdyi::xd#1 bitmap_line_xdyi::xd#0 ] ] - score: 2 Coalescing zero page register [ zp[1]:134 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::xd#0 bitmap_line::xd#2 bitmap_line::xd#1 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::xd#1 bitmap_line_xdyi::xd#0 ] ] with [ zp[1]:146 [ bitmap_line_ydxd::xd#2 bitmap_line_ydxd::xd#0 bitmap_line_ydxd::xd#1 ] ] - score: 2 Coalescing zero page register [ zp[1]:134 [ bitmap_line_ydxi::xd#2 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::xd#0 bitmap_line::xd#2 bitmap_line::xd#1 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::xd#1 bitmap_line_xdyi::xd#0 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::xd#0 bitmap_line_ydxd::xd#1 ] ] with [ zp[1]:153 [ bitmap_line_xdyd::xd#5 bitmap_line_xdyd::xd#1 bitmap_line_xdyd::xd#0 ] ] - score: 2 -Coalescing zero page register [ zp[2]:10 [ gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 get_vic_screen::return#11 ] ] with [ zp[2]:95 [ get_vic_screen::return#5 get_vic_screen::return#10 ] ] - score: 1 +Coalescing zero page register [ zp[2]:10 [ gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 get_VICII_screen::return#11 ] ] with [ zp[2]:95 [ get_VICII_screen::return#5 get_VICII_screen::return#10 ] ] - score: 1 Coalescing zero page register [ zp[4]:90 [ get_plane::return#14 get_plane::return#16 get_plane::return#17 ] ] with [ zp[4]:169 [ gfx_mode::$20 gfx_mode::plane_a#0 ] ] - score: 1 Coalescing zero page register [ zp[4]:90 [ get_plane::return#14 get_plane::return#16 get_plane::return#17 gfx_mode::$20 gfx_mode::plane_a#0 ] ] with [ zp[4]:196 [ gfx_mode::$34 gfx_mode::plane_b#0 ] ] - score: 1 -Coalescing zero page register [ zp[2]:97 [ get_vic_charset::return#2 get_vic_charset::return#4 ] ] with [ zp[2]:228 [ gfx_mode::$83 gfx_mode::$50 ] ] - score: 1 +Coalescing zero page register [ zp[2]:97 [ get_VICII_charset::return#2 get_VICII_charset::return#4 ] ] with [ zp[2]:228 [ gfx_mode::$83 gfx_mode::$50 ] ] - score: 1 Coalescing zero page register [ zp[2]:121 [ gfx_init_plane_fill::gfxb#2 gfx_init_plane_fill::gfxb#3 gfx_init_plane_fill::gfxb#1 gfx_init_plane_fill::gfxb#6 gfx_init_plane_fill::gfxb#0 ] ] with [ zp[2]:326 [ gfx_init_plane_fill::$4 gfx_init_plane_fill::$5 ] ] - score: 1 Coalescing zero page register [ zp[1]:136 [ bitmap_line_ydxi::y1#6 bitmap_line_ydxi::y1#1 bitmap_line_ydxi::y1#0 bitmap_line::y1#0 ] ] with [ zp[1]:148 [ bitmap_line_ydxd::y1#6 bitmap_line_ydxd::y1#0 bitmap_line_ydxd::y1#1 ] ] - score: 1 Coalescing zero page register [ zp[1]:137 [ bitmap_line_ydxi::x#3 bitmap_line_ydxi::x#5 bitmap_line_ydxi::x#1 bitmap_line_ydxi::x#0 bitmap_line_ydxi::x#6 bitmap_line_ydxi::x#2 bitmap_line::x0#0 ] ] with [ zp[1]:149 [ bitmap_line_ydxd::x#3 bitmap_line_ydxd::x#5 bitmap_line_ydxd::x#0 bitmap_line_ydxd::x#1 bitmap_line_ydxd::x#6 bitmap_line_ydxd::x#2 ] ] - score: 1 Coalescing zero page register [ zp[1]:137 [ bitmap_line_ydxi::x#3 bitmap_line_ydxi::x#5 bitmap_line_ydxi::x#1 bitmap_line_ydxi::x#0 bitmap_line_ydxi::x#6 bitmap_line_ydxi::x#2 bitmap_line::x0#0 bitmap_line_ydxd::x#3 bitmap_line_ydxd::x#5 bitmap_line_ydxd::x#0 bitmap_line_ydxd::x#1 bitmap_line_ydxd::x#6 bitmap_line_ydxd::x#2 ] ] with [ zp[1]:154 [ bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x1#1 bitmap_line_xdyd::x1#0 ] ] - score: 1 Coalescing zero page register [ zp[2]:219 [ gfx_mode::$82 gfx_mode::$47 ] ] with [ zp[2]:223 [ gfx_mode::$48 ] ] - score: 1 -Coalescing zero page register [ zp[2]:10 [ gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 get_vic_screen::return#11 get_vic_screen::return#5 get_vic_screen::return#10 ] ] with [ zp[2]:219 [ gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] ] - score: 1 +Coalescing zero page register [ zp[2]:10 [ gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 get_VICII_screen::return#11 get_VICII_screen::return#5 get_VICII_screen::return#10 ] ] with [ zp[2]:219 [ gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] ] - score: 1 Coalescing zero page register [ zp[1]:9 [ gfx_mode::cy#4 gfx_mode::cy#1 ] ] with [ zp[1]:5 [ form_mode::preset_current#6 form_mode::preset_current#0 form_mode::preset_current#1 ] ] Coalescing zero page register [ zp[1]:17 [ gfx_init_screen0::cy#4 gfx_init_screen0::cy#1 ] ] with [ zp[1]:3 [ form_cursor_count#23 form_cursor_count#1 form_cursor_count#17 form_cursor_count#16 form_cursor_count#4 ] ] -Coalescing zero page register [ zp[2]:19 [ gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 ] ] with [ zp[2]:10 [ gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 get_vic_screen::return#11 get_vic_screen::return#5 get_vic_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] ] +Coalescing zero page register [ zp[2]:19 [ gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 ] ] with [ zp[2]:10 [ gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 get_VICII_screen::return#11 get_VICII_screen::return#5 get_VICII_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] ] Coalescing zero page register [ zp[1]:21 [ gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 ] ] with [ zp[1]:4 [ form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] ] Coalescing zero page register [ zp[2]:23 [ gfx_init_screen1::ch#2 gfx_init_screen1::ch#3 gfx_init_screen1::ch#1 ] ] with [ zp[2]:12 [ gfx_mode::col#2 gfx_mode::col#3 gfx_mode::col#1 ] ] Coalescing zero page register [ zp[1]:29 [ gfx_init_screen3::cy#4 gfx_init_screen3::cy#1 ] ] with [ zp[1]:25 [ gfx_init_screen2::cy#4 gfx_init_screen2::cy#1 ] ] Coalescing zero page register [ zp[2]:31 [ gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 ] ] with [ zp[2]:27 [ gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 ] ] Coalescing zero page register [ zp[1]:37 [ gfx_init_charset::c#4 gfx_init_charset::c#1 ] ] with [ zp[1]:33 [ gfx_init_screen4::cy#4 gfx_init_screen4::cy#1 ] ] Coalescing zero page register [ zp[2]:38 [ gfx_init_charset::chargen#2 gfx_init_charset::chargen#3 gfx_init_charset::chargen#1 ] ] with [ zp[2]:34 [ gfx_init_screen4::ch#2 gfx_init_screen4::ch#3 gfx_init_screen4::ch#1 ] ] -Coalescing zero page register [ zp[1]:44 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 ] ] with [ zp[1]:43 [ gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 ] ] +Coalescing zero page register [ zp[1]:44 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 ] ] with [ zp[1]:43 [ gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 ] ] Coalescing zero page register [ zp[2]:45 [ gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 ] ] with [ zp[2]:40 [ gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 ] ] Coalescing zero page register [ zp[2]:51 [ gfx_init_plane_charset8::chargen#2 gfx_init_plane_charset8::chargen#3 gfx_init_plane_charset8::chargen#1 ] ] with [ zp[2]:48 [ gfx_init_plane_8bppchunky::gfxb#4 gfx_init_plane_8bppchunky::gfxb#3 gfx_init_plane_8bppchunky::gfxb#5 gfx_init_plane_8bppchunky::gfxb#1 ] ] Coalescing zero page register [ zp[1]:60 [ gfx_init_plane_horisontal::ay#4 gfx_init_plane_horisontal::ay#1 ] ] with [ zp[1]:50 [ gfx_init_plane_charset8::ch#8 gfx_init_plane_charset8::ch#1 ] ] @@ -13804,7 +13804,7 @@ Coalescing zero page register [ zp[2]:78 [ form_set_screen::line#2 form_set_scre Coalescing zero page register [ zp[2]:83 [ render_preset_name::name#13 print_str_at::str#2 print_str_at::str#1 print_str_at::str#0 ] ] with [ zp[2]:74 [ print_str_lines::str#4 print_str_lines::str#3 print_str_lines::str#5 print_str_lines::str#0 ] ] Coalescing zero page register [ zp[2]:86 [ apply_preset::preset#15 ] ] with [ zp[2]:76 [ print_char_cursor#43 print_char_cursor#2 print_char_cursor#72 print_char_cursor#73 print_char_cursor#44 print_char_cursor#29 ] ] Coalescing zero page register [ zp[1]:99 [ keyboard_event_scan::row#2 keyboard_event_scan::row#1 ] ] with [ zp[1]:57 [ gfx_init_plane_charset8::col#2 gfx_init_plane_charset8::col#5 gfx_init_plane_charset8::col#6 gfx_init_plane_charset8::col#1 ] ] -Coalescing zero page register [ zp[2]:108 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 ] ] with [ zp[2]:97 [ get_vic_charset::return#2 get_vic_charset::return#4 gfx_mode::$83 gfx_mode::$50 ] ] +Coalescing zero page register [ zp[2]:108 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 ] ] with [ zp[2]:97 [ get_VICII_charset::return#2 get_VICII_charset::return#4 gfx_mode::$83 gfx_mode::$50 ] ] Coalescing zero page register [ zp[1]:110 [ bitmap_clear::y#4 bitmap_clear::y#1 ] ] with [ zp[1]:102 [ keyboard_event_scan::keycode#10 keyboard_event_scan::keycode#11 keyboard_event_scan::keycode#13 keyboard_event_scan::keycode#14 keyboard_event_scan::keycode#1 ] ] Coalescing zero page register [ zp[4]:115 [ gfx_init_plane_fill::plane_addr#3 ] ] with [ zp[4]:90 [ get_plane::return#14 get_plane::return#16 get_plane::return#17 gfx_mode::$20 gfx_mode::plane_a#0 gfx_mode::$34 gfx_mode::plane_b#0 ] ] Coalescing zero page register [ zp[1]:119 [ gfx_init_plane_fill::fill#6 ] ] with [ zp[1]:103 [ keyboard_events_size#19 keyboard_events_size#107 keyboard_events_size#98 keyboard_events_size#49 keyboard_events_size#28 keyboard_events_size#25 keyboard_events_size#100 keyboard_events_size#106 keyboard_events_size#0 keyboard_events_size#1 keyboard_events_size#3 ] ] @@ -13830,13 +13830,13 @@ Coalescing zero page register [ zp[2]:335 [ form_field_ptr::line#0 ] ] with [ zp Coalescing zero page register [ zp[1]:342 [ keyboard_event_pressed::row_bits#0 ] ] with [ zp[1]:337 [ form_field_ptr::x#0 ] ] Coalescing zero page register [ zp[2]:349 [ bitmap_plot::plotter_x#0 bitmap_plot::plotter#0 ] ] with [ zp[2]:210 [ gfx_mode::$40 ] ] Coalescing zero page register [ zp[1]:29 [ gfx_init_screen3::cy#4 gfx_init_screen3::cy#1 gfx_init_screen2::cy#4 gfx_init_screen2::cy#1 ] ] with [ zp[1]:9 [ gfx_mode::cy#4 gfx_mode::cy#1 form_mode::preset_current#6 form_mode::preset_current#0 form_mode::preset_current#1 ] ] -Coalescing zero page register [ zp[2]:31 [ gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 ] ] with [ zp[2]:19 [ gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 get_vic_screen::return#11 get_vic_screen::return#5 get_vic_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] ] +Coalescing zero page register [ zp[2]:31 [ gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 ] ] with [ zp[2]:19 [ gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 get_VICII_screen::return#11 get_VICII_screen::return#5 get_VICII_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] ] Coalescing zero page register [ zp[1]:37 [ gfx_init_charset::c#4 gfx_init_charset::c#1 gfx_init_screen4::cy#4 gfx_init_screen4::cy#1 ] ] with [ zp[1]:17 [ gfx_init_screen0::cy#4 gfx_init_screen0::cy#1 form_cursor_count#23 form_cursor_count#1 form_cursor_count#17 form_cursor_count#16 form_cursor_count#4 ] ] Coalescing zero page register [ zp[2]:38 [ gfx_init_charset::chargen#2 gfx_init_charset::chargen#3 gfx_init_charset::chargen#1 gfx_init_screen4::ch#2 gfx_init_screen4::ch#3 gfx_init_screen4::ch#1 ] ] with [ zp[2]:23 [ gfx_init_screen1::ch#2 gfx_init_screen1::ch#3 gfx_init_screen1::ch#1 gfx_mode::col#2 gfx_mode::col#3 gfx_mode::col#1 ] ] -Coalescing zero page register [ zp[1]:44 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 ] ] with [ zp[1]:21 [ gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] ] +Coalescing zero page register [ zp[1]:44 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 ] ] with [ zp[1]:21 [ gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] ] Coalescing zero page register [ zp[2]:61 [ gfx_init_plane_horisontal::gfxa#3 gfx_init_plane_horisontal::gfxa#6 gfx_init_plane_horisontal::gfxa#7 gfx_init_plane_horisontal::gfxa#1 gfx_init_plane_horisontal::gfxa#2 gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 ] ] with [ zp[2]:45 [ gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 ] ] Coalescing zero page register [ zp[2]:69 [ gfx_init_plane_horisontal2::gfxa#2 gfx_init_plane_horisontal2::gfxa#3 gfx_init_plane_horisontal2::gfxa#1 gfx_init_plane_vertical::gfxb#2 gfx_init_plane_vertical::gfxb#3 gfx_init_plane_vertical::gfxb#1 ] ] with [ zp[2]:51 [ gfx_init_plane_charset8::chargen#2 gfx_init_plane_charset8::chargen#3 gfx_init_plane_charset8::chargen#1 gfx_init_plane_8bppchunky::gfxb#4 gfx_init_plane_8bppchunky::gfxb#3 gfx_init_plane_8bppchunky::gfxb#5 gfx_init_plane_8bppchunky::gfxb#1 ] ] -Coalescing zero page register [ zp[2]:108 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 get_vic_charset::return#2 get_vic_charset::return#4 gfx_mode::$83 gfx_mode::$50 ] ] with [ zp[2]:78 [ form_set_screen::line#2 form_set_screen::line#1 print_set_screen::screen#2 print_line_cursor#22 print_line_cursor#1 print_screen#0 print_line_cursor#2 ] ] +Coalescing zero page register [ zp[2]:108 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 get_VICII_charset::return#2 get_VICII_charset::return#4 gfx_mode::$83 gfx_mode::$50 ] ] with [ zp[2]:78 [ form_set_screen::line#2 form_set_screen::line#1 print_set_screen::screen#2 print_line_cursor#22 print_line_cursor#1 print_screen#0 print_line_cursor#2 ] ] Coalescing zero page register [ zp[1]:110 [ bitmap_clear::y#4 bitmap_clear::y#1 keyboard_event_scan::keycode#10 keyboard_event_scan::keycode#11 keyboard_event_scan::keycode#13 keyboard_event_scan::keycode#14 keyboard_event_scan::keycode#1 ] ] with [ zp[1]:60 [ gfx_init_plane_horisontal::ay#4 gfx_init_plane_horisontal::ay#1 gfx_init_plane_charset8::ch#8 gfx_init_plane_charset8::ch#1 ] ] Coalescing zero page register [ zp[1]:119 [ gfx_init_plane_fill::fill#6 keyboard_events_size#19 keyboard_events_size#107 keyboard_events_size#98 keyboard_events_size#49 keyboard_events_size#28 keyboard_events_size#25 keyboard_events_size#100 keyboard_events_size#106 keyboard_events_size#0 keyboard_events_size#1 keyboard_events_size#3 ] ] with [ zp[1]:64 [ gfx_init_plane_vertical::by#4 gfx_init_plane_vertical::by#1 gfx_init_plane_charset8::cr#6 gfx_init_plane_charset8::cr#1 ] ] Coalescing zero page register [ zp[2]:121 [ gfx_init_plane_fill::gfxb#2 gfx_init_plane_fill::gfxb#3 gfx_init_plane_fill::gfxb#1 gfx_init_plane_fill::gfxb#6 gfx_init_plane_fill::gfxb#0 gfx_init_plane_fill::$4 gfx_init_plane_fill::$5 bitmap_clear::bitmap#2 bitmap_clear::bitmap#3 bitmap_clear::bitmap#5 bitmap_clear::bitmap#1 bitmap_clear::bitmap#0 ] ] with [ zp[2]:83 [ render_preset_name::name#13 print_str_at::str#2 print_str_at::str#1 print_str_at::str#0 print_str_lines::str#4 print_str_lines::str#3 print_str_lines::str#5 print_str_lines::str#0 ] ] @@ -13848,7 +13848,7 @@ Coalescing zero page register [ zp[1]:260 [ gfx_init_screen3::$1 bitmap_line_xdy Coalescing zero page register [ zp[1]:307 [ bitmap_init::$10 keyboard_event_scan::row_scan#0 ] ] with [ zp[1]:142 [ bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x1#1 bitmap_line_xdyi::x1#0 bitmap_line::x1#0 bitmap_line_ydxi::e#3 bitmap_line_ydxi::e#0 bitmap_line_ydxi::e#6 bitmap_line_ydxi::e#2 bitmap_line_ydxi::e#1 ] ] Coalescing zero page register [ zp[1]:342 [ keyboard_event_pressed::row_bits#0 form_field_ptr::x#0 ] ] with [ zp[1]:155 [ bitmap_line_xdyd::x#3 bitmap_line_xdyd::x#6 bitmap_line_xdyd::x#1 bitmap_line_xdyd::x#0 bitmap_line_xdyd::x#2 bitmap_line_ydxd::e#3 bitmap_line_ydxd::e#0 bitmap_line_ydxd::e#6 bitmap_line_ydxd::e#2 bitmap_line_ydxd::e#1 ] ] Coalescing zero page register [ zp[2]:351 [ bitmap_plot::plotter_y#0 ] ] with [ zp[2]:267 [ gfx_init_plane_8bppchunky::$5 gfx_mode::$22 ] ] -Coalescing zero page register [ zp[2]:61 [ gfx_init_plane_horisontal::gfxa#3 gfx_init_plane_horisontal::gfxa#6 gfx_init_plane_horisontal::gfxa#7 gfx_init_plane_horisontal::gfxa#1 gfx_init_plane_horisontal::gfxa#2 gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 ] ] with [ zp[2]:31 [ gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 get_vic_screen::return#11 get_vic_screen::return#5 get_vic_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] ] +Coalescing zero page register [ zp[2]:61 [ gfx_init_plane_horisontal::gfxa#3 gfx_init_plane_horisontal::gfxa#6 gfx_init_plane_horisontal::gfxa#7 gfx_init_plane_horisontal::gfxa#1 gfx_init_plane_horisontal::gfxa#2 gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 ] ] with [ zp[2]:31 [ gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 get_VICII_screen::return#11 get_VICII_screen::return#5 get_VICII_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] ] Coalescing zero page register [ zp[2]:69 [ gfx_init_plane_horisontal2::gfxa#2 gfx_init_plane_horisontal2::gfxa#3 gfx_init_plane_horisontal2::gfxa#1 gfx_init_plane_vertical::gfxb#2 gfx_init_plane_vertical::gfxb#3 gfx_init_plane_vertical::gfxb#1 gfx_init_plane_charset8::chargen#2 gfx_init_plane_charset8::chargen#3 gfx_init_plane_charset8::chargen#1 gfx_init_plane_8bppchunky::gfxb#4 gfx_init_plane_8bppchunky::gfxb#3 gfx_init_plane_8bppchunky::gfxb#5 gfx_init_plane_8bppchunky::gfxb#1 ] ] with [ zp[2]:38 [ gfx_init_charset::chargen#2 gfx_init_charset::chargen#3 gfx_init_charset::chargen#1 gfx_init_screen4::ch#2 gfx_init_screen4::ch#3 gfx_init_screen4::ch#1 gfx_init_screen1::ch#2 gfx_init_screen1::ch#3 gfx_init_screen1::ch#1 gfx_mode::col#2 gfx_mode::col#3 gfx_mode::col#1 ] ] Coalescing zero page register [ zp[1]:152 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::yd#1 bitmap_line_xdyd::yd#0 bitmap_line_ydxd::y#2 bitmap_line_ydxd::y#7 bitmap_line_ydxd::y#0 bitmap_line_ydxd::y#1 bitmap_line_ydxd::y#3 bitmap_line_xdyi::x#3 bitmap_line_xdyi::x#6 bitmap_line_xdyi::x#1 bitmap_line_xdyi::x#0 bitmap_line_xdyi::x#2 bitmap_line_ydxi::y#3 bitmap_line_ydxi::y#6 bitmap_line_ydxi::y#1 bitmap_line_ydxi::y#0 bitmap_line_ydxi::y#2 ] ] with [ zp[1]:29 [ gfx_init_screen3::cy#4 gfx_init_screen3::cy#1 gfx_init_screen2::cy#4 gfx_init_screen2::cy#1 gfx_mode::cy#4 gfx_mode::cy#1 form_mode::preset_current#6 form_mode::preset_current#0 form_mode::preset_current#1 ] ] Coalescing zero page register [ zp[1]:233 [ gfx_mode::$52 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::xd#0 bitmap_line::xd#2 bitmap_line::xd#1 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::xd#1 bitmap_line_xdyi::xd#0 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::xd#0 bitmap_line_ydxd::xd#1 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::xd#1 bitmap_line_xdyd::xd#0 ] ] with [ zp[1]:110 [ bitmap_clear::y#4 bitmap_clear::y#1 keyboard_event_scan::keycode#10 keyboard_event_scan::keycode#11 keyboard_event_scan::keycode#13 keyboard_event_scan::keycode#14 keyboard_event_scan::keycode#1 gfx_init_plane_horisontal::ay#4 gfx_init_plane_horisontal::ay#1 gfx_init_plane_charset8::ch#8 gfx_init_plane_charset8::ch#1 ] ] @@ -13857,10 +13857,10 @@ Coalescing zero page register [ zp[1]:256 [ gfx_init_screen2::col2#0 bitmap_line Coalescing zero page register [ zp[1]:260 [ gfx_init_screen3::$1 bitmap_line_xdyd::e#3 bitmap_line_xdyd::e#0 bitmap_line_xdyd::e#6 bitmap_line_xdyd::e#2 bitmap_line_xdyd::e#1 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::yd#0 bitmap_line_ydxd::yd#1 bitmap_line_xdyi::e#3 bitmap_line_xdyi::e#0 bitmap_line_xdyi::e#6 bitmap_line_xdyi::e#2 bitmap_line_xdyi::e#1 ] ] with [ zp[1]:133 [ keyboard_event_pressed::keycode#4 gfx_init_plane_fill::by#4 gfx_init_plane_fill::by#1 gfx_init_plane_horisontal2::ay#4 gfx_init_plane_horisontal2::ay#1 gfx_init_plane_charset8::bits#2 gfx_init_plane_charset8::bits#0 gfx_init_plane_charset8::bits#1 ] ] Coalescing zero page register [ zp[2]:280 [ form_field_ptr::return#3 form_control::field#0 form_field_ptr::return#0 gfx_mode::$24 ] ] with [ zp[2]:121 [ gfx_init_plane_fill::gfxb#2 gfx_init_plane_fill::gfxb#3 gfx_init_plane_fill::gfxb#1 gfx_init_plane_fill::gfxb#6 gfx_init_plane_fill::gfxb#0 gfx_init_plane_fill::$4 gfx_init_plane_fill::$5 bitmap_clear::bitmap#2 bitmap_clear::bitmap#3 bitmap_clear::bitmap#5 bitmap_clear::bitmap#1 bitmap_clear::bitmap#0 render_preset_name::name#13 print_str_at::str#2 print_str_at::str#1 print_str_at::str#0 print_str_lines::str#4 print_str_lines::str#3 print_str_lines::str#5 print_str_lines::str#0 ] ] Coalescing zero page register [ zp[2]:323 [ gfx_init_plane_fill::$1 gfx_mode::$26 ] ] with [ zp[2]:131 [ print_str_at::at#2 print_str_at::at#0 memset::dst#2 memset::dst#4 memset::dst#1 memset::str#0 apply_preset::preset#15 print_char_cursor#43 print_char_cursor#2 print_char_cursor#72 print_char_cursor#73 print_char_cursor#44 print_char_cursor#29 ] ] -Allocated (was zp[1]:44) zp[1]:2 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] -Allocated (was zp[2]:61) zp[2]:3 [ gfx_init_plane_horisontal::gfxa#3 gfx_init_plane_horisontal::gfxa#6 gfx_init_plane_horisontal::gfxa#7 gfx_init_plane_horisontal::gfxa#1 gfx_init_plane_horisontal::gfxa#2 gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 get_vic_screen::return#11 get_vic_screen::return#5 get_vic_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] +Allocated (was zp[1]:44) zp[1]:2 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] +Allocated (was zp[2]:61) zp[2]:3 [ gfx_init_plane_horisontal::gfxa#3 gfx_init_plane_horisontal::gfxa#6 gfx_init_plane_horisontal::gfxa#7 gfx_init_plane_horisontal::gfxa#1 gfx_init_plane_horisontal::gfxa#2 gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 get_VICII_screen::return#11 get_VICII_screen::return#5 get_VICII_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] Allocated (was zp[2]:69) zp[2]:5 [ gfx_init_plane_horisontal2::gfxa#2 gfx_init_plane_horisontal2::gfxa#3 gfx_init_plane_horisontal2::gfxa#1 gfx_init_plane_vertical::gfxb#2 gfx_init_plane_vertical::gfxb#3 gfx_init_plane_vertical::gfxb#1 gfx_init_plane_charset8::chargen#2 gfx_init_plane_charset8::chargen#3 gfx_init_plane_charset8::chargen#1 gfx_init_plane_8bppchunky::gfxb#4 gfx_init_plane_8bppchunky::gfxb#3 gfx_init_plane_8bppchunky::gfxb#5 gfx_init_plane_8bppchunky::gfxb#1 gfx_init_charset::chargen#2 gfx_init_charset::chargen#3 gfx_init_charset::chargen#1 gfx_init_screen4::ch#2 gfx_init_screen4::ch#3 gfx_init_screen4::ch#1 gfx_init_screen1::ch#2 gfx_init_screen1::ch#3 gfx_init_screen1::ch#1 gfx_mode::col#2 gfx_mode::col#3 gfx_mode::col#1 ] -Allocated (was zp[2]:108) zp[2]:7 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 get_vic_charset::return#2 get_vic_charset::return#4 gfx_mode::$83 gfx_mode::$50 form_set_screen::line#2 form_set_screen::line#1 print_set_screen::screen#2 print_line_cursor#22 print_line_cursor#1 print_screen#0 print_line_cursor#2 ] +Allocated (was zp[2]:108) zp[2]:7 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 get_VICII_charset::return#2 get_VICII_charset::return#4 gfx_mode::$83 gfx_mode::$50 form_set_screen::line#2 form_set_screen::line#1 print_set_screen::screen#2 print_line_cursor#22 print_line_cursor#1 print_screen#0 print_line_cursor#2 ] Allocated (was zp[4]:115) zp[4]:9 [ gfx_init_plane_fill::plane_addr#3 get_plane::return#14 get_plane::return#16 get_plane::return#17 gfx_mode::$20 gfx_mode::plane_a#0 gfx_mode::$34 gfx_mode::plane_b#0 ] Allocated (was zp[1]:140) zp[1]:13 [ bitmap_line_xdyi::yd#2 bitmap_line_xdyi::yd#1 bitmap_line_xdyi::yd#0 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::yd#1 bitmap_line_ydxi::yd#0 keyboard_event_scan::row#2 keyboard_event_scan::row#1 gfx_init_plane_charset8::col#2 gfx_init_plane_charset8::col#5 gfx_init_plane_charset8::col#6 gfx_init_plane_charset8::col#1 ] Allocated (was zp[1]:152) zp[1]:14 [ bitmap_line_xdyd::yd#2 bitmap_line_xdyd::yd#1 bitmap_line_xdyd::yd#0 bitmap_line_ydxd::y#2 bitmap_line_ydxd::y#7 bitmap_line_ydxd::y#0 bitmap_line_ydxd::y#1 bitmap_line_ydxd::y#3 bitmap_line_xdyi::x#3 bitmap_line_xdyi::x#6 bitmap_line_xdyi::x#1 bitmap_line_xdyi::x#0 bitmap_line_xdyi::x#2 bitmap_line_ydxi::y#3 bitmap_line_ydxi::y#6 bitmap_line_ydxi::y#1 bitmap_line_ydxi::y#0 bitmap_line_ydxi::y#2 gfx_init_screen3::cy#4 gfx_init_screen3::cy#1 gfx_init_screen2::cy#4 gfx_init_screen2::cy#1 gfx_mode::cy#4 gfx_mode::cy#1 form_mode::preset_current#6 form_mode::preset_current#0 form_mode::preset_current#1 ] @@ -13896,12 +13896,12 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_ECM = $40 - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -13965,9 +13965,9 @@ ASSEMBLER BEFORE OPTIMIZATION .const OFFSET_STRUCT_MOS6569_VICII_MEMORY = $18 // Number of form fields .const form_fields_cnt = $24 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -14010,15 +14010,15 @@ ASSEMBLER BEFORE OPTIMIZATION // Memory address of VIC Graphics is GraphicsBank*$10000 .label DTV_GRAPHICS_VIC_BANK = $d03d // VIC Screens - .label VIC_SCREEN0 = $4000 - .label VIC_SCREEN1 = $4400 - .label VIC_SCREEN2 = $4800 - .label VIC_SCREEN3 = $4c00 - .label VIC_SCREEN4 = $5000 + .label VICII_SCREEN0 = $4000 + .label VICII_SCREEN1 = $4400 + .label VICII_SCREEN2 = $4800 + .label VICII_SCREEN3 = $4c00 + .label VICII_SCREEN4 = $5000 // VIC Charset from ROM - .label VIC_CHARSET_ROM = $5800 + .label VICII_CHARSET_ROM = $5800 // VIC Bitmap - .label VIC_BITMAP = $6000 + .label VICII_BITMAP = $6000 // Screen containing the FORM .label FORM_SCREEN = $400 // Charset used for the FORM @@ -14046,18 +14046,18 @@ ASSEMBLER BEFORE OPTIMIZATION .label form_b_step_lo = form_fields_val+$15 .label form_b_mod_hi = form_fields_val+$16 .label form_b_mod_lo = form_fields_val+$17 - .label form_vic_screen = form_fields_val+$18 - .label form_vic_gfx = form_fields_val+$19 - .label form_vic_cols = form_fields_val+$1a + .label form_VICII_screen = form_fields_val+$18 + .label form_VICII_gfx = form_fields_val+$19 + .label form_VICII_cols = form_fields_val+$1a .label form_dtv_palet = form_fields_val+$1b - .label form_vic_bg0_hi = form_fields_val+$1c - .label form_vic_bg0_lo = form_fields_val+$1d - .label form_vic_bg1_hi = form_fields_val+$1e - .label form_vic_bg1_lo = form_fields_val+$1f - .label form_vic_bg2_hi = form_fields_val+$20 - .label form_vic_bg2_lo = form_fields_val+$21 - .label form_vic_bg3_hi = form_fields_val+$22 - .label form_vic_bg3_lo = form_fields_val+$23 + .label form_VICII_bg0_hi = form_fields_val+$1c + .label form_VICII_bg0_lo = form_fields_val+$1d + .label form_VICII_bg1_hi = form_fields_val+$1e + .label form_VICII_bg1_lo = form_fields_val+$1f + .label form_VICII_bg2_hi = form_fields_val+$20 + .label form_VICII_bg2_lo = form_fields_val+$21 + .label form_VICII_bg3_hi = form_fields_val+$22 + .label form_VICII_bg3_lo = form_fields_val+$23 .label print_char_cursor = $1a .label print_line_cursor = 7 .label print_screen = 7 @@ -14207,10 +14207,10 @@ gfx_init: { jmp __b6 // gfx_init::@6 __b6: - // [28] call gfx_init_vic_bitmap - // [313] phi from gfx_init::@6 to gfx_init_vic_bitmap [phi:gfx_init::@6->gfx_init_vic_bitmap] - gfx_init_vic_bitmap_from___b6: - jsr gfx_init_vic_bitmap + // [28] call gfx_init_VICII_bitmap + // [313] phi from gfx_init::@6 to gfx_init_VICII_bitmap [phi:gfx_init::@6->gfx_init_VICII_bitmap] + gfx_init_VICII_bitmap_from___b6: + jsr gfx_init_VICII_bitmap // [29] phi from gfx_init::@6 to gfx_init::@7 [phi:gfx_init::@6->gfx_init::@7] __b7_from___b6: jmp __b7 @@ -14416,12 +14416,12 @@ form_mode: { // DTV Graphics Mode lda #0 sta DTV_CONTROL - // [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 + lda #VICII_DEN|VICII_RSEL|3 sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 - // [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL + // [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2 // [72] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = (byte)(word)FORM_SCREEN&$3fff/$40|(word)FORM_CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers @@ -14565,7 +14565,7 @@ gfx_mode: { .label __83 = 7 .label plane_a = 9 .label plane_b = 9 - .label vic_colors = 3 + .label VICII_colors = 3 .label col = 5 .label cy = $e // [98] if(*form_ctrl_line==0) goto gfx_mode::@1 -- _deref_pbuc1_eq_0_then_la1 @@ -14692,13 +14692,13 @@ gfx_mode: { __b16: // [119] phi from gfx_mode::@16 to gfx_mode::@7 [phi:gfx_mode::@16->gfx_mode::@7] __b7_from___b16: - // [119] phi gfx_mode::vic_control#5 = VIC_DEN|VIC_RSEL|3|VIC_ECM [phi:gfx_mode::@16->gfx_mode::@7#0] -- vbuxx=vbuc1 - ldx #VIC_DEN|VIC_RSEL|3|VIC_ECM + // [119] phi gfx_mode::VICII_control#5 = VICII_DEN|VICII_RSEL|3|VICII_ECM [phi:gfx_mode::@16->gfx_mode::@7#0] -- vbuxx=vbuc1 + ldx #VICII_DEN|VICII_RSEL|3|VICII_ECM jmp __b7 // [119] phi from gfx_mode::@6 to gfx_mode::@7 [phi:gfx_mode::@6->gfx_mode::@7] __b7_from___b6: - // [119] phi gfx_mode::vic_control#5 = VIC_DEN|VIC_RSEL|3 [phi:gfx_mode::@6->gfx_mode::@7#0] -- vbuxx=vbuc1 - ldx #VIC_DEN|VIC_RSEL|3 + // [119] phi gfx_mode::VICII_control#5 = VICII_DEN|VICII_RSEL|3 [phi:gfx_mode::@6->gfx_mode::@7#0] -- vbuxx=vbuc1 + ldx #VICII_DEN|VICII_RSEL|3 jmp __b7 // gfx_mode::@7 __b7: @@ -14709,19 +14709,19 @@ gfx_mode: { jmp __b17 // gfx_mode::@17 __b17: - // [121] gfx_mode::vic_control#2 = gfx_mode::vic_control#5 | VIC_BMM -- vbuxx=vbuxx_bor_vbuc1 + // [121] gfx_mode::VICII_control#2 = gfx_mode::VICII_control#5 | VICII_BMM -- vbuxx=vbuxx_bor_vbuc1 txa - ora #VIC_BMM + ora #VICII_BMM tax // [122] phi from gfx_mode::@17 gfx_mode::@7 to gfx_mode::@8 [phi:gfx_mode::@17/gfx_mode::@7->gfx_mode::@8] __b8_from___b17: __b8_from___b7: - // [122] phi gfx_mode::vic_control#4 = gfx_mode::vic_control#2 [phi:gfx_mode::@17/gfx_mode::@7->gfx_mode::@8#0] -- register_copy + // [122] phi gfx_mode::VICII_control#4 = gfx_mode::VICII_control#2 [phi:gfx_mode::@17/gfx_mode::@7->gfx_mode::@8#0] -- register_copy jmp __b8 // gfx_mode::@8 __b8: - // [123] *VIC_CONTROL = gfx_mode::vic_control#4 -- _deref_pbuc1=vbuxx - stx VIC_CONTROL + // [123] *VICII_CONTROL = gfx_mode::VICII_control#4 -- _deref_pbuc1=vbuxx + stx VICII_CONTROL // [124] if(*form_ctrl_mcm==0) goto gfx_mode::@9 -- _deref_pbuc1_eq_0_then_la1 lda form_ctrl_mcm cmp #0 @@ -14733,18 +14733,18 @@ gfx_mode: { __b18: // [126] phi from gfx_mode::@18 to gfx_mode::@9 [phi:gfx_mode::@18->gfx_mode::@9] __b9_from___b18: - // [126] phi gfx_mode::vic_control2#2 = VIC_CSEL|VIC_MCM [phi:gfx_mode::@18->gfx_mode::@9#0] -- vbuaa=vbuc1 - lda #VIC_CSEL|VIC_MCM + // [126] phi gfx_mode::VICII_control2#2 = VICII_CSEL|VICII_MCM [phi:gfx_mode::@18->gfx_mode::@9#0] -- vbuaa=vbuc1 + lda #VICII_CSEL|VICII_MCM jmp __b9 // [126] phi from gfx_mode::@8 to gfx_mode::@9 [phi:gfx_mode::@8->gfx_mode::@9] __b9_from___b8: - // [126] phi gfx_mode::vic_control2#2 = VIC_CSEL [phi:gfx_mode::@8->gfx_mode::@9#0] -- vbuaa=vbuc1 - lda #VIC_CSEL + // [126] phi gfx_mode::VICII_control2#2 = VICII_CSEL [phi:gfx_mode::@8->gfx_mode::@9#0] -- vbuaa=vbuc1 + lda #VICII_CSEL jmp __b9 // gfx_mode::@9 __b9: - // [127] *VIC_CONTROL2 = gfx_mode::vic_control2#2 -- _deref_pbuc1=vbuaa - sta VIC_CONTROL2 + // [127] *VICII_CONTROL2 = gfx_mode::VICII_control2#2 -- _deref_pbuc1=vbuaa + sta VICII_CONTROL2 // [128] gfx_mode::$18 = *form_a_start_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 lda form_a_start_hi asl @@ -14919,22 +14919,22 @@ gfx_mode: { // VIC Graphics Bank lda #3 sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR - // [175] *((byte*)CIA2) = 3^(byte)(word)VIC_SCREEN0/$4000 -- _deref_pbuc1=vbuc2 + // [175] *((byte*)CIA2) = 3^(byte)(word)VICII_SCREEN0/$4000 -- _deref_pbuc1=vbuc2 // Set VIC Bank bits to output - all others to input - lda #3^VIC_SCREEN0/$4000 + lda #3^VICII_SCREEN0/$4000 sta CIA2 - // [176] get_vic_screen::idx#0 = *form_vic_screen -- vbuaa=_deref_pbuc1 - lda form_vic_screen - // [177] call get_vic_screen - // [564] phi from gfx_mode::@28 to get_vic_screen [phi:gfx_mode::@28->get_vic_screen] - get_vic_screen_from___b28: - // [564] phi get_vic_screen::idx#2 = get_vic_screen::idx#0 [phi:gfx_mode::@28->get_vic_screen#0] -- register_copy - jsr get_vic_screen - // [178] get_vic_screen::return#10 = get_vic_screen::return#5 + // [176] get_VICII_screen::idx#0 = *form_VICII_screen -- vbuaa=_deref_pbuc1 + lda form_VICII_screen + // [177] call get_VICII_screen + // [564] phi from gfx_mode::@28 to get_VICII_screen [phi:gfx_mode::@28->get_VICII_screen] + get_VICII_screen_from___b28: + // [564] phi get_VICII_screen::idx#2 = get_VICII_screen::idx#0 [phi:gfx_mode::@28->get_VICII_screen#0] -- register_copy + jsr get_VICII_screen + // [178] get_VICII_screen::return#10 = get_VICII_screen::return#5 jmp __b29 // gfx_mode::@29 __b29: - // [179] gfx_mode::$82 = get_vic_screen::return#10 + // [179] gfx_mode::$82 = get_VICII_screen::return#10 // [180] gfx_mode::$47 = (word)gfx_mode::$82 & $3fff -- vwuz1=vwuz1_band_vwuc1 lda.z __47 and #<$3fff @@ -14955,15 +14955,15 @@ gfx_mode: { asl.z $ff rol.z __48 rol.z __48+1 - // [182] get_vic_charset::idx#0 = *form_vic_gfx -- vbuaa=_deref_pbuc1 - lda form_vic_gfx - // [183] call get_vic_charset - jsr get_vic_charset - // [184] get_vic_charset::return#4 = get_vic_charset::return#2 + // [182] get_VICII_charset::idx#0 = *form_VICII_gfx -- vbuaa=_deref_pbuc1 + lda form_VICII_gfx + // [183] call get_VICII_charset + jsr get_VICII_charset + // [184] get_VICII_charset::return#4 = get_VICII_charset::return#2 jmp __b30 // gfx_mode::@30 __b30: - // [185] gfx_mode::$83 = get_vic_charset::return#4 + // [185] gfx_mode::$83 = get_VICII_charset::return#4 // [186] gfx_mode::$50 = (word)gfx_mode::$83 & $3fff -- vwuz1=vwuz1_band_vwuc1 lda.z __50 and #<$3fff @@ -14981,22 +14981,22 @@ gfx_mode: { lda.z __48 // [190] gfx_mode::$53 = gfx_mode::$84 | gfx_mode::$52 -- vbuaa=vbuaa_bor_vbuz1 ora.z __52 - // [191] *VIC_MEMORY = gfx_mode::$53 -- _deref_pbuc1=vbuaa + // [191] *VICII_MEMORY = gfx_mode::$53 -- _deref_pbuc1=vbuaa // Set VIC Bank // VIC memory - sta VIC_MEMORY - // [192] get_vic_screen::idx#1 = *form_vic_cols -- vbuaa=_deref_pbuc1 - lda form_vic_cols - // [193] call get_vic_screen - // [564] phi from gfx_mode::@30 to get_vic_screen [phi:gfx_mode::@30->get_vic_screen] - get_vic_screen_from___b30: - // [564] phi get_vic_screen::idx#2 = get_vic_screen::idx#1 [phi:gfx_mode::@30->get_vic_screen#0] -- register_copy - jsr get_vic_screen - // [194] get_vic_screen::return#11 = get_vic_screen::return#5 + sta VICII_MEMORY + // [192] get_VICII_screen::idx#1 = *form_VICII_cols -- vbuaa=_deref_pbuc1 + lda form_VICII_cols + // [193] call get_VICII_screen + // [564] phi from gfx_mode::@30 to get_VICII_screen [phi:gfx_mode::@30->get_VICII_screen] + get_VICII_screen_from___b30: + // [564] phi get_VICII_screen::idx#2 = get_VICII_screen::idx#1 [phi:gfx_mode::@30->get_VICII_screen#0] -- register_copy + jsr get_VICII_screen + // [194] get_VICII_screen::return#11 = get_VICII_screen::return#5 jmp __b31 // gfx_mode::@31 __b31: - // [195] gfx_mode::vic_colors#0 = get_vic_screen::return#11 + // [195] gfx_mode::VICII_colors#0 = get_VICII_screen::return#11 // [196] phi from gfx_mode::@31 to gfx_mode::@19 [phi:gfx_mode::@31->gfx_mode::@19] __b19_from___b31: // [196] phi gfx_mode::cy#4 = 0 [phi:gfx_mode::@31->gfx_mode::@19#0] -- vbuz1=vbuc1 @@ -15007,13 +15007,13 @@ gfx_mode: { sta.z col lda #>COLS sta.z col+1 - // [196] phi gfx_mode::vic_colors#3 = gfx_mode::vic_colors#0 [phi:gfx_mode::@31->gfx_mode::@19#2] -- register_copy + // [196] phi gfx_mode::VICII_colors#3 = gfx_mode::VICII_colors#0 [phi:gfx_mode::@31->gfx_mode::@19#2] -- register_copy jmp __b19 // [196] phi from gfx_mode::@21 to gfx_mode::@19 [phi:gfx_mode::@21->gfx_mode::@19] __b19_from___b21: // [196] phi gfx_mode::cy#4 = gfx_mode::cy#1 [phi:gfx_mode::@21->gfx_mode::@19#0] -- register_copy // [196] phi gfx_mode::col#3 = gfx_mode::col#1 [phi:gfx_mode::@21->gfx_mode::@19#1] -- register_copy - // [196] phi gfx_mode::vic_colors#3 = gfx_mode::vic_colors#1 [phi:gfx_mode::@21->gfx_mode::@19#2] -- register_copy + // [196] phi gfx_mode::VICII_colors#3 = gfx_mode::VICII_colors#1 [phi:gfx_mode::@21->gfx_mode::@19#2] -- register_copy jmp __b19 // gfx_mode::@19 __b19: @@ -15022,19 +15022,19 @@ gfx_mode: { // [197] phi gfx_mode::cx#2 = 0 [phi:gfx_mode::@19->gfx_mode::@20#0] -- vbuxx=vbuc1 ldx #0 // [197] phi gfx_mode::col#2 = gfx_mode::col#3 [phi:gfx_mode::@19->gfx_mode::@20#1] -- register_copy - // [197] phi gfx_mode::vic_colors#2 = gfx_mode::vic_colors#3 [phi:gfx_mode::@19->gfx_mode::@20#2] -- register_copy + // [197] phi gfx_mode::VICII_colors#2 = gfx_mode::VICII_colors#3 [phi:gfx_mode::@19->gfx_mode::@20#2] -- register_copy jmp __b20 // [197] phi from gfx_mode::@20 to gfx_mode::@20 [phi:gfx_mode::@20->gfx_mode::@20] __b20_from___b20: // [197] phi gfx_mode::cx#2 = gfx_mode::cx#1 [phi:gfx_mode::@20->gfx_mode::@20#0] -- register_copy // [197] phi gfx_mode::col#2 = gfx_mode::col#1 [phi:gfx_mode::@20->gfx_mode::@20#1] -- register_copy - // [197] phi gfx_mode::vic_colors#2 = gfx_mode::vic_colors#1 [phi:gfx_mode::@20->gfx_mode::@20#2] -- register_copy + // [197] phi gfx_mode::VICII_colors#2 = gfx_mode::VICII_colors#1 [phi:gfx_mode::@20->gfx_mode::@20#2] -- register_copy jmp __b20 // gfx_mode::@20 __b20: - // [198] *gfx_mode::col#2 = *gfx_mode::vic_colors#2 -- _deref_pbuz1=_deref_pbuz2 + // [198] *gfx_mode::col#2 = *gfx_mode::VICII_colors#2 -- _deref_pbuz1=_deref_pbuz2 ldy #0 - lda (vic_colors),y + lda (VICII_colors),y ldy #0 sta (col),y // [199] gfx_mode::col#1 = ++ gfx_mode::col#2 -- pbuz1=_inc_pbuz1 @@ -15042,10 +15042,10 @@ gfx_mode: { bne !+ inc.z col+1 !: - // [200] gfx_mode::vic_colors#1 = ++ gfx_mode::vic_colors#2 -- pbuz1=_inc_pbuz1 - inc.z vic_colors + // [200] gfx_mode::VICII_colors#1 = ++ gfx_mode::VICII_colors#2 -- pbuz1=_inc_pbuz1 + inc.z VICII_colors bne !+ - inc.z vic_colors+1 + inc.z VICII_colors+1 !: // [201] gfx_mode::cx#1 = ++ gfx_mode::cx#2 -- vbuxx=_inc_vbuxx inx @@ -15068,44 +15068,44 @@ gfx_mode: { // Background colors lda #0 sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR - // [206] gfx_mode::$55 = *form_vic_bg0_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 - lda form_vic_bg0_hi + // [206] gfx_mode::$55 = *form_VICII_bg0_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 + lda form_VICII_bg0_hi asl asl asl asl - // [207] gfx_mode::$56 = gfx_mode::$55 | *form_vic_bg0_lo -- vbuaa=vbuaa_bor__deref_pbuc1 - ora form_vic_bg0_lo + // [207] gfx_mode::$56 = gfx_mode::$55 | *form_VICII_bg0_lo -- vbuaa=vbuaa_bor__deref_pbuc1 + ora form_VICII_bg0_lo // [208] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = gfx_mode::$56 -- _deref_pbuc1=vbuaa sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR - // [209] gfx_mode::$57 = *form_vic_bg1_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 - lda form_vic_bg1_hi + // [209] gfx_mode::$57 = *form_VICII_bg1_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 + lda form_VICII_bg1_hi asl asl asl asl - // [210] gfx_mode::$58 = gfx_mode::$57 | *form_vic_bg1_lo -- vbuaa=vbuaa_bor__deref_pbuc1 - ora form_vic_bg1_lo + // [210] gfx_mode::$58 = gfx_mode::$57 | *form_VICII_bg1_lo -- vbuaa=vbuaa_bor__deref_pbuc1 + ora form_VICII_bg1_lo // [211] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) = gfx_mode::$58 -- _deref_pbuc1=vbuaa sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1 - // [212] gfx_mode::$59 = *form_vic_bg2_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 - lda form_vic_bg2_hi + // [212] gfx_mode::$59 = *form_VICII_bg2_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 + lda form_VICII_bg2_hi asl asl asl asl - // [213] gfx_mode::$60 = gfx_mode::$59 | *form_vic_bg2_lo -- vbuaa=vbuaa_bor__deref_pbuc1 - ora form_vic_bg2_lo + // [213] gfx_mode::$60 = gfx_mode::$59 | *form_VICII_bg2_lo -- vbuaa=vbuaa_bor__deref_pbuc1 + ora form_VICII_bg2_lo // [214] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2) = gfx_mode::$60 -- _deref_pbuc1=vbuaa sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2 - // [215] gfx_mode::$61 = *form_vic_bg3_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 - lda form_vic_bg3_hi + // [215] gfx_mode::$61 = *form_VICII_bg3_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 + lda form_VICII_bg3_hi asl asl asl asl - // [216] gfx_mode::$62 = gfx_mode::$61 | *form_vic_bg3_lo -- vbuaa=vbuaa_bor__deref_pbuc1 - ora form_vic_bg3_lo + // [216] gfx_mode::$62 = gfx_mode::$61 | *form_VICII_bg3_lo -- vbuaa=vbuaa_bor__deref_pbuc1 + ora form_VICII_bg3_lo // [217] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR3) = gfx_mode::$62 -- _deref_pbuc1=vbuaa sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR3 // [218] if(*form_dtv_palet==0) goto gfx_mode::@24 -- _deref_pbuc1_eq_0_then_la1 @@ -15200,10 +15200,10 @@ gfx_init_screen0: { .label cy = $11 // [237] phi from gfx_init_screen0 to gfx_init_screen0::@1 [phi:gfx_init_screen0->gfx_init_screen0::@1] __b1_from_gfx_init_screen0: - // [237] phi gfx_init_screen0::ch#3 = VIC_SCREEN0 [phi:gfx_init_screen0->gfx_init_screen0::@1#0] -- pbuz1=pbuc1 - lda #gfx_init_screen0::@1#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN0 + lda #>VICII_SCREEN0 sta.z ch+1 // [237] phi gfx_init_screen0::cy#4 = 0 [phi:gfx_init_screen0->gfx_init_screen0::@1#1] -- vbuz1=vbuc1 lda #0 @@ -15278,10 +15278,10 @@ gfx_init_screen1: { .label cy = 2 // [251] phi from gfx_init_screen1 to gfx_init_screen1::@1 [phi:gfx_init_screen1->gfx_init_screen1::@1] __b1_from_gfx_init_screen1: - // [251] phi gfx_init_screen1::ch#3 = VIC_SCREEN1 [phi:gfx_init_screen1->gfx_init_screen1::@1#0] -- pbuz1=pbuc1 - lda #gfx_init_screen1::@1#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN1 + lda #>VICII_SCREEN1 sta.z ch+1 // [251] phi gfx_init_screen1::cy#4 = 0 [phi:gfx_init_screen1->gfx_init_screen1::@1#1] -- vbuz1=vbuc1 lda #0 @@ -15349,10 +15349,10 @@ gfx_init_screen2: { .label cy = $e // [263] phi from gfx_init_screen2 to gfx_init_screen2::@1 [phi:gfx_init_screen2->gfx_init_screen2::@1] __b1_from_gfx_init_screen2: - // [263] phi gfx_init_screen2::ch#3 = VIC_SCREEN2 [phi:gfx_init_screen2->gfx_init_screen2::@1#0] -- pbuz1=pbuc1 - lda #gfx_init_screen2::@1#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN2 + lda #>VICII_SCREEN2 sta.z ch+1 // [263] phi gfx_init_screen2::cy#4 = 0 [phi:gfx_init_screen2->gfx_init_screen2::@1#1] -- vbuz1=vbuc1 lda #0 @@ -15435,10 +15435,10 @@ gfx_init_screen3: { .label cy = $e // [278] phi from gfx_init_screen3 to gfx_init_screen3::@1 [phi:gfx_init_screen3->gfx_init_screen3::@1] __b1_from_gfx_init_screen3: - // [278] phi gfx_init_screen3::ch#3 = VIC_SCREEN3 [phi:gfx_init_screen3->gfx_init_screen3::@1#0] -- pbuz1=pbuc1 - lda #gfx_init_screen3::@1#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN3 + lda #>VICII_SCREEN3 sta.z ch+1 // [278] phi gfx_init_screen3::cy#4 = 0 [phi:gfx_init_screen3->gfx_init_screen3::@1#1] -- vbuz1=vbuc1 lda #0 @@ -15516,10 +15516,10 @@ gfx_init_screen4: { // [292] phi gfx_init_screen4::cy#4 = 0 [phi:gfx_init_screen4->gfx_init_screen4::@1#0] -- vbuz1=vbuc1 lda #0 sta.z cy - // [292] phi gfx_init_screen4::ch#3 = VIC_SCREEN4 [phi:gfx_init_screen4->gfx_init_screen4::@1#1] -- pbuz1=pbuc1 - lda #gfx_init_screen4::@1#1] -- pbuz1=pbuc1 + lda #VIC_SCREEN4 + lda #>VICII_SCREEN4 sta.z ch+1 jmp __b1 // [292] phi from gfx_init_screen4::@3 to gfx_init_screen4::@1 [phi:gfx_init_screen4::@3->gfx_init_screen4::@1] @@ -15584,10 +15584,10 @@ gfx_init_charset: { // [302] phi gfx_init_charset::c#4 = 0 [phi:gfx_init_charset->gfx_init_charset::@1#0] -- vbuz1=vbuc1 lda #0 sta.z c - // [302] phi gfx_init_charset::charset#3 = VIC_CHARSET_ROM [phi:gfx_init_charset->gfx_init_charset::@1#1] -- pbuz1=pbuc1 - lda #gfx_init_charset::@1#1] -- pbuz1=pbuc1 + lda #VIC_CHARSET_ROM + lda #>VICII_CHARSET_ROM sta.z charset+1 // [302] phi gfx_init_charset::chargen#3 = CHARGEN [phi:gfx_init_charset->gfx_init_charset::@1#2] -- pbuz1=pbuc1 lda #bitmap_init] - bitmap_init_from_gfx_init_vic_bitmap: + // [637] phi from gfx_init_VICII_bitmap to bitmap_init [phi:gfx_init_VICII_bitmap->bitmap_init] + bitmap_init_from_gfx_init_VICII_bitmap: jsr bitmap_init - // [315] phi from gfx_init_vic_bitmap to gfx_init_vic_bitmap::@3 [phi:gfx_init_vic_bitmap->gfx_init_vic_bitmap::@3] - __b3_from_gfx_init_vic_bitmap: + // [315] phi from gfx_init_VICII_bitmap to gfx_init_VICII_bitmap::@3 [phi:gfx_init_VICII_bitmap->gfx_init_VICII_bitmap::@3] + __b3_from_gfx_init_VICII_bitmap: jmp __b3 - // gfx_init_vic_bitmap::@3 + // gfx_init_VICII_bitmap::@3 __b3: // [316] call bitmap_clear jsr bitmap_clear - // [317] phi from gfx_init_vic_bitmap::@3 to gfx_init_vic_bitmap::@1 [phi:gfx_init_vic_bitmap::@3->gfx_init_vic_bitmap::@1] + // [317] phi from gfx_init_VICII_bitmap::@3 to gfx_init_VICII_bitmap::@1 [phi:gfx_init_VICII_bitmap::@3->gfx_init_VICII_bitmap::@1] __b1_from___b3: - // [317] phi gfx_init_vic_bitmap::l#2 = 0 [phi:gfx_init_vic_bitmap::@3->gfx_init_vic_bitmap::@1#0] -- vbuz1=vbuc1 + // [317] phi gfx_init_VICII_bitmap::l#2 = 0 [phi:gfx_init_VICII_bitmap::@3->gfx_init_VICII_bitmap::@1#0] -- vbuz1=vbuc1 lda #0 sta.z l jmp __b1 - // gfx_init_vic_bitmap::@1 + // gfx_init_VICII_bitmap::@1 __b1: - // [318] if(gfx_init_vic_bitmap::l#2gfx_init_vic_bitmap::@1] + // [317] phi from gfx_init_VICII_bitmap::@4 to gfx_init_VICII_bitmap::@1 [phi:gfx_init_VICII_bitmap::@4->gfx_init_VICII_bitmap::@1] __b1_from___b4: - // [317] phi gfx_init_vic_bitmap::l#2 = gfx_init_vic_bitmap::l#1 [phi:gfx_init_vic_bitmap::@4->gfx_init_vic_bitmap::@1#0] -- register_copy + // [317] phi gfx_init_VICII_bitmap::l#2 = gfx_init_VICII_bitmap::l#1 [phi:gfx_init_VICII_bitmap::@4->gfx_init_VICII_bitmap::@1#0] -- register_copy jmp __b1 .segment Data lines_x: .byte 0, $ff, $ff, 0, 0, $80, $ff, $80, 0, $80 @@ -17371,14 +17371,14 @@ get_plane: { // [562] phi from get_plane get_plane::@1 to get_plane::@return [phi:get_plane/get_plane::@1->get_plane::@return] __breturn_from_get_plane: __breturn_from___b1: - // [562] phi get_plane::return#14 = (dword)VIC_SCREEN0 [phi:get_plane/get_plane::@1->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_SCREEN0 + lda #>VICII_SCREEN0 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN0>>$10 + lda #>VICII_SCREEN0>>$10 sta.z return+3 jmp __breturn // [562] phi from get_plane::@10 to get_plane::@return [phi:get_plane::@10->get_plane::@return] @@ -17431,62 +17431,62 @@ get_plane: { jmp __breturn // [562] phi from get_plane::@2 to get_plane::@return [phi:get_plane::@2->get_plane::@return] __breturn_from___b2: - // [562] phi get_plane::return#14 = (dword)VIC_SCREEN1 [phi:get_plane::@2->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_SCREEN1 + lda #>VICII_SCREEN1 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN1>>$10 + lda #>VICII_SCREEN1>>$10 sta.z return+3 jmp __breturn // [562] phi from get_plane::@3 to get_plane::@return [phi:get_plane::@3->get_plane::@return] __breturn_from___b3: - // [562] phi get_plane::return#14 = (dword)VIC_SCREEN2 [phi:get_plane::@3->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_SCREEN2 + lda #>VICII_SCREEN2 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN2>>$10 + lda #>VICII_SCREEN2>>$10 sta.z return+3 jmp __breturn // [562] phi from get_plane::@4 to get_plane::@return [phi:get_plane::@4->get_plane::@return] __breturn_from___b4: - // [562] phi get_plane::return#14 = (dword)VIC_SCREEN3 [phi:get_plane::@4->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_SCREEN3 + lda #>VICII_SCREEN3 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN3>>$10 + lda #>VICII_SCREEN3>>$10 sta.z return+3 jmp __breturn // [562] phi from get_plane::@5 to get_plane::@return [phi:get_plane::@5->get_plane::@return] __breturn_from___b5: - // [562] phi get_plane::return#14 = (dword)VIC_BITMAP [phi:get_plane::@5->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_BITMAP + lda #>VICII_BITMAP sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_BITMAP>>$10 + lda #>VICII_BITMAP>>$10 sta.z return+3 jmp __breturn // [562] phi from get_plane::@6 to get_plane::@return [phi:get_plane::@6->get_plane::@return] __breturn_from___b6: - // [562] phi get_plane::return#14 = (dword)VIC_CHARSET_ROM [phi:get_plane::@6->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_CHARSET_ROM + lda #>VICII_CHARSET_ROM sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_CHARSET_ROM>>$10 + lda #>VICII_CHARSET_ROM>>$10 sta.z return+3 jmp __breturn // [562] phi from get_plane::@7 to get_plane::@return [phi:get_plane::@7->get_plane::@return] @@ -17530,126 +17530,126 @@ get_plane: { // [563] return rts } - // get_vic_screen + // get_VICII_screen // Get the VIC screen address from the screen index -// get_vic_screen(byte register(A) idx) -get_vic_screen: { +// get_VICII_screen(byte register(A) idx) +get_VICII_screen: { .label return = 3 - // [565] if(get_vic_screen::idx#2==0) goto get_vic_screen::@return -- vbuaa_eq_0_then_la1 + // [565] if(get_VICII_screen::idx#2==0) goto get_VICII_screen::@return -- vbuaa_eq_0_then_la1 cmp #0 - beq __breturn_from_get_vic_screen + beq __breturn_from_get_VICII_screen jmp __b2 - // get_vic_screen::@2 + // get_VICII_screen::@2 __b2: - // [566] if(get_vic_screen::idx#2==1) goto get_vic_screen::@return -- vbuaa_eq_vbuc1_then_la1 + // [566] if(get_VICII_screen::idx#2==1) goto get_VICII_screen::@return -- vbuaa_eq_vbuc1_then_la1 cmp #1 beq __breturn_from___b2 jmp __b3 - // get_vic_screen::@3 + // get_VICII_screen::@3 __b3: - // [567] if(get_vic_screen::idx#2==2) goto get_vic_screen::@return -- vbuaa_eq_vbuc1_then_la1 + // [567] if(get_VICII_screen::idx#2==2) goto get_VICII_screen::@return -- vbuaa_eq_vbuc1_then_la1 cmp #2 beq __breturn_from___b3 jmp __b4 - // get_vic_screen::@4 + // get_VICII_screen::@4 __b4: - // [568] if(get_vic_screen::idx#2==3) goto get_vic_screen::@return -- vbuaa_eq_vbuc1_then_la1 + // [568] if(get_VICII_screen::idx#2==3) goto get_VICII_screen::@return -- vbuaa_eq_vbuc1_then_la1 cmp #3 beq __breturn_from___b4 jmp __b5 - // get_vic_screen::@5 + // get_VICII_screen::@5 __b5: - // [569] if(get_vic_screen::idx#2!=4) goto get_vic_screen::@1 -- vbuaa_neq_vbuc1_then_la1 + // [569] if(get_VICII_screen::idx#2!=4) goto get_VICII_screen::@1 -- vbuaa_neq_vbuc1_then_la1 cmp #4 bne __b1_from___b5 - // [571] phi from get_vic_screen::@5 to get_vic_screen::@return [phi:get_vic_screen::@5->get_vic_screen::@return] + // [571] phi from get_VICII_screen::@5 to get_VICII_screen::@return [phi:get_VICII_screen::@5->get_VICII_screen::@return] __breturn_from___b5: - // [571] phi get_vic_screen::return#5 = VIC_SCREEN4 [phi:get_vic_screen::@5->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN4 + lda #>VICII_SCREEN4 sta.z return+1 jmp __breturn - // [570] phi from get_vic_screen::@5 to get_vic_screen::@1 [phi:get_vic_screen::@5->get_vic_screen::@1] + // [570] phi from get_VICII_screen::@5 to get_VICII_screen::@1 [phi:get_VICII_screen::@5->get_VICII_screen::@1] __b1_from___b5: jmp __b1 - // get_vic_screen::@1 + // get_VICII_screen::@1 __b1: - // [571] phi from get_vic_screen get_vic_screen::@1 to get_vic_screen::@return [phi:get_vic_screen/get_vic_screen::@1->get_vic_screen::@return] - __breturn_from_get_vic_screen: + // [571] phi from get_VICII_screen get_VICII_screen::@1 to get_VICII_screen::@return [phi:get_VICII_screen/get_VICII_screen::@1->get_VICII_screen::@return] + __breturn_from_get_VICII_screen: __breturn_from___b1: - // [571] phi get_vic_screen::return#5 = VIC_SCREEN0 [phi:get_vic_screen/get_vic_screen::@1->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN0 + lda #>VICII_SCREEN0 sta.z return+1 jmp __breturn - // [571] phi from get_vic_screen::@2 to get_vic_screen::@return [phi:get_vic_screen::@2->get_vic_screen::@return] + // [571] phi from get_VICII_screen::@2 to get_VICII_screen::@return [phi:get_VICII_screen::@2->get_VICII_screen::@return] __breturn_from___b2: - // [571] phi get_vic_screen::return#5 = VIC_SCREEN1 [phi:get_vic_screen::@2->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN1 + lda #>VICII_SCREEN1 sta.z return+1 jmp __breturn - // [571] phi from get_vic_screen::@3 to get_vic_screen::@return [phi:get_vic_screen::@3->get_vic_screen::@return] + // [571] phi from get_VICII_screen::@3 to get_VICII_screen::@return [phi:get_VICII_screen::@3->get_VICII_screen::@return] __breturn_from___b3: - // [571] phi get_vic_screen::return#5 = VIC_SCREEN2 [phi:get_vic_screen::@3->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN2 + lda #>VICII_SCREEN2 sta.z return+1 jmp __breturn - // [571] phi from get_vic_screen::@4 to get_vic_screen::@return [phi:get_vic_screen::@4->get_vic_screen::@return] + // [571] phi from get_VICII_screen::@4 to get_VICII_screen::@return [phi:get_VICII_screen::@4->get_VICII_screen::@return] __breturn_from___b4: - // [571] phi get_vic_screen::return#5 = VIC_SCREEN3 [phi:get_vic_screen::@4->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN3 + lda #>VICII_SCREEN3 sta.z return+1 jmp __breturn - // get_vic_screen::@return + // get_VICII_screen::@return __breturn: // [572] return rts } - // get_vic_charset + // get_VICII_charset // Get the VIC charset/bitmap address from the index -// get_vic_charset(byte register(A) idx) -get_vic_charset: { +// get_VICII_charset(byte register(A) idx) +get_VICII_charset: { .label return = 7 - // [573] if(get_vic_charset::idx#0==0) goto get_vic_charset::@return -- vbuaa_eq_0_then_la1 + // [573] if(get_VICII_charset::idx#0==0) goto get_VICII_charset::@return -- vbuaa_eq_0_then_la1 cmp #0 - beq __breturn_from_get_vic_charset + beq __breturn_from_get_VICII_charset jmp __b2 - // get_vic_charset::@2 + // get_VICII_charset::@2 __b2: - // [574] if(get_vic_charset::idx#0!=1) goto get_vic_charset::@1 -- vbuaa_neq_vbuc1_then_la1 + // [574] if(get_VICII_charset::idx#0!=1) goto get_VICII_charset::@1 -- vbuaa_neq_vbuc1_then_la1 cmp #1 bne __b1_from___b2 - // [576] phi from get_vic_charset::@2 to get_vic_charset::@return [phi:get_vic_charset::@2->get_vic_charset::@return] + // [576] phi from get_VICII_charset::@2 to get_VICII_charset::@return [phi:get_VICII_charset::@2->get_VICII_charset::@return] __breturn_from___b2: - // [576] phi get_vic_charset::return#2 = VIC_BITMAP [phi:get_vic_charset::@2->get_vic_charset::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_charset::@return#0] -- pbuz1=pbuc1 + lda #VIC_BITMAP + lda #>VICII_BITMAP sta.z return+1 jmp __breturn - // [575] phi from get_vic_charset::@2 to get_vic_charset::@1 [phi:get_vic_charset::@2->get_vic_charset::@1] + // [575] phi from get_VICII_charset::@2 to get_VICII_charset::@1 [phi:get_VICII_charset::@2->get_VICII_charset::@1] __b1_from___b2: jmp __b1 - // get_vic_charset::@1 + // get_VICII_charset::@1 __b1: - // [576] phi from get_vic_charset get_vic_charset::@1 to get_vic_charset::@return [phi:get_vic_charset/get_vic_charset::@1->get_vic_charset::@return] - __breturn_from_get_vic_charset: + // [576] phi from get_VICII_charset get_VICII_charset::@1 to get_VICII_charset::@return [phi:get_VICII_charset/get_VICII_charset::@1->get_VICII_charset::@return] + __breturn_from_get_VICII_charset: __breturn_from___b1: - // [576] phi get_vic_charset::return#2 = VIC_CHARSET_ROM [phi:get_vic_charset/get_vic_charset::@1->get_vic_charset::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_charset::@return#0] -- pbuz1=pbuc1 + lda #VIC_CHARSET_ROM + lda #>VICII_CHARSET_ROM sta.z return+1 jmp __breturn - // get_vic_charset::@return + // get_VICII_charset::@return __breturn: // [577] return rts @@ -17989,8 +17989,8 @@ bitmap_init: { and #$f8 // [640] bitmap_plot_xlo[bitmap_init::x#2] = bitmap_init::$0 -- pbuc1_derefidx_vbuxx=vbuaa sta bitmap_plot_xlo,x - // [641] bitmap_plot_xhi[bitmap_init::x#2] = >VIC_BITMAP -- pbuc1_derefidx_vbuxx=vbuc2 - lda #>VIC_BITMAP + // [641] bitmap_plot_xhi[bitmap_init::x#2] = >VICII_BITMAP -- pbuc1_derefidx_vbuxx=vbuc2 + lda #>VICII_BITMAP sta bitmap_plot_xhi,x // [642] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 -- pbuc1_derefidx_vbuxx=vbuyy tya @@ -19586,9 +19586,9 @@ Replacing label __b2_from_apply_preset with __b2_from___b12 Replacing label __b1_from___b12 with __b1 Replacing label __breturn_from_get_plane with __b1 Replacing label __b1_from___b14 with __b1 -Replacing label __breturn_from_get_vic_screen with __b1 +Replacing label __breturn_from_get_VICII_screen with __b1 Replacing label __b1_from___b5 with __b1 -Replacing label __breturn_from_get_vic_charset with __b1 +Replacing label __breturn_from_get_VICII_charset with __b1 Replacing label __b1_from___b2 with __b1 Replacing label __b7_from___b8 with __b7 Replacing label __b2_from___b21 with __b2 @@ -19632,7 +19632,7 @@ Removing instruction __b4_from___b3: Removing instruction gfx_init_screen4_from___b4: Removing instruction __b5_from___b4: Removing instruction __b6_from___b5: -Removing instruction gfx_init_vic_bitmap_from___b6: +Removing instruction gfx_init_VICII_bitmap_from___b6: Removing instruction __b7_from___b6: Removing instruction gfx_init_plane_8bppchunky_from___b7: Removing instruction __b8_from___b7: @@ -19709,7 +19709,7 @@ Removing instruction __b2_from___b2: Removing instruction __b1_from___b3: Removing instruction __b2_from___b1: Removing instruction __b2_from___b2: -Removing instruction __b3_from_gfx_init_vic_bitmap: +Removing instruction __b3_from_gfx_init_VICII_bitmap: Removing instruction __b1_from___b5: Removing instruction __b2_from___b1: Removing instruction __b2_from___b3: @@ -19768,10 +19768,10 @@ Removing instruction __b1_from___b14: Removing instruction __breturn_from_get_plane: Removing instruction __breturn_from___b1: Removing instruction __b1_from___b5: -Removing instruction __breturn_from_get_vic_screen: +Removing instruction __breturn_from_get_VICII_screen: Removing instruction __breturn_from___b1: Removing instruction __b1_from___b2: -Removing instruction __breturn_from_get_vic_charset: +Removing instruction __breturn_from_get_VICII_charset: Removing instruction __breturn_from___b1: Removing instruction __b7_from___b8: Removing instruction __b8_from___b15: @@ -19886,10 +19886,10 @@ Removing instruction get_plane_from___b9: Removing instruction __b27: Removing instruction get_plane_from___b27: Removing instruction __b28: -Removing instruction get_vic_screen_from___b28: +Removing instruction get_VICII_screen_from___b28: Removing instruction __b29: Removing instruction __b30: -Removing instruction get_vic_screen_from___b30: +Removing instruction get_VICII_screen_from___b30: Removing instruction __b31: Removing instruction __b21: Removing instruction __b22: @@ -19916,7 +19916,7 @@ Removing instruction __b1_from_gfx_init_charset: Removing instruction __b3: Removing instruction __b4: Removing instruction __breturn: -Removing instruction bitmap_init_from_gfx_init_vic_bitmap: +Removing instruction bitmap_init_from_gfx_init_VICII_bitmap: Removing instruction __b3: Removing instruction __b1_from___b3: Removing instruction __breturn: @@ -20348,22 +20348,22 @@ const byte RADIX::DECIMAL = $a const byte RADIX::HEXADECIMAL = $10 const byte RADIX::OCTAL = 8 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte* VIC_BITMAP = (byte*) 24576 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CHARSET_ROM = (byte*) 22528 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte* VIC_CONTROL2 = (byte*) 53270 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 -const nomodify byte* VIC_SCREEN0 = (byte*) 16384 -const nomodify byte* VIC_SCREEN1 = (byte*) 17408 -const nomodify byte* VIC_SCREEN2 = (byte*) 18432 -const nomodify byte* VIC_SCREEN3 = (byte*) 19456 -const nomodify byte* VIC_SCREEN4 = (byte*) 20480 +const nomodify byte* VICII_BITMAP = (byte*) 24576 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CHARSET_ROM = (byte*) 22528 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL2 = (byte*) 53270 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 +const nomodify byte* VICII_SCREEN0 = (byte*) 16384 +const nomodify byte* VICII_SCREEN1 = (byte*) 17408 +const nomodify byte* VICII_SCREEN2 = (byte*) 18432 +const nomodify byte* VICII_SCREEN3 = (byte*) 19456 +const nomodify byte* VICII_SCREEN4 = (byte*) 20480 void apply_preset(byte apply_preset::idx) byte apply_preset::i byte apply_preset::i#1 reg byte y 2.00000002E8 @@ -20586,6 +20586,17 @@ byte dtvSetCpuBankSegment1::cpuBankIdx byte dtvSetCpuBankSegment1::cpuBankIdx#1 reg byte a 20002.0 byte dtvSetCpuBankSegment1::cpuBankIdx#11 reg byte a 2002.0 byte dtvSetCpuBankSegment1::cpuBankIdx#13 reg byte a 111003.0 +const nomodify byte* form_VICII_bg0_hi = form_fields_val+$1c +const nomodify byte* form_VICII_bg0_lo = form_fields_val+$1d +const nomodify byte* form_VICII_bg1_hi = form_fields_val+$1e +const nomodify byte* form_VICII_bg1_lo = form_fields_val+$1f +const nomodify byte* form_VICII_bg2_hi = form_fields_val+$20 +const nomodify byte* form_VICII_bg2_lo = form_fields_val+$21 +const nomodify byte* form_VICII_bg3_hi = form_fields_val+$22 +const nomodify byte* form_VICII_bg3_lo = form_fields_val+$23 +const nomodify byte* form_VICII_cols = form_fields_val+$1a +const nomodify byte* form_VICII_gfx = form_fields_val+$19 +const nomodify byte* form_VICII_screen = form_fields_val+$18 const nomodify byte* form_a_mod_hi = form_fields_val+$f const nomodify byte* form_a_mod_lo = form_fields_val+$10 const nomodify byte* form_a_pattern = form_fields_val+$a @@ -20682,17 +20693,21 @@ byte* form_set_screen::screen byte form_set_screen::y byte form_set_screen::y#1 reg byte x 150001.5 byte form_set_screen::y#2 reg byte x 66667.33333333333 -const nomodify byte* form_vic_bg0_hi = form_fields_val+$1c -const nomodify byte* form_vic_bg0_lo = form_fields_val+$1d -const nomodify byte* form_vic_bg1_hi = form_fields_val+$1e -const nomodify byte* form_vic_bg1_lo = form_fields_val+$1f -const nomodify byte* form_vic_bg2_hi = form_fields_val+$20 -const nomodify byte* form_vic_bg2_lo = form_fields_val+$21 -const nomodify byte* form_vic_bg3_hi = form_fields_val+$22 -const nomodify byte* form_vic_bg3_lo = form_fields_val+$23 -const nomodify byte* form_vic_cols = form_fields_val+$1a -const nomodify byte* form_vic_gfx = form_fields_val+$19 -const nomodify byte* form_vic_screen = form_fields_val+$18 +byte* get_VICII_charset(byte get_VICII_charset::idx) +byte get_VICII_charset::idx +byte get_VICII_charset::idx#0 reg byte a 1051.5 +byte* get_VICII_charset::return +byte* get_VICII_charset::return#2 return zp[2]:7 33.666666666666664 +byte* get_VICII_charset::return#4 return zp[2]:7 202.0 +byte* get_VICII_screen(byte get_VICII_screen::idx) +byte get_VICII_screen::idx +byte get_VICII_screen::idx#0 reg byte a 202.0 +byte get_VICII_screen::idx#1 reg byte a 202.0 +byte get_VICII_screen::idx#2 reg byte a 1041.4 +byte* get_VICII_screen::return +byte* get_VICII_screen::return#10 return zp[2]:3 202.0 +byte* get_VICII_screen::return#11 return zp[2]:3 202.0 +byte* get_VICII_screen::return#5 return zp[2]:3 50.5 dword get_plane(byte get_plane::idx) byte get_plane::idx byte get_plane::idx#0 reg byte a 202.0 @@ -20702,22 +20717,14 @@ dword get_plane::return dword get_plane::return#14 return zp[4]:9 50.5 dword get_plane::return#16 return zp[4]:9 202.0 dword get_plane::return#17 return zp[4]:9 202.0 -byte* get_vic_charset(byte get_vic_charset::idx) -byte get_vic_charset::idx -byte get_vic_charset::idx#0 reg byte a 1051.5 -byte* get_vic_charset::return -byte* get_vic_charset::return#2 return zp[2]:7 33.666666666666664 -byte* get_vic_charset::return#4 return zp[2]:7 202.0 -byte* get_vic_screen(byte get_vic_screen::idx) -byte get_vic_screen::idx -byte get_vic_screen::idx#0 reg byte a 202.0 -byte get_vic_screen::idx#1 reg byte a 202.0 -byte get_vic_screen::idx#2 reg byte a 1041.4 -byte* get_vic_screen::return -byte* get_vic_screen::return#10 return zp[2]:3 202.0 -byte* get_vic_screen::return#11 return zp[2]:3 202.0 -byte* get_vic_screen::return#5 return zp[2]:3 50.5 void gfx_init() +void gfx_init_VICII_bitmap() +byte gfx_init_VICII_bitmap::l +byte gfx_init_VICII_bitmap::l#1 l zp[1]:2 2002.0 +byte gfx_init_VICII_bitmap::l#2 l zp[1]:2 1001.0 +const byte gfx_init_VICII_bitmap::lines_cnt = 9 +const byte* gfx_init_VICII_bitmap::lines_x[] = { 0, $ff, $ff, 0, 0, $80, $ff, $80, 0, $80 } +const byte* gfx_init_VICII_bitmap::lines_y[] = { 0, 0, $c7, $c7, 0, 0, $64, $c7, $64, 0 } void gfx_init_charset() byte gfx_init_charset::c byte gfx_init_charset::c#1 c zp[1]:17 1501.5 @@ -20931,13 +20938,6 @@ byte gfx_init_screen4::cx#2 reg byte x 6667.333333333333 byte gfx_init_screen4::cy byte gfx_init_screen4::cy#1 cy zp[1]:17 1501.5 byte gfx_init_screen4::cy#4 cy zp[1]:17 333.6666666666667 -void gfx_init_vic_bitmap() -byte gfx_init_vic_bitmap::l -byte gfx_init_vic_bitmap::l#1 l zp[1]:2 2002.0 -byte gfx_init_vic_bitmap::l#2 l zp[1]:2 1001.0 -const byte gfx_init_vic_bitmap::lines_cnt = 9 -const byte* gfx_init_vic_bitmap::lines_x[] = { 0, $ff, $ff, 0, 0, $80, $ff, $80, 0, $80 } -const byte* gfx_init_vic_bitmap::lines_y[] = { 0, 0, $c7, $c7, 0, 0, $64, $c7, $64, 0 } void gfx_mode() byte~ gfx_mode::$18 reg byte a 202.0 dword~ gfx_mode::$20 zp[4]:9 202.0 @@ -20980,6 +20980,17 @@ byte~ gfx_mode::$62 reg byte a 202.0 byte*~ gfx_mode::$82 zp[2]:3 101.0 byte*~ gfx_mode::$83 zp[2]:7 101.0 byte~ gfx_mode::$84 reg byte a 202.0 +byte* gfx_mode::VICII_colors +byte* gfx_mode::VICII_colors#0 VICII_colors zp[2]:3 202.0 +byte* gfx_mode::VICII_colors#1 VICII_colors zp[2]:3 42000.600000000006 +byte* gfx_mode::VICII_colors#2 VICII_colors zp[2]:3 103334.66666666666 +byte* gfx_mode::VICII_colors#3 VICII_colors zp[2]:3 20103.0 +byte gfx_mode::VICII_control +byte gfx_mode::VICII_control#2 reg byte x 202.0 +byte gfx_mode::VICII_control#4 reg byte x 303.0 +byte gfx_mode::VICII_control#5 reg byte x 101.0 +byte gfx_mode::VICII_control2 +byte gfx_mode::VICII_control2#2 reg byte a 101.0 byte* gfx_mode::col byte* gfx_mode::col#1 col zp[2]:5 35000.5 byte* gfx_mode::col#2 col zp[2]:5 155002.0 @@ -21018,17 +21029,6 @@ dword gfx_mode::plane_b dword gfx_mode::plane_b#0 plane_b zp[4]:9 57.714285714285715 byte gfx_mode::plane_b_offs byte gfx_mode::plane_b_offs#0 reg byte x 40.4 -byte* gfx_mode::vic_colors -byte* gfx_mode::vic_colors#0 vic_colors zp[2]:3 202.0 -byte* gfx_mode::vic_colors#1 vic_colors zp[2]:3 42000.600000000006 -byte* gfx_mode::vic_colors#2 vic_colors zp[2]:3 103334.66666666666 -byte* gfx_mode::vic_colors#3 vic_colors zp[2]:3 20103.0 -byte gfx_mode::vic_control -byte gfx_mode::vic_control#2 reg byte x 202.0 -byte gfx_mode::vic_control#4 reg byte x 303.0 -byte gfx_mode::vic_control#5 reg byte x 101.0 -byte gfx_mode::vic_control2 -byte gfx_mode::vic_control2#2 reg byte a 101.0 byte keyboard_event_get() byte keyboard_event_get::return byte keyboard_event_get::return#1 reg byte a 2.0000002E7 @@ -21189,8 +21189,8 @@ const byte* render_preset_name::name#9 name_9 = "Sixs Fred " reg byte x [ form_mode::i#2 form_mode::i#1 ] reg byte x [ gfx_mode::dtv_control#12 gfx_mode::dtv_control#6 gfx_mode::dtv_control#13 gfx_mode::dtv_control#5 gfx_mode::dtv_control#11 gfx_mode::dtv_control#4 gfx_mode::dtv_control#10 gfx_mode::dtv_control#3 gfx_mode::dtv_control#15 gfx_mode::dtv_control#14 gfx_mode::dtv_control#2 ] -reg byte x [ gfx_mode::vic_control#4 gfx_mode::vic_control#2 gfx_mode::vic_control#5 ] -reg byte a [ gfx_mode::vic_control2#2 ] +reg byte x [ gfx_mode::VICII_control#4 gfx_mode::VICII_control#2 gfx_mode::VICII_control#5 ] +reg byte a [ gfx_mode::VICII_control2#2 ] reg byte x [ gfx_mode::cx#2 gfx_mode::cx#1 ] reg byte x [ gfx_mode::j#2 gfx_mode::j#1 ] reg byte x [ gfx_mode::i#2 gfx_mode::i#1 ] @@ -21200,11 +21200,11 @@ reg byte x [ gfx_init_screen2::cx#2 gfx_init_screen2::cx#1 ] reg byte x [ gfx_init_screen3::cx#2 gfx_init_screen3::cx#1 ] reg byte x [ gfx_init_screen4::cx#2 gfx_init_screen4::cx#1 ] reg byte x [ gfx_init_charset::l#2 gfx_init_charset::l#1 ] -zp[1]:2 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] +zp[1]:2 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] reg byte x [ gfx_init_plane_8bppchunky::gfxbCpuBank#4 gfx_init_plane_8bppchunky::gfxbCpuBank#7 gfx_init_plane_8bppchunky::gfxbCpuBank#8 gfx_init_plane_8bppchunky::gfxbCpuBank#2 ] reg byte x [ gfx_init_plane_charset8::cp#2 gfx_init_plane_charset8::cp#1 ] reg byte a [ gfx_init_plane_charset8::c#2 gfx_init_plane_charset8::c#3 ] -zp[2]:3 [ gfx_init_plane_horisontal::gfxa#3 gfx_init_plane_horisontal::gfxa#6 gfx_init_plane_horisontal::gfxa#7 gfx_init_plane_horisontal::gfxa#1 gfx_init_plane_horisontal::gfxa#2 gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 get_vic_screen::return#11 get_vic_screen::return#5 get_vic_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] +zp[2]:3 [ gfx_init_plane_horisontal::gfxa#3 gfx_init_plane_horisontal::gfxa#6 gfx_init_plane_horisontal::gfxa#7 gfx_init_plane_horisontal::gfxa#1 gfx_init_plane_horisontal::gfxa#2 gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 get_VICII_screen::return#11 get_VICII_screen::return#5 get_VICII_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] reg byte x [ gfx_init_plane_horisontal::ax#2 gfx_init_plane_horisontal::ax#1 ] reg byte x [ gfx_init_plane_vertical::bx#2 gfx_init_plane_vertical::bx#1 ] zp[2]:5 [ gfx_init_plane_horisontal2::gfxa#2 gfx_init_plane_horisontal2::gfxa#3 gfx_init_plane_horisontal2::gfxa#1 gfx_init_plane_vertical::gfxb#2 gfx_init_plane_vertical::gfxb#3 gfx_init_plane_vertical::gfxb#1 gfx_init_plane_charset8::chargen#2 gfx_init_plane_charset8::chargen#3 gfx_init_plane_charset8::chargen#1 gfx_init_plane_8bppchunky::gfxb#4 gfx_init_plane_8bppchunky::gfxb#3 gfx_init_plane_8bppchunky::gfxb#5 gfx_init_plane_8bppchunky::gfxb#1 gfx_init_charset::chargen#2 gfx_init_charset::chargen#3 gfx_init_charset::chargen#1 gfx_init_screen4::ch#2 gfx_init_screen4::ch#3 gfx_init_screen4::ch#1 gfx_init_screen1::ch#2 gfx_init_screen1::ch#3 gfx_init_screen1::ch#1 gfx_mode::col#2 gfx_mode::col#3 gfx_mode::col#1 ] @@ -21215,14 +21215,14 @@ reg byte a [ render_preset_name::idx#10 render_preset_name::idx#0 render_preset_ reg byte x [ form_control::return#2 ] reg byte y [ apply_preset::i#2 apply_preset::i#1 ] reg byte a [ get_plane::idx#10 get_plane::idx#1 get_plane::idx#0 ] -reg byte a [ get_vic_screen::idx#2 get_vic_screen::idx#0 get_vic_screen::idx#1 ] +reg byte a [ get_VICII_screen::idx#2 get_VICII_screen::idx#0 get_VICII_screen::idx#1 ] reg byte x [ keyboard_modifiers#22 keyboard_modifiers#21 keyboard_modifiers#20 keyboard_modifiers#19 keyboard_modifiers#2 keyboard_modifiers#3 keyboard_modifiers#4 ] reg byte x [ keyboard_event_scan::col#2 keyboard_event_scan::col#1 ] reg byte a [ keyboard_event_get::return#2 keyboard_event_get::return#1 ] reg byte x [ bitmap_init::x#2 bitmap_init::x#1 ] reg byte y [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] reg byte x [ bitmap_init::y#2 bitmap_init::y#1 ] -zp[2]:7 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 get_vic_charset::return#2 get_vic_charset::return#4 gfx_mode::$83 gfx_mode::$50 form_set_screen::line#2 form_set_screen::line#1 print_set_screen::screen#2 print_line_cursor#22 print_line_cursor#1 print_screen#0 print_line_cursor#2 ] +zp[2]:7 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 get_VICII_charset::return#2 get_VICII_charset::return#4 gfx_mode::$83 gfx_mode::$50 form_set_screen::line#2 form_set_screen::line#1 print_set_screen::screen#2 print_line_cursor#22 print_line_cursor#1 print_screen#0 print_line_cursor#2 ] reg byte x [ bitmap_clear::x#2 bitmap_clear::x#1 ] reg byte a [ dtvSetCpuBankSegment1::cpuBankIdx#13 dtvSetCpuBankSegment1::cpuBankIdx#1 dtvSetCpuBankSegment1::cpuBankIdx#11 ] zp[4]:9 [ gfx_init_plane_fill::plane_addr#3 get_plane::return#14 get_plane::return#16 get_plane::return#17 gfx_mode::$20 gfx_mode::plane_a#0 gfx_mode::$34 gfx_mode::plane_b#0 ] @@ -21255,7 +21255,7 @@ reg byte a [ gfx_mode::$42 ] reg byte a [ gfx_mode::$43 ] reg byte a [ gfx_mode::$44 ] reg byte a [ gfx_mode::$45 ] -reg byte a [ get_vic_charset::idx#0 ] +reg byte a [ get_VICII_charset::idx#0 ] reg byte a [ gfx_mode::$51 ] zp[1]:15 [ gfx_mode::$52 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::xd#0 bitmap_line::xd#2 bitmap_line::xd#1 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::xd#1 bitmap_line_xdyi::xd#0 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::xd#0 bitmap_line_ydxd::xd#1 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::xd#1 bitmap_line_xdyd::xd#0 bitmap_clear::y#4 bitmap_clear::y#1 keyboard_event_scan::keycode#10 keyboard_event_scan::keycode#11 keyboard_event_scan::keycode#13 keyboard_event_scan::keycode#14 keyboard_event_scan::keycode#1 gfx_init_plane_horisontal::ay#4 gfx_init_plane_horisontal::ay#1 gfx_init_plane_charset8::ch#8 gfx_init_plane_charset8::ch#1 ] reg byte a [ gfx_mode::$84 ] @@ -21366,12 +21366,12 @@ Score: 10118930 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_ECM = $40 - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -21435,9 +21435,9 @@ Score: 10118930 .const OFFSET_STRUCT_MOS6569_VICII_MEMORY = $18 // Number of form fields .const form_fields_cnt = $24 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -21480,15 +21480,15 @@ Score: 10118930 // Memory address of VIC Graphics is GraphicsBank*$10000 .label DTV_GRAPHICS_VIC_BANK = $d03d // VIC Screens - .label VIC_SCREEN0 = $4000 - .label VIC_SCREEN1 = $4400 - .label VIC_SCREEN2 = $4800 - .label VIC_SCREEN3 = $4c00 - .label VIC_SCREEN4 = $5000 + .label VICII_SCREEN0 = $4000 + .label VICII_SCREEN1 = $4400 + .label VICII_SCREEN2 = $4800 + .label VICII_SCREEN3 = $4c00 + .label VICII_SCREEN4 = $5000 // VIC Charset from ROM - .label VIC_CHARSET_ROM = $5800 + .label VICII_CHARSET_ROM = $5800 // VIC Bitmap - .label VIC_BITMAP = $6000 + .label VICII_BITMAP = $6000 // Screen containing the FORM .label FORM_SCREEN = $400 // Charset used for the FORM @@ -21516,18 +21516,18 @@ Score: 10118930 .label form_b_step_lo = form_fields_val+$15 .label form_b_mod_hi = form_fields_val+$16 .label form_b_mod_lo = form_fields_val+$17 - .label form_vic_screen = form_fields_val+$18 - .label form_vic_gfx = form_fields_val+$19 - .label form_vic_cols = form_fields_val+$1a + .label form_VICII_screen = form_fields_val+$18 + .label form_VICII_gfx = form_fields_val+$19 + .label form_VICII_cols = form_fields_val+$1a .label form_dtv_palet = form_fields_val+$1b - .label form_vic_bg0_hi = form_fields_val+$1c - .label form_vic_bg0_lo = form_fields_val+$1d - .label form_vic_bg1_hi = form_fields_val+$1e - .label form_vic_bg1_lo = form_fields_val+$1f - .label form_vic_bg2_hi = form_fields_val+$20 - .label form_vic_bg2_lo = form_fields_val+$21 - .label form_vic_bg3_hi = form_fields_val+$22 - .label form_vic_bg3_lo = form_fields_val+$23 + .label form_VICII_bg0_hi = form_fields_val+$1c + .label form_VICII_bg0_lo = form_fields_val+$1d + .label form_VICII_bg1_hi = form_fields_val+$1e + .label form_VICII_bg1_lo = form_fields_val+$1f + .label form_VICII_bg2_hi = form_fields_val+$20 + .label form_VICII_bg2_lo = form_fields_val+$21 + .label form_VICII_bg3_hi = form_fields_val+$22 + .label form_VICII_bg3_lo = form_fields_val+$23 .label print_char_cursor = $1a .label print_line_cursor = 7 .label print_screen = 7 @@ -21654,10 +21654,10 @@ gfx_init: { jsr gfx_init_charset // [27] phi from gfx_init::@5 to gfx_init::@6 [phi:gfx_init::@5->gfx_init::@6] // gfx_init::@6 - // gfx_init_vic_bitmap() - // [28] call gfx_init_vic_bitmap - // [313] phi from gfx_init::@6 to gfx_init_vic_bitmap [phi:gfx_init::@6->gfx_init_vic_bitmap] - jsr gfx_init_vic_bitmap + // gfx_init_VICII_bitmap() + // [28] call gfx_init_VICII_bitmap + // [313] phi from gfx_init::@6 to gfx_init_VICII_bitmap [phi:gfx_init::@6->gfx_init_VICII_bitmap] + jsr gfx_init_VICII_bitmap // [29] phi from gfx_init::@6 to gfx_init::@7 [phi:gfx_init::@6->gfx_init::@7] // gfx_init::@7 // gfx_init_plane_8bppchunky() @@ -21820,14 +21820,14 @@ form_mode: { // DTV Graphics Mode lda #0 sta DTV_CONTROL - // VICII->CONTROL1 = VIC_DEN|VIC_RSEL|3 - // [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // VICII->CONTROL1 = VICII_DEN|VICII_RSEL|3 + // [70] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 + lda #VICII_DEN|VICII_RSEL|3 sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 - // VICII->CONTROL2 = VIC_CSEL - // [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL + // VICII->CONTROL2 = VICII_CSEL + // [71] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2 // VICII->MEMORY = (byte)((((word)FORM_SCREEN&$3fff)/$40)|(((word)FORM_CHARSET&$3fff)/$400)) // [72] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = (byte)(word)FORM_SCREEN&$3fff/$40|(word)FORM_CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 @@ -21961,7 +21961,7 @@ gfx_mode: { .label __83 = 7 .label plane_a = 9 .label plane_b = 9 - .label vic_colors = 3 + .label VICII_colors = 3 .label col = 5 .label cy = $e // if(*form_ctrl_line!=0) @@ -22067,13 +22067,13 @@ gfx_mode: { // [118] phi from gfx_mode::@6 to gfx_mode::@16 [phi:gfx_mode::@6->gfx_mode::@16] // gfx_mode::@16 // [119] phi from gfx_mode::@16 to gfx_mode::@7 [phi:gfx_mode::@16->gfx_mode::@7] - // [119] phi gfx_mode::vic_control#5 = VIC_DEN|VIC_RSEL|3|VIC_ECM [phi:gfx_mode::@16->gfx_mode::@7#0] -- vbuxx=vbuc1 - ldx #VIC_DEN|VIC_RSEL|3|VIC_ECM + // [119] phi gfx_mode::VICII_control#5 = VICII_DEN|VICII_RSEL|3|VICII_ECM [phi:gfx_mode::@16->gfx_mode::@7#0] -- vbuxx=vbuc1 + ldx #VICII_DEN|VICII_RSEL|3|VICII_ECM jmp __b7 // [119] phi from gfx_mode::@6 to gfx_mode::@7 [phi:gfx_mode::@6->gfx_mode::@7] __b11: - // [119] phi gfx_mode::vic_control#5 = VIC_DEN|VIC_RSEL|3 [phi:gfx_mode::@6->gfx_mode::@7#0] -- vbuxx=vbuc1 - ldx #VIC_DEN|VIC_RSEL|3 + // [119] phi gfx_mode::VICII_control#5 = VICII_DEN|VICII_RSEL|3 [phi:gfx_mode::@6->gfx_mode::@7#0] -- vbuxx=vbuc1 + ldx #VICII_DEN|VICII_RSEL|3 // gfx_mode::@7 __b7: // if(*form_ctrl_bmm!=0) @@ -22082,18 +22082,18 @@ gfx_mode: { cmp #0 beq __b8 // gfx_mode::@17 - // vic_control = vic_control | VIC_BMM - // [121] gfx_mode::vic_control#2 = gfx_mode::vic_control#5 | VIC_BMM -- vbuxx=vbuxx_bor_vbuc1 + // VICII_control = VICII_control | VICII_BMM + // [121] gfx_mode::VICII_control#2 = gfx_mode::VICII_control#5 | VICII_BMM -- vbuxx=vbuxx_bor_vbuc1 txa - ora #VIC_BMM + ora #VICII_BMM tax // [122] phi from gfx_mode::@17 gfx_mode::@7 to gfx_mode::@8 [phi:gfx_mode::@17/gfx_mode::@7->gfx_mode::@8] - // [122] phi gfx_mode::vic_control#4 = gfx_mode::vic_control#2 [phi:gfx_mode::@17/gfx_mode::@7->gfx_mode::@8#0] -- register_copy + // [122] phi gfx_mode::VICII_control#4 = gfx_mode::VICII_control#2 [phi:gfx_mode::@17/gfx_mode::@7->gfx_mode::@8#0] -- register_copy // gfx_mode::@8 __b8: - // *VIC_CONTROL = vic_control - // [123] *VIC_CONTROL = gfx_mode::vic_control#4 -- _deref_pbuc1=vbuxx - stx VIC_CONTROL + // *VICII_CONTROL = VICII_control + // [123] *VICII_CONTROL = gfx_mode::VICII_control#4 -- _deref_pbuc1=vbuxx + stx VICII_CONTROL // if(*form_ctrl_mcm!=0) // [124] if(*form_ctrl_mcm==0) goto gfx_mode::@9 -- _deref_pbuc1_eq_0_then_la1 lda form_ctrl_mcm @@ -22102,18 +22102,18 @@ gfx_mode: { // [125] phi from gfx_mode::@8 to gfx_mode::@18 [phi:gfx_mode::@8->gfx_mode::@18] // gfx_mode::@18 // [126] phi from gfx_mode::@18 to gfx_mode::@9 [phi:gfx_mode::@18->gfx_mode::@9] - // [126] phi gfx_mode::vic_control2#2 = VIC_CSEL|VIC_MCM [phi:gfx_mode::@18->gfx_mode::@9#0] -- vbuaa=vbuc1 - lda #VIC_CSEL|VIC_MCM + // [126] phi gfx_mode::VICII_control2#2 = VICII_CSEL|VICII_MCM [phi:gfx_mode::@18->gfx_mode::@9#0] -- vbuaa=vbuc1 + lda #VICII_CSEL|VICII_MCM jmp __b9 // [126] phi from gfx_mode::@8 to gfx_mode::@9 [phi:gfx_mode::@8->gfx_mode::@9] __b12: - // [126] phi gfx_mode::vic_control2#2 = VIC_CSEL [phi:gfx_mode::@8->gfx_mode::@9#0] -- vbuaa=vbuc1 - lda #VIC_CSEL + // [126] phi gfx_mode::VICII_control2#2 = VICII_CSEL [phi:gfx_mode::@8->gfx_mode::@9#0] -- vbuaa=vbuc1 + lda #VICII_CSEL // gfx_mode::@9 __b9: - // *VIC_CONTROL2 = vic_control2 - // [127] *VIC_CONTROL2 = gfx_mode::vic_control2#2 -- _deref_pbuc1=vbuaa - sta VIC_CONTROL2 + // *VICII_CONTROL2 = VICII_control2 + // [127] *VICII_CONTROL2 = gfx_mode::VICII_control2#2 -- _deref_pbuc1=vbuaa + sta VICII_CONTROL2 // *form_a_start_hi*$10 // [128] gfx_mode::$18 = *form_a_start_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 lda form_a_start_hi @@ -22323,23 +22323,23 @@ gfx_mode: { // VIC Graphics Bank lda #3 sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR - // CIA2->PORT_A = %00000011 ^ (byte)((word)VIC_SCREEN0/$4000) - // [175] *((byte*)CIA2) = 3^(byte)(word)VIC_SCREEN0/$4000 -- _deref_pbuc1=vbuc2 + // CIA2->PORT_A = %00000011 ^ (byte)((word)VICII_SCREEN0/$4000) + // [175] *((byte*)CIA2) = 3^(byte)(word)VICII_SCREEN0/$4000 -- _deref_pbuc1=vbuc2 // Set VIC Bank bits to output - all others to input - lda #3^VIC_SCREEN0/$4000 + lda #3^VICII_SCREEN0/$4000 sta CIA2 - // get_vic_screen(*form_vic_screen) - // [176] get_vic_screen::idx#0 = *form_vic_screen -- vbuaa=_deref_pbuc1 - lda form_vic_screen - // [177] call get_vic_screen - // [564] phi from gfx_mode::@28 to get_vic_screen [phi:gfx_mode::@28->get_vic_screen] - // [564] phi get_vic_screen::idx#2 = get_vic_screen::idx#0 [phi:gfx_mode::@28->get_vic_screen#0] -- register_copy - jsr get_vic_screen - // get_vic_screen(*form_vic_screen) - // [178] get_vic_screen::return#10 = get_vic_screen::return#5 + // get_VICII_screen(*form_VICII_screen) + // [176] get_VICII_screen::idx#0 = *form_VICII_screen -- vbuaa=_deref_pbuc1 + lda form_VICII_screen + // [177] call get_VICII_screen + // [564] phi from gfx_mode::@28 to get_VICII_screen [phi:gfx_mode::@28->get_VICII_screen] + // [564] phi get_VICII_screen::idx#2 = get_VICII_screen::idx#0 [phi:gfx_mode::@28->get_VICII_screen#0] -- register_copy + jsr get_VICII_screen + // get_VICII_screen(*form_VICII_screen) + // [178] get_VICII_screen::return#10 = get_VICII_screen::return#5 // gfx_mode::@29 - // [179] gfx_mode::$82 = get_vic_screen::return#10 - // (word)get_vic_screen(*form_vic_screen)&$3fff + // [179] gfx_mode::$82 = get_VICII_screen::return#10 + // (word)get_VICII_screen(*form_VICII_screen)&$3fff // [180] gfx_mode::$47 = (word)gfx_mode::$82 & $3fff -- vwuz1=vwuz1_band_vwuc1 lda.z __47 and #<$3fff @@ -22347,7 +22347,7 @@ gfx_mode: { lda.z __47+1 and #>$3fff sta.z __47+1 - // ((word)get_vic_screen(*form_vic_screen)&$3fff)/$40 + // ((word)get_VICII_screen(*form_VICII_screen)&$3fff)/$40 // [181] gfx_mode::$48 = gfx_mode::$47 >> 6 -- vwuz1=vwuz1_ror_6 lda.z __48 asl @@ -22361,15 +22361,15 @@ gfx_mode: { asl.z $ff rol.z __48 rol.z __48+1 - // get_vic_charset(*form_vic_gfx) - // [182] get_vic_charset::idx#0 = *form_vic_gfx -- vbuaa=_deref_pbuc1 - lda form_vic_gfx - // [183] call get_vic_charset - jsr get_vic_charset - // [184] get_vic_charset::return#4 = get_vic_charset::return#2 + // get_VICII_charset(*form_VICII_gfx) + // [182] get_VICII_charset::idx#0 = *form_VICII_gfx -- vbuaa=_deref_pbuc1 + lda form_VICII_gfx + // [183] call get_VICII_charset + jsr get_VICII_charset + // [184] get_VICII_charset::return#4 = get_VICII_charset::return#2 // gfx_mode::@30 - // [185] gfx_mode::$83 = get_vic_charset::return#4 - // (word)get_vic_charset(*form_vic_gfx)&$3fff + // [185] gfx_mode::$83 = get_VICII_charset::return#4 + // (word)get_VICII_charset(*form_VICII_gfx)&$3fff // [186] gfx_mode::$50 = (word)gfx_mode::$83 & $3fff -- vwuz1=vwuz1_band_vwuc1 lda.z __50 and #<$3fff @@ -22377,35 +22377,35 @@ gfx_mode: { lda.z __50+1 and #>$3fff sta.z __50+1 - // >((word)get_vic_charset(*form_vic_gfx)&$3fff) + // >((word)get_VICII_charset(*form_VICII_gfx)&$3fff) // [187] gfx_mode::$51 = > gfx_mode::$50 -- vbuaa=_hi_vwuz1 - // (>((word)get_vic_charset(*form_vic_gfx)&$3fff))/4 + // (>((word)get_VICII_charset(*form_VICII_gfx)&$3fff))/4 // [188] gfx_mode::$52 = gfx_mode::$51 >> 2 -- vbuz1=vbuaa_ror_2 lsr lsr sta.z __52 - // (byte)(((word)get_vic_screen(*form_vic_screen)&$3fff)/$40) | ((>((word)get_vic_charset(*form_vic_gfx)&$3fff))/4) + // (byte)(((word)get_VICII_screen(*form_VICII_screen)&$3fff)/$40) | ((>((word)get_VICII_charset(*form_VICII_gfx)&$3fff))/4) // [189] gfx_mode::$84 = (byte)gfx_mode::$48 -- vbuaa=_byte_vwuz1 lda.z __48 // [190] gfx_mode::$53 = gfx_mode::$84 | gfx_mode::$52 -- vbuaa=vbuaa_bor_vbuz1 ora.z __52 - // *VIC_MEMORY = (byte)(((word)get_vic_screen(*form_vic_screen)&$3fff)/$40) | ((>((word)get_vic_charset(*form_vic_gfx)&$3fff))/4) - // [191] *VIC_MEMORY = gfx_mode::$53 -- _deref_pbuc1=vbuaa + // *VICII_MEMORY = (byte)(((word)get_VICII_screen(*form_VICII_screen)&$3fff)/$40) | ((>((word)get_VICII_charset(*form_VICII_gfx)&$3fff))/4) + // [191] *VICII_MEMORY = gfx_mode::$53 -- _deref_pbuc1=vbuaa // Set VIC Bank // VIC memory - sta VIC_MEMORY - // get_vic_screen(*form_vic_cols) - // [192] get_vic_screen::idx#1 = *form_vic_cols -- vbuaa=_deref_pbuc1 - lda form_vic_cols - // [193] call get_vic_screen - // [564] phi from gfx_mode::@30 to get_vic_screen [phi:gfx_mode::@30->get_vic_screen] - // [564] phi get_vic_screen::idx#2 = get_vic_screen::idx#1 [phi:gfx_mode::@30->get_vic_screen#0] -- register_copy - jsr get_vic_screen - // get_vic_screen(*form_vic_cols) - // [194] get_vic_screen::return#11 = get_vic_screen::return#5 + sta VICII_MEMORY + // get_VICII_screen(*form_VICII_cols) + // [192] get_VICII_screen::idx#1 = *form_VICII_cols -- vbuaa=_deref_pbuc1 + lda form_VICII_cols + // [193] call get_VICII_screen + // [564] phi from gfx_mode::@30 to get_VICII_screen [phi:gfx_mode::@30->get_VICII_screen] + // [564] phi get_VICII_screen::idx#2 = get_VICII_screen::idx#1 [phi:gfx_mode::@30->get_VICII_screen#0] -- register_copy + jsr get_VICII_screen + // get_VICII_screen(*form_VICII_cols) + // [194] get_VICII_screen::return#11 = get_VICII_screen::return#5 // gfx_mode::@31 - // vic_colors = get_vic_screen(*form_vic_cols) - // [195] gfx_mode::vic_colors#0 = get_vic_screen::return#11 + // VICII_colors = get_VICII_screen(*form_VICII_cols) + // [195] gfx_mode::VICII_colors#0 = get_VICII_screen::return#11 // [196] phi from gfx_mode::@31 to gfx_mode::@19 [phi:gfx_mode::@31->gfx_mode::@19] // [196] phi gfx_mode::cy#4 = 0 [phi:gfx_mode::@31->gfx_mode::@19#0] -- vbuz1=vbuc1 lda #0 @@ -22415,39 +22415,39 @@ gfx_mode: { sta.z col lda #>COLS sta.z col+1 - // [196] phi gfx_mode::vic_colors#3 = gfx_mode::vic_colors#0 [phi:gfx_mode::@31->gfx_mode::@19#2] -- register_copy + // [196] phi gfx_mode::VICII_colors#3 = gfx_mode::VICII_colors#0 [phi:gfx_mode::@31->gfx_mode::@19#2] -- register_copy // [196] phi from gfx_mode::@21 to gfx_mode::@19 [phi:gfx_mode::@21->gfx_mode::@19] // [196] phi gfx_mode::cy#4 = gfx_mode::cy#1 [phi:gfx_mode::@21->gfx_mode::@19#0] -- register_copy // [196] phi gfx_mode::col#3 = gfx_mode::col#1 [phi:gfx_mode::@21->gfx_mode::@19#1] -- register_copy - // [196] phi gfx_mode::vic_colors#3 = gfx_mode::vic_colors#1 [phi:gfx_mode::@21->gfx_mode::@19#2] -- register_copy + // [196] phi gfx_mode::VICII_colors#3 = gfx_mode::VICII_colors#1 [phi:gfx_mode::@21->gfx_mode::@19#2] -- register_copy // gfx_mode::@19 __b19: // [197] phi from gfx_mode::@19 to gfx_mode::@20 [phi:gfx_mode::@19->gfx_mode::@20] // [197] phi gfx_mode::cx#2 = 0 [phi:gfx_mode::@19->gfx_mode::@20#0] -- vbuxx=vbuc1 ldx #0 // [197] phi gfx_mode::col#2 = gfx_mode::col#3 [phi:gfx_mode::@19->gfx_mode::@20#1] -- register_copy - // [197] phi gfx_mode::vic_colors#2 = gfx_mode::vic_colors#3 [phi:gfx_mode::@19->gfx_mode::@20#2] -- register_copy + // [197] phi gfx_mode::VICII_colors#2 = gfx_mode::VICII_colors#3 [phi:gfx_mode::@19->gfx_mode::@20#2] -- register_copy // [197] phi from gfx_mode::@20 to gfx_mode::@20 [phi:gfx_mode::@20->gfx_mode::@20] // [197] phi gfx_mode::cx#2 = gfx_mode::cx#1 [phi:gfx_mode::@20->gfx_mode::@20#0] -- register_copy // [197] phi gfx_mode::col#2 = gfx_mode::col#1 [phi:gfx_mode::@20->gfx_mode::@20#1] -- register_copy - // [197] phi gfx_mode::vic_colors#2 = gfx_mode::vic_colors#1 [phi:gfx_mode::@20->gfx_mode::@20#2] -- register_copy + // [197] phi gfx_mode::VICII_colors#2 = gfx_mode::VICII_colors#1 [phi:gfx_mode::@20->gfx_mode::@20#2] -- register_copy // gfx_mode::@20 __b20: - // *col++ = *vic_colors++ - // [198] *gfx_mode::col#2 = *gfx_mode::vic_colors#2 -- _deref_pbuz1=_deref_pbuz2 + // *col++ = *VICII_colors++ + // [198] *gfx_mode::col#2 = *gfx_mode::VICII_colors#2 -- _deref_pbuz1=_deref_pbuz2 ldy #0 - lda (vic_colors),y + lda (VICII_colors),y sta (col),y - // *col++ = *vic_colors++; + // *col++ = *VICII_colors++; // [199] gfx_mode::col#1 = ++ gfx_mode::col#2 -- pbuz1=_inc_pbuz1 inc.z col bne !+ inc.z col+1 !: - // [200] gfx_mode::vic_colors#1 = ++ gfx_mode::vic_colors#2 -- pbuz1=_inc_pbuz1 - inc.z vic_colors + // [200] gfx_mode::VICII_colors#1 = ++ gfx_mode::VICII_colors#2 -- pbuz1=_inc_pbuz1 + inc.z VICII_colors bne !+ - inc.z vic_colors+1 + inc.z VICII_colors+1 !: // for(byte cx: 0..39) // [201] gfx_mode::cx#1 = ++ gfx_mode::cx#2 -- vbuxx=_inc_vbuxx @@ -22469,56 +22469,56 @@ gfx_mode: { // Background colors lda #0 sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR - // *form_vic_bg0_hi*$10 - // [206] gfx_mode::$55 = *form_vic_bg0_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 - lda form_vic_bg0_hi + // *form_VICII_bg0_hi*$10 + // [206] gfx_mode::$55 = *form_VICII_bg0_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 + lda form_VICII_bg0_hi asl asl asl asl - // *form_vic_bg0_hi*$10|*form_vic_bg0_lo - // [207] gfx_mode::$56 = gfx_mode::$55 | *form_vic_bg0_lo -- vbuaa=vbuaa_bor__deref_pbuc1 - ora form_vic_bg0_lo - // VICII->BG_COLOR = *form_vic_bg0_hi*$10|*form_vic_bg0_lo + // *form_VICII_bg0_hi*$10|*form_VICII_bg0_lo + // [207] gfx_mode::$56 = gfx_mode::$55 | *form_VICII_bg0_lo -- vbuaa=vbuaa_bor__deref_pbuc1 + ora form_VICII_bg0_lo + // VICII->BG_COLOR = *form_VICII_bg0_hi*$10|*form_VICII_bg0_lo // [208] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = gfx_mode::$56 -- _deref_pbuc1=vbuaa sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR - // *form_vic_bg1_hi*$10 - // [209] gfx_mode::$57 = *form_vic_bg1_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 - lda form_vic_bg1_hi + // *form_VICII_bg1_hi*$10 + // [209] gfx_mode::$57 = *form_VICII_bg1_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 + lda form_VICII_bg1_hi asl asl asl asl - // *form_vic_bg1_hi*$10|*form_vic_bg1_lo - // [210] gfx_mode::$58 = gfx_mode::$57 | *form_vic_bg1_lo -- vbuaa=vbuaa_bor__deref_pbuc1 - ora form_vic_bg1_lo - // VICII->BG_COLOR1 = *form_vic_bg1_hi*$10|*form_vic_bg1_lo + // *form_VICII_bg1_hi*$10|*form_VICII_bg1_lo + // [210] gfx_mode::$58 = gfx_mode::$57 | *form_VICII_bg1_lo -- vbuaa=vbuaa_bor__deref_pbuc1 + ora form_VICII_bg1_lo + // VICII->BG_COLOR1 = *form_VICII_bg1_hi*$10|*form_VICII_bg1_lo // [211] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) = gfx_mode::$58 -- _deref_pbuc1=vbuaa sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1 - // *form_vic_bg2_hi*$10 - // [212] gfx_mode::$59 = *form_vic_bg2_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 - lda form_vic_bg2_hi + // *form_VICII_bg2_hi*$10 + // [212] gfx_mode::$59 = *form_VICII_bg2_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 + lda form_VICII_bg2_hi asl asl asl asl - // *form_vic_bg2_hi*$10|*form_vic_bg2_lo - // [213] gfx_mode::$60 = gfx_mode::$59 | *form_vic_bg2_lo -- vbuaa=vbuaa_bor__deref_pbuc1 - ora form_vic_bg2_lo - // VICII->BG_COLOR2 = *form_vic_bg2_hi*$10|*form_vic_bg2_lo + // *form_VICII_bg2_hi*$10|*form_VICII_bg2_lo + // [213] gfx_mode::$60 = gfx_mode::$59 | *form_VICII_bg2_lo -- vbuaa=vbuaa_bor__deref_pbuc1 + ora form_VICII_bg2_lo + // VICII->BG_COLOR2 = *form_VICII_bg2_hi*$10|*form_VICII_bg2_lo // [214] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2) = gfx_mode::$60 -- _deref_pbuc1=vbuaa sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2 - // *form_vic_bg3_hi*$10 - // [215] gfx_mode::$61 = *form_vic_bg3_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 - lda form_vic_bg3_hi + // *form_VICII_bg3_hi*$10 + // [215] gfx_mode::$61 = *form_VICII_bg3_hi << 4 -- vbuaa=_deref_pbuc1_rol_4 + lda form_VICII_bg3_hi asl asl asl asl - // *form_vic_bg3_hi*$10|*form_vic_bg3_lo - // [216] gfx_mode::$62 = gfx_mode::$61 | *form_vic_bg3_lo -- vbuaa=vbuaa_bor__deref_pbuc1 - ora form_vic_bg3_lo - // VICII->BG_COLOR3 = *form_vic_bg3_hi*$10|*form_vic_bg3_lo + // *form_VICII_bg3_hi*$10|*form_VICII_bg3_lo + // [216] gfx_mode::$62 = gfx_mode::$61 | *form_VICII_bg3_lo -- vbuaa=vbuaa_bor__deref_pbuc1 + ora form_VICII_bg3_lo + // VICII->BG_COLOR3 = *form_VICII_bg3_hi*$10|*form_VICII_bg3_lo // [217] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR3) = gfx_mode::$62 -- _deref_pbuc1=vbuaa sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR3 // if(*form_dtv_palet==0) @@ -22606,10 +22606,10 @@ gfx_init_screen0: { .label ch = 3 .label cy = $11 // [237] phi from gfx_init_screen0 to gfx_init_screen0::@1 [phi:gfx_init_screen0->gfx_init_screen0::@1] - // [237] phi gfx_init_screen0::ch#3 = VIC_SCREEN0 [phi:gfx_init_screen0->gfx_init_screen0::@1#0] -- pbuz1=pbuc1 - lda #gfx_init_screen0::@1#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN0 + lda #>VICII_SCREEN0 sta.z ch+1 // [237] phi gfx_init_screen0::cy#4 = 0 [phi:gfx_init_screen0->gfx_init_screen0::@1#1] -- vbuz1=vbuc1 lda #0 @@ -22681,10 +22681,10 @@ gfx_init_screen1: { .label ch = 5 .label cy = 2 // [251] phi from gfx_init_screen1 to gfx_init_screen1::@1 [phi:gfx_init_screen1->gfx_init_screen1::@1] - // [251] phi gfx_init_screen1::ch#3 = VIC_SCREEN1 [phi:gfx_init_screen1->gfx_init_screen1::@1#0] -- pbuz1=pbuc1 - lda #gfx_init_screen1::@1#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN1 + lda #>VICII_SCREEN1 sta.z ch+1 // [251] phi gfx_init_screen1::cy#4 = 0 [phi:gfx_init_screen1->gfx_init_screen1::@1#1] -- vbuz1=vbuc1 lda #0 @@ -22747,10 +22747,10 @@ gfx_init_screen2: { .label ch = 3 .label cy = $e // [263] phi from gfx_init_screen2 to gfx_init_screen2::@1 [phi:gfx_init_screen2->gfx_init_screen2::@1] - // [263] phi gfx_init_screen2::ch#3 = VIC_SCREEN2 [phi:gfx_init_screen2->gfx_init_screen2::@1#0] -- pbuz1=pbuc1 - lda #gfx_init_screen2::@1#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN2 + lda #>VICII_SCREEN2 sta.z ch+1 // [263] phi gfx_init_screen2::cy#4 = 0 [phi:gfx_init_screen2->gfx_init_screen2::@1#1] -- vbuz1=vbuc1 lda #0 @@ -22831,10 +22831,10 @@ gfx_init_screen3: { .label ch = 3 .label cy = $e // [278] phi from gfx_init_screen3 to gfx_init_screen3::@1 [phi:gfx_init_screen3->gfx_init_screen3::@1] - // [278] phi gfx_init_screen3::ch#3 = VIC_SCREEN3 [phi:gfx_init_screen3->gfx_init_screen3::@1#0] -- pbuz1=pbuc1 - lda #gfx_init_screen3::@1#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN3 + lda #>VICII_SCREEN3 sta.z ch+1 // [278] phi gfx_init_screen3::cy#4 = 0 [phi:gfx_init_screen3->gfx_init_screen3::@1#1] -- vbuz1=vbuc1 lda #0 @@ -22909,10 +22909,10 @@ gfx_init_screen4: { // [292] phi gfx_init_screen4::cy#4 = 0 [phi:gfx_init_screen4->gfx_init_screen4::@1#0] -- vbuz1=vbuc1 lda #0 sta.z cy - // [292] phi gfx_init_screen4::ch#3 = VIC_SCREEN4 [phi:gfx_init_screen4->gfx_init_screen4::@1#1] -- pbuz1=pbuc1 - lda #gfx_init_screen4::@1#1] -- pbuz1=pbuc1 + lda #VIC_SCREEN4 + lda #>VICII_SCREEN4 sta.z ch+1 // [292] phi from gfx_init_screen4::@3 to gfx_init_screen4::@1 [phi:gfx_init_screen4::@3->gfx_init_screen4::@1] // [292] phi gfx_init_screen4::cy#4 = gfx_init_screen4::cy#1 [phi:gfx_init_screen4::@3->gfx_init_screen4::@1#0] -- register_copy @@ -22971,10 +22971,10 @@ gfx_init_charset: { // [302] phi gfx_init_charset::c#4 = 0 [phi:gfx_init_charset->gfx_init_charset::@1#0] -- vbuz1=vbuc1 lda #0 sta.z c - // [302] phi gfx_init_charset::charset#3 = VIC_CHARSET_ROM [phi:gfx_init_charset->gfx_init_charset::@1#1] -- pbuz1=pbuc1 - lda #gfx_init_charset::@1#1] -- pbuz1=pbuc1 + lda #VIC_CHARSET_ROM + lda #>VICII_CHARSET_ROM sta.z charset+1 // [302] phi gfx_init_charset::chargen#3 = CHARGEN [phi:gfx_init_charset->gfx_init_charset::@1#2] -- pbuz1=pbuc1 lda #bitmap_init] + // [637] phi from gfx_init_VICII_bitmap to bitmap_init [phi:gfx_init_VICII_bitmap->bitmap_init] jsr bitmap_init - // [315] phi from gfx_init_vic_bitmap to gfx_init_vic_bitmap::@3 [phi:gfx_init_vic_bitmap->gfx_init_vic_bitmap::@3] - // gfx_init_vic_bitmap::@3 + // [315] phi from gfx_init_VICII_bitmap to gfx_init_VICII_bitmap::@3 [phi:gfx_init_VICII_bitmap->gfx_init_VICII_bitmap::@3] + // gfx_init_VICII_bitmap::@3 // bitmap_clear() // [316] call bitmap_clear jsr bitmap_clear - // [317] phi from gfx_init_vic_bitmap::@3 to gfx_init_vic_bitmap::@1 [phi:gfx_init_vic_bitmap::@3->gfx_init_vic_bitmap::@1] - // [317] phi gfx_init_vic_bitmap::l#2 = 0 [phi:gfx_init_vic_bitmap::@3->gfx_init_vic_bitmap::@1#0] -- vbuz1=vbuc1 + // [317] phi from gfx_init_VICII_bitmap::@3 to gfx_init_VICII_bitmap::@1 [phi:gfx_init_VICII_bitmap::@3->gfx_init_VICII_bitmap::@1] + // [317] phi gfx_init_VICII_bitmap::l#2 = 0 [phi:gfx_init_VICII_bitmap::@3->gfx_init_VICII_bitmap::@1#0] -- vbuz1=vbuc1 lda #0 sta.z l - // gfx_init_vic_bitmap::@1 + // gfx_init_VICII_bitmap::@1 __b1: // for(byte l=0; lgfx_init_vic_bitmap::@1] - // [317] phi gfx_init_vic_bitmap::l#2 = gfx_init_vic_bitmap::l#1 [phi:gfx_init_vic_bitmap::@4->gfx_init_vic_bitmap::@1#0] -- register_copy + // [317] phi from gfx_init_VICII_bitmap::@4 to gfx_init_VICII_bitmap::@1 [phi:gfx_init_VICII_bitmap::@4->gfx_init_VICII_bitmap::@1] + // [317] phi gfx_init_VICII_bitmap::l#2 = gfx_init_VICII_bitmap::l#1 [phi:gfx_init_VICII_bitmap::@4->gfx_init_VICII_bitmap::@1#0] -- register_copy jmp __b1 .segment Data lines_x: .byte 0, $ff, $ff, 0, 0, $80, $ff, $80, 0, $80 @@ -24605,14 +24605,14 @@ get_plane: { // get_plane::@1 __b1: // [562] phi from get_plane get_plane::@1 to get_plane::@return [phi:get_plane/get_plane::@1->get_plane::@return] - // [562] phi get_plane::return#14 = (dword)VIC_SCREEN0 [phi:get_plane/get_plane::@1->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_SCREEN0 + lda #>VICII_SCREEN0 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN0>>$10 + lda #>VICII_SCREEN0>>$10 sta.z return+3 rts // [562] phi from get_plane::@10 to get_plane::@return [phi:get_plane::@10->get_plane::@return] @@ -24665,62 +24665,62 @@ get_plane: { rts // [562] phi from get_plane::@2 to get_plane::@return [phi:get_plane::@2->get_plane::@return] __b6: - // [562] phi get_plane::return#14 = (dword)VIC_SCREEN1 [phi:get_plane::@2->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_SCREEN1 + lda #>VICII_SCREEN1 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN1>>$10 + lda #>VICII_SCREEN1>>$10 sta.z return+3 rts // [562] phi from get_plane::@3 to get_plane::@return [phi:get_plane::@3->get_plane::@return] __b7: - // [562] phi get_plane::return#14 = (dword)VIC_SCREEN2 [phi:get_plane::@3->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_SCREEN2 + lda #>VICII_SCREEN2 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN2>>$10 + lda #>VICII_SCREEN2>>$10 sta.z return+3 rts // [562] phi from get_plane::@4 to get_plane::@return [phi:get_plane::@4->get_plane::@return] __b8: - // [562] phi get_plane::return#14 = (dword)VIC_SCREEN3 [phi:get_plane::@4->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_SCREEN3 + lda #>VICII_SCREEN3 sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_SCREEN3>>$10 + lda #>VICII_SCREEN3>>$10 sta.z return+3 rts // [562] phi from get_plane::@5 to get_plane::@return [phi:get_plane::@5->get_plane::@return] __b9: - // [562] phi get_plane::return#14 = (dword)VIC_BITMAP [phi:get_plane::@5->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_BITMAP + lda #>VICII_BITMAP sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_BITMAP>>$10 + lda #>VICII_BITMAP>>$10 sta.z return+3 rts // [562] phi from get_plane::@6 to get_plane::@return [phi:get_plane::@6->get_plane::@return] __b10: - // [562] phi get_plane::return#14 = (dword)VIC_CHARSET_ROM [phi:get_plane::@6->get_plane::@return#0] -- vduz1=vduc1 - lda #get_plane::@return#0] -- vduz1=vduc1 + lda #VIC_CHARSET_ROM + lda #>VICII_CHARSET_ROM sta.z return+1 - lda #>$10 + lda #>$10 sta.z return+2 - lda #>VIC_CHARSET_ROM>>$10 + lda #>VICII_CHARSET_ROM>>$10 sta.z return+3 rts // [562] phi from get_plane::@7 to get_plane::@return [phi:get_plane::@7->get_plane::@return] @@ -24763,111 +24763,111 @@ get_plane: { // [563] return rts } - // get_vic_screen + // get_VICII_screen // Get the VIC screen address from the screen index -// get_vic_screen(byte register(A) idx) -get_vic_screen: { +// get_VICII_screen(byte register(A) idx) +get_VICII_screen: { .label return = 3 // if(idx==0) - // [565] if(get_vic_screen::idx#2==0) goto get_vic_screen::@return -- vbuaa_eq_0_then_la1 + // [565] if(get_VICII_screen::idx#2==0) goto get_VICII_screen::@return -- vbuaa_eq_0_then_la1 cmp #0 beq __b1 - // get_vic_screen::@2 + // get_VICII_screen::@2 // if(idx==1) - // [566] if(get_vic_screen::idx#2==1) goto get_vic_screen::@return -- vbuaa_eq_vbuc1_then_la1 + // [566] if(get_VICII_screen::idx#2==1) goto get_VICII_screen::@return -- vbuaa_eq_vbuc1_then_la1 cmp #1 beq __b2 - // get_vic_screen::@3 + // get_VICII_screen::@3 // if(idx==2) - // [567] if(get_vic_screen::idx#2==2) goto get_vic_screen::@return -- vbuaa_eq_vbuc1_then_la1 + // [567] if(get_VICII_screen::idx#2==2) goto get_VICII_screen::@return -- vbuaa_eq_vbuc1_then_la1 cmp #2 beq __b3 - // get_vic_screen::@4 + // get_VICII_screen::@4 // if(idx==3) - // [568] if(get_vic_screen::idx#2==3) goto get_vic_screen::@return -- vbuaa_eq_vbuc1_then_la1 + // [568] if(get_VICII_screen::idx#2==3) goto get_VICII_screen::@return -- vbuaa_eq_vbuc1_then_la1 cmp #3 beq __b4 - // get_vic_screen::@5 + // get_VICII_screen::@5 // if(idx==4) - // [569] if(get_vic_screen::idx#2!=4) goto get_vic_screen::@1 -- vbuaa_neq_vbuc1_then_la1 + // [569] if(get_VICII_screen::idx#2!=4) goto get_VICII_screen::@1 -- vbuaa_neq_vbuc1_then_la1 cmp #4 bne __b1 - // [571] phi from get_vic_screen::@5 to get_vic_screen::@return [phi:get_vic_screen::@5->get_vic_screen::@return] - // [571] phi get_vic_screen::return#5 = VIC_SCREEN4 [phi:get_vic_screen::@5->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return] + // [571] phi get_VICII_screen::return#5 = VICII_SCREEN4 [phi:get_VICII_screen::@5->get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN4 + lda #>VICII_SCREEN4 sta.z return+1 rts - // [570] phi from get_vic_screen::@5 to get_vic_screen::@1 [phi:get_vic_screen::@5->get_vic_screen::@1] - // get_vic_screen::@1 + // [570] phi from get_VICII_screen::@5 to get_VICII_screen::@1 [phi:get_VICII_screen::@5->get_VICII_screen::@1] + // get_VICII_screen::@1 __b1: - // [571] phi from get_vic_screen get_vic_screen::@1 to get_vic_screen::@return [phi:get_vic_screen/get_vic_screen::@1->get_vic_screen::@return] - // [571] phi get_vic_screen::return#5 = VIC_SCREEN0 [phi:get_vic_screen/get_vic_screen::@1->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return] + // [571] phi get_VICII_screen::return#5 = VICII_SCREEN0 [phi:get_VICII_screen/get_VICII_screen::@1->get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN0 + lda #>VICII_SCREEN0 sta.z return+1 rts - // [571] phi from get_vic_screen::@2 to get_vic_screen::@return [phi:get_vic_screen::@2->get_vic_screen::@return] + // [571] phi from get_VICII_screen::@2 to get_VICII_screen::@return [phi:get_VICII_screen::@2->get_VICII_screen::@return] __b2: - // [571] phi get_vic_screen::return#5 = VIC_SCREEN1 [phi:get_vic_screen::@2->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN1 + lda #>VICII_SCREEN1 sta.z return+1 rts - // [571] phi from get_vic_screen::@3 to get_vic_screen::@return [phi:get_vic_screen::@3->get_vic_screen::@return] + // [571] phi from get_VICII_screen::@3 to get_VICII_screen::@return [phi:get_VICII_screen::@3->get_VICII_screen::@return] __b3: - // [571] phi get_vic_screen::return#5 = VIC_SCREEN2 [phi:get_vic_screen::@3->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN2 + lda #>VICII_SCREEN2 sta.z return+1 rts - // [571] phi from get_vic_screen::@4 to get_vic_screen::@return [phi:get_vic_screen::@4->get_vic_screen::@return] + // [571] phi from get_VICII_screen::@4 to get_VICII_screen::@return [phi:get_VICII_screen::@4->get_VICII_screen::@return] __b4: - // [571] phi get_vic_screen::return#5 = VIC_SCREEN3 [phi:get_vic_screen::@4->get_vic_screen::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_screen::@return#0] -- pbuz1=pbuc1 + lda #VIC_SCREEN3 + lda #>VICII_SCREEN3 sta.z return+1 - // get_vic_screen::@return + // get_VICII_screen::@return // } // [572] return rts } - // get_vic_charset + // get_VICII_charset // Get the VIC charset/bitmap address from the index -// get_vic_charset(byte register(A) idx) -get_vic_charset: { +// get_VICII_charset(byte register(A) idx) +get_VICII_charset: { .label return = 7 // if(idx==0) - // [573] if(get_vic_charset::idx#0==0) goto get_vic_charset::@return -- vbuaa_eq_0_then_la1 + // [573] if(get_VICII_charset::idx#0==0) goto get_VICII_charset::@return -- vbuaa_eq_0_then_la1 cmp #0 beq __b1 - // get_vic_charset::@2 + // get_VICII_charset::@2 // if(idx==1) - // [574] if(get_vic_charset::idx#0!=1) goto get_vic_charset::@1 -- vbuaa_neq_vbuc1_then_la1 + // [574] if(get_VICII_charset::idx#0!=1) goto get_VICII_charset::@1 -- vbuaa_neq_vbuc1_then_la1 cmp #1 bne __b1 - // [576] phi from get_vic_charset::@2 to get_vic_charset::@return [phi:get_vic_charset::@2->get_vic_charset::@return] - // [576] phi get_vic_charset::return#2 = VIC_BITMAP [phi:get_vic_charset::@2->get_vic_charset::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_charset::@return] + // [576] phi get_VICII_charset::return#2 = VICII_BITMAP [phi:get_VICII_charset::@2->get_VICII_charset::@return#0] -- pbuz1=pbuc1 + lda #VIC_BITMAP + lda #>VICII_BITMAP sta.z return+1 rts - // [575] phi from get_vic_charset::@2 to get_vic_charset::@1 [phi:get_vic_charset::@2->get_vic_charset::@1] - // get_vic_charset::@1 + // [575] phi from get_VICII_charset::@2 to get_VICII_charset::@1 [phi:get_VICII_charset::@2->get_VICII_charset::@1] + // get_VICII_charset::@1 __b1: - // [576] phi from get_vic_charset get_vic_charset::@1 to get_vic_charset::@return [phi:get_vic_charset/get_vic_charset::@1->get_vic_charset::@return] - // [576] phi get_vic_charset::return#2 = VIC_CHARSET_ROM [phi:get_vic_charset/get_vic_charset::@1->get_vic_charset::@return#0] -- pbuz1=pbuc1 - lda #get_VICII_charset::@return] + // [576] phi get_VICII_charset::return#2 = VICII_CHARSET_ROM [phi:get_VICII_charset/get_VICII_charset::@1->get_VICII_charset::@return#0] -- pbuz1=pbuc1 + lda #VIC_CHARSET_ROM + lda #>VICII_CHARSET_ROM sta.z return+1 - // get_vic_charset::@return + // get_VICII_charset::@return // } // [577] return rts @@ -25175,8 +25175,8 @@ bitmap_init: { // [640] bitmap_plot_xlo[bitmap_init::x#2] = bitmap_init::$0 -- pbuc1_derefidx_vbuxx=vbuaa sta bitmap_plot_xlo,x // bitmap_plot_xhi[x] = >bitmap - // [641] bitmap_plot_xhi[bitmap_init::x#2] = >VIC_BITMAP -- pbuc1_derefidx_vbuxx=vbuc2 - lda #>VIC_BITMAP + // [641] bitmap_plot_xhi[bitmap_init::x#2] = >VICII_BITMAP -- pbuc1_derefidx_vbuxx=vbuc2 + lda #>VICII_BITMAP sta bitmap_plot_xhi,x // bitmap_plot_bit[x] = bits // [642] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 -- pbuc1_derefidx_vbuxx=vbuyy diff --git a/src/test/ref/c64dtv-gfxexplorer.sym b/src/test/ref/c64dtv-gfxexplorer.sym index 710402428..b772b4155 100644 --- a/src/test/ref/c64dtv-gfxexplorer.sym +++ b/src/test/ref/c64dtv-gfxexplorer.sym @@ -76,22 +76,22 @@ const byte RADIX::DECIMAL = $a const byte RADIX::HEXADECIMAL = $10 const byte RADIX::OCTAL = 8 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte* VIC_BITMAP = (byte*) 24576 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CHARSET_ROM = (byte*) 22528 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte* VIC_CONTROL2 = (byte*) 53270 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 -const nomodify byte* VIC_SCREEN0 = (byte*) 16384 -const nomodify byte* VIC_SCREEN1 = (byte*) 17408 -const nomodify byte* VIC_SCREEN2 = (byte*) 18432 -const nomodify byte* VIC_SCREEN3 = (byte*) 19456 -const nomodify byte* VIC_SCREEN4 = (byte*) 20480 +const nomodify byte* VICII_BITMAP = (byte*) 24576 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CHARSET_ROM = (byte*) 22528 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL2 = (byte*) 53270 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 +const nomodify byte* VICII_SCREEN0 = (byte*) 16384 +const nomodify byte* VICII_SCREEN1 = (byte*) 17408 +const nomodify byte* VICII_SCREEN2 = (byte*) 18432 +const nomodify byte* VICII_SCREEN3 = (byte*) 19456 +const nomodify byte* VICII_SCREEN4 = (byte*) 20480 void apply_preset(byte apply_preset::idx) byte apply_preset::i byte apply_preset::i#1 reg byte y 2.00000002E8 @@ -314,6 +314,17 @@ byte dtvSetCpuBankSegment1::cpuBankIdx byte dtvSetCpuBankSegment1::cpuBankIdx#1 reg byte a 20002.0 byte dtvSetCpuBankSegment1::cpuBankIdx#11 reg byte a 2002.0 byte dtvSetCpuBankSegment1::cpuBankIdx#13 reg byte a 111003.0 +const nomodify byte* form_VICII_bg0_hi = form_fields_val+$1c +const nomodify byte* form_VICII_bg0_lo = form_fields_val+$1d +const nomodify byte* form_VICII_bg1_hi = form_fields_val+$1e +const nomodify byte* form_VICII_bg1_lo = form_fields_val+$1f +const nomodify byte* form_VICII_bg2_hi = form_fields_val+$20 +const nomodify byte* form_VICII_bg2_lo = form_fields_val+$21 +const nomodify byte* form_VICII_bg3_hi = form_fields_val+$22 +const nomodify byte* form_VICII_bg3_lo = form_fields_val+$23 +const nomodify byte* form_VICII_cols = form_fields_val+$1a +const nomodify byte* form_VICII_gfx = form_fields_val+$19 +const nomodify byte* form_VICII_screen = form_fields_val+$18 const nomodify byte* form_a_mod_hi = form_fields_val+$f const nomodify byte* form_a_mod_lo = form_fields_val+$10 const nomodify byte* form_a_pattern = form_fields_val+$a @@ -410,17 +421,21 @@ byte* form_set_screen::screen byte form_set_screen::y byte form_set_screen::y#1 reg byte x 150001.5 byte form_set_screen::y#2 reg byte x 66667.33333333333 -const nomodify byte* form_vic_bg0_hi = form_fields_val+$1c -const nomodify byte* form_vic_bg0_lo = form_fields_val+$1d -const nomodify byte* form_vic_bg1_hi = form_fields_val+$1e -const nomodify byte* form_vic_bg1_lo = form_fields_val+$1f -const nomodify byte* form_vic_bg2_hi = form_fields_val+$20 -const nomodify byte* form_vic_bg2_lo = form_fields_val+$21 -const nomodify byte* form_vic_bg3_hi = form_fields_val+$22 -const nomodify byte* form_vic_bg3_lo = form_fields_val+$23 -const nomodify byte* form_vic_cols = form_fields_val+$1a -const nomodify byte* form_vic_gfx = form_fields_val+$19 -const nomodify byte* form_vic_screen = form_fields_val+$18 +byte* get_VICII_charset(byte get_VICII_charset::idx) +byte get_VICII_charset::idx +byte get_VICII_charset::idx#0 reg byte a 1051.5 +byte* get_VICII_charset::return +byte* get_VICII_charset::return#2 return zp[2]:7 33.666666666666664 +byte* get_VICII_charset::return#4 return zp[2]:7 202.0 +byte* get_VICII_screen(byte get_VICII_screen::idx) +byte get_VICII_screen::idx +byte get_VICII_screen::idx#0 reg byte a 202.0 +byte get_VICII_screen::idx#1 reg byte a 202.0 +byte get_VICII_screen::idx#2 reg byte a 1041.4 +byte* get_VICII_screen::return +byte* get_VICII_screen::return#10 return zp[2]:3 202.0 +byte* get_VICII_screen::return#11 return zp[2]:3 202.0 +byte* get_VICII_screen::return#5 return zp[2]:3 50.5 dword get_plane(byte get_plane::idx) byte get_plane::idx byte get_plane::idx#0 reg byte a 202.0 @@ -430,22 +445,14 @@ dword get_plane::return dword get_plane::return#14 return zp[4]:9 50.5 dword get_plane::return#16 return zp[4]:9 202.0 dword get_plane::return#17 return zp[4]:9 202.0 -byte* get_vic_charset(byte get_vic_charset::idx) -byte get_vic_charset::idx -byte get_vic_charset::idx#0 reg byte a 1051.5 -byte* get_vic_charset::return -byte* get_vic_charset::return#2 return zp[2]:7 33.666666666666664 -byte* get_vic_charset::return#4 return zp[2]:7 202.0 -byte* get_vic_screen(byte get_vic_screen::idx) -byte get_vic_screen::idx -byte get_vic_screen::idx#0 reg byte a 202.0 -byte get_vic_screen::idx#1 reg byte a 202.0 -byte get_vic_screen::idx#2 reg byte a 1041.4 -byte* get_vic_screen::return -byte* get_vic_screen::return#10 return zp[2]:3 202.0 -byte* get_vic_screen::return#11 return zp[2]:3 202.0 -byte* get_vic_screen::return#5 return zp[2]:3 50.5 void gfx_init() +void gfx_init_VICII_bitmap() +byte gfx_init_VICII_bitmap::l +byte gfx_init_VICII_bitmap::l#1 l zp[1]:2 2002.0 +byte gfx_init_VICII_bitmap::l#2 l zp[1]:2 1001.0 +const byte gfx_init_VICII_bitmap::lines_cnt = 9 +const byte* gfx_init_VICII_bitmap::lines_x[] = { 0, $ff, $ff, 0, 0, $80, $ff, $80, 0, $80 } +const byte* gfx_init_VICII_bitmap::lines_y[] = { 0, 0, $c7, $c7, 0, 0, $64, $c7, $64, 0 } void gfx_init_charset() byte gfx_init_charset::c byte gfx_init_charset::c#1 c zp[1]:17 1501.5 @@ -659,13 +666,6 @@ byte gfx_init_screen4::cx#2 reg byte x 6667.333333333333 byte gfx_init_screen4::cy byte gfx_init_screen4::cy#1 cy zp[1]:17 1501.5 byte gfx_init_screen4::cy#4 cy zp[1]:17 333.6666666666667 -void gfx_init_vic_bitmap() -byte gfx_init_vic_bitmap::l -byte gfx_init_vic_bitmap::l#1 l zp[1]:2 2002.0 -byte gfx_init_vic_bitmap::l#2 l zp[1]:2 1001.0 -const byte gfx_init_vic_bitmap::lines_cnt = 9 -const byte* gfx_init_vic_bitmap::lines_x[] = { 0, $ff, $ff, 0, 0, $80, $ff, $80, 0, $80 } -const byte* gfx_init_vic_bitmap::lines_y[] = { 0, 0, $c7, $c7, 0, 0, $64, $c7, $64, 0 } void gfx_mode() byte~ gfx_mode::$18 reg byte a 202.0 dword~ gfx_mode::$20 zp[4]:9 202.0 @@ -708,6 +708,17 @@ byte~ gfx_mode::$62 reg byte a 202.0 byte*~ gfx_mode::$82 zp[2]:3 101.0 byte*~ gfx_mode::$83 zp[2]:7 101.0 byte~ gfx_mode::$84 reg byte a 202.0 +byte* gfx_mode::VICII_colors +byte* gfx_mode::VICII_colors#0 VICII_colors zp[2]:3 202.0 +byte* gfx_mode::VICII_colors#1 VICII_colors zp[2]:3 42000.600000000006 +byte* gfx_mode::VICII_colors#2 VICII_colors zp[2]:3 103334.66666666666 +byte* gfx_mode::VICII_colors#3 VICII_colors zp[2]:3 20103.0 +byte gfx_mode::VICII_control +byte gfx_mode::VICII_control#2 reg byte x 202.0 +byte gfx_mode::VICII_control#4 reg byte x 303.0 +byte gfx_mode::VICII_control#5 reg byte x 101.0 +byte gfx_mode::VICII_control2 +byte gfx_mode::VICII_control2#2 reg byte a 101.0 byte* gfx_mode::col byte* gfx_mode::col#1 col zp[2]:5 35000.5 byte* gfx_mode::col#2 col zp[2]:5 155002.0 @@ -746,17 +757,6 @@ dword gfx_mode::plane_b dword gfx_mode::plane_b#0 plane_b zp[4]:9 57.714285714285715 byte gfx_mode::plane_b_offs byte gfx_mode::plane_b_offs#0 reg byte x 40.4 -byte* gfx_mode::vic_colors -byte* gfx_mode::vic_colors#0 vic_colors zp[2]:3 202.0 -byte* gfx_mode::vic_colors#1 vic_colors zp[2]:3 42000.600000000006 -byte* gfx_mode::vic_colors#2 vic_colors zp[2]:3 103334.66666666666 -byte* gfx_mode::vic_colors#3 vic_colors zp[2]:3 20103.0 -byte gfx_mode::vic_control -byte gfx_mode::vic_control#2 reg byte x 202.0 -byte gfx_mode::vic_control#4 reg byte x 303.0 -byte gfx_mode::vic_control#5 reg byte x 101.0 -byte gfx_mode::vic_control2 -byte gfx_mode::vic_control2#2 reg byte a 101.0 byte keyboard_event_get() byte keyboard_event_get::return byte keyboard_event_get::return#1 reg byte a 2.0000002E7 @@ -917,8 +917,8 @@ const byte* render_preset_name::name#9 name_9 = "Sixs Fred " reg byte x [ form_mode::i#2 form_mode::i#1 ] reg byte x [ gfx_mode::dtv_control#12 gfx_mode::dtv_control#6 gfx_mode::dtv_control#13 gfx_mode::dtv_control#5 gfx_mode::dtv_control#11 gfx_mode::dtv_control#4 gfx_mode::dtv_control#10 gfx_mode::dtv_control#3 gfx_mode::dtv_control#15 gfx_mode::dtv_control#14 gfx_mode::dtv_control#2 ] -reg byte x [ gfx_mode::vic_control#4 gfx_mode::vic_control#2 gfx_mode::vic_control#5 ] -reg byte a [ gfx_mode::vic_control2#2 ] +reg byte x [ gfx_mode::VICII_control#4 gfx_mode::VICII_control#2 gfx_mode::VICII_control#5 ] +reg byte a [ gfx_mode::VICII_control2#2 ] reg byte x [ gfx_mode::cx#2 gfx_mode::cx#1 ] reg byte x [ gfx_mode::j#2 gfx_mode::j#1 ] reg byte x [ gfx_mode::i#2 gfx_mode::i#1 ] @@ -928,11 +928,11 @@ reg byte x [ gfx_init_screen2::cx#2 gfx_init_screen2::cx#1 ] reg byte x [ gfx_init_screen3::cx#2 gfx_init_screen3::cx#1 ] reg byte x [ gfx_init_screen4::cx#2 gfx_init_screen4::cx#1 ] reg byte x [ gfx_init_charset::l#2 gfx_init_charset::l#1 ] -zp[1]:2 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 gfx_init_vic_bitmap::l#2 gfx_init_vic_bitmap::l#1 gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] +zp[1]:2 [ gfx_init_plane_8bppchunky::y#6 gfx_init_plane_8bppchunky::y#1 gfx_init_VICII_bitmap::l#2 gfx_init_VICII_bitmap::l#1 gfx_init_screen1::cy#4 gfx_init_screen1::cy#1 form_field_idx#30 form_field_idx#1 form_field_idx#19 form_field_idx#33 form_field_idx#5 form_field_idx#4 ] reg byte x [ gfx_init_plane_8bppchunky::gfxbCpuBank#4 gfx_init_plane_8bppchunky::gfxbCpuBank#7 gfx_init_plane_8bppchunky::gfxbCpuBank#8 gfx_init_plane_8bppchunky::gfxbCpuBank#2 ] reg byte x [ gfx_init_plane_charset8::cp#2 gfx_init_plane_charset8::cp#1 ] reg byte a [ gfx_init_plane_charset8::c#2 gfx_init_plane_charset8::c#3 ] -zp[2]:3 [ gfx_init_plane_horisontal::gfxa#3 gfx_init_plane_horisontal::gfxa#6 gfx_init_plane_horisontal::gfxa#7 gfx_init_plane_horisontal::gfxa#1 gfx_init_plane_horisontal::gfxa#2 gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::vic_colors#2 gfx_mode::vic_colors#3 gfx_mode::vic_colors#1 gfx_mode::vic_colors#0 get_vic_screen::return#11 get_vic_screen::return#5 get_vic_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] +zp[2]:3 [ gfx_init_plane_horisontal::gfxa#3 gfx_init_plane_horisontal::gfxa#6 gfx_init_plane_horisontal::gfxa#7 gfx_init_plane_horisontal::gfxa#1 gfx_init_plane_horisontal::gfxa#2 gfx_init_plane_charset8::gfxa#2 gfx_init_plane_charset8::gfxa#5 gfx_init_plane_charset8::gfxa#6 gfx_init_plane_charset8::gfxa#1 gfx_init_plane_8bppchunky::x#2 gfx_init_plane_8bppchunky::x#1 gfx_init_charset::charset#2 gfx_init_charset::charset#3 gfx_init_charset::charset#1 gfx_init_screen3::ch#2 gfx_init_screen3::ch#3 gfx_init_screen3::ch#1 gfx_init_screen2::ch#2 gfx_init_screen2::ch#3 gfx_init_screen2::ch#1 gfx_init_screen0::ch#2 gfx_init_screen0::ch#3 gfx_init_screen0::ch#1 gfx_mode::VICII_colors#2 gfx_mode::VICII_colors#3 gfx_mode::VICII_colors#1 gfx_mode::VICII_colors#0 get_VICII_screen::return#11 get_VICII_screen::return#5 get_VICII_screen::return#10 gfx_mode::$82 gfx_mode::$47 gfx_mode::$48 ] reg byte x [ gfx_init_plane_horisontal::ax#2 gfx_init_plane_horisontal::ax#1 ] reg byte x [ gfx_init_plane_vertical::bx#2 gfx_init_plane_vertical::bx#1 ] zp[2]:5 [ gfx_init_plane_horisontal2::gfxa#2 gfx_init_plane_horisontal2::gfxa#3 gfx_init_plane_horisontal2::gfxa#1 gfx_init_plane_vertical::gfxb#2 gfx_init_plane_vertical::gfxb#3 gfx_init_plane_vertical::gfxb#1 gfx_init_plane_charset8::chargen#2 gfx_init_plane_charset8::chargen#3 gfx_init_plane_charset8::chargen#1 gfx_init_plane_8bppchunky::gfxb#4 gfx_init_plane_8bppchunky::gfxb#3 gfx_init_plane_8bppchunky::gfxb#5 gfx_init_plane_8bppchunky::gfxb#1 gfx_init_charset::chargen#2 gfx_init_charset::chargen#3 gfx_init_charset::chargen#1 gfx_init_screen4::ch#2 gfx_init_screen4::ch#3 gfx_init_screen4::ch#1 gfx_init_screen1::ch#2 gfx_init_screen1::ch#3 gfx_init_screen1::ch#1 gfx_mode::col#2 gfx_mode::col#3 gfx_mode::col#1 ] @@ -943,14 +943,14 @@ reg byte a [ render_preset_name::idx#10 render_preset_name::idx#0 render_preset_ reg byte x [ form_control::return#2 ] reg byte y [ apply_preset::i#2 apply_preset::i#1 ] reg byte a [ get_plane::idx#10 get_plane::idx#1 get_plane::idx#0 ] -reg byte a [ get_vic_screen::idx#2 get_vic_screen::idx#0 get_vic_screen::idx#1 ] +reg byte a [ get_VICII_screen::idx#2 get_VICII_screen::idx#0 get_VICII_screen::idx#1 ] reg byte x [ keyboard_modifiers#22 keyboard_modifiers#21 keyboard_modifiers#20 keyboard_modifiers#19 keyboard_modifiers#2 keyboard_modifiers#3 keyboard_modifiers#4 ] reg byte x [ keyboard_event_scan::col#2 keyboard_event_scan::col#1 ] reg byte a [ keyboard_event_get::return#2 keyboard_event_get::return#1 ] reg byte x [ bitmap_init::x#2 bitmap_init::x#1 ] reg byte y [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] reg byte x [ bitmap_init::y#2 bitmap_init::y#1 ] -zp[2]:7 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 get_vic_charset::return#2 get_vic_charset::return#4 gfx_mode::$83 gfx_mode::$50 form_set_screen::line#2 form_set_screen::line#1 print_set_screen::screen#2 print_line_cursor#22 print_line_cursor#1 print_screen#0 print_line_cursor#2 ] +zp[2]:7 [ bitmap_init::yoffs#2 bitmap_init::yoffs#4 bitmap_init::yoffs#1 get_VICII_charset::return#2 get_VICII_charset::return#4 gfx_mode::$83 gfx_mode::$50 form_set_screen::line#2 form_set_screen::line#1 print_set_screen::screen#2 print_line_cursor#22 print_line_cursor#1 print_screen#0 print_line_cursor#2 ] reg byte x [ bitmap_clear::x#2 bitmap_clear::x#1 ] reg byte a [ dtvSetCpuBankSegment1::cpuBankIdx#13 dtvSetCpuBankSegment1::cpuBankIdx#1 dtvSetCpuBankSegment1::cpuBankIdx#11 ] zp[4]:9 [ gfx_init_plane_fill::plane_addr#3 get_plane::return#14 get_plane::return#16 get_plane::return#17 gfx_mode::$20 gfx_mode::plane_a#0 gfx_mode::$34 gfx_mode::plane_b#0 ] @@ -983,7 +983,7 @@ reg byte a [ gfx_mode::$42 ] reg byte a [ gfx_mode::$43 ] reg byte a [ gfx_mode::$44 ] reg byte a [ gfx_mode::$45 ] -reg byte a [ get_vic_charset::idx#0 ] +reg byte a [ get_VICII_charset::idx#0 ] reg byte a [ gfx_mode::$51 ] zp[1]:15 [ gfx_mode::$52 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::xd#1 bitmap_line_ydxi::xd#0 bitmap_line::xd#2 bitmap_line::xd#1 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::xd#1 bitmap_line_xdyi::xd#0 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::xd#0 bitmap_line_ydxd::xd#1 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::xd#1 bitmap_line_xdyd::xd#0 bitmap_clear::y#4 bitmap_clear::y#1 keyboard_event_scan::keycode#10 keyboard_event_scan::keycode#11 keyboard_event_scan::keycode#13 keyboard_event_scan::keycode#14 keyboard_event_scan::keycode#1 gfx_init_plane_horisontal::ay#4 gfx_init_plane_horisontal::ay#1 gfx_init_plane_charset8::ch#8 gfx_init_plane_charset8::ch#1 ] reg byte a [ gfx_mode::$84 ] diff --git a/src/test/ref/c64dtv-gfxmodes.asm b/src/test/ref/c64dtv-gfxmodes.asm index 539547a4c..e8b5d2ae7 100644 --- a/src/test/ref/c64dtv-gfxmodes.asm +++ b/src/test/ref/c64dtv-gfxmodes.asm @@ -12,12 +12,12 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_ECM = $40 - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -63,9 +63,9 @@ .label BG_COLOR1 = $d022 .label BG_COLOR2 = $d023 .label BG_COLOR3 = $d024 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -153,18 +153,18 @@ menu: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY ldx #0 // DTV Palette - default __b1: @@ -469,18 +469,18 @@ mode_stdchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY ldx #0 // DTV Palette - default __b1: @@ -604,18 +604,18 @@ mode_ecmchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|VIC_ECM|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + lda #VICII_DEN|VICII_RSEL|VICII_ECM|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY ldx #0 // DTV Palette - default __b1: @@ -749,18 +749,18 @@ mode_mcchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL|VIC_MCM - lda #VIC_CSEL|VIC_MCM - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL|VICII_MCM + lda #VICII_CSEL|VICII_MCM + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY ldx #0 // DTV Palette - default __b1: @@ -879,18 +879,18 @@ mode_stdbitmap: { // Set VIC Bank bits to output - all others to input lda #3^BITMAP/$4000 sta CIA2 - // *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3 // Set VIC Bank // VIC Graphics Mode - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) // VIC Memory Pointers lda #(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY ldx #0 // DTV Palette - default __b1: @@ -1030,18 +1030,18 @@ mode_hicolstdchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY ldx #0 // DTV Palette - Grey Tones __b1: @@ -1160,18 +1160,18 @@ mode_hicolecmchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|VIC_ECM|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + lda #VICII_DEN|VICII_RSEL|VICII_ECM|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY ldx #0 // DTV Palette - Grey Tones __b1: @@ -1301,18 +1301,18 @@ mode_hicolmcchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL|VIC_MCM - lda #VIC_CSEL|VIC_MCM - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL|VICII_MCM + lda #VICII_CSEL|VICII_MCM + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY ldx #0 // DTV Palette - Grey Tones __b1: @@ -1418,13 +1418,13 @@ mode_sixsfred2: { // *DTV_CONTROL = DTV_LINEAR lda #DTV_LINEAR sta DTV_CONTROL - // *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 // VIC Graphics Mode - lda #VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_MCM|VIC_CSEL - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + lda #VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_MCM|VICII_CSEL + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // *DTV_PLANEA_START_LO = mode_sixsfred2::PLANEA [395] *DTV_PLANEA_START_HI = 0 @@ -776,8 +776,8 @@ mode_sixsfred2::@return: scope:[mode_sixsfred2] from mode_sixsfred2::@12 void mode_twoplanebitmap() mode_twoplanebitmap: scope:[mode_twoplanebitmap] from menu::@25 [445] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR - [446] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - [447] *VIC_CONTROL2 = VIC_CSEL + [446] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + [447] *VICII_CONTROL2 = VICII_CSEL [448] *DTV_PLANEA_START_LO = 0 [449] *DTV_PLANEA_START_MI = >mode_twoplanebitmap::PLANEA [450] *DTV_PLANEA_START_HI = 0 @@ -878,8 +878,8 @@ mode_twoplanebitmap::@8: scope:[mode_twoplanebitmap] from mode_twoplanebitmap:: void mode_sixsfred() mode_sixsfred: scope:[mode_sixsfred] from menu::@26 [505] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR - [506] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - [507] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [506] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + [507] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [508] *DTV_PLANEA_START_LO = 0 [509] *DTV_PLANEA_START_MI = >mode_sixsfred::PLANEA [510] *DTV_PLANEA_START_HI = 0 @@ -967,8 +967,8 @@ mode_sixsfred::@return: scope:[mode_sixsfred] from mode_sixsfred::@12 void mode_8bpppixelcell() mode_8bpppixelcell: scope:[mode_8bpppixelcell] from menu::@27 [558] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY - [559] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 - [560] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [559] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 + [560] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [561] *DTV_PLANEA_START_LO = 0 [562] *DTV_PLANEA_START_MI = >mode_8bpppixelcell::PLANEA [563] *DTV_PLANEA_START_HI = 0 @@ -1065,8 +1065,8 @@ mode_8bpppixelcell::@return: scope:[mode_8bpppixelcell] from mode_8bpppixelcell void mode_8bppchunkybmm() mode_8bppchunkybmm: scope:[mode_8bppchunkybmm] from menu::@28 [613] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF - [614] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 - [615] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [614] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 + [615] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [616] *DTV_PLANEB_START_LO = 0 [617] *DTV_PLANEB_START_MI = 0 [618] *DTV_PLANEB_START_HI = <>mode_8bppchunkybmm::PLANEB diff --git a/src/test/ref/c64dtv-gfxmodes.log b/src/test/ref/c64dtv-gfxmodes.log index 78fec0f1d..6345ae563 100644 --- a/src/test/ref/c64dtv-gfxmodes.log +++ b/src/test/ref/c64dtv-gfxmodes.log @@ -857,9 +857,9 @@ menu: scope:[menu] from main::@2 *DTV_CONTROL = 0 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)menu::CHARSET/$4000 - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_CSEL - *VIC_MEMORY = (byte)(word)menu::SCREEN&$3fff/$40|(word)menu::CHARSET&$3fff/$400 + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_CSEL + *VICII_MEMORY = (byte)(word)menu::SCREEN&$3fff/$40|(word)menu::CHARSET&$3fff/$400 menu::i#0 = 0 to:menu::@1 menu::@1: scope:[menu] from menu menu::@1 @@ -1570,9 +1570,9 @@ mode_stdchar: scope:[mode_stdchar] from menu::@19 *DTV_CONTROL = 0 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_stdchar::CHARSET/$4000 - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_CSEL - *VIC_MEMORY = (byte)(word)mode_stdchar::SCREEN&$3fff/$40|(word)mode_stdchar::CHARSET&$3fff/$400 + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_CSEL + *VICII_MEMORY = (byte)(word)mode_stdchar::SCREEN&$3fff/$40|(word)mode_stdchar::CHARSET&$3fff/$400 mode_stdchar::i#0 = 0 to:mode_stdchar::@1 mode_stdchar::@1: scope:[mode_stdchar] from mode_stdchar mode_stdchar::@1 @@ -1650,9 +1650,9 @@ mode_ecmchar: scope:[mode_ecmchar] from menu::@20 *DTV_CONTROL = 0 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_ecmchar::CHARSET/$4000 - *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 - *VIC_CONTROL2 = VIC_CSEL - *VIC_MEMORY = (byte)(word)mode_ecmchar::SCREEN&$3fff/$40|(word)mode_ecmchar::CHARSET&$3fff/$400 + *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 + *VICII_CONTROL2 = VICII_CSEL + *VICII_MEMORY = (byte)(word)mode_ecmchar::SCREEN&$3fff/$40|(word)mode_ecmchar::CHARSET&$3fff/$400 mode_ecmchar::i#0 = 0 to:mode_ecmchar::@1 mode_ecmchar::@1: scope:[mode_ecmchar] from mode_ecmchar mode_ecmchar::@1 @@ -1733,9 +1733,9 @@ mode_mcchar: scope:[mode_mcchar] from menu::@21 *DTV_CONTROL = 0 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_mcchar::CHARSET/$4000 - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_CSEL|VIC_MCM - *VIC_MEMORY = (byte)(word)mode_mcchar::SCREEN&$3fff/$40|(word)mode_mcchar::CHARSET&$3fff/$400 + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_CSEL|VICII_MCM + *VICII_MEMORY = (byte)(word)mode_mcchar::SCREEN&$3fff/$40|(word)mode_mcchar::CHARSET&$3fff/$400 mode_mcchar::i#0 = 0 to:mode_mcchar::@1 mode_mcchar::@1: scope:[mode_mcchar] from mode_mcchar mode_mcchar::@1 @@ -1813,9 +1813,9 @@ mode_stdbitmap: scope:[mode_stdbitmap] from menu::@22 *DTV_CONTROL = 0 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_stdbitmap::BITMAP/$4000 - *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_CSEL - *VIC_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&$3fff/$40|(word)mode_stdbitmap::BITMAP&$3fff/$400 + *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_CSEL + *VICII_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&$3fff/$40|(word)mode_stdbitmap::BITMAP&$3fff/$400 mode_stdbitmap::i#0 = 0 to:mode_stdbitmap::@1 mode_stdbitmap::@1: scope:[mode_stdbitmap] from mode_stdbitmap mode_stdbitmap::@1 @@ -1923,9 +1923,9 @@ mode_hicolstdchar: scope:[mode_hicolstdchar] from menu::@23 *DTV_CONTROL = DTV_HIGHCOLOR *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_hicolstdchar::CHARSET/$4000 - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_CSEL - *VIC_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&$3fff/$40|(word)mode_hicolstdchar::CHARSET&$3fff/$400 + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_CSEL + *VICII_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&$3fff/$40|(word)mode_hicolstdchar::CHARSET&$3fff/$400 mode_hicolstdchar::i#0 = 0 to:mode_hicolstdchar::@1 mode_hicolstdchar::@1: scope:[mode_hicolstdchar] from mode_hicolstdchar mode_hicolstdchar::@1 @@ -2002,9 +2002,9 @@ mode_hicolecmchar: scope:[mode_hicolecmchar] from menu::@24 *DTV_CONTROL = DTV_HIGHCOLOR *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_hicolecmchar::CHARSET/$4000 - *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 - *VIC_CONTROL2 = VIC_CSEL - *VIC_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&$3fff/$40|(word)mode_hicolecmchar::CHARSET&$3fff/$400 + *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 + *VICII_CONTROL2 = VICII_CSEL + *VICII_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&$3fff/$40|(word)mode_hicolecmchar::CHARSET&$3fff/$400 mode_hicolecmchar::i#0 = 0 to:mode_hicolecmchar::@1 mode_hicolecmchar::@1: scope:[mode_hicolecmchar] from mode_hicolecmchar mode_hicolecmchar::@1 @@ -2084,9 +2084,9 @@ mode_hicolmcchar: scope:[mode_hicolmcchar] from menu::@25 *DTV_CONTROL = DTV_HIGHCOLOR *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_hicolmcchar::CHARSET/$4000 - *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_CSEL|VIC_MCM - *VIC_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&$3fff/$40|(word)mode_hicolmcchar::CHARSET&$3fff/$400 + *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_CSEL|VICII_MCM + *VICII_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&$3fff/$40|(word)mode_hicolmcchar::CHARSET&$3fff/$400 mode_hicolmcchar::i#0 = 0 to:mode_hicolmcchar::@1 mode_hicolmcchar::@1: scope:[mode_hicolmcchar] from mode_hicolmcchar mode_hicolmcchar::@1 @@ -2160,8 +2160,8 @@ void mode_twoplanebitmap() mode_twoplanebitmap: scope:[mode_twoplanebitmap] from menu::@27 dtv_control#38 = DTV_HIGHCOLOR|DTV_LINEAR *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR - *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_CSEL + *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_CSEL *DTV_PLANEA_START_LO = mode_twoplanebitmap::PLANEA *DTV_PLANEA_START_HI = 0 @@ -2324,8 +2324,8 @@ void mode_sixsfred() mode_sixsfred: scope:[mode_sixsfred] from menu::@28 dtv_control#41 = DTV_HIGHCOLOR|DTV_LINEAR *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR - *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_MCM|VICII_CSEL *DTV_PLANEA_START_LO = mode_sixsfred::PLANEA *DTV_PLANEA_START_HI = 0 @@ -2464,8 +2464,8 @@ void mode_sixsfred2() mode_sixsfred2: scope:[mode_sixsfred2] from menu::@26 dtv_control#44 = DTV_LINEAR *DTV_CONTROL = DTV_LINEAR - *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_MCM|VICII_CSEL *DTV_PLANEA_START_LO = mode_sixsfred2::PLANEA *DTV_PLANEA_START_HI = 0 @@ -2606,8 +2606,8 @@ void mode_8bpppixelcell() mode_8bpppixelcell: scope:[mode_8bpppixelcell] from menu::@29 dtv_control#47 = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY - *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_MCM|VICII_CSEL *DTV_PLANEA_START_LO = mode_8bpppixelcell::PLANEA *DTV_PLANEA_START_HI = 0 @@ -2777,8 +2777,8 @@ void mode_8bppchunkybmm() mode_8bppchunkybmm: scope:[mode_8bppchunkybmm] from menu::@30 dtv_control#50 = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF - *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 - *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 + *VICII_CONTROL2 = VICII_MCM|VICII_CSEL *DTV_PLANEB_START_LO = <mode_8bppchunkybmm::PLANEB @@ -2994,15 +2994,15 @@ const byte RADIX::DECIMAL = $a const byte RADIX::HEXADECIMAL = $10 const byte RADIX::OCTAL = 8 const nomodify byte* RASTER = (byte*)$d012 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*)$d011 -const nomodify byte* VIC_CONTROL2 = (byte*)$d016 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*)$d018 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*)$d011 +const nomodify byte* VICII_CONTROL2 = (byte*)$d016 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*)$d018 +const nomodify byte VICII_RSEL = 8 void __start() void bitmap_clear() bool~ bitmap_clear::$0 @@ -4995,10 +4995,10 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)menu::CHARSET/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)menu::CHARSET/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)menu::CHARSET/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)menu::CHARSET/$4000 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)menu::SCREEN&$3fff/$40|(word)menu::CHARSET&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)menu::SCREEN&(unumber)$3fff/$40|(word)menu::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)menu::SCREEN&$3fff/$40|(word)menu::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)menu::SCREEN&(unumber)$3fff/$40|(word)menu::CHARSET&$3fff/$400 Adding number conversion cast (unumber) $3e8 in menu::$4 = menu::c#2 != COLS+$3e8 Adding number conversion cast (unumber) 0 in *BG_COLOR = 0 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 @@ -5033,10 +5033,10 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)mode_stdchar::CHARSET/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_stdchar::CHARSET/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)mode_stdchar::CHARSET/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)mode_stdchar::CHARSET/$4000 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_stdchar::SCREEN&$3fff/$40|(word)mode_stdchar::CHARSET&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_stdchar::SCREEN&(unumber)$3fff/$40|(word)mode_stdchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_stdchar::SCREEN&$3fff/$40|(word)mode_stdchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_stdchar::SCREEN&(unumber)$3fff/$40|(word)mode_stdchar::CHARSET&$3fff/$400 Adding number conversion cast (unumber) 0 in *BG_COLOR = 0 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) $f in mode_stdchar::$3 = mode_stdchar::$2 & $f @@ -5057,10 +5057,10 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)mode_ecmchar::CHARSET/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_ecmchar::CHARSET/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)mode_ecmchar::CHARSET/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)mode_ecmchar::CHARSET/$4000 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|VIC_ECM|3 in *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_RSEL|VIC_ECM|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_ecmchar::SCREEN&$3fff/$40|(word)mode_ecmchar::CHARSET&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_ecmchar::SCREEN&(unumber)$3fff/$40|(word)mode_ecmchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|VICII_ECM|3 in *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_RSEL|VICII_ECM|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_ecmchar::SCREEN&$3fff/$40|(word)mode_ecmchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_ecmchar::SCREEN&(unumber)$3fff/$40|(word)mode_ecmchar::CHARSET&$3fff/$400 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) 0 in *BG_COLOR = 0 Adding number conversion cast (unumber) 2 in *BG_COLOR1 = 2 @@ -5084,10 +5084,10 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)mode_mcchar::CHARSET/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_mcchar::CHARSET/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)mode_mcchar::CHARSET/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)mode_mcchar::CHARSET/$4000 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_mcchar::SCREEN&$3fff/$40|(word)mode_mcchar::CHARSET&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_mcchar::SCREEN&(unumber)$3fff/$40|(word)mode_mcchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_mcchar::SCREEN&$3fff/$40|(word)mode_mcchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_mcchar::SCREEN&(unumber)$3fff/$40|(word)mode_mcchar::CHARSET&$3fff/$400 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) $f in mode_mcchar::$3 = mode_mcchar::$2 & $f Adding number conversion cast (unumber) mode_mcchar::$3 in mode_mcchar::$3 = mode_mcchar::$2 & (unumber)$f @@ -5105,10 +5105,10 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)mode_stdbitmap::BITMAP/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_stdbitmap::BITMAP/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)mode_stdbitmap::BITMAP/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)mode_stdbitmap::BITMAP/$4000 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&$3fff/$40|(word)mode_stdbitmap::BITMAP&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&(unumber)$3fff/$40|(word)mode_stdbitmap::BITMAP&$3fff/$400 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&$3fff/$40|(word)mode_stdbitmap::BITMAP&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&(unumber)$3fff/$40|(word)mode_stdbitmap::BITMAP&$3fff/$400 Adding number conversion cast (unumber) $f in mode_stdbitmap::$5 = mode_stdbitmap::$4 & $f Adding number conversion cast (unumber) mode_stdbitmap::$5 in mode_stdbitmap::$5 = mode_stdbitmap::$4 & (unumber)$f Adding number conversion cast (unumber) $f in mode_stdbitmap::$6 = $f - mode_stdbitmap::col#0 @@ -5127,10 +5127,10 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)mode_hicolstdchar::CHARSET/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_hicolstdchar::CHARSET/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)mode_hicolstdchar::CHARSET/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)mode_hicolstdchar::CHARSET/$4000 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&$3fff/$40|(word)mode_hicolstdchar::CHARSET&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolstdchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&$3fff/$40|(word)mode_hicolstdchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolstdchar::CHARSET&$3fff/$400 Adding number conversion cast (unumber) 0 in *BG_COLOR = 0 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) $f in mode_hicolstdchar::$2 = mode_hicolstdchar::cy#2 & $f @@ -5147,10 +5147,10 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)mode_hicolecmchar::CHARSET/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_hicolecmchar::CHARSET/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)mode_hicolecmchar::CHARSET/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)mode_hicolecmchar::CHARSET/$4000 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|VIC_ECM|3 in *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_RSEL|VIC_ECM|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&$3fff/$40|(word)mode_hicolecmchar::CHARSET&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolecmchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|VICII_ECM|3 in *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_RSEL|VICII_ECM|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&$3fff/$40|(word)mode_hicolecmchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolecmchar::CHARSET&$3fff/$400 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) $50 in *BG_COLOR = $50 Adding number conversion cast (unumber) $54 in *BG_COLOR1 = $54 @@ -5170,10 +5170,10 @@ Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526 Adding number conversion cast (unumber) 3^(byte)(word)mode_hicolmcchar::CHARSET/$4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_hicolmcchar::CHARSET/$4000 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(byte)(word)mode_hicolmcchar::CHARSET/$4000 Adding number conversion cast (unumber) $4000 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(byte)(word)mode_hicolmcchar::CHARSET/$4000 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&$3fff/$40|(word)mode_hicolmcchar::CHARSET&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolmcchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&$3fff/$40|(word)mode_hicolmcchar::CHARSET&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolmcchar::CHARSET&$3fff/$400 Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) $50 in *BG_COLOR = $50 Adding number conversion cast (unumber) $54 in *BG_COLOR1 = $54 @@ -5185,8 +5185,8 @@ Adding number conversion cast (unumber) mode_hicolmcchar::$3 in mode_hicolmcchar Adding number conversion cast (unumber) $f in mode_hicolmcchar::$4 = mode_hicolmcchar::cx#2 & $f Adding number conversion cast (unumber) mode_hicolmcchar::$4 in mode_hicolmcchar::$4 = mode_hicolmcchar::cx#2 & (unumber)$f Adding number conversion cast (unumber) mode_hicolmcchar::$5 in mode_hicolmcchar::$5 = mode_hicolmcchar::$3 | mode_hicolmcchar::$4 -Adding number conversion cast (unumber) VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_START_HI = 0 Adding number conversion cast (unumber) 1 in *DTV_PLANEA_STEP = 1 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_MODULO_LO = 0 @@ -5213,8 +5213,8 @@ Adding number conversion cast (unumber) 0 in mode_twoplanebitmap::$9 = mode_twop Adding number conversion cast (unumber) 0 in *mode_twoplanebitmap::gfxa#3 = 0 Adding number conversion cast (unumber) $ff in *mode_twoplanebitmap::gfxa#4 = $ff Adding number conversion cast (unumber) $f in *mode_twoplanebitmap::gfxb#2 = $f -Adding number conversion cast (unumber) VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_START_HI = 0 Adding number conversion cast (unumber) 1 in *DTV_PLANEA_STEP = 1 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_MODULO_LO = 0 @@ -5233,8 +5233,8 @@ Adding number conversion cast (unumber) mode_sixsfred::$6 in mode_sixsfred::$6 = Adding number conversion cast (unumber) 3 in mode_sixsfred::$7 = mode_sixsfred::$6 & 3 Adding number conversion cast (unumber) mode_sixsfred::$7 in mode_sixsfred::$7 = mode_sixsfred::$6 & (unumber)3 Adding number conversion cast (unumber) $1b in *mode_sixsfred::gfxb#2 = $1b -Adding number conversion cast (unumber) VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_START_HI = 0 Adding number conversion cast (unumber) 1 in *DTV_PLANEA_STEP = 1 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_MODULO_LO = 0 @@ -5258,8 +5258,8 @@ Adding number conversion cast (unumber) mode_sixsfred2::$8 in mode_sixsfred2::$8 Adding number conversion cast (unumber) 3 in mode_sixsfred2::$9 = mode_sixsfred2::$8 & 3 Adding number conversion cast (unumber) mode_sixsfred2::$9 in mode_sixsfred2::$9 = mode_sixsfred2::$8 & (unumber)3 Adding number conversion cast (unumber) $1b in *mode_sixsfred2::gfxb#2 = $1b -Adding number conversion cast (unumber) VIC_ECM|VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_ECM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_ECM|VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_ECM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_START_HI = 0 Adding number conversion cast (unumber) 1 in *DTV_PLANEA_STEP = 1 Adding number conversion cast (unumber) 0 in *DTV_PLANEA_MODULO_LO = 0 @@ -5281,8 +5281,8 @@ Adding number conversion cast (unumber) mode_8bpppixelcell::$8 in mode_8bpppixel Adding number conversion cast (unumber) 0 in mode_8bpppixelcell::$9 = mode_8bpppixelcell::$8 != 0 Adding number conversion cast (unumber) 2 in mode_8bpppixelcell::$11 = mode_8bpppixelcell::bits#3 * 2 Adding number conversion cast (unumber) mode_8bpppixelcell::$11 in mode_8bpppixelcell::$11 = mode_8bpppixelcell::bits#3 * (unumber)2 -Adding number conversion cast (unumber) VIC_ECM|VIC_DEN|VIC_RSEL|3 in *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *VIC_CONTROL = ((unumber)) VIC_ECM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_ECM|VICII_DEN|VICII_RSEL|3 in *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_ECM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) 8 in *DTV_PLANEB_STEP = 8 Adding number conversion cast (unumber) 0 in *DTV_PLANEB_MODULO_LO = 0 Adding number conversion cast (unumber) 0 in *DTV_PLANEB_MODULO_HI = 0 @@ -5290,22 +5290,22 @@ Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0 Adding number conversion cast (unumber) $4000 in mode_8bppchunkybmm::gfxbCpuBank#0 = (byte)mode_8bppchunkybmm::PLANEB/$4000 Adding number conversion cast (unumber) $8000 in mode_8bppchunkybmm::$4 = mode_8bppchunkybmm::gfxb#3 == $8000 Successful SSA optimization PassNAddNumberTypeConversions -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)menu::SCREEN&(unumber)$3fff/$40|(word)menu::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)menu::SCREEN&(unumber)$3fff/(unumber)$40|(word)menu::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)mode_stdchar::SCREEN&(unumber)$3fff/$40|(word)mode_stdchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)mode_stdchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_stdchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)mode_ecmchar::SCREEN&(unumber)$3fff/$40|(word)mode_ecmchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)mode_ecmchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_ecmchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)mode_mcchar::SCREEN&(unumber)$3fff/$40|(word)mode_mcchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)mode_mcchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_mcchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&(unumber)$3fff/$40|(word)mode_stdbitmap::BITMAP&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_stdbitmap::BITMAP&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolstdchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_hicolstdchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolecmchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_hicolecmchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolmcchar::CHARSET&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_hicolmcchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)menu::SCREEN&(unumber)$3fff/$40|(word)menu::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)menu::SCREEN&(unumber)$3fff/(unumber)$40|(word)menu::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)mode_stdchar::SCREEN&(unumber)$3fff/$40|(word)mode_stdchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)mode_stdchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_stdchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)mode_ecmchar::SCREEN&(unumber)$3fff/$40|(word)mode_ecmchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)mode_ecmchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_ecmchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)mode_mcchar::SCREEN&(unumber)$3fff/$40|(word)mode_mcchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)mode_mcchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_mcchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&(unumber)$3fff/$40|(word)mode_stdbitmap::BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_stdbitmap::BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolstdchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_hicolstdchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolecmchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_hicolecmchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&(unumber)$3fff/$40|(word)mode_hicolmcchar::CHARSET&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&(unumber)$3fff/(unumber)$40|(word)mode_hicolmcchar::CHARSET&(unumber)$3fff/$400 Successful SSA optimization PassNAddNumberTypeConversions Inlining cast memset::dst#0 = (byte*)memset::str#2 Inlining cast memset::num#0 = (unumber)$3e8 @@ -5315,7 +5315,7 @@ Inlining cast bitmap_plot::plotter#0 = (byte*)bitmap_plot::$0 Inlining cast *DTV_CONTROL = (unumber)0 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)menu::CHARSET/(unumber)$4000 -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *BG_COLOR = (unumber)0 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast mode_ctrl::ctrl#7 = (unumber)0 @@ -5323,14 +5323,14 @@ Inlining cast dtv_control#17 = (unumber)0 Inlining cast *DTV_CONTROL = (unumber)0 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)mode_stdchar::CHARSET/(unumber)$4000 -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *BG_COLOR = (unumber)0 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast dtv_control#20 = (unumber)0 Inlining cast *DTV_CONTROL = (unumber)0 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)mode_ecmchar::CHARSET/(unumber)$4000 -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_RSEL|VIC_ECM|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_RSEL|VICII_ECM|(unumber)3 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast *BG_COLOR = (unumber)0 Inlining cast *BG_COLOR1 = (unumber)2 @@ -5340,21 +5340,21 @@ Inlining cast dtv_control#23 = (unumber)0 Inlining cast *DTV_CONTROL = (unumber)0 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)mode_mcchar::CHARSET/(unumber)$4000 -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast dtv_control#26 = (unumber)0 Inlining cast *DTV_CONTROL = (unumber)0 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)mode_stdbitmap::BITMAP/(unumber)$4000 -Inlining cast *VIC_CONTROL = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)mode_hicolstdchar::CHARSET/(unumber)$4000 -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *BG_COLOR = (unumber)0 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)mode_hicolecmchar::CHARSET/(unumber)$4000 -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_RSEL|VIC_ECM|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_RSEL|VICII_ECM|(unumber)3 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast *BG_COLOR = (unumber)$50 Inlining cast *BG_COLOR1 = (unumber)$54 @@ -5362,12 +5362,12 @@ Inlining cast *BG_COLOR2 = (unumber)$58 Inlining cast *BG_COLOR3 = (unumber)$5c Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)mode_hicolmcchar::CHARSET/(unumber)$4000 -Inlining cast *VIC_CONTROL = (unumber)VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast *BG_COLOR = (unumber)$50 Inlining cast *BG_COLOR1 = (unumber)$54 Inlining cast *BG_COLOR2 = (unumber)$58 -Inlining cast *VIC_CONTROL = (unumber)VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *DTV_PLANEA_START_HI = (unumber)0 Inlining cast *DTV_PLANEA_STEP = (unumber)1 Inlining cast *DTV_PLANEA_MODULO_LO = (unumber)0 @@ -5382,7 +5382,7 @@ Inlining cast *BG_COLOR1 = (unumber)$d4 Inlining cast *mode_twoplanebitmap::gfxa#3 = (unumber)0 Inlining cast *mode_twoplanebitmap::gfxa#4 = (unumber)$ff Inlining cast *mode_twoplanebitmap::gfxb#2 = (unumber)$f -Inlining cast *VIC_CONTROL = (unumber)VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *DTV_PLANEA_START_HI = (unumber)0 Inlining cast *DTV_PLANEA_STEP = (unumber)1 Inlining cast *DTV_PLANEA_MODULO_LO = (unumber)0 @@ -5393,7 +5393,7 @@ Inlining cast *DTV_PLANEB_MODULO_LO = (unumber)0 Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast *mode_sixsfred::gfxb#2 = (unumber)$1b -Inlining cast *VIC_CONTROL = (unumber)VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *DTV_PLANEA_START_HI = (unumber)0 Inlining cast *DTV_PLANEA_STEP = (unumber)1 Inlining cast *DTV_PLANEA_MODULO_LO = (unumber)0 @@ -5404,7 +5404,7 @@ Inlining cast *DTV_PLANEB_MODULO_LO = (unumber)0 Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0 Inlining cast *BORDER_COLOR = (unumber)0 Inlining cast *mode_sixsfred2::gfxb#2 = (unumber)$1b -Inlining cast *VIC_CONTROL = (unumber)VIC_ECM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_ECM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *DTV_PLANEA_START_HI = (unumber)0 Inlining cast *DTV_PLANEA_STEP = (unumber)1 Inlining cast *DTV_PLANEA_MODULO_LO = (unumber)0 @@ -5414,7 +5414,7 @@ Inlining cast *DTV_PLANEB_STEP = (unumber)0 Inlining cast *DTV_PLANEB_MODULO_LO = (unumber)0 Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0 Inlining cast *BORDER_COLOR = (unumber)0 -Inlining cast *VIC_CONTROL = (unumber)VIC_ECM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *VICII_CONTROL = (unumber)VICII_ECM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *DTV_PLANEB_STEP = (unumber)8 Inlining cast *DTV_PLANEB_MODULO_LO = (unumber)0 Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0 @@ -5529,7 +5529,7 @@ Simplifying constant integer cast 3 Simplifying constant integer cast (unumber)3^(byte)(word)menu::CHARSET/(unumber)$4000 Simplifying constant integer cast 3 Simplifying constant integer cast $4000 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -5569,7 +5569,7 @@ Simplifying constant integer cast 3 Simplifying constant integer cast (unumber)3^(byte)(word)mode_stdchar::CHARSET/(unumber)$4000 Simplifying constant integer cast 3 Simplifying constant integer cast $4000 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -5590,7 +5590,7 @@ Simplifying constant integer cast 3 Simplifying constant integer cast (unumber)3^(byte)(word)mode_ecmchar::CHARSET/(unumber)$4000 Simplifying constant integer cast 3 Simplifying constant integer cast $4000 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|VIC_ECM|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|VICII_ECM|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -5614,7 +5614,7 @@ Simplifying constant integer cast 3 Simplifying constant integer cast (unumber)3^(byte)(word)mode_mcchar::CHARSET/(unumber)$4000 Simplifying constant integer cast 3 Simplifying constant integer cast $4000 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -5632,7 +5632,7 @@ Simplifying constant integer cast 3 Simplifying constant integer cast (unumber)3^(byte)(word)mode_stdbitmap::BITMAP/(unumber)$4000 Simplifying constant integer cast 3 Simplifying constant integer cast $4000 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -5650,7 +5650,7 @@ Simplifying constant integer cast 3 Simplifying constant integer cast (unumber)3^(byte)(word)mode_hicolstdchar::CHARSET/(unumber)$4000 Simplifying constant integer cast 3 Simplifying constant integer cast $4000 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -5668,7 +5668,7 @@ Simplifying constant integer cast 3 Simplifying constant integer cast (unumber)3^(byte)(word)mode_hicolecmchar::CHARSET/(unumber)$4000 Simplifying constant integer cast 3 Simplifying constant integer cast $4000 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|VIC_ECM|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|VICII_ECM|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -5689,7 +5689,7 @@ Simplifying constant integer cast 3 Simplifying constant integer cast (unumber)3^(byte)(word)mode_hicolmcchar::CHARSET/(unumber)$4000 Simplifying constant integer cast 3 Simplifying constant integer cast $4000 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -5702,7 +5702,7 @@ Simplifying constant integer cast $58 Simplifying constant integer cast $f Simplifying constant integer cast $10 Simplifying constant integer cast $f -Simplifying constant integer cast VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 0 Simplifying constant integer cast 1 @@ -5725,7 +5725,7 @@ Simplifying constant integer cast 0 Simplifying constant integer cast 0 Simplifying constant integer cast $ff Simplifying constant integer cast $f -Simplifying constant integer cast VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 0 Simplifying constant integer cast 1 @@ -5742,7 +5742,7 @@ Simplifying constant integer cast $f Simplifying constant integer cast 2 Simplifying constant integer cast 3 Simplifying constant integer cast $1b -Simplifying constant integer cast VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 0 Simplifying constant integer cast 1 @@ -5761,7 +5761,7 @@ Simplifying constant integer cast 3 Simplifying constant integer cast 2 Simplifying constant integer cast 3 Simplifying constant integer cast $1b -Simplifying constant integer cast VIC_ECM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_ECM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 0 Simplifying constant integer cast 1 @@ -5778,7 +5778,7 @@ Simplifying constant integer cast $f Simplifying constant integer cast $80 Simplifying constant integer cast 0 Simplifying constant integer cast 2 -Simplifying constant integer cast VIC_ECM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_ECM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 8 Simplifying constant integer cast 0 @@ -7052,27 +7052,27 @@ Resolved ranged next value [1135] mode_8bppchunkybmm::y#1 = ++ mode_8bppchunkybm Resolved ranged comparison value [1137] if(mode_8bppchunkybmm::y#1!=rangelast(0,$c7)) goto mode_8bppchunkybmm::@3 to $c8 Simplifying constant evaluating to zero (byte)(dword)menu::CHARSET/$10000 in [277] *DTV_GRAPHICS_VIC_BANK = (byte)(dword)menu::CHARSET/$10000 Simplifying constant evaluating to zero >(word)DTV_COLOR_BANK_DEFAULT/$400 in [279] *DTV_COLOR_BANK_HI = >(word)DTV_COLOR_BANK_DEFAULT/$400 -Simplifying constant evaluating to zero (word)menu::SCREEN&$3fff/$40 in [285] *VIC_MEMORY = (byte)(word)menu::SCREEN&$3fff/$40|(word)menu::CHARSET&$3fff/$400 +Simplifying constant evaluating to zero (word)menu::SCREEN&$3fff/$40 in [285] *VICII_MEMORY = (byte)(word)menu::SCREEN&$3fff/$40|(word)menu::CHARSET&$3fff/$400 Simplifying constant evaluating to zero (byte)(dword)mode_stdchar::CHARSET/$10000 in [484] *DTV_GRAPHICS_VIC_BANK = (byte)(dword)mode_stdchar::CHARSET/$10000 Simplifying constant evaluating to zero >(word)DTV_COLOR_BANK_DEFAULT/$400 in [486] *DTV_COLOR_BANK_HI = >(word)DTV_COLOR_BANK_DEFAULT/$400 -Simplifying constant evaluating to zero (word)mode_stdchar::SCREEN&$3fff/$40 in [493] *VIC_MEMORY = (byte)(word)mode_stdchar::SCREEN&$3fff/$40|(word)mode_stdchar::CHARSET&$3fff/$400 +Simplifying constant evaluating to zero (word)mode_stdchar::SCREEN&$3fff/$40 in [493] *VICII_MEMORY = (byte)(word)mode_stdchar::SCREEN&$3fff/$40|(word)mode_stdchar::CHARSET&$3fff/$400 Simplifying constant evaluating to zero (byte)(dword)mode_ecmchar::CHARSET/$10000 in [527] *DTV_GRAPHICS_VIC_BANK = (byte)(dword)mode_ecmchar::CHARSET/$10000 Simplifying constant evaluating to zero >(word)DTV_COLOR_BANK_DEFAULT/$400 in [529] *DTV_COLOR_BANK_HI = >(word)DTV_COLOR_BANK_DEFAULT/$400 -Simplifying constant evaluating to zero (word)mode_ecmchar::SCREEN&$3fff/$40 in [536] *VIC_MEMORY = (byte)(word)mode_ecmchar::SCREEN&$3fff/$40|(word)mode_ecmchar::CHARSET&$3fff/$400 +Simplifying constant evaluating to zero (word)mode_ecmchar::SCREEN&$3fff/$40 in [536] *VICII_MEMORY = (byte)(word)mode_ecmchar::SCREEN&$3fff/$40|(word)mode_ecmchar::CHARSET&$3fff/$400 Simplifying constant evaluating to zero (byte)(dword)mode_mcchar::CHARSET/$10000 in [573] *DTV_GRAPHICS_VIC_BANK = (byte)(dword)mode_mcchar::CHARSET/$10000 Simplifying constant evaluating to zero >(word)DTV_COLOR_BANK_DEFAULT/$400 in [575] *DTV_COLOR_BANK_HI = >(word)DTV_COLOR_BANK_DEFAULT/$400 -Simplifying constant evaluating to zero (word)mode_mcchar::SCREEN&$3fff/$40 in [582] *VIC_MEMORY = (byte)(word)mode_mcchar::SCREEN&$3fff/$40|(word)mode_mcchar::CHARSET&$3fff/$400 +Simplifying constant evaluating to zero (word)mode_mcchar::SCREEN&$3fff/$40 in [582] *VICII_MEMORY = (byte)(word)mode_mcchar::SCREEN&$3fff/$40|(word)mode_mcchar::CHARSET&$3fff/$400 Simplifying constant evaluating to zero (byte)(dword)mode_stdbitmap::BITMAP/$10000 in [618] *DTV_GRAPHICS_VIC_BANK = (byte)(dword)mode_stdbitmap::BITMAP/$10000 -Simplifying constant evaluating to zero (word)mode_stdbitmap::SCREEN&$3fff/$40 in [625] *VIC_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&$3fff/$40|(word)mode_stdbitmap::BITMAP&$3fff/$400 +Simplifying constant evaluating to zero (word)mode_stdbitmap::SCREEN&$3fff/$40 in [625] *VICII_MEMORY = (byte)(word)mode_stdbitmap::SCREEN&$3fff/$40|(word)mode_stdbitmap::BITMAP&$3fff/$400 Simplifying constant evaluating to zero (byte)(dword)mode_hicolstdchar::CHARSET/$10000 in [670] *DTV_GRAPHICS_VIC_BANK = (byte)(dword)mode_hicolstdchar::CHARSET/$10000 Simplifying constant evaluating to zero >(word)mode_hicolstdchar::COLORS/$400 in [672] *DTV_COLOR_BANK_HI = >(word)mode_hicolstdchar::COLORS/$400 -Simplifying constant evaluating to zero (word)mode_hicolstdchar::SCREEN&$3fff/$40 in [679] *VIC_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&$3fff/$40|(word)mode_hicolstdchar::CHARSET&$3fff/$400 +Simplifying constant evaluating to zero (word)mode_hicolstdchar::SCREEN&$3fff/$40 in [679] *VICII_MEMORY = (byte)(word)mode_hicolstdchar::SCREEN&$3fff/$40|(word)mode_hicolstdchar::CHARSET&$3fff/$400 Simplifying constant evaluating to zero (byte)(dword)mode_hicolecmchar::CHARSET/$10000 in [711] *DTV_GRAPHICS_VIC_BANK = (byte)(dword)mode_hicolecmchar::CHARSET/$10000 Simplifying constant evaluating to zero >(word)mode_hicolecmchar::COLORS/$400 in [713] *DTV_COLOR_BANK_HI = >(word)mode_hicolecmchar::COLORS/$400 -Simplifying constant evaluating to zero (word)mode_hicolecmchar::SCREEN&$3fff/$40 in [720] *VIC_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&$3fff/$40|(word)mode_hicolecmchar::CHARSET&$3fff/$400 +Simplifying constant evaluating to zero (word)mode_hicolecmchar::SCREEN&$3fff/$40 in [720] *VICII_MEMORY = (byte)(word)mode_hicolecmchar::SCREEN&$3fff/$40|(word)mode_hicolecmchar::CHARSET&$3fff/$400 Simplifying constant evaluating to zero (byte)(dword)mode_hicolmcchar::CHARSET/$10000 in [755] *DTV_GRAPHICS_VIC_BANK = (byte)(dword)mode_hicolmcchar::CHARSET/$10000 Simplifying constant evaluating to zero >(word)mode_hicolmcchar::COLORS/$400 in [757] *DTV_COLOR_BANK_HI = >(word)mode_hicolmcchar::COLORS/$400 -Simplifying constant evaluating to zero (word)mode_hicolmcchar::SCREEN&$3fff/$40 in [764] *VIC_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&$3fff/$40|(word)mode_hicolmcchar::CHARSET&$3fff/$400 +Simplifying constant evaluating to zero (word)mode_hicolmcchar::SCREEN&$3fff/$40 in [764] *VICII_MEMORY = (byte)(word)mode_hicolmcchar::SCREEN&$3fff/$40|(word)mode_hicolmcchar::CHARSET&$3fff/$400 Simplifying constant evaluating to zero mode_twoplanebitmap::COLORS/$400 in [815] *DTV_COLOR_BANK_HI = >mode_twoplanebitmap::COLORS/$400 @@ -7091,21 +7091,21 @@ Simplifying expression containing zero (byte*)CIA1 in [56] *((byte*)CIA1+OFFSET_ Simplifying expression containing zero bitmap_plot_xhi in [103] bitmap_clear::$3 = bitmap_plot_xhi[0] w= bitmap_plot_xlo[0] Simplifying expression containing zero bitmap_plot_xlo in [103] bitmap_clear::$3 = *bitmap_plot_xhi w= bitmap_plot_xlo[0] Simplifying expression containing zero (byte*)CIA2 in [282] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)menu::CHARSET/$4000 -Simplifying expression containing zero (word)menu::CHARSET&$3fff/$400 in [285] *VIC_MEMORY = (byte)0|(word)menu::CHARSET&$3fff/$400 +Simplifying expression containing zero (word)menu::CHARSET&$3fff/$400 in [285] *VICII_MEMORY = (byte)0|(word)menu::CHARSET&$3fff/$400 Simplifying expression containing zero (byte*)CIA2 in [490] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_stdchar::CHARSET/$4000 -Simplifying expression containing zero (word)mode_stdchar::CHARSET&$3fff/$400 in [493] *VIC_MEMORY = (byte)0|(word)mode_stdchar::CHARSET&$3fff/$400 +Simplifying expression containing zero (word)mode_stdchar::CHARSET&$3fff/$400 in [493] *VICII_MEMORY = (byte)0|(word)mode_stdchar::CHARSET&$3fff/$400 Simplifying expression containing zero (byte*)CIA2 in [533] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_ecmchar::CHARSET/$4000 -Simplifying expression containing zero (word)mode_ecmchar::CHARSET&$3fff/$400 in [536] *VIC_MEMORY = (byte)0|(word)mode_ecmchar::CHARSET&$3fff/$400 +Simplifying expression containing zero (word)mode_ecmchar::CHARSET&$3fff/$400 in [536] *VICII_MEMORY = (byte)0|(word)mode_ecmchar::CHARSET&$3fff/$400 Simplifying expression containing zero (byte*)CIA2 in [579] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_mcchar::CHARSET/$4000 -Simplifying expression containing zero (word)mode_mcchar::CHARSET&$3fff/$400 in [582] *VIC_MEMORY = (byte)0|(word)mode_mcchar::CHARSET&$3fff/$400 +Simplifying expression containing zero (word)mode_mcchar::CHARSET&$3fff/$400 in [582] *VICII_MEMORY = (byte)0|(word)mode_mcchar::CHARSET&$3fff/$400 Simplifying expression containing zero (byte*)CIA2 in [622] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_stdbitmap::BITMAP/$4000 -Simplifying expression containing zero (word)mode_stdbitmap::BITMAP&$3fff/$400 in [625] *VIC_MEMORY = (byte)0|(word)mode_stdbitmap::BITMAP&$3fff/$400 +Simplifying expression containing zero (word)mode_stdbitmap::BITMAP&$3fff/$400 in [625] *VICII_MEMORY = (byte)0|(word)mode_stdbitmap::BITMAP&$3fff/$400 Simplifying expression containing zero (byte*)CIA2 in [676] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_hicolstdchar::CHARSET/$4000 -Simplifying expression containing zero (word)mode_hicolstdchar::CHARSET&$3fff/$400 in [679] *VIC_MEMORY = (byte)0|(word)mode_hicolstdchar::CHARSET&$3fff/$400 +Simplifying expression containing zero (word)mode_hicolstdchar::CHARSET&$3fff/$400 in [679] *VICII_MEMORY = (byte)0|(word)mode_hicolstdchar::CHARSET&$3fff/$400 Simplifying expression containing zero (byte*)CIA2 in [717] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_hicolecmchar::CHARSET/$4000 -Simplifying expression containing zero (word)mode_hicolecmchar::CHARSET&$3fff/$400 in [720] *VIC_MEMORY = (byte)0|(word)mode_hicolecmchar::CHARSET&$3fff/$400 +Simplifying expression containing zero (word)mode_hicolecmchar::CHARSET&$3fff/$400 in [720] *VICII_MEMORY = (byte)0|(word)mode_hicolecmchar::CHARSET&$3fff/$400 Simplifying expression containing zero (byte*)CIA2 in [761] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(byte)(word)mode_hicolmcchar::CHARSET/$4000 -Simplifying expression containing zero (word)mode_hicolmcchar::CHARSET&$3fff/$400 in [764] *VIC_MEMORY = (byte)0|(word)mode_hicolmcchar::CHARSET&$3fff/$400 +Simplifying expression containing zero (word)mode_hicolmcchar::CHARSET&$3fff/$400 in [764] *VICII_MEMORY = (byte)0|(word)mode_hicolmcchar::CHARSET&$3fff/$400 Successful SSA optimization PassNSimplifyExpressionWithZero Eliminating unused variable - keeping the phi block print_screen#13 Eliminating unused variable - keeping the phi block print_line_cursor#25 @@ -8414,9 +8414,9 @@ menu: scope:[menu] from main::@1 [9] *DTV_CONTROL = 0 [10] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [11] *((byte*)CIA2) = 3^(byte)(word)menu::CHARSET/$4000 - [12] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - [13] *VIC_CONTROL2 = VIC_CSEL - [14] *VIC_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 + [12] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + [13] *VICII_CONTROL2 = VICII_CSEL + [14] *VICII_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 to:menu::@1 menu::@1: scope:[menu] from menu menu::@1 [15] menu::i#2 = phi( menu/0, menu::@1/menu::i#1 ) @@ -8674,9 +8674,9 @@ mode_stdchar: scope:[mode_stdchar] from menu::@17 [144] *DTV_CONTROL = 0 [145] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [146] *((byte*)CIA2) = 3^(byte)(word)mode_stdchar::CHARSET/$4000 - [147] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - [148] *VIC_CONTROL2 = VIC_CSEL - [149] *VIC_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 + [147] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + [148] *VICII_CONTROL2 = VICII_CSEL + [149] *VICII_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 to:mode_stdchar::@1 mode_stdchar::@1: scope:[mode_stdchar] from mode_stdchar mode_stdchar::@1 [150] mode_stdchar::i#2 = phi( mode_stdchar/0, mode_stdchar::@1/mode_stdchar::i#1 ) @@ -8730,9 +8730,9 @@ mode_ecmchar: scope:[mode_ecmchar] from menu::@18 [178] *DTV_CONTROL = 0 [179] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [180] *((byte*)CIA2) = 3^(byte)(word)mode_ecmchar::CHARSET/$4000 - [181] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 - [182] *VIC_CONTROL2 = VIC_CSEL - [183] *VIC_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 + [181] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 + [182] *VICII_CONTROL2 = VICII_CSEL + [183] *VICII_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 to:mode_ecmchar::@1 mode_ecmchar::@1: scope:[mode_ecmchar] from mode_ecmchar mode_ecmchar::@1 [184] mode_ecmchar::i#2 = phi( mode_ecmchar/0, mode_ecmchar::@1/mode_ecmchar::i#1 ) @@ -8789,9 +8789,9 @@ mode_mcchar: scope:[mode_mcchar] from menu::@19 [215] *DTV_CONTROL = 0 [216] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [217] *((byte*)CIA2) = 3^(byte)(word)mode_mcchar::CHARSET/$4000 - [218] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - [219] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM - [220] *VIC_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 + [218] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + [219] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM + [220] *VICII_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 to:mode_mcchar::@1 mode_mcchar::@1: scope:[mode_mcchar] from mode_mcchar mode_mcchar::@1 [221] mode_mcchar::i#2 = phi( mode_mcchar/0, mode_mcchar::@1/mode_mcchar::i#1 ) @@ -8845,9 +8845,9 @@ mode_stdbitmap: scope:[mode_stdbitmap] from menu::@20 [249] *DTV_CONTROL = 0 [250] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [251] *((byte*)CIA2) = 3^(byte)(word)mode_stdbitmap::BITMAP/$4000 - [252] *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [253] *VIC_CONTROL2 = VIC_CSEL - [254] *VIC_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 + [252] *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [253] *VICII_CONTROL2 = VICII_CSEL + [254] *VICII_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 to:mode_stdbitmap::@1 mode_stdbitmap::@1: scope:[mode_stdbitmap] from mode_stdbitmap mode_stdbitmap::@1 [255] mode_stdbitmap::i#2 = phi( mode_stdbitmap/0, mode_stdbitmap::@1/mode_stdbitmap::i#1 ) @@ -8918,9 +8918,9 @@ mode_hicolstdchar: scope:[mode_hicolstdchar] from menu::@21 [292] *DTV_CONTROL = DTV_HIGHCOLOR [293] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [294] *((byte*)CIA2) = 3^(byte)(word)mode_hicolstdchar::CHARSET/$4000 - [295] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - [296] *VIC_CONTROL2 = VIC_CSEL - [297] *VIC_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 + [295] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + [296] *VICII_CONTROL2 = VICII_CSEL + [297] *VICII_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 to:mode_hicolstdchar::@1 mode_hicolstdchar::@1: scope:[mode_hicolstdchar] from mode_hicolstdchar mode_hicolstdchar::@1 [298] mode_hicolstdchar::i#2 = phi( mode_hicolstdchar/0, mode_hicolstdchar::@1/mode_hicolstdchar::i#1 ) @@ -8972,9 +8972,9 @@ mode_hicolecmchar: scope:[mode_hicolecmchar] from menu::@22 [324] *DTV_CONTROL = DTV_HIGHCOLOR [325] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [326] *((byte*)CIA2) = 3^(byte)(word)mode_hicolecmchar::CHARSET/$4000 - [327] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 - [328] *VIC_CONTROL2 = VIC_CSEL - [329] *VIC_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 + [327] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 + [328] *VICII_CONTROL2 = VICII_CSEL + [329] *VICII_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 to:mode_hicolecmchar::@1 mode_hicolecmchar::@1: scope:[mode_hicolecmchar] from mode_hicolecmchar mode_hicolecmchar::@1 [330] mode_hicolecmchar::i#2 = phi( mode_hicolecmchar/0, mode_hicolecmchar::@1/mode_hicolecmchar::i#1 ) @@ -9029,9 +9029,9 @@ mode_hicolmcchar: scope:[mode_hicolmcchar] from menu::@23 [359] *DTV_CONTROL = DTV_HIGHCOLOR [360] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [361] *((byte*)CIA2) = 3^(byte)(word)mode_hicolmcchar::CHARSET/$4000 - [362] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - [363] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM - [364] *VIC_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 + [362] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + [363] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM + [364] *VICII_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 to:mode_hicolmcchar::@1 mode_hicolmcchar::@1: scope:[mode_hicolmcchar] from mode_hicolmcchar mode_hicolmcchar::@1 [365] mode_hicolmcchar::i#2 = phi( mode_hicolmcchar/0, mode_hicolmcchar::@1/mode_hicolmcchar::i#1 ) @@ -9080,8 +9080,8 @@ mode_hicolmcchar::@return: scope:[mode_hicolmcchar] from mode_hicolmcchar::@6 void mode_sixsfred2() mode_sixsfred2: scope:[mode_sixsfred2] from menu::@24 [390] *DTV_CONTROL = DTV_LINEAR - [391] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - [392] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [391] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + [392] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [393] *DTV_PLANEA_START_LO = 0 [394] *DTV_PLANEA_START_MI = >mode_sixsfred2::PLANEA [395] *DTV_PLANEA_START_HI = 0 @@ -9171,8 +9171,8 @@ mode_sixsfred2::@return: scope:[mode_sixsfred2] from mode_sixsfred2::@12 void mode_twoplanebitmap() mode_twoplanebitmap: scope:[mode_twoplanebitmap] from menu::@25 [445] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR - [446] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - [447] *VIC_CONTROL2 = VIC_CSEL + [446] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + [447] *VICII_CONTROL2 = VICII_CSEL [448] *DTV_PLANEA_START_LO = 0 [449] *DTV_PLANEA_START_MI = >mode_twoplanebitmap::PLANEA [450] *DTV_PLANEA_START_HI = 0 @@ -9273,8 +9273,8 @@ mode_twoplanebitmap::@8: scope:[mode_twoplanebitmap] from mode_twoplanebitmap:: void mode_sixsfred() mode_sixsfred: scope:[mode_sixsfred] from menu::@26 [505] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR - [506] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - [507] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [506] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + [507] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [508] *DTV_PLANEA_START_LO = 0 [509] *DTV_PLANEA_START_MI = >mode_sixsfred::PLANEA [510] *DTV_PLANEA_START_HI = 0 @@ -9362,8 +9362,8 @@ mode_sixsfred::@return: scope:[mode_sixsfred] from mode_sixsfred::@12 void mode_8bpppixelcell() mode_8bpppixelcell: scope:[mode_8bpppixelcell] from menu::@27 [558] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY - [559] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 - [560] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [559] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 + [560] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [561] *DTV_PLANEA_START_LO = 0 [562] *DTV_PLANEA_START_MI = >mode_8bpppixelcell::PLANEA [563] *DTV_PLANEA_START_HI = 0 @@ -9460,8 +9460,8 @@ mode_8bpppixelcell::@return: scope:[mode_8bpppixelcell] from mode_8bpppixelcell void mode_8bppchunkybmm() mode_8bppchunkybmm: scope:[mode_8bppchunkybmm] from menu::@28 [613] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF - [614] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 - [615] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL + [614] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 + [615] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [616] *DTV_PLANEB_START_LO = 0 [617] *DTV_PLANEB_START_MI = 0 [618] *DTV_PLANEB_START_HI = <>mode_8bppchunkybmm::PLANEB @@ -11516,9 +11516,9 @@ Statement [8] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5 [ ] { } ) always clobbers reg Statement [9] *DTV_CONTROL = 0 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a Statement [10] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a Statement [11] *((byte*)CIA2) = 3^(byte)(word)menu::CHARSET/$4000 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a -Statement [12] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a -Statement [13] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5 [ ] { } ) always clobbers reg byte a -Statement [14] *VIC_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a +Statement [12] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a +Statement [13] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5 [ ] { } ) always clobbers reg byte a +Statement [14] *VICII_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a Statement [16] DTV_PALETTE[menu::i#2] = DTV_PALETTE_DEFAULT[menu::i#2] [ menu::i#2 ] ( menu:5 [ menu::i#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:2 [ menu::i#2 menu::i#1 ] Statement [20] if(menu::c#2!=COLS+$3e8) goto menu::@3 [ menu::c#2 ] ( menu:5 [ menu::c#2 ] { } ) always clobbers reg byte a @@ -11538,9 +11538,9 @@ Statement [143] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) Statement [144] *DTV_CONTROL = 0 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a Statement [145] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a Statement [146] *((byte*)CIA2) = 3^(byte)(word)mode_stdchar::CHARSET/$4000 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a -Statement [147] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a -Statement [148] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a -Statement [149] *VIC_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a +Statement [147] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a +Statement [148] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a +Statement [149] *VICII_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a Statement [151] DTV_PALETTE[mode_stdchar::i#2] = DTV_PALETTE_DEFAULT[mode_stdchar::i#2] [ mode_stdchar::i#2 ] ( menu:5::mode_stdchar:33 [ mode_stdchar::i#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:10 [ mode_stdchar::i#2 mode_stdchar::i#1 ] Statement [154] *BG_COLOR = 0 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a @@ -11562,9 +11562,9 @@ Statement [177] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) Statement [178] *DTV_CONTROL = 0 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a Statement [179] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a Statement [180] *((byte*)CIA2) = 3^(byte)(word)mode_ecmchar::CHARSET/$4000 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a -Statement [181] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a -Statement [182] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a -Statement [183] *VIC_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a +Statement [181] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a +Statement [182] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a +Statement [183] *VICII_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a Statement [185] DTV_PALETTE[mode_ecmchar::i#2] = DTV_PALETTE_DEFAULT[mode_ecmchar::i#2] [ mode_ecmchar::i#2 ] ( menu:5::mode_ecmchar:41 [ mode_ecmchar::i#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:17 [ mode_ecmchar::i#2 mode_ecmchar::i#1 ] Statement [188] *BORDER_COLOR = 0 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a @@ -11589,9 +11589,9 @@ Statement [214] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) a Statement [215] *DTV_CONTROL = 0 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a Statement [216] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a Statement [217] *((byte*)CIA2) = 3^(byte)(word)mode_mcchar::CHARSET/$4000 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a -Statement [218] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a -Statement [219] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a -Statement [220] *VIC_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a +Statement [218] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a +Statement [219] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a +Statement [220] *VICII_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a Statement [222] DTV_PALETTE[mode_mcchar::i#2] = DTV_PALETTE_DEFAULT[mode_mcchar::i#2] [ mode_mcchar::i#2 ] ( menu:5::mode_mcchar:48 [ mode_mcchar::i#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:24 [ mode_mcchar::i#2 mode_mcchar::i#1 ] Statement [225] *BORDER_COLOR = 0 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a @@ -11613,9 +11613,9 @@ Statement [248] *DTV_GRAPHICS_VIC_BANK = 0 [ ] ( menu:5::mode_stdbitmap:55 [ ] { Statement [249] *DTV_CONTROL = 0 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a Statement [250] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a Statement [251] *((byte*)CIA2) = 3^(byte)(word)mode_stdbitmap::BITMAP/$4000 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a -Statement [252] *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a -Statement [253] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a -Statement [254] *VIC_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a +Statement [252] *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a +Statement [253] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a +Statement [254] *VICII_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a Statement [256] DTV_PALETTE[mode_stdbitmap::i#2] = DTV_PALETTE_DEFAULT[mode_stdbitmap::i#2] [ mode_stdbitmap::i#2 ] ( menu:5::mode_stdbitmap:55 [ mode_stdbitmap::i#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:31 [ mode_stdbitmap::i#2 mode_stdbitmap::i#1 ] Statement [259] *BG_COLOR = BLACK [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a @@ -11636,9 +11636,9 @@ Statement [291] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { Statement [292] *DTV_CONTROL = DTV_HIGHCOLOR [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [293] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [294] *((byte*)CIA2) = 3^(byte)(word)mode_hicolstdchar::CHARSET/$4000 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a -Statement [295] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a -Statement [296] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a -Statement [297] *VIC_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a +Statement [295] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a +Statement [296] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a +Statement [297] *VICII_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [302] *BG_COLOR = 0 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [303] *BORDER_COLOR = 0 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [307] mode_hicolstdchar::$3 = mode_hicolstdchar::$2 << 4 [ mode_hicolstdchar::cy#4 mode_hicolstdchar::cx#2 mode_hicolstdchar::col#2 mode_hicolstdchar::ch#2 mode_hicolstdchar::$3 ] ( menu:5::mode_hicolstdchar:62 [ mode_hicolstdchar::cy#4 mode_hicolstdchar::cx#2 mode_hicolstdchar::col#2 mode_hicolstdchar::ch#2 mode_hicolstdchar::$3 ] { } ) always clobbers reg byte a @@ -11657,9 +11657,9 @@ Statement [323] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { Statement [324] *DTV_CONTROL = DTV_HIGHCOLOR [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [325] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [326] *((byte*)CIA2) = 3^(byte)(word)mode_hicolecmchar::CHARSET/$4000 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a -Statement [327] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a -Statement [328] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a -Statement [329] *VIC_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a +Statement [327] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a +Statement [328] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a +Statement [329] *VICII_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [334] *BORDER_COLOR = 0 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [335] *BG_COLOR = $50 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [336] *BG_COLOR1 = $54 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a @@ -11681,9 +11681,9 @@ Statement [358] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } Statement [359] *DTV_CONTROL = DTV_HIGHCOLOR [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [360] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [361] *((byte*)CIA2) = 3^(byte)(word)mode_hicolmcchar::CHARSET/$4000 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a -Statement [362] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a -Statement [363] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a -Statement [364] *VIC_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a +Statement [362] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a +Statement [363] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a +Statement [364] *VICII_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [369] *BORDER_COLOR = 0 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [370] *BG_COLOR = $50 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [371] *BG_COLOR1 = $54 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a @@ -11699,8 +11699,8 @@ Removing always clobbered register reg byte y as potential for zp[1]:53 [ mode_h Removing always clobbered register reg byte y as potential for zp[1]:231 [ mode_hicolmcchar::v#0 ] Statement [381] *mode_hicolmcchar::ch#2 = mode_hicolmcchar::v#0 [ mode_hicolmcchar::cy#4 mode_hicolmcchar::col#1 mode_hicolmcchar::cx#2 mode_hicolmcchar::ch#2 ] ( menu:5::mode_hicolmcchar:76 [ mode_hicolmcchar::cy#4 mode_hicolmcchar::col#1 mode_hicolmcchar::cx#2 mode_hicolmcchar::ch#2 ] { } ) always clobbers reg byte y Statement [390] *DTV_CONTROL = DTV_LINEAR [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a -Statement [391] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a -Statement [392] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a +Statement [391] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a +Statement [392] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a Statement [393] *DTV_PLANEA_START_LO = 0 [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a Statement [394] *DTV_PLANEA_START_MI = >mode_sixsfred2::PLANEA [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a Statement [395] *DTV_PLANEA_START_HI = 0 [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a @@ -11736,8 +11736,8 @@ Removing always clobbered register reg byte y as potential for zp[1]:67 [ mode_s Removing always clobbered register reg byte a as potential for zp[1]:70 [ mode_sixsfred2::bx#2 mode_sixsfred2::bx#1 ] Removing always clobbered register reg byte y as potential for zp[1]:70 [ mode_sixsfred2::bx#2 mode_sixsfred2::bx#1 ] Statement [445] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a -Statement [446] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a -Statement [447] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a +Statement [446] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a +Statement [447] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a Statement [448] *DTV_PLANEA_START_LO = 0 [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a Statement [449] *DTV_PLANEA_START_MI = >mode_twoplanebitmap::PLANEA [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a Statement [450] *DTV_PLANEA_START_HI = 0 [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a @@ -11775,8 +11775,8 @@ Removing always clobbered register reg byte a as potential for zp[1]:83 [ mode_t Removing always clobbered register reg byte y as potential for zp[1]:83 [ mode_twoplanebitmap::bx#2 mode_twoplanebitmap::bx#1 ] Statement [503] *mode_twoplanebitmap::gfxa#3 = 0 [ mode_twoplanebitmap::ay#5 mode_twoplanebitmap::gfxa#3 mode_twoplanebitmap::ax#2 ] ( menu:5::mode_twoplanebitmap:90 [ mode_twoplanebitmap::ay#5 mode_twoplanebitmap::gfxa#3 mode_twoplanebitmap::ax#2 ] { } ) always clobbers reg byte a reg byte y Statement [505] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a -Statement [506] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a -Statement [507] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a +Statement [506] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a +Statement [507] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a Statement [508] *DTV_PLANEA_START_LO = 0 [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a Statement [509] *DTV_PLANEA_START_MI = >mode_sixsfred::PLANEA [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a Statement [510] *DTV_PLANEA_START_HI = 0 [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a @@ -11810,8 +11810,8 @@ Removing always clobbered register reg byte y as potential for zp[1]:93 [ mode_s Removing always clobbered register reg byte a as potential for zp[1]:96 [ mode_sixsfred::bx#2 mode_sixsfred::bx#1 ] Removing always clobbered register reg byte y as potential for zp[1]:96 [ mode_sixsfred::bx#2 mode_sixsfred::bx#1 ] Statement [558] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a -Statement [559] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a -Statement [560] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a +Statement [559] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a +Statement [560] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a Statement [561] *DTV_PLANEA_START_LO = 0 [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a Statement [562] *DTV_PLANEA_START_MI = >mode_8bpppixelcell::PLANEA [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a Statement [563] *DTV_PLANEA_START_HI = 0 [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a @@ -11846,8 +11846,8 @@ Removing always clobbered register reg byte y as potential for zp[1]:106 [ mode_ Removing always clobbered register reg byte y as potential for zp[1]:110 [ mode_8bpppixelcell::cp#2 mode_8bpppixelcell::cp#1 ] Statement [610] *PROCPORT = PROCPORT_RAM_IO [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a Statement [613] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a -Statement [614] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a -Statement [615] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a +Statement [614] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a +Statement [615] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a Statement [616] *DTV_PLANEB_START_LO = 0 [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a Statement [617] *DTV_PLANEB_START_MI = 0 [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a Statement [618] *DTV_PLANEB_START_HI = <>mode_8bppchunkybmm::PLANEB [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a @@ -11983,9 +11983,9 @@ Statement [8] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5 [ ] { } ) always clobbers reg Statement [9] *DTV_CONTROL = 0 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a Statement [10] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a Statement [11] *((byte*)CIA2) = 3^(byte)(word)menu::CHARSET/$4000 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a -Statement [12] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a -Statement [13] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5 [ ] { } ) always clobbers reg byte a -Statement [14] *VIC_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a +Statement [12] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a +Statement [13] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5 [ ] { } ) always clobbers reg byte a +Statement [14] *VICII_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a Statement [16] DTV_PALETTE[menu::i#2] = DTV_PALETTE_DEFAULT[menu::i#2] [ menu::i#2 ] ( menu:5 [ menu::i#2 ] { } ) always clobbers reg byte a Statement [20] if(menu::c#2!=COLS+$3e8) goto menu::@3 [ menu::c#2 ] ( menu:5 [ menu::c#2 ] { } ) always clobbers reg byte a Statement [21] *BG_COLOR = 0 [ ] ( menu:5 [ ] { } ) always clobbers reg byte a @@ -12001,9 +12001,9 @@ Statement [143] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) Statement [144] *DTV_CONTROL = 0 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a Statement [145] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a Statement [146] *((byte*)CIA2) = 3^(byte)(word)mode_stdchar::CHARSET/$4000 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a -Statement [147] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a -Statement [148] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a -Statement [149] *VIC_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a +Statement [147] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a +Statement [148] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a +Statement [149] *VICII_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a Statement [151] DTV_PALETTE[mode_stdchar::i#2] = DTV_PALETTE_DEFAULT[mode_stdchar::i#2] [ mode_stdchar::i#2 ] ( menu:5::mode_stdchar:33 [ mode_stdchar::i#2 ] { } ) always clobbers reg byte a Statement [154] *BG_COLOR = 0 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a Statement [155] *BORDER_COLOR = 0 [ ] ( menu:5::mode_stdchar:33 [ ] { } ) always clobbers reg byte a @@ -12019,9 +12019,9 @@ Statement [177] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) Statement [178] *DTV_CONTROL = 0 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a Statement [179] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a Statement [180] *((byte*)CIA2) = 3^(byte)(word)mode_ecmchar::CHARSET/$4000 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a -Statement [181] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a -Statement [182] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a -Statement [183] *VIC_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a +Statement [181] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a +Statement [182] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a +Statement [183] *VICII_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a Statement [185] DTV_PALETTE[mode_ecmchar::i#2] = DTV_PALETTE_DEFAULT[mode_ecmchar::i#2] [ mode_ecmchar::i#2 ] ( menu:5::mode_ecmchar:41 [ mode_ecmchar::i#2 ] { } ) always clobbers reg byte a Statement [188] *BORDER_COLOR = 0 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a Statement [189] *BG_COLOR = 0 [ ] ( menu:5::mode_ecmchar:41 [ ] { } ) always clobbers reg byte a @@ -12040,9 +12040,9 @@ Statement [214] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) a Statement [215] *DTV_CONTROL = 0 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a Statement [216] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a Statement [217] *((byte*)CIA2) = 3^(byte)(word)mode_mcchar::CHARSET/$4000 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a -Statement [218] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a -Statement [219] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a -Statement [220] *VIC_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a +Statement [218] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a +Statement [219] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a +Statement [220] *VICII_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a Statement [222] DTV_PALETTE[mode_mcchar::i#2] = DTV_PALETTE_DEFAULT[mode_mcchar::i#2] [ mode_mcchar::i#2 ] ( menu:5::mode_mcchar:48 [ mode_mcchar::i#2 ] { } ) always clobbers reg byte a Statement [225] *BORDER_COLOR = 0 [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a Statement [226] *BG_COLOR = BLACK [ ] ( menu:5::mode_mcchar:48 [ ] { } ) always clobbers reg byte a @@ -12058,9 +12058,9 @@ Statement [248] *DTV_GRAPHICS_VIC_BANK = 0 [ ] ( menu:5::mode_stdbitmap:55 [ ] { Statement [249] *DTV_CONTROL = 0 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a Statement [250] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a Statement [251] *((byte*)CIA2) = 3^(byte)(word)mode_stdbitmap::BITMAP/$4000 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a -Statement [252] *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a -Statement [253] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a -Statement [254] *VIC_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a +Statement [252] *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a +Statement [253] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a +Statement [254] *VICII_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a Statement [256] DTV_PALETTE[mode_stdbitmap::i#2] = DTV_PALETTE_DEFAULT[mode_stdbitmap::i#2] [ mode_stdbitmap::i#2 ] ( menu:5::mode_stdbitmap:55 [ mode_stdbitmap::i#2 ] { } ) always clobbers reg byte a Statement [259] *BG_COLOR = BLACK [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a Statement [260] *BORDER_COLOR = BLACK [ ] ( menu:5::mode_stdbitmap:55 [ ] { } ) always clobbers reg byte a @@ -12074,9 +12074,9 @@ Statement [291] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { Statement [292] *DTV_CONTROL = DTV_HIGHCOLOR [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [293] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [294] *((byte*)CIA2) = 3^(byte)(word)mode_hicolstdchar::CHARSET/$4000 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a -Statement [295] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a -Statement [296] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a -Statement [297] *VIC_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a +Statement [295] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a +Statement [296] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a +Statement [297] *VICII_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [302] *BG_COLOR = 0 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [303] *BORDER_COLOR = 0 [ ] ( menu:5::mode_hicolstdchar:62 [ ] { } ) always clobbers reg byte a Statement [306] mode_hicolstdchar::$2 = mode_hicolstdchar::cy#4 & $f [ mode_hicolstdchar::cy#4 mode_hicolstdchar::cx#2 mode_hicolstdchar::col#2 mode_hicolstdchar::ch#2 mode_hicolstdchar::$2 ] ( menu:5::mode_hicolstdchar:62 [ mode_hicolstdchar::cy#4 mode_hicolstdchar::cx#2 mode_hicolstdchar::col#2 mode_hicolstdchar::ch#2 mode_hicolstdchar::$2 ] { } ) always clobbers reg byte a @@ -12090,9 +12090,9 @@ Statement [323] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { Statement [324] *DTV_CONTROL = DTV_HIGHCOLOR [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [325] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [326] *((byte*)CIA2) = 3^(byte)(word)mode_hicolecmchar::CHARSET/$4000 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a -Statement [327] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a -Statement [328] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a -Statement [329] *VIC_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a +Statement [327] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a +Statement [328] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a +Statement [329] *VICII_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [334] *BORDER_COLOR = 0 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [335] *BG_COLOR = $50 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a Statement [336] *BG_COLOR1 = $54 [ ] ( menu:5::mode_hicolecmchar:69 [ ] { } ) always clobbers reg byte a @@ -12109,9 +12109,9 @@ Statement [358] *DTV_COLOR_BANK_HI = 0 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } Statement [359] *DTV_CONTROL = DTV_HIGHCOLOR [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [360] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [361] *((byte*)CIA2) = 3^(byte)(word)mode_hicolmcchar::CHARSET/$4000 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a -Statement [362] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a -Statement [363] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a -Statement [364] *VIC_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a +Statement [362] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a +Statement [363] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a +Statement [364] *VICII_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [369] *BORDER_COLOR = 0 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [370] *BG_COLOR = $50 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a Statement [371] *BG_COLOR1 = $54 [ ] ( menu:5::mode_hicolmcchar:76 [ ] { } ) always clobbers reg byte a @@ -12122,8 +12122,8 @@ Statement [377] mode_hicolmcchar::$4 = mode_hicolmcchar::cx#2 & $f [ mode_hicolm Statement [379] *mode_hicolmcchar::col#2 = mode_hicolmcchar::v#0 [ mode_hicolmcchar::cy#4 mode_hicolmcchar::cx#2 mode_hicolmcchar::col#2 mode_hicolmcchar::ch#2 mode_hicolmcchar::v#0 ] ( menu:5::mode_hicolmcchar:76 [ mode_hicolmcchar::cy#4 mode_hicolmcchar::cx#2 mode_hicolmcchar::col#2 mode_hicolmcchar::ch#2 mode_hicolmcchar::v#0 ] { } ) always clobbers reg byte y Statement [381] *mode_hicolmcchar::ch#2 = mode_hicolmcchar::v#0 [ mode_hicolmcchar::cy#4 mode_hicolmcchar::col#1 mode_hicolmcchar::cx#2 mode_hicolmcchar::ch#2 ] ( menu:5::mode_hicolmcchar:76 [ mode_hicolmcchar::cy#4 mode_hicolmcchar::col#1 mode_hicolmcchar::cx#2 mode_hicolmcchar::ch#2 ] { } ) always clobbers reg byte y Statement [390] *DTV_CONTROL = DTV_LINEAR [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a -Statement [391] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a -Statement [392] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a +Statement [391] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a +Statement [392] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a Statement [393] *DTV_PLANEA_START_LO = 0 [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a Statement [394] *DTV_PLANEA_START_MI = >mode_sixsfred2::PLANEA [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a Statement [395] *DTV_PLANEA_START_HI = 0 [ ] ( menu:5::mode_sixsfred2:83 [ ] { } ) always clobbers reg byte a @@ -12147,8 +12147,8 @@ Statement [426] mode_sixsfred2::$8 = mode_sixsfred2::ay#4 >> 1 [ mode_sixsfred2: Statement [428] *mode_sixsfred2::gfxa#2 = mode_sixsfred2::row_bitmask[mode_sixsfred2::row#0] [ mode_sixsfred2::ay#4 mode_sixsfred2::gfxa#2 mode_sixsfred2::ax#2 ] ( menu:5::mode_sixsfred2:83 [ mode_sixsfred2::ay#4 mode_sixsfred2::gfxa#2 mode_sixsfred2::ax#2 ] { } ) always clobbers reg byte a reg byte y Statement [436] *mode_sixsfred2::gfxb#2 = $1b [ mode_sixsfred2::by#4 mode_sixsfred2::gfxb#2 mode_sixsfred2::bx#2 ] ( menu:5::mode_sixsfred2:83 [ mode_sixsfred2::by#4 mode_sixsfred2::gfxb#2 mode_sixsfred2::bx#2 ] { } ) always clobbers reg byte a reg byte y Statement [445] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a -Statement [446] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a -Statement [447] *VIC_CONTROL2 = VIC_CSEL [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a +Statement [446] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a +Statement [447] *VICII_CONTROL2 = VICII_CSEL [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a Statement [448] *DTV_PLANEA_START_LO = 0 [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a Statement [449] *DTV_PLANEA_START_MI = >mode_twoplanebitmap::PLANEA [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a Statement [450] *DTV_PLANEA_START_HI = 0 [ ] ( menu:5::mode_twoplanebitmap:90 [ ] { } ) always clobbers reg byte a @@ -12175,8 +12175,8 @@ Statement [485] *mode_twoplanebitmap::gfxa#3 = $ff [ mode_twoplanebitmap::ay#5 m Statement [494] *mode_twoplanebitmap::gfxb#2 = $f [ mode_twoplanebitmap::by#4 mode_twoplanebitmap::gfxb#2 mode_twoplanebitmap::bx#2 ] ( menu:5::mode_twoplanebitmap:90 [ mode_twoplanebitmap::by#4 mode_twoplanebitmap::gfxb#2 mode_twoplanebitmap::bx#2 ] { } ) always clobbers reg byte a reg byte y Statement [503] *mode_twoplanebitmap::gfxa#3 = 0 [ mode_twoplanebitmap::ay#5 mode_twoplanebitmap::gfxa#3 mode_twoplanebitmap::ax#2 ] ( menu:5::mode_twoplanebitmap:90 [ mode_twoplanebitmap::ay#5 mode_twoplanebitmap::gfxa#3 mode_twoplanebitmap::ax#2 ] { } ) always clobbers reg byte a reg byte y Statement [505] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a -Statement [506] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a -Statement [507] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a +Statement [506] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a +Statement [507] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a Statement [508] *DTV_PLANEA_START_LO = 0 [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a Statement [509] *DTV_PLANEA_START_MI = >mode_sixsfred::PLANEA [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a Statement [510] *DTV_PLANEA_START_HI = 0 [ ] ( menu:5::mode_sixsfred:97 [ ] { } ) always clobbers reg byte a @@ -12198,8 +12198,8 @@ Statement [539] mode_sixsfred::$6 = mode_sixsfred::ay#4 >> 1 [ mode_sixsfred::ay Statement [541] *mode_sixsfred::gfxa#2 = mode_sixsfred::row_bitmask[mode_sixsfred::row#0] [ mode_sixsfred::ay#4 mode_sixsfred::gfxa#2 mode_sixsfred::ax#2 ] ( menu:5::mode_sixsfred:97 [ mode_sixsfred::ay#4 mode_sixsfred::gfxa#2 mode_sixsfred::ax#2 ] { } ) always clobbers reg byte a reg byte y Statement [549] *mode_sixsfred::gfxb#2 = $1b [ mode_sixsfred::by#4 mode_sixsfred::gfxb#2 mode_sixsfred::bx#2 ] ( menu:5::mode_sixsfred:97 [ mode_sixsfred::by#4 mode_sixsfred::gfxb#2 mode_sixsfred::bx#2 ] { } ) always clobbers reg byte a reg byte y Statement [558] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a -Statement [559] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a -Statement [560] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a +Statement [559] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a +Statement [560] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a Statement [561] *DTV_PLANEA_START_LO = 0 [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a Statement [562] *DTV_PLANEA_START_MI = >mode_8bpppixelcell::PLANEA [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a Statement [563] *DTV_PLANEA_START_HI = 0 [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a @@ -12222,8 +12222,8 @@ Statement [593] mode_8bpppixelcell::bits#0 = *mode_8bpppixelcell::chargen#2 [ mo Statement [600] *mode_8bpppixelcell::gfxb#2 = mode_8bpppixelcell::c#2 [ mode_8bpppixelcell::ch#8 mode_8bpppixelcell::chargen#1 mode_8bpppixelcell::cr#6 mode_8bpppixelcell::bits#2 mode_8bpppixelcell::gfxb#2 mode_8bpppixelcell::col#2 mode_8bpppixelcell::cp#2 ] ( menu:5::mode_8bpppixelcell:104 [ mode_8bpppixelcell::ch#8 mode_8bpppixelcell::chargen#1 mode_8bpppixelcell::cr#6 mode_8bpppixelcell::bits#2 mode_8bpppixelcell::gfxb#2 mode_8bpppixelcell::col#2 mode_8bpppixelcell::cp#2 ] { } ) always clobbers reg byte y Statement [610] *PROCPORT = PROCPORT_RAM_IO [ ] ( menu:5::mode_8bpppixelcell:104 [ ] { } ) always clobbers reg byte a Statement [613] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a -Statement [614] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a -Statement [615] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a +Statement [614] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a +Statement [615] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a Statement [616] *DTV_PLANEB_START_LO = 0 [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a Statement [617] *DTV_PLANEB_START_MI = 0 [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a Statement [618] *DTV_PLANEB_START_HI = <>mode_8bppchunkybmm::PLANEB [ ] ( menu:5::mode_8bppchunkybmm:111 [ ] { } ) always clobbers reg byte a @@ -13095,12 +13095,12 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_ECM = $40 - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -13146,9 +13146,9 @@ ASSEMBLER BEFORE OPTIMIZATION .label BG_COLOR1 = $d022 .label BG_COLOR2 = $d023 .label BG_COLOR3 = $d024 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -13244,18 +13244,18 @@ menu: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // [12] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [12] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [13] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // [14] *VIC_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [13] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // [14] *VICII_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [15] phi from menu to menu::@1 [phi:menu->menu::@1] __b1_from_menu: // [15] phi menu::i#2 = 0 [phi:menu->menu::@1#0] -- vbuxx=vbuc1 @@ -13850,18 +13850,18 @@ mode_stdchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // [147] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [147] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [148] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // [149] *VIC_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [148] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // [149] *VICII_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [150] phi from mode_stdchar to mode_stdchar::@1 [phi:mode_stdchar->mode_stdchar::@1] __b1_from_mode_stdchar: // [150] phi mode_stdchar::i#2 = 0 [phi:mode_stdchar->mode_stdchar::@1#0] -- vbuxx=vbuc1 @@ -14043,18 +14043,18 @@ mode_ecmchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // [181] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 -- _deref_pbuc1=vbuc2 + // [181] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|VIC_ECM|3 - sta VIC_CONTROL - // [182] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // [183] *VIC_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|VICII_ECM|3 + sta VICII_CONTROL + // [182] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // [183] *VICII_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [184] phi from mode_ecmchar to mode_ecmchar::@1 [phi:mode_ecmchar->mode_ecmchar::@1] __b1_from_mode_ecmchar: // [184] phi mode_ecmchar::i#2 = 0 [phi:mode_ecmchar->mode_ecmchar::@1#0] -- vbuxx=vbuc1 @@ -14246,18 +14246,18 @@ mode_mcchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // [218] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [218] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [219] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL|VIC_MCM - sta VIC_CONTROL2 - // [220] *VIC_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [219] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL|VICII_MCM + sta VICII_CONTROL2 + // [220] *VICII_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [221] phi from mode_mcchar to mode_mcchar::@1 [phi:mode_mcchar->mode_mcchar::@1] __b1_from_mode_mcchar: // [221] phi mode_mcchar::i#2 = 0 [phi:mode_mcchar->mode_mcchar::@1#0] -- vbuxx=vbuc1 @@ -14433,18 +14433,18 @@ mode_stdbitmap: { // Set VIC Bank bits to output - all others to input lda #3^BITMAP/$4000 sta CIA2 - // [252] *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [252] *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [253] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // [254] *VIC_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [253] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // [254] *VICII_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [255] phi from mode_stdbitmap to mode_stdbitmap::@1 [phi:mode_stdbitmap->mode_stdbitmap::@1] __b1_from_mode_stdbitmap: // [255] phi mode_stdbitmap::i#2 = 0 [phi:mode_stdbitmap->mode_stdbitmap::@1#0] -- vbuxx=vbuc1 @@ -14668,18 +14668,18 @@ mode_hicolstdchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // [295] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [295] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [296] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // [297] *VIC_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [296] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // [297] *VICII_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [298] phi from mode_hicolstdchar to mode_hicolstdchar::@1 [phi:mode_hicolstdchar->mode_hicolstdchar::@1] __b1_from_mode_hicolstdchar: // [298] phi mode_hicolstdchar::i#2 = 0 [phi:mode_hicolstdchar->mode_hicolstdchar::@1#0] -- vbuxx=vbuc1 @@ -14855,18 +14855,18 @@ mode_hicolecmchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // [327] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 -- _deref_pbuc1=vbuc2 + // [327] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|VIC_ECM|3 - sta VIC_CONTROL - // [328] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // [329] *VIC_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|VICII_ECM|3 + sta VICII_CONTROL + // [328] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // [329] *VICII_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [330] phi from mode_hicolecmchar to mode_hicolecmchar::@1 [phi:mode_hicolecmchar->mode_hicolecmchar::@1] __b1_from_mode_hicolecmchar: // [330] phi mode_hicolecmchar::i#2 = 0 [phi:mode_hicolecmchar->mode_hicolecmchar::@1#0] -- vbuxx=vbuc1 @@ -15052,18 +15052,18 @@ mode_hicolmcchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // [362] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [362] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [363] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL|VIC_MCM - sta VIC_CONTROL2 - // [364] *VIC_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [363] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL|VICII_MCM + sta VICII_CONTROL2 + // [364] *VICII_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [365] phi from mode_hicolmcchar to mode_hicolmcchar::@1 [phi:mode_hicolmcchar->mode_hicolmcchar::@1] __b1_from_mode_hicolmcchar: // [365] phi mode_hicolmcchar::i#2 = 0 [phi:mode_hicolmcchar->mode_hicolmcchar::@1#0] -- vbuxx=vbuc1 @@ -15225,13 +15225,13 @@ mode_sixsfred2: { // [390] *DTV_CONTROL = DTV_LINEAR -- _deref_pbuc1=vbuc2 lda #DTV_LINEAR sta DTV_CONTROL - // [391] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [391] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // VIC Graphics Mode - lda #VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [392] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + lda #VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [392] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // [393] *DTV_PLANEA_START_LO = 0 -- _deref_pbuc1=vbuc2 // Linear Graphics Plane A Counter lda #0 @@ -15534,13 +15534,13 @@ mode_twoplanebitmap: { // [445] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR -- _deref_pbuc1=vbuc2 lda #DTV_HIGHCOLOR|DTV_LINEAR sta DTV_CONTROL - // [446] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [446] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // VIC Graphics Mode - lda #VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [447] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 + lda #VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [447] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 // [448] *DTV_PLANEA_START_LO = 0 -- _deref_pbuc1=vbuc2 // Linear Graphics Plane A Counter lda #0 @@ -15864,13 +15864,13 @@ mode_sixsfred: { // [505] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR -- _deref_pbuc1=vbuc2 lda #DTV_HIGHCOLOR|DTV_LINEAR sta DTV_CONTROL - // [506] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [506] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // VIC Graphics Mode - lda #VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [507] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + lda #VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [507] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // [508] *DTV_PLANEA_START_LO = 0 -- _deref_pbuc1=vbuc2 // Linear Graphics Plane A Counter lda #0 @@ -16166,13 +16166,13 @@ mode_8bpppixelcell: { // [558] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY -- _deref_pbuc1=vbuc2 lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY sta DTV_CONTROL - // [559] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [559] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // VIC Graphics Mode - lda #VIC_ECM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [560] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + lda #VICII_ECM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [560] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // [561] *DTV_PLANEA_START_LO = 0 -- _deref_pbuc1=vbuc2 // Linear Graphics Plane A Counter lda #0 @@ -16474,13 +16474,13 @@ mode_8bppchunkybmm: { // [613] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF -- _deref_pbuc1=vbuc2 lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF sta DTV_CONTROL - // [614] *VIC_CONTROL = VIC_ECM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [614] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // VIC Graphics Mode - lda #VIC_ECM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // [615] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + lda #VICII_ECM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // [615] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // [616] *DTV_PLANEB_START_LO = 0 -- _deref_pbuc1=vbuc2 // Linear Graphics Plane B Counter lda #0 @@ -18851,15 +18851,15 @@ const byte RADIX::DECIMAL = $a const byte RADIX::HEXADECIMAL = $10 const byte RADIX::OCTAL = 8 const nomodify byte* RASTER = (byte*) 53266 -const nomodify byte VIC_BMM = $20 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte* VIC_CONTROL2 = (byte*) 53270 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_MCM = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL2 = (byte*) 53270 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_MCM = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 void bitmap_clear() byte* bitmap_clear::bitmap word bitmap_clear::bitmap#0 bitmap zp[2]:17 10001.0 @@ -19783,12 +19783,12 @@ Score: 2307914 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_ECM = $40 - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_ECM = $40 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -19834,9 +19834,9 @@ Score: 2307914 .label BG_COLOR1 = $d022 .label BG_COLOR2 = $d023 .label BG_COLOR3 = $d024 - .label VIC_CONTROL = $d011 - .label VIC_CONTROL2 = $d016 - .label VIC_MEMORY = $d018 + .label VICII_CONTROL = $d011 + .label VICII_CONTROL2 = $d016 + .label VICII_MEMORY = $d018 // Processor port data direction register .label PROCPORT_DDR = 0 // Processor Port Register controlling RAM/ROM configuration and the datasette @@ -19939,21 +19939,21 @@ menu: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - // [12] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + // [12] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - // [13] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) - // [14] *VIC_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + // [13] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + // [14] *VICII_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [15] phi from menu to menu::@1 [phi:menu->menu::@1] // [15] phi menu::i#2 = 0 [phi:menu->menu::@1#0] -- vbuxx=vbuc1 ldx #0 @@ -20488,21 +20488,21 @@ mode_stdchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - // [147] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + // [147] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - // [148] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) - // [149] *VIC_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + // [148] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + // [149] *VICII_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [150] phi from mode_stdchar to mode_stdchar::@1 [phi:mode_stdchar->mode_stdchar::@1] // [150] phi mode_stdchar::i#2 = 0 [phi:mode_stdchar->mode_stdchar::@1#0] -- vbuxx=vbuc1 ldx #0 @@ -20684,21 +20684,21 @@ mode_ecmchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 - // [181] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 -- _deref_pbuc1=vbuc2 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 + // [181] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|VIC_ECM|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - // [182] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) - // [183] *VIC_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|VICII_ECM|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + // [182] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + // [183] *VICII_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [184] phi from mode_ecmchar to mode_ecmchar::@1 [phi:mode_ecmchar->mode_ecmchar::@1] // [184] phi mode_ecmchar::i#2 = 0 [phi:mode_ecmchar->mode_ecmchar::@1#0] -- vbuxx=vbuc1 ldx #0 @@ -20893,21 +20893,21 @@ mode_mcchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - // [218] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + // [218] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL|VIC_MCM - // [219] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL|VIC_MCM - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) - // [220] *VIC_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL|VICII_MCM + // [219] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL|VICII_MCM + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + // [220] *VICII_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [221] phi from mode_mcchar to mode_mcchar::@1 [phi:mode_mcchar->mode_mcchar::@1] // [221] phi mode_mcchar::i#2 = 0 [phi:mode_mcchar->mode_mcchar::@1#0] -- vbuxx=vbuc1 ldx #0 @@ -21084,21 +21084,21 @@ mode_stdbitmap: { // Set VIC Bank bits to output - all others to input lda #3^BITMAP/$4000 sta CIA2 - // *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [252] *VIC_CONTROL = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [252] *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - // [253] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) - // [254] *VIC_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + // [253] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400)) + // [254] *VICII_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [255] phi from mode_stdbitmap to mode_stdbitmap::@1 [phi:mode_stdbitmap->mode_stdbitmap::@1] // [255] phi mode_stdbitmap::i#2 = 0 [phi:mode_stdbitmap->mode_stdbitmap::@1#0] -- vbuxx=vbuc1 ldx #0 @@ -21310,21 +21310,21 @@ mode_hicolstdchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - // [295] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + // [295] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - // [296] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) - // [297] *VIC_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + // [296] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + // [297] *VICII_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [298] phi from mode_hicolstdchar to mode_hicolstdchar::@1 [phi:mode_hicolstdchar->mode_hicolstdchar::@1] // [298] phi mode_hicolstdchar::i#2 = 0 [phi:mode_hicolstdchar->mode_hicolstdchar::@1#0] -- vbuxx=vbuc1 ldx #0 @@ -21499,21 +21499,21 @@ mode_hicolecmchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 - // [327] *VIC_CONTROL = VIC_DEN|VIC_RSEL|VIC_ECM|3 -- _deref_pbuc1=vbuc2 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 + // [327] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|VIC_ECM|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL - // [328] *VIC_CONTROL2 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) - // [329] *VIC_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|VICII_ECM|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL + // [328] *VICII_CONTROL2 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + // [329] *VICII_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [330] phi from mode_hicolecmchar to mode_hicolecmchar::@1 [phi:mode_hicolecmchar->mode_hicolecmchar::@1] // [330] phi mode_hicolecmchar::i#2 = 0 [phi:mode_hicolecmchar->mode_hicolecmchar::@1#0] -- vbuxx=vbuc1 ldx #0 @@ -21702,21 +21702,21 @@ mode_hicolmcchar: { // Set VIC Bank bits to output - all others to input lda #3^CHARSET/$4000 sta CIA2 - // *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 - // [362] *VIC_CONTROL = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 + // [362] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Set VIC Bank // VIC Graphics Mode - lda #VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_CSEL|VIC_MCM - // [363] *VIC_CONTROL2 = VIC_CSEL|VIC_MCM -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL|VIC_MCM - sta VIC_CONTROL2 - // *VIC_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) - // [364] *VIC_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_CSEL|VICII_MCM + // [363] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL|VICII_MCM + sta VICII_CONTROL2 + // *VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400)) + // [364] *VICII_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400 -- _deref_pbuc1=vbuc2 // VIC Memory Pointers lda #(CHARSET&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [365] phi from mode_hicolmcchar to mode_hicolmcchar::@1 [phi:mode_hicolmcchar->mode_hicolmcchar::@1] // [365] phi mode_hicolmcchar::i#2 = 0 [phi:mode_hicolmcchar->mode_hicolmcchar::@1#0] -- vbuxx=vbuc1 ldx #0 @@ -21875,15 +21875,15 @@ mode_sixsfred2: { // [390] *DTV_CONTROL = DTV_LINEAR -- _deref_pbuc1=vbuc2 lda #DTV_LINEAR sta DTV_CONTROL - // *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [391] *VIC_CONTROL = VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [391] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // VIC Graphics Mode - lda #VIC_ECM|VIC_BMM|VIC_DEN|VIC_RSEL|3 - sta VIC_CONTROL - // *VIC_CONTROL2 = VIC_MCM|VIC_CSEL - // [392] *VIC_CONTROL2 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL - sta VIC_CONTROL2 + lda #VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3 + sta VICII_CONTROL + // *VICII_CONTROL2 = VICII_MCM|VICII_CSEL + // [392] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL + sta VICII_CONTROL2 // *DTV_PLANEA_START_LO = 0 Adding number conversion cast (unumber) 7 in keyboard_key_pressed::$0 = keyboard_key_pressed::key#2 & 7 Adding number conversion cast (unumber) keyboard_key_pressed::$0 in keyboard_key_pressed::$0 = keyboard_key_pressed::key#2 & (unumber)7 Adding number conversion cast (unumber) 3 in keyboard_key_pressed::$1 = keyboard_key_pressed::key#2 >> 3 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|3 in *D011 = VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|3 in *D011 = VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) $40 in PLEX_PTR[init::i#2] = (byte)SPRITE/$40 Adding number conversion cast (unumber) 5 in init::$3 = init::i#2 * 5 Adding number conversion cast (unumber) init::$3 in init::$3 = init::i#2 * (unumber)5 @@ -1241,7 +1241,7 @@ Inlining cast plex_free_next = (unumber)0 Inlining cast plex_sprite_msb = (unumber)1 Inlining cast mulf_init::dir#1 = (unumber)1 Inlining cast memset::dst#0 = (byte*)memset::str#2 -Inlining cast *D011 = (unumber)VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *SPRITES_ENABLE = (unumber)$ff Inlining cast memset::num#0 = (unumber)$3e8 Inlining cast *BORDER_COLOR = (unumber)$f @@ -1305,7 +1305,7 @@ Simplifying constant integer cast 0 Simplifying constant integer cast 0 Simplifying constant integer cast 7 Simplifying constant integer cast 3 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $40 Simplifying constant integer cast 5 @@ -1977,7 +1977,7 @@ main::@return: scope:[main] from main::@3 void init() init: scope:[init] from main - [17] *D011 = VIC_DEN|VIC_RSEL|3 + [17] *D011 = VICII_DEN|VICII_RSEL|3 [18] call plexInit to:init::@1 init::@1: scope:[init] from init init::@1 @@ -2071,7 +2071,7 @@ loop::@13: scope:[loop] from loop::@5 [74] *BORDER_COLOR = BLACK to:loop::@6 loop::@6: scope:[loop] from loop::@13 loop::@6 - [75] loop::$11 = *D011 & VIC_RST8 + [75] loop::$11 = *D011 & VICII_RST8 [76] if(loop::$11!=0) goto loop::@6 to:loop::@7 loop::@7: scope:[loop] from loop::@14 loop::@6 @@ -2856,7 +2856,7 @@ Statement [2] plex_show_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] plex_sprite_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] plex_sprite_msb = 1 [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] plex_free_next = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [17] *D011 = VIC_DEN|VIC_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a +Statement [17] *D011 = VICII_DEN|VICII_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a Statement [20] PLEX_PTR[init::i#2] = (byte)SPRITE/$40 [ PLEX_SCREEN_PTR init::i#2 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::i#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:2 [ init::i#2 init::i#1 ] Statement [21] init::$10 = init::i#2 << 2 [ PLEX_SCREEN_PTR init::i#2 init::$10 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::i#2 init::$10 ] { } ) always clobbers reg byte a @@ -2891,7 +2891,7 @@ Statement [68] loop::r#1 = loop::r#2 + 3 [ PLEX_SCREEN_PTR loop::angle#6 loop::i Statement [71] *BORDER_COLOR = 3 [ PLEX_SCREEN_PTR loop::angle#6 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR loop::angle#6 ] { } ) always clobbers reg byte a Statement [73] loop::angle#1 = loop::angle#6 + 3 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] { } ) always clobbers reg byte a Statement [74] *BORDER_COLOR = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] { } ) always clobbers reg byte a -Statement [75] loop::$11 = *D011 & VIC_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] { } ) always clobbers reg byte a +Statement [75] loop::$11 = *D011 & VICII_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] { } ) always clobbers reg byte a Statement [78] *BORDER_COLOR = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:8 [ loop::i1#5 loop::i1#1 ] Statement [79] loop::plexFreeNextYpos1_return#0 = PLEX_FREE_YPOS[plex_free_next] [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 loop::plexFreeNextYpos1_return#0 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 loop::plexFreeNextYpos1_return#0 ] { } ) always clobbers reg byte y @@ -2976,7 +2976,7 @@ Statement [2] plex_show_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] plex_sprite_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] plex_sprite_msb = 1 [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] plex_free_next = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [17] *D011 = VIC_DEN|VIC_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a +Statement [17] *D011 = VICII_DEN|VICII_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a Statement [20] PLEX_PTR[init::i#2] = (byte)SPRITE/$40 [ PLEX_SCREEN_PTR init::i#2 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::i#2 ] { } ) always clobbers reg byte a Statement [21] init::$10 = init::i#2 << 2 [ PLEX_SCREEN_PTR init::i#2 init::$10 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::i#2 init::$10 ] { } ) always clobbers reg byte a Statement [22] init::$3 = init::$10 + init::i#2 [ PLEX_SCREEN_PTR init::i#2 init::$3 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::i#2 init::$3 ] { } ) always clobbers reg byte a @@ -3003,7 +3003,7 @@ Statement [68] loop::r#1 = loop::r#2 + 3 [ PLEX_SCREEN_PTR loop::angle#6 loop::i Statement [71] *BORDER_COLOR = 3 [ PLEX_SCREEN_PTR loop::angle#6 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR loop::angle#6 ] { } ) always clobbers reg byte a Statement [73] loop::angle#1 = loop::angle#6 + 3 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] { } ) always clobbers reg byte a reg byte x Statement [74] *BORDER_COLOR = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] { } ) always clobbers reg byte a -Statement [75] loop::$11 = *D011 & VIC_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] { } ) always clobbers reg byte a +Statement [75] loop::$11 = *D011 & VICII_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] { } ) always clobbers reg byte a Statement [78] *BORDER_COLOR = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 ] { } ) always clobbers reg byte a Statement [79] loop::plexFreeNextYpos1_return#0 = PLEX_FREE_YPOS[plex_free_next] [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 loop::plexFreeNextYpos1_return#0 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 loop::plexFreeNextYpos1_return#0 ] { } ) always clobbers reg byte y Statement [84] if(loop::i1#1!=PLEX_COUNT-1+1) goto loop::@7 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#1 ] { } ) always clobbers reg byte a @@ -3063,7 +3063,7 @@ Statement [2] plex_show_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] plex_sprite_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] plex_sprite_msb = 1 [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] plex_free_next = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [17] *D011 = VIC_DEN|VIC_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a +Statement [17] *D011 = VICII_DEN|VICII_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a Statement [20] PLEX_PTR[init::i#2] = (byte)SPRITE/$40 [ PLEX_SCREEN_PTR init::i#2 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::i#2 ] { } ) always clobbers reg byte a Statement [21] init::$10 = init::i#2 << 2 [ PLEX_SCREEN_PTR init::i#2 init::$10 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::i#2 init::$10 ] { } ) always clobbers reg byte a Statement [22] init::$3 = init::$10 + init::i#2 [ PLEX_SCREEN_PTR init::i#2 init::$3 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::i#2 init::$3 ] { } ) always clobbers reg byte a @@ -3090,7 +3090,7 @@ Statement [68] loop::r#1 = loop::r#2 + 3 [ PLEX_SCREEN_PTR loop::angle#6 loop::i Statement [71] *BORDER_COLOR = 3 [ PLEX_SCREEN_PTR loop::angle#6 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR loop::angle#6 ] { } ) always clobbers reg byte a Statement [73] loop::angle#1 = loop::angle#6 + 3 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] { } ) always clobbers reg byte a reg byte x Statement [74] *BORDER_COLOR = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 ] { } ) always clobbers reg byte a -Statement [75] loop::$11 = *D011 & VIC_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] { } ) always clobbers reg byte a +Statement [75] loop::$11 = *D011 & VICII_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::$11 ] { } ) always clobbers reg byte a Statement [78] *BORDER_COLOR = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 ] { } ) always clobbers reg byte a Statement [79] loop::plexFreeNextYpos1_return#0 = PLEX_FREE_YPOS[plex_free_next] [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 loop::plexFreeNextYpos1_return#0 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#5 loop::plexFreeNextYpos1_return#0 ] { } ) always clobbers reg byte y Statement [84] if(loop::i1#1!=PLEX_COUNT-1+1) goto loop::@7 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::angle#1 loop::i1#1 ] { } ) always clobbers reg byte a @@ -3396,9 +3396,9 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(__start) // Global Constants & labels - .const VIC_RST8 = $80 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_RST8 = $80 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // The colors of the C64 .const BLACK = 0 .const GREEN = 5 @@ -3506,8 +3506,8 @@ main: { // Initialize the program init: { .label i = 2 - // [17] *D011 = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_RSEL|3 + // [17] *D011 = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 sta D011 // [18] call plexInit // Initialize the multiplexer @@ -3788,8 +3788,8 @@ loop: { // Sort the sprites by y-position // loop::@6 __b6: - // [75] loop::$11 = *D011 & VIC_RST8 -- vbuaa=_deref_pbuc1_band_vbuc2 - lda #VIC_RST8 + // [75] loop::$11 = *D011 & VICII_RST8 -- vbuaa=_deref_pbuc1_band_vbuc2 + lda #VICII_RST8 and D011 // [76] if(loop::$11!=0) goto loop::@6 -- vbuaa_neq_0_then_la1 cmp #0 @@ -4921,9 +4921,9 @@ const nomodify byte* SPRITES_ENABLE = (byte*) 53269 const nomodify byte* SPRITES_XMSB = (byte*) 53264 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 -const nomodify byte VIC_RST8 = $80 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 +const nomodify byte VICII_RST8 = $80 void __start() void exit() byte~ exit::$0 reg byte a 2002.0 @@ -5214,9 +5214,9 @@ Score: 74811 .segment Basic :BasicUpstart(__start) // Global Constants & labels - .const VIC_RST8 = $80 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_RST8 = $80 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // The colors of the C64 .const BLACK = 0 .const GREEN = 5 @@ -5315,9 +5315,9 @@ main: { // Initialize the program init: { .label i = 2 - // *D011 = VIC_DEN | VIC_RSEL | 3 - // [17] *D011 = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_DEN | VICII_RSEL | 3 + // [17] *D011 = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 sta D011 // plexInit(SCREEN) // [18] call plexInit @@ -5591,11 +5591,11 @@ loop: { // Sort the sprites by y-position // loop::@6 __b6: - // *D011&VIC_RST8 - // [75] loop::$11 = *D011 & VIC_RST8 -- vbuaa=_deref_pbuc1_band_vbuc2 - lda #VIC_RST8 + // *D011&VICII_RST8 + // [75] loop::$11 = *D011 & VICII_RST8 -- vbuaa=_deref_pbuc1_band_vbuc2 + lda #VICII_RST8 and D011 - // while((*D011&VIC_RST8)!=0) + // while((*D011&VICII_RST8)!=0) // [76] if(loop::$11!=0) goto loop::@6 -- vbuaa_neq_0_then_la1 cmp #0 bne __b6 diff --git a/src/test/ref/complex/prebob/vogel-sprites.sym b/src/test/ref/complex/prebob/vogel-sprites.sym index 559e6dd08..443847c97 100644 --- a/src/test/ref/complex/prebob/vogel-sprites.sym +++ b/src/test/ref/complex/prebob/vogel-sprites.sym @@ -29,9 +29,9 @@ const nomodify byte* SPRITES_ENABLE = (byte*) 53269 const nomodify byte* SPRITES_XMSB = (byte*) 53264 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 -const nomodify byte VIC_RST8 = $80 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 +const nomodify byte VICII_RST8 = $80 void __start() void exit() byte~ exit::$0 reg byte a 2002.0 diff --git a/src/test/ref/complex/splines/truetype-splines.asm b/src/test/ref/complex/splines/truetype-splines.asm index 80438b87f..a13db44e5 100644 --- a/src/test/ref/complex/splines/truetype-splines.asm +++ b/src/test/ref/complex/splines/truetype-splines.asm @@ -7,9 +7,9 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const WHITE = 1 .const MOVE_TO = 0 .const SPLINE_TO = 1 @@ -47,8 +47,8 @@ main: { // *D018 = toD018(BITMAP_SCREEN, BITMAP_GRAPHICS) lda #toD0181_return sta D018 - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 lda #0 sta.z angle diff --git a/src/test/ref/complex/splines/truetype-splines.cfg b/src/test/ref/complex/splines/truetype-splines.cfg index 23561b919..2e319dde7 100644 --- a/src/test/ref/complex/splines/truetype-splines.cfg +++ b/src/test/ref/complex/splines/truetype-splines.cfg @@ -26,7 +26,7 @@ main::toD0181: scope:[main] from main::vicSelectGfxBank1_@1 to:main::@7 main::@7: scope:[main] from main::toD0181 [10] *D018 = main::toD0181_return#0 - [11] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [11] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::@1 main::@1: scope:[main] from main::@6 main::@7 [12] main::angle#2 = phi( main::@7/0, main::@6/main::angle#1 ) diff --git a/src/test/ref/complex/splines/truetype-splines.log b/src/test/ref/complex/splines/truetype-splines.log index 883f32a84..a4f71663b 100644 --- a/src/test/ref/complex/splines/truetype-splines.log +++ b/src/test/ref/complex/splines/truetype-splines.log @@ -825,7 +825,7 @@ main::@10: scope:[main] from main::toD0181_@return main::toD0181_return#3 = phi( main::toD0181_@return/main::toD0181_return#1 ) main::$4 = main::toD0181_return#3 *D018 = main::$4 - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 main::angle#0 = 0 to:main::@1 main::@1: scope:[main] from main::@10 main::@6 @@ -1243,9 +1243,9 @@ const byte SIZEOF_STRUCT_SEGMENT = 9 const byte SIZEOF_STRUCT_SPLINEVECTOR16 = 4 const struct SplineVector16* SPLINE_8SEG[9] = { fill( 9, 0) } const byte SPLINE_TO = 1 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() word abs_u16(word abs_u16::w) @@ -2299,8 +2299,8 @@ Adding number conversion cast (unumber) main::toD0181_$4 in main::toD0181_$4 = m Adding number conversion cast (unumber) $f in main::toD0181_$5 = main::toD0181_$4 & $f Adding number conversion cast (unumber) main::toD0181_$5 in main::toD0181_$5 = main::toD0181_$4 & (unumber)$f Adding number conversion cast (unumber) main::toD0181_$6 in main::toD0181_$6 = main::toD0181_$2 | main::toD0181_$5 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) $fe in main::$7 = *RASTER != $fe Adding number conversion cast (unumber) $ff in main::$8 = *RASTER != $ff Adding number conversion cast (unumber) 9 in main::angle#1 = main::angle#3 + 9 @@ -2339,7 +2339,7 @@ Inlining cast sgn_u16::return#2 = (unumber)-1 Inlining cast sgn_u16::return#3 = (unumber)1 Inlining cast mulf_init::dir#1 = (unumber)1 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Successful SSA optimization Pass2InlineCast Simplifying constant pointer cast (byte*) 53266 Simplifying constant pointer cast (byte*) 53265 @@ -2415,7 +2415,7 @@ Simplifying constant integer cast $3fff Simplifying constant integer cast 4 Simplifying constant integer cast 4 Simplifying constant integer cast $f -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $fe Simplifying constant integer cast $ff @@ -3515,7 +3515,7 @@ main::toD0181: scope:[main] from main::vicSelectGfxBank1_@1 to:main::@7 main::@7: scope:[main] from main::toD0181 [10] *D018 = main::toD0181_return#0 - [11] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [11] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::@1 main::@1: scope:[main] from main::@6 main::@7 [12] main::angle#2 = phi( main::@7/0, main::@6/main::angle#1 ) @@ -4957,7 +4957,7 @@ Equivalence Class zp[1]:88 [ bitmap_init::$4 ] has ALU potential. Statement [6] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] *((byte*)CIA2) = main::vicSelectGfxBank1_toDd001_return#0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [11] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [11] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [18] if(*RASTER!=$fe) goto main::@3 [ main::angle#2 main::w#4 ] ( [ main::angle#2 main::w#4 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:2 [ main::angle#2 main::angle#1 ] Removing always clobbered register reg byte a as potential for zp[1]:3 [ main::w#4 main::w#1 ] @@ -5184,7 +5184,7 @@ Statement [327] mulf16u::return#0 = *mulf16u::memR [ mulf16u::return#0 ] ( show_ Statement [6] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] *((byte*)CIA2) = main::vicSelectGfxBank1_toDd001_return#0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [11] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [11] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [15] show_letter::angle#0 = main::angle#2 [ main::angle#2 show_letter::angle#0 ] ( [ main::angle#2 show_letter::angle#0 ] { { show_letter::angle#0 = main::angle#2 } } ) always clobbers reg byte a Statement [18] if(*RASTER!=$fe) goto main::@3 [ main::angle#2 main::w#4 ] ( [ main::angle#2 main::w#4 ] { } ) always clobbers reg byte a Statement [19] if(*RASTER!=$ff) goto main::@4 [ main::angle#2 main::w#4 ] ( [ main::angle#2 main::w#4 ] { } ) always clobbers reg byte a @@ -5759,9 +5759,9 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const WHITE = 1 .const MOVE_TO = 0 .const SPLINE_TO = 1 @@ -5835,8 +5835,8 @@ main: { // [10] *D018 = main::toD0181_return#0 -- _deref_pbuc1=vbuc2 lda #toD0181_return sta D018 - // [11] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [11] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [12] phi from main::@7 to main::@1 [phi:main::@7->main::@1] __b1_from___b7: @@ -8276,9 +8276,9 @@ const signed byte* SIN[$140] = kickasm {{ .for(var i=0;i<$140;i++) const byte SIZEOF_STRUCT_SPLINEVECTOR16 = 4 const struct SplineVector16* SPLINE_8SEG[9] = { fill( 9, 0) } const byte SPLINE_TO = 1 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 word abs_u16(word abs_u16::w) byte~ abs_u16::$0 reg byte a 2.0000000002E10 @@ -8744,9 +8744,9 @@ Score: 668848 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const WHITE = 1 .const MOVE_TO = 0 .const SPLINE_TO = 1 @@ -8805,9 +8805,9 @@ main: { // [10] *D018 = main::toD0181_return#0 -- _deref_pbuc1=vbuc2 lda #toD0181_return sta D018 - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [11] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [11] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // [12] phi from main::@7 to main::@1 [phi:main::@7->main::@1] // [12] phi main::angle#2 = 0 [phi:main::@7->main::@1#0] -- vbuz1=vbuc1 diff --git a/src/test/ref/complex/splines/truetype-splines.sym b/src/test/ref/complex/splines/truetype-splines.sym index 8347929ba..2aba20c5e 100644 --- a/src/test/ref/complex/splines/truetype-splines.sym +++ b/src/test/ref/complex/splines/truetype-splines.sym @@ -21,9 +21,9 @@ const signed byte* SIN[$140] = kickasm {{ .for(var i=0;i<$140;i++) const byte SIZEOF_STRUCT_SPLINEVECTOR16 = 4 const struct SplineVector16* SPLINE_8SEG[9] = { fill( 9, 0) } const byte SPLINE_TO = 1 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 word abs_u16(word abs_u16::w) byte~ abs_u16::$0 reg byte a 2.0000000002E10 diff --git a/src/test/ref/complex/spritescroller/spritescroller.asm b/src/test/ref/complex/spritescroller/spritescroller.asm index d69ef82d9..1bd48b25f 100644 --- a/src/test/ref/complex/spritescroller/spritescroller.asm +++ b/src/test/ref/complex/spritescroller/spritescroller.asm @@ -30,7 +30,7 @@ .label SPRITES_COLOR = $d027 .label SPRITES_ENABLE = $d015 .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D018 = $d018 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 @@ -210,11 +210,11 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL &=0x7f + // *VICII_CONTROL &=0x7f // Set raster line to 0x00 lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // *RASTER = 0x28 lda #$28 sta RASTER diff --git a/src/test/ref/complex/spritescroller/spritescroller.cfg b/src/test/ref/complex/spritescroller/spritescroller.cfg index dfc617fae..1df13bcb1 100644 --- a/src/test/ref/complex/spritescroller/spritescroller.cfg +++ b/src/test/ref/complex/spritescroller/spritescroller.cfg @@ -106,7 +106,7 @@ main::@11: scope:[main] from main::@5 main::@12: scope:[main] from main::@11 asm { sei } [47] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [48] *VIC_CONTROL = *VIC_CONTROL & $7f + [48] *VICII_CONTROL = *VICII_CONTROL & $7f [49] *RASTER = $28 [50] *IRQ_ENABLE = IRQ_RASTER [51] *IRQ_STATUS = IRQ_RASTER diff --git a/src/test/ref/complex/spritescroller/spritescroller.log b/src/test/ref/complex/spritescroller/spritescroller.log index ad2f40fa0..fffa6c675 100644 --- a/src/test/ref/complex/spritescroller/spritescroller.log +++ b/src/test/ref/complex/spritescroller/spritescroller.log @@ -299,7 +299,7 @@ main::@14: scope:[main] from main::@13 scroll_text_next#24 = phi( main::@13/scroll_text_next#0 ) asm { sei } *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - *VIC_CONTROL = *VIC_CONTROL & $7f + *VICII_CONTROL = *VICII_CONTROL & $7f *RASTER = $28 *IRQ_ENABLE = IRQ_RASTER *IRQ_STATUS = IRQ_RASTER @@ -888,7 +888,7 @@ byte SPRITE_0#6 byte SPRITE_0#7 byte SPRITE_0#8 byte SPRITE_0#9 -const nomodify byte* VIC_CONTROL = (byte*)$d011 +const nomodify byte* VICII_CONTROL = (byte*)$d011 const nomodify byte WHITE = 1 const byte* XMOVEMENT[$200] = kickasm {{ //.lohifill $100, round(344-i*344/$100-86*sin(toRadians(360*i/$100))) //.lohifill $100, round(344-i*344/$100-129*sin(toRadians(360*i/$100))) @@ -1488,7 +1488,7 @@ Adding number conversion cast (unumber) main::toD0181_$5 in main::toD0181_$5 = m Adding number conversion cast (unumber) main::toD0181_$6 in main::toD0181_$6 = main::toD0181_$2 | main::toD0181_$5 Adding number conversion cast (unumber) 8 in main::x#1 = main::x#2 + 8 Adding number conversion cast (unumber) $ff in *SPRITES_ENABLE = $ff -Adding number conversion cast (unumber) $7f in *VIC_CONTROL = *VIC_CONTROL & $7f +Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f Adding number conversion cast (unumber) $28 in *RASTER = $28 Adding number conversion cast (unumber) 8 in plex_move::y_idx#1 = plex_move::y_idx#2 + 8 Adding number conversion cast (unumber) 0 in plex_move::$0 = plex_move::x_idx#2 == 0 @@ -2514,7 +2514,7 @@ main::@11: scope:[main] from main::@5 main::@12: scope:[main] from main::@11 asm { sei } [47] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [48] *VIC_CONTROL = *VIC_CONTROL & $7f + [48] *VICII_CONTROL = *VICII_CONTROL & $7f [49] *RASTER = $28 [50] *IRQ_ENABLE = IRQ_RASTER [51] *IRQ_STATUS = IRQ_RASTER @@ -3250,7 +3250,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:4 [ main::s Statement [47] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:33 [ y_sin_idx#11 y_sin_idx#13 ] Removing always clobbered register reg byte a as potential for zp[1]:34 [ x_movement_idx#11 x_movement_idx#13 ] -Statement [48] *VIC_CONTROL = *VIC_CONTROL & $7f [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a +Statement [48] *VICII_CONTROL = *VICII_CONTROL & $7f [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Statement [49] *RASTER = $28 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Statement [50] *IRQ_ENABLE = IRQ_RASTER [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Statement [51] *IRQ_STATUS = IRQ_RASTER [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a @@ -3372,7 +3372,7 @@ Statement [34] *D018 = main::toD0181_return#0 [ frame_done ] ( main:9 [ frame_do Statement [37] *SPRITES_ENABLE = $ff [ frame_done ] ( main:9 [ frame_done ] { } ) always clobbers reg byte a Statement [39] SPRITES_COLOR[main::s1#2] = WHITE [ frame_done main::s1#2 ] ( main:9 [ frame_done main::s1#2 ] { } ) always clobbers reg byte a Statement [47] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a -Statement [48] *VIC_CONTROL = *VIC_CONTROL & $7f [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a +Statement [48] *VICII_CONTROL = *VICII_CONTROL & $7f [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Statement [49] *RASTER = $28 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Statement [50] *IRQ_ENABLE = IRQ_RASTER [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Statement [51] *IRQ_STATUS = IRQ_RASTER [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a @@ -3466,7 +3466,7 @@ Statement [34] *D018 = main::toD0181_return#0 [ frame_done ] ( main:9 [ frame_do Statement [37] *SPRITES_ENABLE = $ff [ frame_done ] ( main:9 [ frame_done ] { } ) always clobbers reg byte a Statement [39] SPRITES_COLOR[main::s1#2] = WHITE [ frame_done main::s1#2 ] ( main:9 [ frame_done main::s1#2 ] { } ) always clobbers reg byte a Statement [47] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a -Statement [48] *VIC_CONTROL = *VIC_CONTROL & $7f [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a +Statement [48] *VICII_CONTROL = *VICII_CONTROL & $7f [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Statement [49] *RASTER = $28 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Statement [50] *IRQ_ENABLE = IRQ_RASTER [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a Statement [51] *IRQ_STATUS = IRQ_RASTER [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] ( main:9 [ frame_done y_sin_idx#13 x_movement_idx#13 scroll_text_next#14 ] { } ) always clobbers reg byte a @@ -3794,7 +3794,7 @@ ASSEMBLER BEFORE OPTIMIZATION .label SPRITES_COLOR = $d027 .label SPRITES_ENABLE = $d015 .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D018 = $d018 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 @@ -4090,11 +4090,11 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // [48] *VIC_CONTROL = *VIC_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // [48] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 // Set raster line to 0x00 lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // [49] *RASTER = $28 -- _deref_pbuc1=vbuc2 lda #$28 sta RASTER @@ -5322,7 +5322,7 @@ const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 byte SPRITE_0 const byte SPRITE_0#0 SPRITE_0 = (byte)(word)SPRITES/$40 -const nomodify byte* VIC_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL = (byte*) 53265 const nomodify byte WHITE = 1 const byte* XMOVEMENT[$200] = kickasm {{ //.lohifill $100, round(344-i*344/$100-86*sin(toRadians(360*i/$100))) //.lohifill $100, round(344-i*344/$100-129*sin(toRadians(360*i/$100))) @@ -5605,7 +5605,7 @@ Score: 159175 .label SPRITES_COLOR = $d027 .label SPRITES_ENABLE = $d015 .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D018 = $d018 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 @@ -5874,12 +5874,12 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL &=0x7f - // [48] *VIC_CONTROL = *VIC_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // *VICII_CONTROL &=0x7f + // [48] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 // Set raster line to 0x00 lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // *RASTER = 0x28 // [49] *RASTER = $28 -- _deref_pbuc1=vbuc2 lda #$28 diff --git a/src/test/ref/complex/spritescroller/spritescroller.sym b/src/test/ref/complex/spritescroller/spritescroller.sym index 49e408c15..d1ccb583b 100644 --- a/src/test/ref/complex/spritescroller/spritescroller.sym +++ b/src/test/ref/complex/spritescroller/spritescroller.sym @@ -30,7 +30,7 @@ const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 byte SPRITE_0 const byte SPRITE_0#0 SPRITE_0 = (byte)(word)SPRITES/$40 -const nomodify byte* VIC_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL = (byte*) 53265 const nomodify byte WHITE = 1 const byte* XMOVEMENT[$200] = kickasm {{ //.lohifill $100, round(344-i*344/$100-86*sin(toRadians(360*i/$100))) //.lohifill $100, round(344-i*344/$100-129*sin(toRadians(360*i/$100))) diff --git a/src/test/ref/complex/tetris/test-sprites.asm b/src/test/ref/complex/tetris/test-sprites.asm index fcee9137a..67d77f623 100644 --- a/src/test/ref/complex/tetris/test-sprites.asm +++ b/src/test/ref/complex/tetris/test-sprites.asm @@ -37,7 +37,7 @@ .label SPRITES_MC = $d01c .label SPRITES_EXPAND_X = $d01d .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D018 = $d018 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 @@ -354,11 +354,11 @@ sprites_irq_init: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL &=0x7f + // *VICII_CONTROL &=0x7f // Set raster line lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // *RASTER = IRQ_RASTER_FIRST lda #IRQ_RASTER_FIRST sta RASTER diff --git a/src/test/ref/complex/tetris/test-sprites.cfg b/src/test/ref/complex/tetris/test-sprites.cfg index 43c9508e4..9079a01a9 100644 --- a/src/test/ref/complex/tetris/test-sprites.cfg +++ b/src/test/ref/complex/tetris/test-sprites.cfg @@ -177,7 +177,7 @@ sprites_irq_init: scope:[sprites_irq_init] from main::@2 [90] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [91] *PROCPORT = PROCPORT_RAM_IO [92] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [93] *VIC_CONTROL = *VIC_CONTROL & $7f + [93] *VICII_CONTROL = *VICII_CONTROL & $7f [94] *RASTER = IRQ_RASTER_FIRST [95] *IRQ_ENABLE = IRQ_RASTER [96] *HARDWARE_IRQ = &sprites_irq diff --git a/src/test/ref/complex/tetris/test-sprites.log b/src/test/ref/complex/tetris/test-sprites.log index ea690cfb3..d70408545 100644 --- a/src/test/ref/complex/tetris/test-sprites.log +++ b/src/test/ref/complex/tetris/test-sprites.log @@ -43,7 +43,7 @@ sprites_irq_init: scope:[sprites_irq_init] from main::@2 *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK *PROCPORT = PROCPORT_RAM_IO *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - *VIC_CONTROL = *VIC_CONTROL & $7f + *VICII_CONTROL = *VICII_CONTROL & $7f *RASTER = IRQ_RASTER_FIRST *IRQ_ENABLE = IRQ_RASTER *HARDWARE_IRQ = &sprites_irq @@ -408,7 +408,7 @@ const nomodify byte* SPRITES_MC = (byte*)$d01c const nomodify byte* SPRITES_XPOS = (byte*)$d000 const nomodify byte* SPRITES_YPOS = (byte*)$d001 const nomodify word SPRITE_PTRS = $3f8 -const nomodify byte* VIC_CONTROL = (byte*)$d011 +const nomodify byte* VICII_CONTROL = (byte*)$d011 void __start() byte~ __start::__init1_$0 number~ __start::__init1_$1 @@ -599,7 +599,7 @@ Adding number conversion cast (unumber) 2 in sprites_init::$0 = sprites_init::s# Adding number conversion cast (unumber) sprites_init::$0 in sprites_init::$0 = sprites_init::s#2 * (unumber)2 Adding number conversion cast (unumber) $18 in sprites_init::$1 = sprites_init::xpos#2 + $18 Adding number conversion cast (unumber) sprites_init::$1 in sprites_init::$1 = sprites_init::xpos#2 + (unumber)$18 -Adding number conversion cast (unumber) $7f in *VIC_CONTROL = *VIC_CONTROL & $7f +Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f Adding number conversion cast (unumber) 0 in SPRITES_YPOS[0] = sprites_irq::ypos#0 Adding number conversion cast (unumber) 2 in SPRITES_YPOS[2] = sprites_irq::ypos#0 Adding number conversion cast (unumber) 4 in SPRITES_YPOS[4] = sprites_irq::ypos#0 @@ -1277,7 +1277,7 @@ sprites_irq_init: scope:[sprites_irq_init] from main::@2 [90] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [91] *PROCPORT = PROCPORT_RAM_IO [92] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [93] *VIC_CONTROL = *VIC_CONTROL & $7f + [93] *VICII_CONTROL = *VICII_CONTROL & $7f [94] *RASTER = IRQ_RASTER_FIRST [95] *IRQ_ENABLE = IRQ_RASTER [96] *HARDWARE_IRQ = &sprites_irq @@ -1511,7 +1511,7 @@ Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a Statement [90] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [91] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [92] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a -Statement [93] *VIC_CONTROL = *VIC_CONTROL & $7f [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a +Statement [93] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [94] *RASTER = IRQ_RASTER_FIRST [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [95] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [96] *HARDWARE_IRQ = &sprites_irq [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a @@ -1568,7 +1568,7 @@ Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a Statement [90] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [91] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [92] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a -Statement [93] *VIC_CONTROL = *VIC_CONTROL & $7f [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a +Statement [93] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [94] *RASTER = IRQ_RASTER_FIRST [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [95] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a Statement [96] *HARDWARE_IRQ = &sprites_irq [ ] ( main:8::sprites_irq_init:71 [ ] { } ) always clobbers reg byte a @@ -1710,7 +1710,7 @@ ASSEMBLER BEFORE OPTIMIZATION .label SPRITES_MC = $d01c .label SPRITES_EXPAND_X = $d01d .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D018 = $d018 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 @@ -2165,11 +2165,11 @@ sprites_irq_init: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // [93] *VIC_CONTROL = *VIC_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // [93] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 // Set raster line lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // [94] *RASTER = IRQ_RASTER_FIRST -- _deref_pbuc1=vbuc2 lda #IRQ_RASTER_FIRST sta RASTER @@ -2445,7 +2445,7 @@ const nomodify byte* SPRITES_MC = (byte*) 53276 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 const nomodify word SPRITE_PTRS = $3f8 -const nomodify byte* VIC_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL = (byte*) 53265 void __start() byte __start::__init1_toSpritePtr1_return const byte __start::__init1_toSpritePtr1_return#0 __init1_toSpritePtr1_return = (byte)(word)PLAYFIELD_SPRITES/$40 @@ -2587,7 +2587,7 @@ Score: 6632 .label SPRITES_MC = $d01c .label SPRITES_EXPAND_X = $d01d .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D018 = $d018 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 @@ -3048,12 +3048,12 @@ sprites_irq_init: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL &=0x7f - // [93] *VIC_CONTROL = *VIC_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // *VICII_CONTROL &=0x7f + // [93] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 // Set raster line lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // *RASTER = IRQ_RASTER_FIRST // [94] *RASTER = IRQ_RASTER_FIRST -- _deref_pbuc1=vbuc2 lda #IRQ_RASTER_FIRST diff --git a/src/test/ref/complex/tetris/test-sprites.sym b/src/test/ref/complex/tetris/test-sprites.sym index 484c53f7e..9f45e30db 100644 --- a/src/test/ref/complex/tetris/test-sprites.sym +++ b/src/test/ref/complex/tetris/test-sprites.sym @@ -54,7 +54,7 @@ const nomodify byte* SPRITES_MC = (byte*) 53276 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 const nomodify word SPRITE_PTRS = $3f8 -const nomodify byte* VIC_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL = (byte*) 53265 void __start() byte __start::__init1_toSpritePtr1_return const byte __start::__init1_toSpritePtr1_return#0 __init1_toSpritePtr1_return = (byte)(word)PLAYFIELD_SPRITES/$40 diff --git a/src/test/ref/complex/tetris/tetris.asm b/src/test/ref/complex/tetris/tetris.asm index 87bdd8ba7..b86b82ff2 100644 --- a/src/test/ref/complex/tetris/tetris.asm +++ b/src/test/ref/complex/tetris/tetris.asm @@ -13,9 +13,9 @@ .const CIA_INTERRUPT_CLEAR = $7f // The offset of the sprite pointers from the screen start address .const SPRITE_PTRS = $3f8 - .const VIC_ECM = $40 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_ECM = $40 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // SID Channel Control Register Noise Waveform @@ -84,7 +84,7 @@ .label BG_COLOR1 = $d022 .label BG_COLOR2 = $d023 .label BG_COLOR3 = $d024 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -476,9 +476,9 @@ render_init: { // CIA2->PORT_A = toDd00(gfx) lda #vicSelectGfxBank1_toDd001_return sta CIA2 - // *D011 = VIC_ECM | VIC_DEN | VIC_RSEL | 3 + // *D011 = VICII_ECM | VICII_DEN | VICII_RSEL | 3 // Enable Extended Background Color Mode - lda #VIC_ECM|VIC_DEN|VIC_RSEL|3 + lda #VICII_ECM|VICII_DEN|VICII_RSEL|3 sta D011 // *BORDER_COLOR = BLACK lda #BLACK @@ -612,11 +612,11 @@ sprites_irq_init: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL &=0x7f + // *VICII_CONTROL &=0x7f // Set raster line lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // *RASTER = IRQ_RASTER_FIRST lda #IRQ_RASTER_FIRST sta RASTER diff --git a/src/test/ref/complex/tetris/tetris.cfg b/src/test/ref/complex/tetris/tetris.cfg index 345a7c1b3..ed9ff7134 100644 --- a/src/test/ref/complex/tetris/tetris.cfg +++ b/src/test/ref/complex/tetris/tetris.cfg @@ -237,7 +237,7 @@ render_init::vicSelectGfxBank1_@1: scope:[render_init] from render_init::vicSel [112] *((byte*)CIA2) = render_init::vicSelectGfxBank1_toDd001_return#0 to:render_init::@2 render_init::@2: scope:[render_init] from render_init::vicSelectGfxBank1_@1 - [113] *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 + [113] *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 [114] *BORDER_COLOR = BLACK [115] *BG_COLOR = BLACK [116] *BG_COLOR1 = *PIECES_COLORS_1 @@ -294,7 +294,7 @@ sprites_irq_init: scope:[sprites_irq_init] from main::@10 [146] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [147] *PROCPORT = PROCPORT_RAM_IO [148] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [149] *VIC_CONTROL = *VIC_CONTROL & $7f + [149] *VICII_CONTROL = *VICII_CONTROL & $7f [150] *RASTER = IRQ_RASTER_FIRST [151] *IRQ_ENABLE = IRQ_RASTER [152] *HARDWARE_IRQ = &sprites_irq diff --git a/src/test/ref/complex/tetris/tetris.log b/src/test/ref/complex/tetris/tetris.log index 848577244..589157755 100644 --- a/src/test/ref/complex/tetris/tetris.log +++ b/src/test/ref/complex/tetris/tetris.log @@ -308,7 +308,7 @@ render_init::vicSelectGfxBank1_@1: scope:[render_init] from render_init::vicSel *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = render_init::vicSelectGfxBank1_$0 to:render_init::@3 render_init::@3: scope:[render_init] from render_init::vicSelectGfxBank1_@1 - *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 + *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 *BORDER_COLOR = BLACK *BG_COLOR = BLACK *BG_COLOR1 = PIECES_COLORS_1[0] @@ -922,7 +922,7 @@ sprites_irq_init: scope:[sprites_irq_init] from main::@11 *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK *PROCPORT = PROCPORT_RAM_IO *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - *VIC_CONTROL = *VIC_CONTROL & $7f + *VICII_CONTROL = *VICII_CONTROL & $7f *RASTER = IRQ_RASTER_FIRST *IRQ_ENABLE = IRQ_RASTER *HARDWARE_IRQ = &sprites_irq @@ -3332,10 +3332,10 @@ const nomodify byte* SPRITES_MC = (byte*)$d01c const nomodify byte* SPRITES_XPOS = (byte*)$d000 const nomodify byte* SPRITES_YPOS = (byte*)$d001 const nomodify word SPRITE_PTRS = $3f8 -const nomodify byte* VIC_CONTROL = (byte*)$d011 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*)$d011 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_RSEL = 8 void __start() byte~ __start::__init1_$0 number~ __start::__init1_$1 @@ -5882,8 +5882,8 @@ Adding number conversion cast (unumber) $40 in render_init::vicSelectGfxBank1_to Adding number conversion cast (unumber) render_init::vicSelectGfxBank1_toDd001_$1 in render_init::vicSelectGfxBank1_toDd001_$1 = render_init::vicSelectGfxBank1_toDd001_$0 / (unumber)$40 Adding number conversion cast (unumber) 3 in render_init::vicSelectGfxBank1_toDd001_$2 = 3 ^ render_init::vicSelectGfxBank1_toDd001_$1 Adding number conversion cast (unumber) render_init::vicSelectGfxBank1_toDd001_$2 in render_init::vicSelectGfxBank1_toDd001_$2 = (unumber)3 ^ render_init::vicSelectGfxBank1_toDd001_$1 -Adding number conversion cast (unumber) VIC_ECM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_ECM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_ECM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_ECM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) 0 in *BG_COLOR1 = PIECES_COLORS_1[0] Adding number conversion cast (unumber) 0 in *BG_COLOR2 = PIECES_COLORS_2[0] Adding number conversion cast (unumber) $10 in render_init::li_1#0 = PLAYFIELD_SCREEN_1+2*$28+$10 @@ -5960,7 +5960,7 @@ Adding number conversion cast (unumber) 2 in sprites_init::$0 = sprites_init::s# Adding number conversion cast (unumber) sprites_init::$0 in sprites_init::$0 = sprites_init::s#2 * (unumber)2 Adding number conversion cast (unumber) $18 in sprites_init::$1 = sprites_init::xpos#2 + $18 Adding number conversion cast (unumber) sprites_init::$1 in sprites_init::$1 = sprites_init::xpos#2 + (unumber)$18 -Adding number conversion cast (unumber) $7f in *VIC_CONTROL = *VIC_CONTROL & $7f +Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f Adding number conversion cast (unumber) 0 in SPRITES_YPOS[0] = sprites_irq::ypos#0 Adding number conversion cast (unumber) 2 in SPRITES_YPOS[2] = sprites_irq::ypos#0 Adding number conversion cast (unumber) 4 in SPRITES_YPOS[4] = sprites_irq::ypos#0 @@ -6058,7 +6058,7 @@ Successful SSA optimization PassNAddNumberTypeConversions Inlining cast keyboard_modifiers#0 = (unumber)0 Inlining cast keyboard_event_get::return#0 = (unumber)$ff Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 -Inlining cast *D011 = (unumber)VIC_ECM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_ECM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast render_screen_show#0 = (unumber)0 Inlining cast render_screen_render#0 = (unumber)$20 Inlining cast render_bcd::only_low#0 = (unumber)0 @@ -6136,7 +6136,7 @@ Simplifying constant integer cast $ff Simplifying constant integer cast 3 Simplifying constant integer cast $40 Simplifying constant integer cast 3 -Simplifying constant integer cast VIC_ECM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_ECM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 0 Simplifying constant integer cast 0 @@ -9043,7 +9043,7 @@ render_init::vicSelectGfxBank1_@1: scope:[render_init] from render_init::vicSel [112] *((byte*)CIA2) = render_init::vicSelectGfxBank1_toDd001_return#0 to:render_init::@2 render_init::@2: scope:[render_init] from render_init::vicSelectGfxBank1_@1 - [113] *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 + [113] *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 [114] *BORDER_COLOR = BLACK [115] *BG_COLOR = BLACK [116] *BG_COLOR1 = *PIECES_COLORS_1 @@ -9100,7 +9100,7 @@ sprites_irq_init: scope:[sprites_irq_init] from main::@10 [146] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [147] *PROCPORT = PROCPORT_RAM_IO [148] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [149] *VIC_CONTROL = *VIC_CONTROL & $7f + [149] *VICII_CONTROL = *VICII_CONTROL & $7f [150] *RASTER = IRQ_RASTER_FIRST [151] *IRQ_ENABLE = IRQ_RASTER [152] *HARDWARE_IRQ = &sprites_irq @@ -11250,7 +11250,7 @@ Statement [99] current_piece_gfx#112 = current_piece_gfx#19 [ score_bcd render_s Removing always clobbered register reg byte a as potential for zp[1]:24 [ render_screen_render#35 render_screen_render#64 ] Statement [110] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [112] *((byte*)CIA2) = render_init::vicSelectGfxBank1_toDd001_return#0 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a -Statement [113] *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a +Statement [113] *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [114] *BORDER_COLOR = BLACK [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [115] *BG_COLOR = BLACK [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [116] *BG_COLOR1 = *PIECES_COLORS_1 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a @@ -11278,7 +11278,7 @@ Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a Statement [146] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [147] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [148] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a -Statement [149] *VIC_CONTROL = *VIC_CONTROL & $7f [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a +Statement [149] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [150] *RASTER = IRQ_RASTER_FIRST [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [151] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [152] *HARDWARE_IRQ = &sprites_irq [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a @@ -11491,7 +11491,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:130 [ main: Statement [99] current_piece_gfx#112 = current_piece_gfx#19 [ score_bcd render_screen_show#17 render_screen_render#19 current_movedown_slow#22 current_piece#16 current_piece_char#17 current_orientation#18 current_piece_gfx#19 current_xpos#2 current_ypos#20 game_over#16 next_piece_idx#17 keyboard_events_size#17 current_movedown_counter#15 lines_bcd#16 level#18 level_bcd#18 current_ypos#98 render_screen_render#64 current_xpos#119 current_piece_gfx#112 ] ( main:9 [ score_bcd render_screen_show#17 render_screen_render#19 current_movedown_slow#22 current_piece#16 current_piece_char#17 current_orientation#18 current_piece_gfx#19 current_xpos#2 current_ypos#20 game_over#16 next_piece_idx#17 keyboard_events_size#17 current_movedown_counter#15 lines_bcd#16 level#18 level_bcd#18 current_ypos#98 render_screen_render#64 current_xpos#119 current_piece_gfx#112 ] { { current_ypos#14 = current_ypos#98 } { render_screen_render#35 = render_screen_render#64 } { current_xpos#119 = current_xpos#61 } { current_piece_gfx#112 = current_piece_gfx#66 } { current_piece_char#100 = current_piece_char#70 } } ) always clobbers reg byte a Statement [110] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [112] *((byte*)CIA2) = render_init::vicSelectGfxBank1_toDd001_return#0 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a -Statement [113] *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a +Statement [113] *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [114] *BORDER_COLOR = BLACK [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [115] *BG_COLOR = BLACK [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [116] *BG_COLOR1 = *PIECES_COLORS_1 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a @@ -11515,7 +11515,7 @@ Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a Statement [146] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [147] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [148] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a -Statement [149] *VIC_CONTROL = *VIC_CONTROL & $7f [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a +Statement [149] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [150] *RASTER = IRQ_RASTER_FIRST [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [151] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [152] *HARDWARE_IRQ = &sprites_irq [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a @@ -11660,7 +11660,7 @@ Statement [87] if(game_over#22==0) goto main::@4 [ score_bcd render_screen_show# Statement [99] current_piece_gfx#112 = current_piece_gfx#19 [ score_bcd render_screen_show#17 render_screen_render#19 current_movedown_slow#22 current_piece#16 current_piece_char#17 current_orientation#18 current_piece_gfx#19 current_xpos#2 current_ypos#20 game_over#16 next_piece_idx#17 keyboard_events_size#17 current_movedown_counter#15 lines_bcd#16 level#18 level_bcd#18 current_ypos#98 render_screen_render#64 current_xpos#119 current_piece_gfx#112 ] ( main:9 [ score_bcd render_screen_show#17 render_screen_render#19 current_movedown_slow#22 current_piece#16 current_piece_char#17 current_orientation#18 current_piece_gfx#19 current_xpos#2 current_ypos#20 game_over#16 next_piece_idx#17 keyboard_events_size#17 current_movedown_counter#15 lines_bcd#16 level#18 level_bcd#18 current_ypos#98 render_screen_render#64 current_xpos#119 current_piece_gfx#112 ] { { current_ypos#14 = current_ypos#98 } { render_screen_render#35 = render_screen_render#64 } { current_xpos#119 = current_xpos#61 } { current_piece_gfx#112 = current_piece_gfx#66 } { current_piece_char#100 = current_piece_char#70 } } ) always clobbers reg byte a Statement [110] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [112] *((byte*)CIA2) = render_init::vicSelectGfxBank1_toDd001_return#0 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a -Statement [113] *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a +Statement [113] *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [114] *BORDER_COLOR = BLACK [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [115] *BG_COLOR = BLACK [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [116] *BG_COLOR1 = *PIECES_COLORS_1 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a @@ -11684,7 +11684,7 @@ Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a Statement [146] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [147] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [148] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a -Statement [149] *VIC_CONTROL = *VIC_CONTROL & $7f [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a +Statement [149] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [150] *RASTER = IRQ_RASTER_FIRST [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [151] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [152] *HARDWARE_IRQ = &sprites_irq [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a @@ -11835,7 +11835,7 @@ Statement [87] if(game_over#22==0) goto main::@4 [ score_bcd render_screen_show# Statement [99] current_piece_gfx#112 = current_piece_gfx#19 [ score_bcd render_screen_show#17 render_screen_render#19 current_movedown_slow#22 current_piece#16 current_piece_char#17 current_orientation#18 current_piece_gfx#19 current_xpos#2 current_ypos#20 game_over#16 next_piece_idx#17 keyboard_events_size#17 current_movedown_counter#15 lines_bcd#16 level#18 level_bcd#18 current_ypos#98 render_screen_render#64 current_xpos#119 current_piece_gfx#112 ] ( main:9 [ score_bcd render_screen_show#17 render_screen_render#19 current_movedown_slow#22 current_piece#16 current_piece_char#17 current_orientation#18 current_piece_gfx#19 current_xpos#2 current_ypos#20 game_over#16 next_piece_idx#17 keyboard_events_size#17 current_movedown_counter#15 lines_bcd#16 level#18 level_bcd#18 current_ypos#98 render_screen_render#64 current_xpos#119 current_piece_gfx#112 ] { { current_ypos#14 = current_ypos#98 } { render_screen_render#35 = render_screen_render#64 } { current_xpos#119 = current_xpos#61 } { current_piece_gfx#112 = current_piece_gfx#66 } { current_piece_char#100 = current_piece_char#70 } } ) always clobbers reg byte a Statement [110] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [112] *((byte*)CIA2) = render_init::vicSelectGfxBank1_toDd001_return#0 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a -Statement [113] *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a +Statement [113] *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [114] *BORDER_COLOR = BLACK [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [115] *BG_COLOR = BLACK [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a Statement [116] *BG_COLOR1 = *PIECES_COLORS_1 [ ] ( main:9::render_init:55 [ score_bcd ] { } ) always clobbers reg byte a @@ -11859,7 +11859,7 @@ Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a Statement [146] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [147] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [148] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a -Statement [149] *VIC_CONTROL = *VIC_CONTROL & $7f [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a +Statement [149] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [150] *RASTER = IRQ_RASTER_FIRST [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [151] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a Statement [152] *HARDWARE_IRQ = &sprites_irq [ ] ( main:9::sprites_irq_init:59 [ score_bcd ] { } ) always clobbers reg byte a @@ -12555,9 +12555,9 @@ ASSEMBLER BEFORE OPTIMIZATION .const CIA_INTERRUPT_CLEAR = $7f // The offset of the sprite pointers from the screen start address .const SPRITE_PTRS = $3f8 - .const VIC_ECM = $40 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_ECM = $40 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // SID Channel Control Register Noise Waveform @@ -12626,7 +12626,7 @@ ASSEMBLER BEFORE OPTIMIZATION .label BG_COLOR1 = $d022 .label BG_COLOR2 = $d023 .label BG_COLOR3 = $d024 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -13296,9 +13296,9 @@ render_init: { jmp __b2 // render_init::@2 __b2: - // [113] *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // [113] *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Enable Extended Background Color Mode - lda #VIC_ECM|VIC_DEN|VIC_RSEL|3 + lda #VICII_ECM|VICII_DEN|VICII_RSEL|3 sta D011 // [114] *BORDER_COLOR = BLACK -- _deref_pbuc1=vbuc2 lda #BLACK @@ -13481,11 +13481,11 @@ sprites_irq_init: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // [149] *VIC_CONTROL = *VIC_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // [149] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 // Set raster line lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // [150] *RASTER = IRQ_RASTER_FIRST -- _deref_pbuc1=vbuc2 lda #IRQ_RASTER_FIRST sta RASTER @@ -16838,10 +16838,10 @@ const nomodify byte* SPRITES_MC = (byte*) 53276 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 const nomodify word SPRITE_PTRS = $3f8 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_RSEL = 8 void __start() byte __start::__init1_toSpritePtr1_return const byte __start::__init1_toSpritePtr1_return#0 __init1_toSpritePtr1_return = (byte)(word)PLAYFIELD_SPRITES/$40 @@ -17615,9 +17615,9 @@ Score: 3343892 .const CIA_INTERRUPT_CLEAR = $7f // The offset of the sprite pointers from the screen start address .const SPRITE_PTRS = $3f8 - .const VIC_ECM = $40 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_ECM = $40 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // SID Channel Control Register Noise Waveform @@ -17686,7 +17686,7 @@ Score: 3343892 .label BG_COLOR1 = $d022 .label BG_COLOR2 = $d023 .label BG_COLOR3 = $d024 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 .label D018 = $d018 // VIC II IRQ Status Register @@ -18307,10 +18307,10 @@ render_init: { lda #vicSelectGfxBank1_toDd001_return sta CIA2 // render_init::@2 - // *D011 = VIC_ECM | VIC_DEN | VIC_RSEL | 3 - // [113] *D011 = VIC_ECM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 + // *D011 = VICII_ECM | VICII_DEN | VICII_RSEL | 3 + // [113] *D011 = VICII_ECM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 // Enable Extended Background Color Mode - lda #VIC_ECM|VIC_DEN|VIC_RSEL|3 + lda #VICII_ECM|VICII_DEN|VICII_RSEL|3 sta D011 // *BORDER_COLOR = BLACK // [114] *BORDER_COLOR = BLACK -- _deref_pbuc1=vbuc2 @@ -18502,12 +18502,12 @@ sprites_irq_init: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL &=0x7f - // [149] *VIC_CONTROL = *VIC_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // *VICII_CONTROL &=0x7f + // [149] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 // Set raster line lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // *RASTER = IRQ_RASTER_FIRST // [150] *RASTER = IRQ_RASTER_FIRST -- _deref_pbuc1=vbuc2 lda #IRQ_RASTER_FIRST diff --git a/src/test/ref/complex/tetris/tetris.sym b/src/test/ref/complex/tetris/tetris.sym index 4a5a23913..e516d739d 100644 --- a/src/test/ref/complex/tetris/tetris.sym +++ b/src/test/ref/complex/tetris/tetris.sym @@ -114,10 +114,10 @@ const nomodify byte* SPRITES_MC = (byte*) 53276 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 const nomodify word SPRITE_PTRS = $3f8 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_ECM = $40 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_ECM = $40 +const nomodify byte VICII_RSEL = 8 void __start() byte __start::__init1_toSpritePtr1_return const byte __start::__init1_toSpritePtr1_return#0 __init1_toSpritePtr1_return = (byte)(word)PLAYFIELD_SPRITES/$40 diff --git a/src/test/ref/examples/bresenham/bitmap-bresenham.asm b/src/test/ref/examples/bresenham/bitmap-bresenham.asm index 56fddc3c8..22b506cf8 100644 --- a/src/test/ref/examples/bresenham/bitmap-bresenham.asm +++ b/src/test/ref/examples/bresenham/bitmap-bresenham.asm @@ -9,14 +9,14 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR = $20 .const OFFSET_STRUCT_MOS6569_VICII_BG_COLOR = $21 .const lines_cnt = 8 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 // The VIC-II MOS 6567/6569 .label VICII = $d000 .label SCREEN = $400 @@ -28,12 +28,12 @@ main: { sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR // VICII->BG_COLOR = 0 sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (char)((((unsigned int)SCREEN&$3fff)/$40)|(((unsigned int)BITMAP&$3fff)/$400)) + // *VICII_MEMORY = (char)((((unsigned int)SCREEN&$3fff)/$40)|(((unsigned int)BITMAP&$3fff)/$400)) lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // bitmap_init(BITMAP) jsr bitmap_init // bitmap_clear() diff --git a/src/test/ref/examples/bresenham/bitmap-bresenham.cfg b/src/test/ref/examples/bresenham/bitmap-bresenham.cfg index f907a9af9..543469551 100644 --- a/src/test/ref/examples/bresenham/bitmap-bresenham.cfg +++ b/src/test/ref/examples/bresenham/bitmap-bresenham.cfg @@ -3,8 +3,8 @@ void main() main: scope:[main] from [0] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = 0 - [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [4] call bitmap_init to:main::@2 main::@2: scope:[main] from main diff --git a/src/test/ref/examples/bresenham/bitmap-bresenham.log b/src/test/ref/examples/bresenham/bitmap-bresenham.log index d93ffe906..310a12d93 100644 --- a/src/test/ref/examples/bresenham/bitmap-bresenham.log +++ b/src/test/ref/examples/bresenham/bitmap-bresenham.log @@ -566,8 +566,8 @@ void main() main: scope:[main] from __start::@1 *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = 0 - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 bitmap_init::bitmap#0 = BITMAP call bitmap_init to:main::@2 @@ -655,10 +655,10 @@ const byte OFFSET_STRUCT_MOS6569_VICII_BG_COLOR = $21 const byte OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR = $20 const nomodify byte* SCREEN = (byte*)$400 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*)$d000 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*)$d018 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*)$d018 +const nomodify byte VICII_RSEL = 8 void __start() void bitmap_clear() bool~ bitmap_clear::$0 @@ -1143,10 +1143,10 @@ Adding number conversion cast (unumber) 1 in bitmap_line_ydxd::$6 = bitmap_line_ Adding number conversion cast (unumber) bitmap_line_ydxd::$6 in bitmap_line_ydxd::$6 = bitmap_line_ydxd::y1#2 + (unumber)1 Adding number conversion cast (unumber) 0 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 Adding number conversion cast (unumber) 0 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = 0 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -Adding number conversion cast (unumber) $3fff in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 +Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&$3fff/$400 Adding number conversion cast (unumber) 1 in lines::$1 = lines::l#3 + 1 Adding number conversion cast (unumber) lines::$1 in lines::$1 = lines::l#3 + (unumber)1 Adding number conversion cast (unumber) 1 in lines::$2 = lines::l#3 + 1 @@ -1154,15 +1154,15 @@ Adding number conversion cast (unumber) lines::$2 in lines::$2 = lines::l#3 + (u Adding number conversion cast (unumber) $400 in init_screen::$0 = init_screen::c#2 != SCREEN+$400 Adding number conversion cast (unumber) $14 in *init_screen::c#3 = $14 Successful SSA optimization PassNAddNumberTypeConversions -Adding number conversion cast (unumber) $40 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 -Adding number conversion cast (unumber) $400 in *VIC_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $40 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/$40|(word)BITMAP&(unumber)$3fff/$400 +Adding number conversion cast (unumber) $400 in *VICII_MEMORY = (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(word)BITMAP&(unumber)$3fff/$400 Successful SSA optimization PassNAddNumberTypeConversions Inlining cast bitmap_init::bits#2 = (unumber)$80 Inlining cast *bitmap_clear::bitmap#2 = (unumber)0 Inlining cast bitmap_plot::plotter#0 = (byte*)bitmap_plot::$0 Inlining cast *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = (unumber)0 Inlining cast *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = (unumber)0 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *init_screen::c#3 = (unumber)$14 Successful SSA optimization Pass2InlineCast Simplifying constant pointer cast (byte*) 53265 @@ -1197,7 +1197,7 @@ Simplifying constant integer cast 1 Simplifying constant integer cast 1 Simplifying constant integer cast 0 Simplifying constant integer cast 0 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $3fff Simplifying constant integer cast $40 @@ -1678,8 +1678,8 @@ void main() main: scope:[main] from [0] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = 0 - [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 + [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [4] call bitmap_init to:main::@2 main::@2: scope:[main] from main @@ -2455,8 +2455,8 @@ REGISTER UPLIFT POTENTIAL REGISTERS Equivalence Class zp[1]:42 [ bitmap_init::$7 ] has ALU potential. Statement [0] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [15] bitmap_plot_xhi[bitmap_init::x#2] = >BITMAP [ bitmap_init::x#2 bitmap_init::bits#3 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:2 [ bitmap_init::x#2 bitmap_init::x#1 ] Removing always clobbered register reg byte a as potential for zp[1]:3 [ bitmap_init::bits#3 bitmap_init::bits#4 bitmap_init::bits#1 ] @@ -2555,8 +2555,8 @@ Removing always clobbered register reg byte y as potential for zp[1]:37 [ bitmap Statement [190] *((byte*)bitmap_plot::plotter#0) = bitmap_plot::$1 [ ] ( lines:10::bitmap_line:61::bitmap_line_ydxi:73::bitmap_plot:130 [ lines::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#0 = bitmap_line_ydxi::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxi::x#0 = bitmap_line_ydxi::x#5 bitmap_line::x1#0 } { bitmap_line_ydxi::y#0 = bitmap_line_ydxi::y#6 bitmap_line::y1#0 } { bitmap_line_ydxi::yd#0 = bitmap_line_ydxi::yd#5 bitmap_line::yd#2 } { bitmap_line_ydxi::y1#0 = bitmap_line_ydxi::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } lines:10::bitmap_line:61::bitmap_line_ydxi:118::bitmap_plot:130 [ lines::l#2 bitmap_line_ydxi::xd#2 bitmap_line_ydxi::yd#5 bitmap_line_ydxi::y1#6 bitmap_line_ydxi::x#3 bitmap_line_ydxi::y#3 bitmap_line_ydxi::e#3 ] { { bitmap_line_ydxi::xd#1 = bitmap_line_ydxi::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxi::x#1 = bitmap_line_ydxi::x#5 bitmap_line::x0#0 } { bitmap_line_ydxi::y#1 = bitmap_line_ydxi::y#6 bitmap_line::y0#0 } { bitmap_line_ydxi::yd#1 = bitmap_line_ydxi::yd#5 bitmap_line::yd#11 } { bitmap_line_ydxi::y1#1 = bitmap_line_ydxi::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#2 = bitmap_plot::x#4 bitmap_line_ydxi::x#3 } { bitmap_plot::y#2 = bitmap_plot::y#4 bitmap_line_ydxi::y#3 } } lines:10::bitmap_line:61::bitmap_line_xdyi:80::bitmap_plot:145 [ lines::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#0 = bitmap_line_xdyi::yd#2 bitmap_line::yd#2 } { bitmap_line_xdyi::x#0 = bitmap_line_xdyi::x#6 bitmap_line::x1#0 } { bitmap_line_xdyi::y#0 = bitmap_line_xdyi::y#5 bitmap_line::y1#0 } { bitmap_line_xdyi::xd#0 = bitmap_line_xdyi::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyi::x1#0 = bitmap_line_xdyi::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } lines:10::bitmap_line:61::bitmap_line_xdyi:124::bitmap_plot:145 [ lines::l#2 bitmap_line_xdyi::yd#2 bitmap_line_xdyi::xd#5 bitmap_line_xdyi::x1#6 bitmap_line_xdyi::x#3 bitmap_line_xdyi::y#3 bitmap_line_xdyi::e#3 ] { { bitmap_line_xdyi::yd#1 = bitmap_line_xdyi::yd#2 bitmap_line::yd#11 } { bitmap_line_xdyi::x#1 = bitmap_line_xdyi::x#6 bitmap_line::x0#0 } { bitmap_line_xdyi::y#1 = bitmap_line_xdyi::y#5 bitmap_line::y0#0 } { bitmap_line_xdyi::xd#1 = bitmap_line_xdyi::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyi::x1#1 = bitmap_line_xdyi::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#0 = bitmap_plot::x#4 bitmap_line_xdyi::x#3 } { bitmap_plot::y#0 = bitmap_plot::y#4 bitmap_line_xdyi::y#3 } } lines:10::bitmap_line:61::bitmap_line_ydxd:88::bitmap_plot:160 [ lines::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#0 = bitmap_line_ydxd::xd#2 bitmap_line::xd#2 } { bitmap_line_ydxd::x#0 = bitmap_line_ydxd::x#5 bitmap_line::x0#0 } { bitmap_line_ydxd::y#0 = bitmap_line_ydxd::y#7 bitmap_line::y0#0 } { bitmap_line_ydxd::yd#0 = bitmap_line_ydxd::yd#5 bitmap_line::yd#1 } { bitmap_line_ydxd::y1#0 = bitmap_line_ydxd::y1#6 bitmap_line::y1#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } lines:10::bitmap_line:61::bitmap_line_ydxd:104::bitmap_plot:160 [ lines::l#2 bitmap_line_ydxd::xd#2 bitmap_line_ydxd::yd#5 bitmap_line_ydxd::y1#6 bitmap_line_ydxd::x#3 bitmap_line_ydxd::y#2 bitmap_line_ydxd::e#3 ] { { bitmap_line_ydxd::xd#1 = bitmap_line_ydxd::xd#2 bitmap_line::xd#1 } { bitmap_line_ydxd::x#1 = bitmap_line_ydxd::x#5 bitmap_line::x1#0 } { bitmap_line_ydxd::y#1 = bitmap_line_ydxd::y#7 bitmap_line::y1#0 } { bitmap_line_ydxd::yd#1 = bitmap_line_ydxd::yd#5 bitmap_line::yd#10 } { bitmap_line_ydxd::y1#1 = bitmap_line_ydxd::y1#6 bitmap_line::y0#0 } { bitmap_plot::x#3 = bitmap_plot::x#4 bitmap_line_ydxd::x#3 } { bitmap_plot::y#3 = bitmap_plot::y#4 bitmap_line_ydxd::y#2 } } lines:10::bitmap_line:61::bitmap_line_xdyd:94::bitmap_plot:175 [ lines::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#0 = bitmap_line_xdyd::yd#2 bitmap_line::yd#1 } { bitmap_line_xdyd::x#0 = bitmap_line_xdyd::x#6 bitmap_line::x1#0 } { bitmap_line_xdyd::y#0 = bitmap_line_xdyd::y#5 bitmap_line::y1#0 } { bitmap_line_xdyd::xd#0 = bitmap_line_xdyd::xd#5 bitmap_line::xd#2 } { bitmap_line_xdyd::x1#0 = bitmap_line_xdyd::x1#6 bitmap_line::x0#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } lines:10::bitmap_line:61::bitmap_line_xdyd:110::bitmap_plot:175 [ lines::l#2 bitmap_line_xdyd::yd#2 bitmap_line_xdyd::xd#5 bitmap_line_xdyd::x1#6 bitmap_line_xdyd::x#3 bitmap_line_xdyd::y#3 bitmap_line_xdyd::e#3 ] { { bitmap_line_xdyd::yd#1 = bitmap_line_xdyd::yd#2 bitmap_line::yd#10 } { bitmap_line_xdyd::x#1 = bitmap_line_xdyd::x#6 bitmap_line::x0#0 } { bitmap_line_xdyd::y#1 = bitmap_line_xdyd::y#5 bitmap_line::y0#0 } { bitmap_line_xdyd::xd#1 = bitmap_line_xdyd::xd#5 bitmap_line::xd#1 } { bitmap_line_xdyd::x1#1 = bitmap_line_xdyd::x1#6 bitmap_line::x1#0 } { bitmap_plot::x#1 = bitmap_plot::x#4 bitmap_line_xdyd::x#3 } { bitmap_plot::y#1 = bitmap_plot::y#4 bitmap_line_xdyd::y#3 } } ) always clobbers reg byte y Statement [0] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 [ ] ( [ ] { } ) always clobbers reg byte a Statement [13] bitmap_init::$0 = bitmap_init::x#2 & $f8 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 bitmap_init::$0 ] { } ) always clobbers reg byte a Statement [15] bitmap_plot_xhi[bitmap_init::x#2] = >BITMAP [ bitmap_init::x#2 bitmap_init::bits#3 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a Statement [16] bitmap_plot_bit[bitmap_init::x#2] = bitmap_init::bits#3 [ bitmap_init::x#2 bitmap_init::bits#3 ] ( bitmap_init:4 [ bitmap_init::x#2 bitmap_init::bits#3 ] { } ) always clobbers reg byte a @@ -2819,14 +2819,14 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR = $20 .const OFFSET_STRUCT_MOS6569_VICII_BG_COLOR = $21 .const lines_cnt = 8 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 // The VIC-II MOS 6567/6569 .label VICII = $d000 .label SCREEN = $400 @@ -2840,12 +2840,12 @@ main: { // [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = 0 -- _deref_pbuc1=vbuc2 lda #0 sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR - // [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // [4] call bitmap_init // [11] phi from main to bitmap_init [phi:main->bitmap_init] bitmap_init_from_main: @@ -3945,10 +3945,10 @@ const byte OFFSET_STRUCT_MOS6569_VICII_BG_COLOR = $21 const byte OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR = $20 const nomodify byte* SCREEN = (byte*) 1024 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 void bitmap_clear() byte* bitmap_clear::bitmap word bitmap_clear::bitmap#0 bitmap zp[2]:11 11.0 @@ -4218,14 +4218,14 @@ Score: 221360 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 .const OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR = $20 .const OFFSET_STRUCT_MOS6569_VICII_BG_COLOR = $21 .const lines_cnt = 8 .label D011 = $d011 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 // The VIC-II MOS 6567/6569 .label VICII = $d000 .label SCREEN = $400 @@ -4240,14 +4240,14 @@ main: { // VICII->BG_COLOR = 0 // [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = 0 -- _deref_pbuc1=vbuc2 sta VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [2] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [2] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 - // *VIC_MEMORY = (char)((((unsigned int)SCREEN&$3fff)/$40)|(((unsigned int)BITMAP&$3fff)/$400)) - // [3] *VIC_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = (char)((((unsigned int)SCREEN&$3fff)/$40)|(((unsigned int)BITMAP&$3fff)/$400)) + // [3] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|(word)BITMAP&$3fff/$400 -- _deref_pbuc1=vbuc2 lda #(SCREEN&$3fff)/$40|(BITMAP&$3fff)/$400 - sta VIC_MEMORY + sta VICII_MEMORY // bitmap_init(BITMAP) // [4] call bitmap_init // [11] phi from main to bitmap_init [phi:main->bitmap_init] diff --git a/src/test/ref/examples/bresenham/bitmap-bresenham.sym b/src/test/ref/examples/bresenham/bitmap-bresenham.sym index c45e9321d..0bc6c3ddc 100644 --- a/src/test/ref/examples/bresenham/bitmap-bresenham.sym +++ b/src/test/ref/examples/bresenham/bitmap-bresenham.sym @@ -4,10 +4,10 @@ const byte OFFSET_STRUCT_MOS6569_VICII_BG_COLOR = $21 const byte OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR = $20 const nomodify byte* SCREEN = (byte*) 1024 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte* VIC_MEMORY = (byte*) 53272 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte* VICII_MEMORY = (byte*) 53272 +const nomodify byte VICII_RSEL = 8 void bitmap_clear() byte* bitmap_clear::bitmap word bitmap_clear::bitmap#0 bitmap zp[2]:11 11.0 diff --git a/src/test/ref/examples/conio/nacht-screen.asm b/src/test/ref/examples/conio/nacht-screen.asm index 51d4f616e..572a54e34 100644 --- a/src/test/ref/examples/conio/nacht-screen.asm +++ b/src/test/ref/examples/conio/nacht-screen.asm @@ -28,7 +28,7 @@ .const CH_RTEE = $73 .const COLOR_GRAY3 = $f .const COLOR_BLACK = 0 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 // Color Ram .label COLORRAM = $d800 // Default address of screen character matrix @@ -100,9 +100,9 @@ conio_c64_init: { rts } main: { - // *VIC_MEMORY = 0x17 + // *VICII_MEMORY = 0x17 lda #$17 - sta VIC_MEMORY + sta VICII_MEMORY // screensize(&XSize, &YSize) jsr screensize // MakeNiceScreen() diff --git a/src/test/ref/examples/conio/nacht-screen.cfg b/src/test/ref/examples/conio/nacht-screen.cfg index 4fa595296..84c97d13e 100644 --- a/src/test/ref/examples/conio/nacht-screen.cfg +++ b/src/test/ref/examples/conio/nacht-screen.cfg @@ -41,7 +41,7 @@ conio_c64_init::@return: scope:[conio_c64_init] from conio_c64_init::@1 void main() main: scope:[main] from __start::@1 - [20] *VIC_MEMORY = $17 + [20] *VICII_MEMORY = $17 [21] call screensize to:main::@3 main::@3: scope:[main] from main diff --git a/src/test/ref/examples/conio/nacht-screen.log b/src/test/ref/examples/conio/nacht-screen.log index 2b320614a..5c1f717f6 100644 --- a/src/test/ref/examples/conio/nacht-screen.log +++ b/src/test/ref/examples/conio/nacht-screen.log @@ -577,7 +577,7 @@ cvlinexy::@return: scope:[cvlinexy] from cvlinexy::@2 void main() main: scope:[main] from __start::@1 - *VIC_MEMORY = $17 + *VICII_MEMORY = $17 screensize::x#0 = &XSize screensize::y#0 = &YSize call screensize @@ -849,7 +849,7 @@ byte MakeTeeLine::Y#2 const byte OFFSET_STRUCT_$0_MSG = 1 const byte OFFSET_STRUCT_$0_Y = 0 const byte SIZEOF_STRUCT_$0 = $29 -const nomodify byte* VIC_MEMORY = (byte*)$d018 +const nomodify byte* VICII_MEMORY = (byte*)$d018 volatile byte XSize loadstore volatile byte YSize loadstore void __start() @@ -1273,7 +1273,7 @@ Adding number conversion cast (unumber) $19 in conio_c64_init::$0 = conio_c64_in Adding number conversion cast (unumber) 0 in gotoxy::x#4 = 0 Adding number conversion cast (unumber) $19-1 in conio_c64_init::line#1 = $19-1 Adding number conversion cast (unumber) 0 in *kbhit::CIA1_PORT_A = 0 -Adding number conversion cast (unumber) $17 in *VIC_MEMORY = $17 +Adding number conversion cast (unumber) $17 in *VICII_MEMORY = $17 Adding number conversion cast (unumber) 0 in main::$5 = 0 != main::$3 Adding number conversion cast (unumber) 0 in cputcxy::x#0 = 0 Adding number conversion cast (unumber) 2 in MakeTeeLine::$1 = XSize - 2 @@ -1317,7 +1317,7 @@ Inlining cast gotoxy::y#1 = (unumber)0 Inlining cast gotoxy::x#4 = (unumber)0 Inlining cast conio_c64_init::line#1 = (unumber)$19-1 Inlining cast *kbhit::CIA1_PORT_A = (unumber)0 -Inlining cast *VIC_MEMORY = (unumber)$17 +Inlining cast *VICII_MEMORY = (unumber)$17 Inlining cast cputcxy::x#0 = (unumber)0 Inlining cast scroll::onoff#0 = (unumber)0 Inlining cast cursor::onoff#0 = (unumber)0 @@ -2089,7 +2089,7 @@ conio_c64_init::@return: scope:[conio_c64_init] from conio_c64_init::@1 void main() main: scope:[main] from __start::@1 - [20] *VIC_MEMORY = $17 + [20] *VICII_MEMORY = $17 [21] call screensize to:main::@3 main::@3: scope:[main] from main @@ -2959,7 +2959,7 @@ Statement [5] conio_textcolor = LIGHT_BLUE [ ] ( [ ] { } ) always clobbers reg Statement [6] conio_scroll_enable = 1 [ ] ( [ ] { } ) always clobbers reg byte a Statement [7] XSize = 0 [ XSize ] ( [ XSize ] { } ) always clobbers reg byte a Statement [8] YSize = 0 [ XSize ] ( [ XSize ] { } ) always clobbers reg byte a -Statement [20] *VIC_MEMORY = $17 [ XSize ] ( main:11 [ XSize ] { } ) always clobbers reg byte a +Statement [20] *VICII_MEMORY = $17 [ XSize ] ( main:11 [ XSize ] { } ) always clobbers reg byte a Statement [41] gotoxy::$7 = (word)gotoxy::y#10 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] ( gotoxy:18 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#4 = gotoxy::y#7 conio_c64_init::line#2 } } conio_c64_init:9::gotoxy:18 [ XSize conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#4 = gotoxy::y#7 conio_c64_init::line#2 } } main:11::MakeNiceScreen:23::cputcxy:64::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 cputcxy::y#0 MakeTeeLine::Y#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 cputcxy::y#0 MakeTeeLine::Y#2 } } main:11::MakeNiceScreen:23::cvlinexy:70::gotoxy:152 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::x#10 = gotoxy::x#6 cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cvlinexy:78::gotoxy:152 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::x#10 = gotoxy::x#6 cvlinexy::x#2 cvlinexy::x#1 } } main:11::MakeNiceScreen:23::cputsxy:96::gotoxy:172 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 conio_textcolor conio_scroll_enable cputsxy::s#0 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#3 = gotoxy::y#7 cputsxy::y#0 } { gotoxy::x#10 = gotoxy::x#3 cputsxy::x#0 MakeNiceScreen::X#1 } } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::gotoxy:192 [ XSize conio_textcolor conio_scroll_enable cvline::x#0 cvline::i#2 cvline::y#1 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#5 = gotoxy::y#7 cvline::y#1 } { gotoxy::x#10 = gotoxy::x#5 cvline::x#0 } } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::gotoxy:192 [ XSize conio_textcolor conio_scroll_enable cvline::x#0 cvline::i#2 cvline::y#1 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cvlinexy::x#1 = cvlinexy::x#2 } { gotoxy::y#5 = gotoxy::y#7 cvline::y#1 } { gotoxy::x#10 = gotoxy::x#5 cvline::x#0 } } main:11::MakeNiceScreen:23::cputc:68::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputc:72::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputc:76::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputcxy:64::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::chline:66::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#1 = chline::length#4 } } main:11::MakeNiceScreen:23::chline:74::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#2 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::chline:160::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::chline:160::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputc:162::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputc:162::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::cputc:188::cputln:146::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::cputc:188::cputln:146::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cvlinexy::x#1 = cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cputsxy:96::cputs:174::cputc:201::cputln:146::cscroll:180::gotoxy:205 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 cputs::s#0 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputsxy::x#0 = MakeNiceScreen::X#1 } { cputs::s#1 = cputsxy::s#0 } { cputc::c#0 = cputc::c#8 cputs::c#1 } } main:11::MakeNiceScreen:23::cputc:68::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputc:72::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputc:76::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputcxy:64::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::chline:66::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#1 = chline::length#4 } } main:11::MakeNiceScreen:23::chline:74::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#2 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::chline:160::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::chline:160::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputc:162::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputc:162::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::cputc:188::cputln:149::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::cputc:188::cputln:149::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cvlinexy::x#1 = cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cputsxy:96::cputs:174::cputc:201::cputln:149::cscroll:180::gotoxy:205 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 cputs::s#0 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputsxy::x#0 = MakeNiceScreen::X#1 } { cputs::s#1 = cputsxy::s#0 } { cputc::c#0 = cputc::c#8 cputs::c#1 } } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:15 [ cputcxy::c#2 ] Removing always clobbered register reg byte a as potential for zp[1]:5 [ MakeNiceScreen::I#3 MakeNiceScreen::I#2 ] @@ -3043,7 +3043,7 @@ Statement [5] conio_textcolor = LIGHT_BLUE [ ] ( [ ] { } ) always clobbers reg Statement [6] conio_scroll_enable = 1 [ ] ( [ ] { } ) always clobbers reg byte a Statement [7] XSize = 0 [ XSize ] ( [ XSize ] { } ) always clobbers reg byte a Statement [8] YSize = 0 [ XSize ] ( [ XSize ] { } ) always clobbers reg byte a -Statement [20] *VIC_MEMORY = $17 [ XSize ] ( main:11 [ XSize ] { } ) always clobbers reg byte a +Statement [20] *VICII_MEMORY = $17 [ XSize ] ( main:11 [ XSize ] { } ) always clobbers reg byte a Statement [41] gotoxy::$7 = (word)gotoxy::y#10 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] ( gotoxy:18 [ conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#4 = gotoxy::y#7 conio_c64_init::line#2 } } conio_c64_init:9::gotoxy:18 [ XSize conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#4 = gotoxy::y#7 conio_c64_init::line#2 } } main:11::MakeNiceScreen:23::cputcxy:64::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 cputcxy::y#0 MakeTeeLine::Y#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 cputcxy::y#0 MakeTeeLine::Y#2 } } main:11::MakeNiceScreen:23::cvlinexy:70::gotoxy:152 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::x#10 = gotoxy::x#6 cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cvlinexy:78::gotoxy:152 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::x#10 = gotoxy::x#6 cvlinexy::x#2 cvlinexy::x#1 } } main:11::MakeNiceScreen:23::cputsxy:96::gotoxy:172 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 conio_textcolor conio_scroll_enable cputsxy::s#0 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#3 = gotoxy::y#7 cputsxy::y#0 } { gotoxy::x#10 = gotoxy::x#3 cputsxy::x#0 MakeNiceScreen::X#1 } } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::gotoxy:192 [ XSize conio_textcolor conio_scroll_enable cvline::x#0 cvline::i#2 cvline::y#1 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { gotoxy::y#5 = gotoxy::y#7 cvline::y#1 } { gotoxy::x#10 = gotoxy::x#5 cvline::x#0 } } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::gotoxy:192 [ XSize conio_textcolor conio_scroll_enable cvline::x#0 cvline::i#2 cvline::y#1 conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cvlinexy::x#1 = cvlinexy::x#2 } { gotoxy::y#5 = gotoxy::y#7 cvline::y#1 } { gotoxy::x#10 = gotoxy::x#5 cvline::x#0 } } main:11::MakeNiceScreen:23::cputc:68::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputc:72::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputc:76::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputcxy:64::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::chline:66::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#1 = chline::length#4 } } main:11::MakeNiceScreen:23::chline:74::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#2 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::chline:160::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::chline:160::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputc:162::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputc:162::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::cputc:188::cputln:146::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::cputc:188::cputln:146::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cvlinexy::x#1 = cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cputsxy:96::cputs:174::cputc:201::cputln:146::cscroll:180::gotoxy:205 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 cputs::s#0 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputsxy::x#0 = MakeNiceScreen::X#1 } { cputs::s#1 = cputsxy::s#0 } { cputc::c#0 = cputc::c#8 cputs::c#1 } } main:11::MakeNiceScreen:23::cputc:68::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputc:72::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputc:76::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cputcxy:64::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::chline:66::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#1 = chline::length#4 } } main:11::MakeNiceScreen:23::chline:74::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#2 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::chline:160::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::chline:160::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputc:162::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputc:162::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::cputc:188::cputln:149::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::cputc:188::cputln:149::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cvlinexy::x#1 = cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cputsxy:96::cputs:174::cputc:201::cputln:149::cscroll:180::gotoxy:205 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 cputs::s#0 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 ] { { cputsxy::x#0 = MakeNiceScreen::X#1 } { cputs::s#1 = cputsxy::s#0 } { cputc::c#0 = cputc::c#8 cputs::c#1 } } ) always clobbers reg byte a Statement [42] gotoxy::$8 = gotoxy::$7 << 2 [ conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] ( gotoxy:18 [ conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#4 = gotoxy::y#7 conio_c64_init::line#2 } } conio_c64_init:9::gotoxy:18 [ XSize conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#4 = gotoxy::y#7 conio_c64_init::line#2 } } main:11::MakeNiceScreen:23::cputcxy:64::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 cputcxy::y#0 MakeTeeLine::Y#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 cputcxy::y#0 MakeTeeLine::Y#2 } } main:11::MakeNiceScreen:23::cvlinexy:70::gotoxy:152 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::x#10 = gotoxy::x#6 cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cvlinexy:78::gotoxy:152 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::x#10 = gotoxy::x#6 cvlinexy::x#2 cvlinexy::x#1 } } main:11::MakeNiceScreen:23::cputsxy:96::gotoxy:172 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 conio_textcolor conio_scroll_enable cputsxy::s#0 conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#3 = gotoxy::y#7 cputsxy::y#0 } { gotoxy::x#10 = gotoxy::x#3 cputsxy::x#0 MakeNiceScreen::X#1 } } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::gotoxy:192 [ XSize conio_textcolor conio_scroll_enable cvline::x#0 cvline::i#2 cvline::y#1 conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { gotoxy::y#5 = gotoxy::y#7 cvline::y#1 } { gotoxy::x#10 = gotoxy::x#5 cvline::x#0 } } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::gotoxy:192 [ XSize conio_textcolor conio_scroll_enable cvline::x#0 cvline::i#2 cvline::y#1 conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cvlinexy::x#1 = cvlinexy::x#2 } { gotoxy::y#5 = gotoxy::y#7 cvline::y#1 } { gotoxy::x#10 = gotoxy::x#5 cvline::x#0 } } main:11::MakeNiceScreen:23::cputc:68::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cputc:72::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cputc:76::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cputcxy:64::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::chline:66::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { chline::length#1 = chline::length#4 } } main:11::MakeNiceScreen:23::chline:74::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { chline::length#2 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::chline:160::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::chline:160::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputc:162::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputc:162::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::cputc:188::cputln:146::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::cputc:188::cputln:146::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cvlinexy::x#1 = cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cputsxy:96::cputs:174::cputc:201::cputln:146::cscroll:180::gotoxy:205 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 cputs::s#0 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cputsxy::x#0 = MakeNiceScreen::X#1 } { cputs::s#1 = cputsxy::s#0 } { cputc::c#0 = cputc::c#8 cputs::c#1 } } main:11::MakeNiceScreen:23::cputc:68::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cputc:72::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cputc:76::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cputcxy:64::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::chline:66::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { chline::length#1 = chline::length#4 } } main:11::MakeNiceScreen:23::chline:74::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { chline::length#2 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::chline:160::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::chline:160::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputc:162::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputc:162::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::cputc:188::cputln:149::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::cputc:188::cputln:149::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cvlinexy::x#1 = cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cputsxy:96::cputs:174::cputc:201::cputln:149::cscroll:180::gotoxy:205 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 cputs::s#0 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$7 gotoxy::$8 ] { { cputsxy::x#0 = MakeNiceScreen::X#1 } { cputs::s#1 = cputsxy::s#0 } { cputc::c#0 = cputc::c#8 cputs::c#1 } } ) always clobbers reg byte a Statement [43] gotoxy::$9 = gotoxy::$8 + gotoxy::$7 [ conio_cursor_x conio_cursor_y gotoxy::$9 ] ( gotoxy:18 [ conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#4 = gotoxy::y#7 conio_c64_init::line#2 } } conio_c64_init:9::gotoxy:18 [ XSize conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#4 = gotoxy::y#7 conio_c64_init::line#2 } } main:11::MakeNiceScreen:23::cputcxy:64::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 cputcxy::y#0 MakeTeeLine::Y#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::gotoxy:128 [ XSize conio_textcolor conio_scroll_enable cputcxy::c#2 conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#2 = gotoxy::y#7 cputcxy::y#2 cputcxy::y#0 MakeTeeLine::Y#2 } } main:11::MakeNiceScreen:23::cvlinexy:70::gotoxy:152 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::x#10 = gotoxy::x#6 cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cvlinexy:78::gotoxy:152 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::x#10 = gotoxy::x#6 cvlinexy::x#2 cvlinexy::x#1 } } main:11::MakeNiceScreen:23::cputsxy:96::gotoxy:172 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 conio_textcolor conio_scroll_enable cputsxy::s#0 conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#3 = gotoxy::y#7 cputsxy::y#0 } { gotoxy::x#10 = gotoxy::x#3 cputsxy::x#0 MakeNiceScreen::X#1 } } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::gotoxy:192 [ XSize conio_textcolor conio_scroll_enable cvline::x#0 cvline::i#2 cvline::y#1 conio_cursor_x conio_cursor_y gotoxy::$9 ] { { gotoxy::y#5 = gotoxy::y#7 cvline::y#1 } { gotoxy::x#10 = gotoxy::x#5 cvline::x#0 } } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::gotoxy:192 [ XSize conio_textcolor conio_scroll_enable cvline::x#0 cvline::i#2 cvline::y#1 conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cvlinexy::x#1 = cvlinexy::x#2 } { gotoxy::y#5 = gotoxy::y#7 cvline::y#1 } { gotoxy::x#10 = gotoxy::x#5 cvline::x#0 } } main:11::MakeNiceScreen:23::cputc:68::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cputc:72::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cputc:76::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cputcxy:64::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::cputc:130::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::chline:66::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { chline::length#1 = chline::length#4 } } main:11::MakeNiceScreen:23::chline:74::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { chline::length#2 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::chline:160::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::chline:160::cputc:137::cputln:146::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputc:162::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputc:162::cputln:146::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::cputc:188::cputln:146::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::cputc:188::cputln:146::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cvlinexy::x#1 = cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cputsxy:96::cputs:174::cputc:201::cputln:146::cscroll:180::gotoxy:205 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 cputs::s#0 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cputsxy::x#0 = MakeNiceScreen::X#1 } { cputs::s#1 = cputsxy::s#0 } { cputc::c#0 = cputc::c#8 cputs::c#1 } } main:11::MakeNiceScreen:23::cputc:68::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cputc:72::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cputc:76::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cputcxy:64::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputcxy:158::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputcxy:158::cputc:130::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cputcxy::y#0 = cputcxy::y#2 MakeTeeLine::Y#2 } { cputc::c#1 = cputc::c#8 cputcxy::c#2 } } main:11::MakeNiceScreen:23::chline:66::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { chline::length#1 = chline::length#4 } } main:11::MakeNiceScreen:23::chline:74::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { chline::length#2 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::chline:160::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:82::chline:160::cputc:137::cputln:149::cscroll:180::gotoxy:205 [ XSize chline::length#4 chline::i#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { chline::length#0 = chline::length#4 } } main:11::MakeNiceScreen:23::MakeTeeLine:80::cputc:162::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::MakeTeeLine:82::cputc:162::cputln:149::cscroll:180::gotoxy:205 [ XSize conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cvlinexy:70::cvline:154::cputc:188::cputln:149::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { } main:11::MakeNiceScreen:23::cvlinexy:78::cvline:154::cputc:188::cputln:149::cscroll:180::gotoxy:205 [ XSize cvline::x#0 cvline::i#2 cvline::y#2 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cvlinexy::x#1 = cvlinexy::x#2 } } main:11::MakeNiceScreen:23::cputsxy:96::cputs:174::cputc:201::cputln:149::cscroll:180::gotoxy:205 [ XSize MakeNiceScreen::I#3 MakeNiceScreen::T#3 cputs::s#0 conio_textcolor conio_scroll_enable conio_cursor_x conio_cursor_y gotoxy::$9 ] { { cputsxy::x#0 = MakeNiceScreen::X#1 } { cputs::s#1 = cputsxy::s#0 } { cputc::c#0 = cputc::c#8 cputs::c#1 } } ) always clobbers reg byte a @@ -3315,7 +3315,7 @@ ASSEMBLER BEFORE OPTIMIZATION .const CH_RTEE = $73 .const COLOR_GRAY3 = $f .const COLOR_BLACK = 0 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 // Color Ram .label COLORRAM = $d800 // Default address of screen character matrix @@ -3427,9 +3427,9 @@ conio_c64_init: { } // main main: { - // [20] *VIC_MEMORY = $17 -- _deref_pbuc1=vbuc2 + // [20] *VICII_MEMORY = $17 -- _deref_pbuc1=vbuc2 lda #$17 - sta VIC_MEMORY + sta VICII_MEMORY // [21] call screensize jsr screensize // [22] phi from main to main::@3 [phi:main->main::@3] @@ -5001,7 +5001,7 @@ byte MakeNiceScreen::X#1 reg byte x 1001.0 void MakeTeeLine(byte MakeTeeLine::Y) byte MakeTeeLine::Y byte MakeTeeLine::Y#2 reg byte a 1001.0 -const nomodify byte* VIC_MEMORY = (byte*) 53272 +const nomodify byte* VICII_MEMORY = (byte*) 53272 volatile byte XSize loadstore zp[1]:21 38.45 volatile byte YSize loadstore zp[1]:22 20.0 void __start() @@ -5258,7 +5258,7 @@ Score: 114551 .const CH_RTEE = $73 .const COLOR_GRAY3 = $f .const COLOR_BLACK = 0 - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 // Color Ram .label COLORRAM = $d800 // Default address of screen character matrix @@ -5364,10 +5364,10 @@ conio_c64_init: { } // main main: { - // *VIC_MEMORY = 0x17 - // [20] *VIC_MEMORY = $17 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = 0x17 + // [20] *VICII_MEMORY = $17 -- _deref_pbuc1=vbuc2 lda #$17 - sta VIC_MEMORY + sta VICII_MEMORY // screensize(&XSize, &YSize) // [21] call screensize jsr screensize diff --git a/src/test/ref/examples/conio/nacht-screen.sym b/src/test/ref/examples/conio/nacht-screen.sym index 2c6638dd1..421777a6f 100644 --- a/src/test/ref/examples/conio/nacht-screen.sym +++ b/src/test/ref/examples/conio/nacht-screen.sym @@ -27,7 +27,7 @@ byte MakeNiceScreen::X#1 reg byte x 1001.0 void MakeTeeLine(byte MakeTeeLine::Y) byte MakeTeeLine::Y byte MakeTeeLine::Y#2 reg byte a 1001.0 -const nomodify byte* VIC_MEMORY = (byte*) 53272 +const nomodify byte* VICII_MEMORY = (byte*) 53272 volatile byte XSize loadstore zp[1]:21 38.45 volatile byte YSize loadstore zp[1]:22 20.0 void __start() diff --git a/src/test/ref/examples/irq/irq-hyperscreen.asm b/src/test/ref/examples/irq/irq-hyperscreen.asm index b0919149b..25cb4071f 100644 --- a/src/test/ref/examples/irq/irq-hyperscreen.asm +++ b/src/test/ref/examples/irq/irq-hyperscreen.asm @@ -12,7 +12,7 @@ :BasicUpstart(main) // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_RSEL = 8 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -45,9 +45,9 @@ irq_bottom_2: { // VICII->BORDER_COLOR = WHITE lda #WHITE sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR - // VICII->CONTROL1 |= VIC_RSEL + // VICII->CONTROL1 |= VICII_RSEL // Set screen height back to 25 lines (preparing for the next screen) - lda #VIC_RSEL + lda #VICII_RSEL ora VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 // VICII->IRQ_STATUS = IRQ_RASTER @@ -77,9 +77,9 @@ irq_bottom_1: { // VICII->BORDER_COLOR = WHITE lda #WHITE sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR - // VICII->CONTROL1 &= ($ff^VIC_RSEL) + // VICII->CONTROL1 &= ($ff^VICII_RSEL) // Set screen height to 24 lines - this is done after the border should have started drawing - so it wont start - lda #$ff^VIC_RSEL + lda #$ff^VICII_RSEL and VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 // VICII->IRQ_STATUS = IRQ_RASTER diff --git a/src/test/ref/examples/irq/irq-hyperscreen.cfg b/src/test/ref/examples/irq/irq-hyperscreen.cfg index 9c931811c..41190dd1c 100644 --- a/src/test/ref/examples/irq/irq-hyperscreen.cfg +++ b/src/test/ref/examples/irq/irq-hyperscreen.cfg @@ -2,7 +2,7 @@ __interrupt(hardware_clobber) void irq_bottom_2() irq_bottom_2: scope:[irq_bottom_2] from [0] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE - [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VIC_RSEL + [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_RSEL [2] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [3] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa [4] *HARDWARE_IRQ = &irq_bottom_1 @@ -15,7 +15,7 @@ irq_bottom_2::@return: scope:[irq_bottom_2] from irq_bottom_2 __interrupt(hardware_clobber) void irq_bottom_1() irq_bottom_1: scope:[irq_bottom_1] from [7] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE - [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VIC_RSEL + [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VICII_RSEL [9] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [10] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fd [11] *HARDWARE_IRQ = &irq_bottom_2 diff --git a/src/test/ref/examples/irq/irq-hyperscreen.log b/src/test/ref/examples/irq/irq-hyperscreen.log index 1446eb82d..78cbeeab4 100644 --- a/src/test/ref/examples/irq/irq-hyperscreen.log +++ b/src/test/ref/examples/irq/irq-hyperscreen.log @@ -26,7 +26,7 @@ main::@return: scope:[main] from __interrupt(hardware_clobber) void irq_bottom_1() irq_bottom_1: scope:[irq_bottom_1] from *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE - *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VIC_RSEL + *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VICII_RSEL *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fd *HARDWARE_IRQ = &irq_bottom_2 @@ -39,7 +39,7 @@ irq_bottom_1::@return: scope:[irq_bottom_1] from irq_bottom_1 __interrupt(hardware_clobber) void irq_bottom_2() irq_bottom_2: scope:[irq_bottom_2] from *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE - *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VIC_RSEL + *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_RSEL *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa *HARDWARE_IRQ = &irq_bottom_1 @@ -77,7 +77,7 @@ const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte RED = 2 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*)$d000 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() __interrupt(hardware_clobber) void irq_bottom_1() @@ -87,8 +87,8 @@ void main() Adding number conversion cast (unumber) 0 in *GHOST_BYTE = 0 Adding number conversion cast (unumber) $7f in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $7f Adding number conversion cast (unumber) $fa in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa -Adding number conversion cast (unumber) $ff^VIC_RSEL in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VIC_RSEL -Adding number conversion cast (unumber) $ff in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & (unumber)$ff^VIC_RSEL +Adding number conversion cast (unumber) $ff^VICII_RSEL in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VICII_RSEL +Adding number conversion cast (unumber) $ff in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & (unumber)$ff^VICII_RSEL Adding number conversion cast (unumber) $fd in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fd Adding number conversion cast (unumber) $fa in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa Successful SSA optimization PassNAddNumberTypeConversions @@ -106,7 +106,7 @@ Simplifying constant pointer cast (byte*) 16383 Simplifying constant integer cast 0 Simplifying constant integer cast $7f Simplifying constant integer cast $fa -Simplifying constant integer cast (unumber)$ff^VIC_RSEL +Simplifying constant integer cast (unumber)$ff^VICII_RSEL Simplifying constant integer cast $ff Simplifying constant integer cast $fd Simplifying constant integer cast $fa @@ -137,7 +137,7 @@ FINAL CONTROL FLOW GRAPH __interrupt(hardware_clobber) void irq_bottom_2() irq_bottom_2: scope:[irq_bottom_2] from [0] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE - [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VIC_RSEL + [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_RSEL [2] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [3] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa [4] *HARDWARE_IRQ = &irq_bottom_1 @@ -150,7 +150,7 @@ irq_bottom_2::@return: scope:[irq_bottom_2] from irq_bottom_2 __interrupt(hardware_clobber) void irq_bottom_1() irq_bottom_1: scope:[irq_bottom_1] from [7] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE - [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VIC_RSEL + [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VICII_RSEL [9] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [10] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fd [11] *HARDWARE_IRQ = &irq_bottom_2 @@ -187,14 +187,14 @@ Initial phi equivalence classes Complete equivalence classes REGISTER UPLIFT POTENTIAL REGISTERS Statement [0] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE [ ] ( [ ] { } ) always clobbers reg byte a -Statement [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VIC_RSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_RSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [2] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fa [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *HARDWARE_IRQ = &irq_bottom_1 [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = RED [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y Statement [7] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE [ ] ( [ ] { } ) always clobbers reg byte a -Statement [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VIC_RSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VICII_RSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER) = $fd [ ] ( [ ] { } ) always clobbers reg byte a Statement [11] *HARDWARE_IRQ = &irq_bottom_2 [ ] ( [ ] { } ) always clobbers reg byte a @@ -246,7 +246,7 @@ ASSEMBLER BEFORE OPTIMIZATION // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_RSEL = 8 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -281,9 +281,9 @@ irq_bottom_2: { // [0] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE -- _deref_pbuc1=vbuc2 lda #WHITE sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR - // [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VIC_RSEL -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_RSEL -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set screen height back to 25 lines (preparing for the next screen) - lda #VIC_RSEL + lda #VICII_RSEL ora VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 // [2] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER -- _deref_pbuc1=vbuc2 @@ -319,9 +319,9 @@ irq_bottom_1: { // [7] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE -- _deref_pbuc1=vbuc2 lda #WHITE sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR - // [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VIC_RSEL -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VICII_RSEL -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 // Set screen height to 24 lines - this is done after the border should have started drawing - so it wont start - lda #$ff^VIC_RSEL + lda #$ff^VICII_RSEL and VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 // [9] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_IRQ_STATUS) = IRQ_RASTER -- _deref_pbuc1=vbuc2 @@ -427,7 +427,7 @@ const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte RED = 2 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 __interrupt(hardware_clobber) void irq_bottom_1() __interrupt(hardware_clobber) void irq_bottom_2() @@ -455,7 +455,7 @@ Score: 424 // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_RSEL = 8 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written @@ -491,10 +491,10 @@ irq_bottom_2: { // [0] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE -- _deref_pbuc1=vbuc2 lda #WHITE sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR - // VICII->CONTROL1 |= VIC_RSEL - // [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VIC_RSEL -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // VICII->CONTROL1 |= VICII_RSEL + // [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_RSEL -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set screen height back to 25 lines (preparing for the next screen) - lda #VIC_RSEL + lda #VICII_RSEL ora VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 // VICII->IRQ_STATUS = IRQ_RASTER @@ -534,10 +534,10 @@ irq_bottom_1: { // [7] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = WHITE -- _deref_pbuc1=vbuc2 lda #WHITE sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR - // VICII->CONTROL1 &= ($ff^VIC_RSEL) - // [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VIC_RSEL -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // VICII->CONTROL1 &= ($ff^VICII_RSEL) + // [8] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) & $ff^VICII_RSEL -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 // Set screen height to 24 lines - this is done after the border should have started drawing - so it wont start - lda #$ff^VIC_RSEL + lda #$ff^VICII_RSEL and VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 sta VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1 // VICII->IRQ_STATUS = IRQ_RASTER diff --git a/src/test/ref/examples/irq/irq-hyperscreen.sym b/src/test/ref/examples/irq/irq-hyperscreen.sym index 29507bb1a..34068f95d 100644 --- a/src/test/ref/examples/irq/irq-hyperscreen.sym +++ b/src/test/ref/examples/irq/irq-hyperscreen.sym @@ -15,7 +15,7 @@ const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte RED = 2 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 __interrupt(hardware_clobber) void irq_bottom_1() __interrupt(hardware_clobber) void irq_bottom_2() diff --git a/src/test/ref/examples/multiplexer/simple-multiplexer.asm b/src/test/ref/examples/multiplexer/simple-multiplexer.asm index e68bcb2b1..658f8cc4a 100644 --- a/src/test/ref/examples/multiplexer/simple-multiplexer.asm +++ b/src/test/ref/examples/multiplexer/simple-multiplexer.asm @@ -10,9 +10,9 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(__start) - .const VIC_RST8 = $80 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_RST8 = $80 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // The colors of the C64 .const BLACK = 0 .const GREEN = 5 @@ -75,8 +75,8 @@ main: { init: { // Set the x-positions & pointers .label xp = 2 - // *D011 = VIC_DEN | VIC_RSEL | 3 - lda #VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_DEN | VICII_RSEL | 3 + lda #VICII_DEN|VICII_RSEL|3 sta D011 // plexInit(SCREEN) // Initialize the multiplexer @@ -164,10 +164,10 @@ loop: { lda #BLACK sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR __b6: - // *D011&VIC_RST8 - lda #VIC_RST8 + // *D011&VICII_RST8 + lda #VICII_RST8 and D011 - // while((*D011&VIC_RST8)!=0) + // while((*D011&VICII_RST8)!=0) cmp #0 bne __b6 lda #0 diff --git a/src/test/ref/examples/multiplexer/simple-multiplexer.cfg b/src/test/ref/examples/multiplexer/simple-multiplexer.cfg index 4243842fa..d017d745b 100644 --- a/src/test/ref/examples/multiplexer/simple-multiplexer.cfg +++ b/src/test/ref/examples/multiplexer/simple-multiplexer.cfg @@ -33,7 +33,7 @@ main::@return: scope:[main] from main::@1 void init() init: scope:[init] from main - [14] *D011 = VIC_DEN|VIC_RSEL|3 + [14] *D011 = VICII_DEN|VICII_RSEL|3 [15] call plexInit to:init::@1 init::@1: scope:[init] from init init::@1 @@ -90,7 +90,7 @@ loop::@11: scope:[loop] from loop::@5 [42] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK to:loop::@6 loop::@6: scope:[loop] from loop::@11 loop::@6 - [43] loop::$5 = *D011 & VIC_RST8 + [43] loop::$5 = *D011 & VICII_RST8 [44] if(loop::$5!=0) goto loop::@6 to:loop::@7 loop::@7: scope:[loop] from loop::@12 loop::@6 diff --git a/src/test/ref/examples/multiplexer/simple-multiplexer.log b/src/test/ref/examples/multiplexer/simple-multiplexer.log index 0110b34c1..0f2e95e66 100644 --- a/src/test/ref/examples/multiplexer/simple-multiplexer.log +++ b/src/test/ref/examples/multiplexer/simple-multiplexer.log @@ -167,7 +167,7 @@ main::@return: scope:[main] from main::@2 void init() init: scope:[init] from main - *D011 = VIC_DEN|VIC_RSEL|3 + *D011 = VICII_DEN|VICII_RSEL|3 plexInit::screen#0 = SCREEN call plexInit to:init::@4 @@ -242,7 +242,7 @@ loop::@13: scope:[loop] from loop::@5 to:loop::@6 loop::@6: scope:[loop] from loop::@13 loop::@6 loop::sin_idx#16 = phi( loop::@13/loop::sin_idx#17, loop::@6/loop::sin_idx#16 ) - loop::$5 = *D011 & VIC_RST8 + loop::$5 = *D011 & VICII_RST8 loop::$6 = loop::$5 != 0 if(loop::$6) goto loop::@6 to:loop::@7 @@ -346,9 +346,9 @@ const nomodify byte* SPRITES_XMSB = (byte*)$d010 const nomodify byte* SPRITES_XPOS = (byte*)$d000 const nomodify byte* SPRITES_YPOS = (byte*)$d001 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*)$d000 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 -const nomodify byte VIC_RST8 = $80 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 +const nomodify byte VICII_RST8 = $80 const byte* YSIN[$100] = kickasm {{ .var min = 50 .var max = 250-21 .var ampl = max-min; @@ -538,8 +538,8 @@ Adding number conversion cast (unumber) plexShowSprite::$6 in plexShowSprite::$6 Adding number conversion cast (unumber) 1 in plex_sprite_msb = plex_sprite_msb << 1 Adding number conversion cast (unumber) 0 in plexShowSprite::$7 = plex_sprite_msb == 0 Adding number conversion cast (unumber) 1 in plex_sprite_msb = 1 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|3 in *D011 = VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|3 in *D011 = VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) $40 in PLEX_PTR[init::sx#2] = (byte)SPRITE/$40 Adding number conversion cast (unumber) 9 in init::xp#1 = init::xp#2 + 9 Adding number conversion cast (unumber) 1 in init::sx#1 = init::sx#2 + rangenext(0,PLEX_COUNT-1) @@ -557,7 +557,7 @@ Inlining cast plex_sprite_msb = (unumber)1 Inlining cast PLEX_FREE_YPOS[plexSort::plexFreePrepare1_s#2] = (unumber)0 Inlining cast plex_free_next = (unumber)0 Inlining cast plex_sprite_msb = (unumber)1 -Inlining cast *D011 = (unumber)VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_SPRITES_ENABLE) = (unumber)$ff Successful SSA optimization Pass2InlineCast Simplifying constant pointer cast (byte*) 53248 @@ -589,7 +589,7 @@ Simplifying constant integer cast 7 Simplifying constant integer cast 1 Simplifying constant integer cast 0 Simplifying constant integer cast 1 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $40 Simplifying constant integer cast 9 @@ -945,7 +945,7 @@ main::@return: scope:[main] from main::@1 void init() init: scope:[init] from main - [14] *D011 = VIC_DEN|VIC_RSEL|3 + [14] *D011 = VICII_DEN|VICII_RSEL|3 [15] call plexInit to:init::@1 init::@1: scope:[init] from init init::@1 @@ -1002,7 +1002,7 @@ loop::@11: scope:[loop] from loop::@5 [42] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK to:loop::@6 loop::@6: scope:[loop] from loop::@11 loop::@6 - [43] loop::$5 = *D011 & VIC_RST8 + [43] loop::$5 = *D011 & VICII_RST8 [44] if(loop::$5!=0) goto loop::@6 to:loop::@7 loop::@7: scope:[loop] from loop::@12 loop::@6 @@ -1327,7 +1327,7 @@ Statement [2] plex_show_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] plex_sprite_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] plex_sprite_msb = 1 [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] plex_free_next = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [14] *D011 = VIC_DEN|VIC_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a +Statement [14] *D011 = VICII_DEN|VICII_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a Statement [17] PLEX_PTR[init::sx#2] = (byte)SPRITE/$40 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:2 [ init::sx#2 init::sx#1 ] Statement [18] init::$3 = init::sx#2 << 1 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 init::$3 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 init::$3 ] { } ) always clobbers reg byte a @@ -1343,7 +1343,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:7 [ loop::y Removing always clobbered register reg byte a as potential for zp[1]:8 [ loop::sy#2 loop::sy#1 ] Statement [36] loop::y_idx#1 = loop::y_idx#2 + 8 [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::sy#2 loop::y_idx#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::sy#2 loop::y_idx#1 ] { } ) always clobbers reg byte a Statement [42] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 ] { } ) always clobbers reg byte a -Statement [43] loop::$5 = *D011 & VIC_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] { } ) always clobbers reg byte a +Statement [43] loop::$5 = *D011 & VICII_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] { } ) always clobbers reg byte a Statement [46] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:9 [ loop::ss#5 loop::ss#1 ] Statement [47] loop::plexFreeNextYpos1_return#0 = PLEX_FREE_YPOS[plex_free_next] [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 loop::plexFreeNextYpos1_return#0 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 loop::plexFreeNextYpos1_return#0 ] { } ) always clobbers reg byte y @@ -1390,7 +1390,7 @@ Statement [2] plex_show_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] plex_sprite_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] plex_sprite_msb = 1 [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] plex_free_next = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [14] *D011 = VIC_DEN|VIC_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a +Statement [14] *D011 = VICII_DEN|VICII_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a Statement [17] PLEX_PTR[init::sx#2] = (byte)SPRITE/$40 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a Statement [18] init::$3 = init::sx#2 << 1 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 init::$3 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 init::$3 ] { } ) always clobbers reg byte a Statement [19] PLEX_XPOS[init::$3] = init::xp#2 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a @@ -1401,7 +1401,7 @@ Statement [31] if(*((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER)!=$ff) goto Statement [35] PLEX_YPOS[loop::sy#2] = YSIN[loop::y_idx#2] [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::y_idx#2 loop::sy#2 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::y_idx#2 loop::sy#2 ] { } ) always clobbers reg byte a Statement [36] loop::y_idx#1 = loop::y_idx#2 + 8 [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::sy#2 loop::y_idx#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::sy#2 loop::y_idx#1 ] { } ) always clobbers reg byte a Statement [42] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 ] { } ) always clobbers reg byte a -Statement [43] loop::$5 = *D011 & VIC_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] { } ) always clobbers reg byte a +Statement [43] loop::$5 = *D011 & VICII_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] { } ) always clobbers reg byte a Statement [46] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 ] { } ) always clobbers reg byte a Statement [47] loop::plexFreeNextYpos1_return#0 = PLEX_FREE_YPOS[plex_free_next] [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 loop::plexFreeNextYpos1_return#0 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 loop::plexFreeNextYpos1_return#0 ] { } ) always clobbers reg byte y Statement [52] if(loop::ss#1!=PLEX_COUNT-1+1) goto loop::@7 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#1 ] { } ) always clobbers reg byte a @@ -1437,7 +1437,7 @@ Statement [2] plex_show_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] plex_sprite_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] plex_sprite_msb = 1 [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] plex_free_next = 0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [14] *D011 = VIC_DEN|VIC_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a +Statement [14] *D011 = VICII_DEN|VICII_RSEL|3 [ ] ( main:7::init:10 [ ] { } ) always clobbers reg byte a Statement [17] PLEX_PTR[init::sx#2] = (byte)SPRITE/$40 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a Statement [18] init::$3 = init::sx#2 << 1 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 init::$3 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 init::$3 ] { } ) always clobbers reg byte a Statement [19] PLEX_XPOS[init::$3] = init::xp#2 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] ( main:7::init:10 [ PLEX_SCREEN_PTR init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a @@ -1448,7 +1448,7 @@ Statement [31] if(*((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_RASTER)!=$ff) goto Statement [35] PLEX_YPOS[loop::sy#2] = YSIN[loop::y_idx#2] [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::y_idx#2 loop::sy#2 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::y_idx#2 loop::sy#2 ] { } ) always clobbers reg byte a Statement [36] loop::y_idx#1 = loop::y_idx#2 + 8 [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::sy#2 loop::y_idx#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR loop::sin_idx#6 loop::sy#2 loop::y_idx#1 ] { } ) always clobbers reg byte a Statement [42] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 ] { } ) always clobbers reg byte a -Statement [43] loop::$5 = *D011 & VIC_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] { } ) always clobbers reg byte a +Statement [43] loop::$5 = *D011 & VICII_RST8 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::$5 ] { } ) always clobbers reg byte a Statement [46] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 ] { } ) always clobbers reg byte a Statement [47] loop::plexFreeNextYpos1_return#0 = PLEX_FREE_YPOS[plex_free_next] [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 loop::plexFreeNextYpos1_return#0 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#5 loop::plexFreeNextYpos1_return#0 ] { } ) always clobbers reg byte y Statement [52] if(loop::ss#1!=PLEX_COUNT-1+1) goto loop::@7 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#1 ] ( main:7::loop:12 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next loop::sin_idx#1 loop::ss#1 ] { } ) always clobbers reg byte a @@ -1619,9 +1619,9 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(__start) // Global Constants & labels - .const VIC_RST8 = $80 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_RST8 = $80 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // The colors of the C64 .const BLACK = 0 .const GREEN = 5 @@ -1711,8 +1711,8 @@ main: { init: { // Set the x-positions & pointers .label xp = 2 - // [14] *D011 = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_RSEL|3 + // [14] *D011 = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 sta D011 // [15] call plexInit // Initialize the multiplexer @@ -1866,8 +1866,8 @@ loop: { jmp __b6 // loop::@6 __b6: - // [43] loop::$5 = *D011 & VIC_RST8 -- vbuaa=_deref_pbuc1_band_vbuc2 - lda #VIC_RST8 + // [43] loop::$5 = *D011 & VICII_RST8 -- vbuaa=_deref_pbuc1_band_vbuc2 + lda #VICII_RST8 and D011 // [44] if(loop::$5!=0) goto loop::@6 -- vbuaa_neq_0_then_la1 cmp #0 @@ -2380,9 +2380,9 @@ const nomodify byte* SPRITES_XMSB = (byte*) 53264 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 -const nomodify byte VIC_RST8 = $80 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 +const nomodify byte VICII_RST8 = $80 const byte* YSIN[$100] = kickasm {{ .var min = 50 .var max = 250-21 .var ampl = max-min; @@ -2516,9 +2516,9 @@ Score: 58109 .segment Basic :BasicUpstart(__start) // Global Constants & labels - .const VIC_RST8 = $80 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_RST8 = $80 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // The colors of the C64 .const BLACK = 0 .const GREEN = 5 @@ -2603,9 +2603,9 @@ main: { init: { // Set the x-positions & pointers .label xp = 2 - // *D011 = VIC_DEN | VIC_RSEL | 3 - // [14] *D011 = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_DEN | VICII_RSEL | 3 + // [14] *D011 = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 sta D011 // plexInit(SCREEN) // [15] call plexInit @@ -2748,11 +2748,11 @@ loop: { sta VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR // loop::@6 __b6: - // *D011&VIC_RST8 - // [43] loop::$5 = *D011 & VIC_RST8 -- vbuaa=_deref_pbuc1_band_vbuc2 - lda #VIC_RST8 + // *D011&VICII_RST8 + // [43] loop::$5 = *D011 & VICII_RST8 -- vbuaa=_deref_pbuc1_band_vbuc2 + lda #VICII_RST8 and D011 - // while((*D011&VIC_RST8)!=0) + // while((*D011&VICII_RST8)!=0) // [44] if(loop::$5!=0) goto loop::@6 -- vbuaa_neq_0_then_la1 cmp #0 bne __b6 diff --git a/src/test/ref/examples/multiplexer/simple-multiplexer.sym b/src/test/ref/examples/multiplexer/simple-multiplexer.sym index 04e2d6551..abc7c34b9 100644 --- a/src/test/ref/examples/multiplexer/simple-multiplexer.sym +++ b/src/test/ref/examples/multiplexer/simple-multiplexer.sym @@ -22,9 +22,9 @@ const nomodify byte* SPRITES_XMSB = (byte*) 53264 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 -const nomodify byte VIC_RST8 = $80 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 +const nomodify byte VICII_RST8 = $80 const byte* YSIN[$100] = kickasm {{ .var min = 50 .var max = 250-21 .var ampl = max-min; diff --git a/src/test/ref/examples/scrolllogo/scrolllogo.asm b/src/test/ref/examples/scrolllogo/scrolllogo.asm index 68409bd44..1dd932db7 100644 --- a/src/test/ref/examples/scrolllogo/scrolllogo.asm +++ b/src/test/ref/examples/scrolllogo/scrolllogo.asm @@ -9,7 +9,7 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_MCM = $10 + .const VICII_MCM = $10 // The colors of the C64 .const BLACK = 0 .const WHITE = 1 @@ -56,8 +56,8 @@ main: { // *D018 = toD018(SCREEN, LOGO) lda #toD0181_return sta D018 - // *D016 = VIC_MCM - lda #VIC_MCM + // *D016 = VICII_MCM + lda #VICII_MCM sta D016 // memset(SCREEN, BLACK, 1000) ldx #BLACK @@ -595,9 +595,9 @@ render_logo: { // (char)xpos&7 lda.z xpos and #7 - // VIC_MCM|((char)xpos&7) - ora #VIC_MCM - // *D016 = VIC_MCM|((char)xpos&7) + // VICII_MCM|((char)xpos&7) + ora #VICII_MCM + // *D016 = VICII_MCM|((char)xpos&7) sta D016 // xpos/8 lda.z xpos+1 diff --git a/src/test/ref/examples/scrolllogo/scrolllogo.cfg b/src/test/ref/examples/scrolllogo/scrolllogo.cfg index 4fcc20f46..f56927408 100644 --- a/src/test/ref/examples/scrolllogo/scrolllogo.cfg +++ b/src/test/ref/examples/scrolllogo/scrolllogo.cfg @@ -12,7 +12,7 @@ main::toD0181: scope:[main] from main to:main::@3 main::@3: scope:[main] from main::toD0181 [6] *D018 = main::toD0181_return#0 - [7] *D016 = VIC_MCM + [7] *D016 = VICII_MCM [8] call memset to:main::@4 main::@4: scope:[main] from main::@3 @@ -245,7 +245,7 @@ void render_logo(signed word render_logo::xpos) render_logo: scope:[render_logo] from loop::@3 [122] render_logo::$25 = (byte)render_logo::xpos#0 [123] render_logo::$0 = render_logo::$25 & 7 - [124] render_logo::$1 = VIC_MCM | render_logo::$0 + [124] render_logo::$1 = VICII_MCM | render_logo::$0 [125] *D016 = render_logo::$1 [126] render_logo::$2 = render_logo::xpos#0 >> 3 [127] render_logo::x_char#0 = (signed byte)render_logo::$2 diff --git a/src/test/ref/examples/scrolllogo/scrolllogo.log b/src/test/ref/examples/scrolllogo/scrolllogo.log index b8c72a29c..9bc611261 100644 --- a/src/test/ref/examples/scrolllogo/scrolllogo.log +++ b/src/test/ref/examples/scrolllogo/scrolllogo.log @@ -558,7 +558,7 @@ main::@3: scope:[main] from main::toD0181_@return main::toD0181_return#3 = phi( main::toD0181_@return/main::toD0181_return#1 ) main::$0 = main::toD0181_return#3 *D018 = main::$0 - *D016 = VIC_MCM + *D016 = VICII_MCM memset::str#0 = (void*)SCREEN memset::c#0 = BLACK memset::num#0 = $3e8 @@ -665,7 +665,7 @@ render_logo: scope:[render_logo] from loop::@3 render_logo::screen_idx#0 = 0 render_logo::$25 = (byte)render_logo::xpos#1 render_logo::$0 = render_logo::$25 & 7 - render_logo::$1 = VIC_MCM | render_logo::$0 + render_logo::$1 = VICII_MCM | render_logo::$0 *D016 = render_logo::$1 render_logo::$2 = render_logo::xpos#1 / 8 render_logo::x_char#0 = (signed byte)render_logo::$2 @@ -851,7 +851,7 @@ const nomodify dword PI_u4f28 = $3243f6a9 const byte* SCREEN = (byte*)$400 const byte SIZEOF_SIGNED_WORD = 2 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*)$d000 -const nomodify byte VIC_MCM = $10 +const nomodify byte VICII_MCM = $10 const nomodify byte WHITE = 1 const nomodify word XSIN_SIZE = $200 void __start() @@ -1511,7 +1511,7 @@ Adding number conversion cast (unumber) $ff in loop::$0 = *((byte*)VICII+OFFSET_ Adding number conversion cast (unumber) 0 in xsin_idx#3 = 0 Adding number conversion cast (unumber) 7 in render_logo::$0 = render_logo::$25 & 7 Adding number conversion cast (unumber) render_logo::$0 in render_logo::$0 = render_logo::$25 & (unumber)7 -Adding number conversion cast (unumber) render_logo::$1 in render_logo::$1 = VIC_MCM | render_logo::$0 +Adding number conversion cast (unumber) render_logo::$1 in render_logo::$1 = VICII_MCM | render_logo::$0 Adding number conversion cast (snumber) 8 in render_logo::$2 = render_logo::xpos#1 / 8 Adding number conversion cast (snumber) render_logo::$2 in render_logo::$2 = render_logo::xpos#1 / (snumber)8 Adding number conversion cast (snumber) 0 in render_logo::$3 = render_logo::xpos#1 < 0 @@ -1701,7 +1701,7 @@ Inferred type updated to byte in main::toD0181_$4 = main::toD0181_$3 / 4 Inferred type updated to byte in main::toD0181_$5 = main::toD0181_$4 & $f Inferred type updated to byte in main::toD0181_$6 = main::toD0181_$2 | main::toD0181_$5 Inferred type updated to byte in render_logo::$0 = render_logo::$25 & 7 -Inferred type updated to byte in render_logo::$1 = VIC_MCM | render_logo::$0 +Inferred type updated to byte in render_logo::$1 = VICII_MCM | render_logo::$0 Inferred type updated to signed word in render_logo::$2 = render_logo::xpos#1 / 8 Inferred type updated to byte in render_logo::$5 = $28 * render_logo::line#9 Inferred type updated to byte in render_logo::$9 = $28 * render_logo::line#10 @@ -2983,7 +2983,7 @@ main::toD0181: scope:[main] from main to:main::@3 main::@3: scope:[main] from main::toD0181 [6] *D018 = main::toD0181_return#0 - [7] *D016 = VIC_MCM + [7] *D016 = VICII_MCM [8] call memset to:main::@4 main::@4: scope:[main] from main::@3 @@ -3216,7 +3216,7 @@ void render_logo(signed word render_logo::xpos) render_logo: scope:[render_logo] from loop::@3 [122] render_logo::$25 = (byte)render_logo::xpos#0 [123] render_logo::$0 = render_logo::$25 & 7 - [124] render_logo::$1 = VIC_MCM | render_logo::$0 + [124] render_logo::$1 = VICII_MCM | render_logo::$0 [125] *D016 = render_logo::$1 [126] render_logo::$2 = render_logo::xpos#0 >> 3 [127] render_logo::x_char#0 = (signed byte)render_logo::$2 @@ -3923,7 +3923,7 @@ Statement [2] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) = DARK_GREY Statement [3] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2) = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [7] *D016 = VIC_MCM [ ] ( [ ] { } ) always clobbers reg byte a +Statement [7] *D016 = VICII_MCM [ ] ( [ ] { } ) always clobbers reg byte a Statement [21] memset::end#0 = (byte*)memset::str#3 + $3e8 [ memset::str#3 memset::c#4 memset::end#0 ] ( memset:8 [ memset::str#3 memset::c#4 memset::end#0 ] { } memset:10 [ memset::str#3 memset::c#4 memset::end#0 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:5 [ memset::c#4 ] Statement [22] memset::dst#4 = (byte*)memset::str#3 [ memset::c#4 memset::end#0 memset::dst#4 ] ( memset:8 [ memset::c#4 memset::end#0 memset::dst#4 ] { } memset:10 [ memset::c#4 memset::end#0 memset::dst#4 ] { } ) always clobbers reg byte a @@ -3994,7 +3994,7 @@ Statement [117] mul16s::$11 = mul16s::$6 - (word)sin16s_gen2::ampl#0 [ mul16s::m Statement [118] mul16s::m#1 = mul16s::m#0 hi= mul16s::$11 [ mul16s::m#1 ] ( sin16s_gen2:16::mul16s:39 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 mul16s::m#1 ] { { mul16s::a#0 = sin16s::return#0 } { mul16s::return#0 = mul16s::return#2 } } ) always clobbers reg byte a Statement [120] mul16s::return#0 = (signed dword)mul16s::m#4 [ mul16s::return#0 ] ( sin16s_gen2:16::mul16s:39 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 mul16s::return#0 ] { { mul16s::a#0 = sin16s::return#0 } { mul16s::return#0 = mul16s::return#2 } } ) always clobbers reg byte a Statement [122] render_logo::$25 = (byte)render_logo::xpos#0 [ render_logo::xpos#0 render_logo::$25 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::$25 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a -Statement [124] render_logo::$1 = VIC_MCM | render_logo::$0 [ render_logo::xpos#0 render_logo::$1 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::$1 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a +Statement [124] render_logo::$1 = VICII_MCM | render_logo::$0 [ render_logo::xpos#0 render_logo::$1 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::$1 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a Statement [126] render_logo::$2 = render_logo::xpos#0 >> 3 [ render_logo::xpos#0 render_logo::$2 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::$2 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a Statement [127] render_logo::x_char#0 = (signed byte)render_logo::$2 [ render_logo::xpos#0 render_logo::x_char#0 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::x_char#0 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a Statement [128] if(render_logo::xpos#0<0) goto render_logo::@1 [ render_logo::x_char#0 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::x_char#0 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a @@ -4035,7 +4035,7 @@ Statement [2] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) = DARK_GREY Statement [3] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2) = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [7] *D016 = VIC_MCM [ ] ( [ ] { } ) always clobbers reg byte a +Statement [7] *D016 = VICII_MCM [ ] ( [ ] { } ) always clobbers reg byte a Statement [21] memset::end#0 = (byte*)memset::str#3 + $3e8 [ memset::str#3 memset::c#4 memset::end#0 ] ( memset:8 [ memset::str#3 memset::c#4 memset::end#0 ] { } memset:10 [ memset::str#3 memset::c#4 memset::end#0 ] { } ) always clobbers reg byte a Statement [22] memset::dst#4 = (byte*)memset::str#3 [ memset::c#4 memset::end#0 memset::dst#4 ] ( memset:8 [ memset::c#4 memset::end#0 memset::dst#4 ] { } memset:10 [ memset::c#4 memset::end#0 memset::dst#4 ] { } ) always clobbers reg byte a Statement [24] if(memset::dst#2!=memset::end#0) goto memset::@3 [ memset::c#4 memset::end#0 memset::dst#2 ] ( memset:8 [ memset::c#4 memset::end#0 memset::dst#2 ] { } memset:10 [ memset::c#4 memset::end#0 memset::dst#2 ] { } ) always clobbers reg byte a @@ -4103,7 +4103,7 @@ Statement [117] mul16s::$11 = mul16s::$6 - (word)sin16s_gen2::ampl#0 [ mul16s::m Statement [118] mul16s::m#1 = mul16s::m#0 hi= mul16s::$11 [ mul16s::m#1 ] ( sin16s_gen2:16::mul16s:39 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 mul16s::m#1 ] { { mul16s::a#0 = sin16s::return#0 } { mul16s::return#0 = mul16s::return#2 } } ) always clobbers reg byte a Statement [120] mul16s::return#0 = (signed dword)mul16s::m#4 [ mul16s::return#0 ] ( sin16s_gen2:16::mul16s:39 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 mul16s::return#0 ] { { mul16s::a#0 = sin16s::return#0 } { mul16s::return#0 = mul16s::return#2 } } ) always clobbers reg byte a Statement [122] render_logo::$25 = (byte)render_logo::xpos#0 [ render_logo::xpos#0 render_logo::$25 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::$25 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a -Statement [124] render_logo::$1 = VIC_MCM | render_logo::$0 [ render_logo::xpos#0 render_logo::$1 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::$1 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a +Statement [124] render_logo::$1 = VICII_MCM | render_logo::$0 [ render_logo::xpos#0 render_logo::$1 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::$1 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a Statement [126] render_logo::$2 = render_logo::xpos#0 >> 3 [ render_logo::xpos#0 render_logo::$2 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::$2 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a Statement [127] render_logo::x_char#0 = (signed byte)render_logo::$2 [ render_logo::xpos#0 render_logo::x_char#0 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::xpos#0 render_logo::x_char#0 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a Statement [128] if(render_logo::xpos#0<0) goto render_logo::@1 [ render_logo::x_char#0 ] ( loop:18::render_logo:55 [ xsin_idx#12 render_logo::x_char#0 ] { { render_logo::xpos#0 = loop::xpos#0 } } ) always clobbers reg byte a @@ -4370,7 +4370,7 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_MCM = $10 + .const VICII_MCM = $10 // The colors of the C64 .const BLACK = 0 .const WHITE = 1 @@ -4427,8 +4427,8 @@ main: { // [6] *D018 = main::toD0181_return#0 -- _deref_pbuc1=vbuc2 lda #toD0181_return sta D018 - // [7] *D016 = VIC_MCM -- _deref_pbuc1=vbuc2 - lda #VIC_MCM + // [7] *D016 = VICII_MCM -- _deref_pbuc1=vbuc2 + lda #VICII_MCM sta D016 // [8] call memset // [20] phi from main::@3 to memset [phi:main::@3->memset] @@ -5226,8 +5226,8 @@ render_logo: { lda.z xpos // [123] render_logo::$0 = render_logo::$25 & 7 -- vbuaa=vbuaa_band_vbuc1 and #7 - // [124] render_logo::$1 = VIC_MCM | render_logo::$0 -- vbuaa=vbuc1_bor_vbuaa - ora #VIC_MCM + // [124] render_logo::$1 = VICII_MCM | render_logo::$0 -- vbuaa=vbuc1_bor_vbuaa + ora #VICII_MCM // [125] *D016 = render_logo::$1 -- _deref_pbuc1=vbuaa sta D016 // [126] render_logo::$2 = render_logo::xpos#0 >> 3 -- vwsz1=vwsz2_ror_3 @@ -6064,7 +6064,7 @@ const nomodify dword PI_u4f28 = $3243f6a9 const byte* SCREEN = (byte*) 1024 const byte SIZEOF_SIGNED_WORD = 2 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_MCM = $10 +const nomodify byte VICII_MCM = $10 const nomodify byte WHITE = 1 const nomodify word XSIN_SIZE = $200 dword div32u16u(dword div32u16u::dividend , word div32u16u::divisor) @@ -6350,7 +6350,7 @@ Score: 43921 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_MCM = $10 + .const VICII_MCM = $10 // The colors of the C64 .const BLACK = 0 .const WHITE = 1 @@ -6407,9 +6407,9 @@ main: { // [6] *D018 = main::toD0181_return#0 -- _deref_pbuc1=vbuc2 lda #toD0181_return sta D018 - // *D016 = VIC_MCM - // [7] *D016 = VIC_MCM -- _deref_pbuc1=vbuc2 - lda #VIC_MCM + // *D016 = VICII_MCM + // [7] *D016 = VICII_MCM -- _deref_pbuc1=vbuc2 + lda #VICII_MCM sta D016 // memset(SCREEN, BLACK, 1000) // [8] call memset @@ -7171,10 +7171,10 @@ render_logo: { lda.z xpos // [123] render_logo::$0 = render_logo::$25 & 7 -- vbuaa=vbuaa_band_vbuc1 and #7 - // VIC_MCM|((char)xpos&7) - // [124] render_logo::$1 = VIC_MCM | render_logo::$0 -- vbuaa=vbuc1_bor_vbuaa - ora #VIC_MCM - // *D016 = VIC_MCM|((char)xpos&7) + // VICII_MCM|((char)xpos&7) + // [124] render_logo::$1 = VICII_MCM | render_logo::$0 -- vbuaa=vbuc1_bor_vbuaa + ora #VICII_MCM + // *D016 = VICII_MCM|((char)xpos&7) // [125] *D016 = render_logo::$1 -- _deref_pbuc1=vbuaa sta D016 // xpos/8 diff --git a/src/test/ref/examples/scrolllogo/scrolllogo.sym b/src/test/ref/examples/scrolllogo/scrolllogo.sym index 94cb7747a..fcba4ceb5 100644 --- a/src/test/ref/examples/scrolllogo/scrolllogo.sym +++ b/src/test/ref/examples/scrolllogo/scrolllogo.sym @@ -20,7 +20,7 @@ const nomodify dword PI_u4f28 = $3243f6a9 const byte* SCREEN = (byte*) 1024 const byte SIZEOF_SIGNED_WORD = 2 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_MCM = $10 +const nomodify byte VICII_MCM = $10 const nomodify byte WHITE = 1 const nomodify word XSIN_SIZE = $200 dword div32u16u(dword div32u16u::dividend , word div32u16u::divisor) diff --git a/src/test/ref/examples/showlogo/showlogo.asm b/src/test/ref/examples/showlogo/showlogo.asm index 564fe1bbd..07ea8a1f6 100644 --- a/src/test/ref/examples/showlogo/showlogo.asm +++ b/src/test/ref/examples/showlogo/showlogo.asm @@ -9,8 +9,8 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // The colors of the C64 .const BLACK = 0 .const WHITE = 1 @@ -43,8 +43,8 @@ main: { // *D018 = toD018(SCREEN, LOGO) lda #toD0181_return sta D018 - // *D016 = VIC_MCM | VIC_CSEL - lda #VIC_MCM|VIC_CSEL + // *D016 = VICII_MCM | VICII_CSEL + lda #VICII_MCM|VICII_CSEL sta D016 // memset(SCREEN, BLACK, 40*25) ldx #BLACK diff --git a/src/test/ref/examples/showlogo/showlogo.cfg b/src/test/ref/examples/showlogo/showlogo.cfg index d61f2691a..0ca791770 100644 --- a/src/test/ref/examples/showlogo/showlogo.cfg +++ b/src/test/ref/examples/showlogo/showlogo.cfg @@ -11,7 +11,7 @@ main::toD0181: scope:[main] from main to:main::@3 main::@3: scope:[main] from main::toD0181 [5] *D018 = main::toD0181_return#0 - [6] *D016 = VIC_MCM|VIC_CSEL + [6] *D016 = VICII_MCM|VICII_CSEL [7] call memset to:main::@4 main::@4: scope:[main] from main::@3 diff --git a/src/test/ref/examples/showlogo/showlogo.log b/src/test/ref/examples/showlogo/showlogo.log index d948bf29c..d35049dee 100644 --- a/src/test/ref/examples/showlogo/showlogo.log +++ b/src/test/ref/examples/showlogo/showlogo.log @@ -78,7 +78,7 @@ main::@4: scope:[main] from main::toD0181_@return main::toD0181_return#3 = phi( main::toD0181_@return/main::toD0181_return#1 ) main::$0 = main::toD0181_return#3 *D018 = main::$0 - *D016 = VIC_MCM|VIC_CSEL + *D016 = VICII_MCM|VICII_CSEL memset::str#0 = (void*)SCREEN memset::c#0 = BLACK memset::num#0 = $28*$19 @@ -146,8 +146,8 @@ const byte OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2 = $23 const byte OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR = $20 const byte* SCREEN = (byte*)$400 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*)$d000 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_MCM = $10 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_MCM = $10 const nomodify byte WHITE = 1 void __start() void main() @@ -439,7 +439,7 @@ main::toD0181: scope:[main] from main to:main::@3 main::@3: scope:[main] from main::toD0181 [5] *D018 = main::toD0181_return#0 - [6] *D016 = VIC_MCM|VIC_CSEL + [6] *D016 = VICII_MCM|VICII_CSEL [7] call memset to:main::@4 main::@4: scope:[main] from main::@3 @@ -524,7 +524,7 @@ Statement [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) = DARK_GREY Statement [2] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2) = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *D016 = VIC_MCM|VIC_CSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *D016 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [17] memset::end#0 = (byte*)memset::str#3 + (word)$28*$19 [ memset::str#3 memset::c#4 memset::end#0 ] ( memset:7 [ memset::str#3 memset::c#4 memset::end#0 ] { } memset:9 [ memset::str#3 memset::c#4 memset::end#0 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:5 [ memset::c#4 ] Statement [18] memset::dst#4 = (byte*)memset::str#3 [ memset::c#4 memset::end#0 memset::dst#4 ] ( memset:7 [ memset::c#4 memset::end#0 memset::dst#4 ] { } memset:9 [ memset::c#4 memset::end#0 memset::dst#4 ] { } ) always clobbers reg byte a @@ -536,7 +536,7 @@ Statement [1] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) = DARK_GREY Statement [2] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR1) [ ] ( [ ] { } ) always clobbers reg byte a Statement [3] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2) = BLACK [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [6] *D016 = VIC_MCM|VIC_CSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [6] *D016 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [17] memset::end#0 = (byte*)memset::str#3 + (word)$28*$19 [ memset::str#3 memset::c#4 memset::end#0 ] ( memset:7 [ memset::str#3 memset::c#4 memset::end#0 ] { } memset:9 [ memset::str#3 memset::c#4 memset::end#0 ] { } ) always clobbers reg byte a Statement [18] memset::dst#4 = (byte*)memset::str#3 [ memset::c#4 memset::end#0 memset::dst#4 ] ( memset:7 [ memset::c#4 memset::end#0 memset::dst#4 ] { } memset:9 [ memset::c#4 memset::end#0 memset::dst#4 ] { } ) always clobbers reg byte a Statement [20] if(memset::dst#2!=memset::end#0) goto memset::@3 [ memset::c#4 memset::end#0 memset::dst#2 ] ( memset:7 [ memset::c#4 memset::end#0 memset::dst#2 ] { } memset:9 [ memset::c#4 memset::end#0 memset::dst#2 ] { } ) always clobbers reg byte a @@ -580,8 +580,8 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // The colors of the C64 .const BLACK = 0 .const WHITE = 1 @@ -624,8 +624,8 @@ main: { // [5] *D018 = main::toD0181_return#0 -- _deref_pbuc1=vbuc2 lda #toD0181_return sta D018 - // [6] *D016 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL + // [6] *D016 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL sta D016 // [7] call memset // [16] phi from main::@3 to memset [phi:main::@3->memset] @@ -794,8 +794,8 @@ const byte OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2 = $23 const byte OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR = $20 const byte* SCREEN = (byte*) 1024 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_MCM = $10 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_MCM = $10 const nomodify byte WHITE = 1 void main() byte main::ch @@ -842,8 +842,8 @@ Score: 3324 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_MCM = $10 - .const VIC_CSEL = 8 + .const VICII_MCM = $10 + .const VICII_CSEL = 8 // The colors of the C64 .const BLACK = 0 .const WHITE = 1 @@ -885,9 +885,9 @@ main: { // [5] *D018 = main::toD0181_return#0 -- _deref_pbuc1=vbuc2 lda #toD0181_return sta D018 - // *D016 = VIC_MCM | VIC_CSEL - // [6] *D016 = VIC_MCM|VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_MCM|VIC_CSEL + // *D016 = VICII_MCM | VICII_CSEL + // [6] *D016 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_MCM|VICII_CSEL sta D016 // memset(SCREEN, BLACK, 40*25) // [7] call memset diff --git a/src/test/ref/examples/showlogo/showlogo.sym b/src/test/ref/examples/showlogo/showlogo.sym index edde52452..5d98a5296 100644 --- a/src/test/ref/examples/showlogo/showlogo.sym +++ b/src/test/ref/examples/showlogo/showlogo.sym @@ -15,8 +15,8 @@ const byte OFFSET_STRUCT_MOS6569_VICII_BG_COLOR2 = $23 const byte OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR = $20 const byte* SCREEN = (byte*) 1024 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_MCM = $10 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_MCM = $10 const nomodify byte WHITE = 1 void main() byte main::ch diff --git a/src/test/ref/examples/sinplotter/sine-plotter.asm b/src/test/ref/examples/sinplotter/sine-plotter.asm index bb00b0321..e5b8f2096 100644 --- a/src/test/ref/examples/sinplotter/sine-plotter.asm +++ b/src/test/ref/examples/sinplotter/sine-plotter.asm @@ -7,10 +7,10 @@ .segmentdef Data [startAfter="Code"] .segment Basic :BasicUpstart(main) - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_CSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -55,8 +55,8 @@ main: { // *PROCPORT = PROCPORT_RAM_IO lda #PROCPORT_RAM_IO sta PROCPORT - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // CIA2->PORT_A_DDR = %00000011 lda #3 @@ -64,8 +64,8 @@ main: { // CIA2->PORT_A = toDd00(gfx) lda #vicSelectGfxBank1_toDd001_return sta CIA2 - // *D016 = VIC_CSEL - lda #VIC_CSEL + // *D016 = VICII_CSEL + lda #VICII_CSEL sta D016 // *D018 = toD018(SCREEN, BITMAP) lda #toD0181_return diff --git a/src/test/ref/examples/sinplotter/sine-plotter.cfg b/src/test/ref/examples/sinplotter/sine-plotter.cfg index 9e887337b..88775aeae 100644 --- a/src/test/ref/examples/sinplotter/sine-plotter.cfg +++ b/src/test/ref/examples/sinplotter/sine-plotter.cfg @@ -4,7 +4,7 @@ main: scope:[main] from asm { sei } [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [2] *PROCPORT = PROCPORT_RAM_IO - [3] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::vicSelectGfxBank1 main::vicSelectGfxBank1: scope:[main] from main [4] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 @@ -16,7 +16,7 @@ main::vicSelectGfxBank1_@1: scope:[main] from main::vicSelectGfxBank1_toDd001 [6] *((byte*)CIA2) = main::vicSelectGfxBank1_toDd001_return#0 to:main::@2 main::@2: scope:[main] from main::vicSelectGfxBank1_@1 - [7] *D016 = VIC_CSEL + [7] *D016 = VICII_CSEL to:main::toD0181 main::toD0181: scope:[main] from main::@2 [8] phi() diff --git a/src/test/ref/examples/sinplotter/sine-plotter.log b/src/test/ref/examples/sinplotter/sine-plotter.log index 5e5a6b323..7e8a80b3c 100644 --- a/src/test/ref/examples/sinplotter/sine-plotter.log +++ b/src/test/ref/examples/sinplotter/sine-plotter.log @@ -657,7 +657,7 @@ main: scope:[main] from __start::@1 asm { sei } *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK *PROCPORT = PROCPORT_RAM_IO - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 main::vicSelectGfxBank1_gfx#0 = SCREEN to:main::vicSelectGfxBank1 main::vicSelectGfxBank1: scope:[main] from main @@ -697,7 +697,7 @@ main::@3: scope:[main] from main::vicSelectGfxBank1_@1 rem16u#37 = phi( main::vicSelectGfxBank1_@1/rem16u#38 ) bitmap_screen#26 = phi( main::vicSelectGfxBank1_@1/bitmap_screen#30 ) bitmap_gfx#27 = phi( main::vicSelectGfxBank1_@1/bitmap_gfx#31 ) - *D016 = VIC_CSEL + *D016 = VICII_CSEL main::toD0181_screen#0 = SCREEN main::toD0181_gfx#0 = BITMAP to:main::toD0181 @@ -947,10 +947,10 @@ const byte* SCREEN = (byte*)$400 const nomodify word SIN_SIZE = $200 const byte SIZEOF_SIGNED_WORD = 2 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*)$d000 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void __start() void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) @@ -1705,8 +1705,8 @@ Adding number conversion cast (unumber) bitmap_clear::$1 in bitmap_clear::$1 = b Adding number conversion cast (unumber) 0 in memset::c#1 = 0 Adding number conversion cast (unumber) $fff8 in bitmap_plot::$0 = bitmap_plot::x#2 & $fff8 Adding number conversion cast (unumber) bitmap_plot::$0 in bitmap_plot::$0 = bitmap_plot::x#2 & (unumber)$fff8 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 Adding number conversion cast (unumber) $40 in main::vicSelectGfxBank1_toDd001_$1 = main::vicSelectGfxBank1_toDd001_$0 / $40 Adding number conversion cast (unumber) main::vicSelectGfxBank1_toDd001_$1 in main::vicSelectGfxBank1_toDd001_$1 = main::vicSelectGfxBank1_toDd001_$0 / (unumber)$40 @@ -1744,7 +1744,7 @@ Inlining cast mulu16_sel::select#4 = (unumber)0 Inlining cast memset::dst#0 = (byte*)memset::str#3 Inlining cast bitmap_init::bits#2 = (unumber)$80 Inlining cast memset::c#1 = (unumber)0 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast sin16s_gen2::min#0 = (snumber)-$140 Inlining cast sin16s_gen2::max#0 = (snumber)$140 @@ -1797,7 +1797,7 @@ Simplifying constant integer cast 0 Simplifying constant integer cast bitmap_plot_yhi[bitmap_plot::y#2] Simplifying constant integer cast bitmap_plot_ylo[bitmap_plot::y#2] Simplifying constant integer cast $fff8 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 3 Simplifying constant integer cast $40 @@ -2602,7 +2602,7 @@ main: scope:[main] from asm { sei } [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [2] *PROCPORT = PROCPORT_RAM_IO - [3] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::vicSelectGfxBank1 main::vicSelectGfxBank1: scope:[main] from main [4] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 @@ -2614,7 +2614,7 @@ main::vicSelectGfxBank1_@1: scope:[main] from main::vicSelectGfxBank1_toDd001 [6] *((byte*)CIA2) = main::vicSelectGfxBank1_toDd001_return#0 to:main::@2 main::@2: scope:[main] from main::vicSelectGfxBank1_@1 - [7] *D016 = VIC_CSEL + [7] *D016 = VICII_CSEL to:main::toD0181 main::toD0181: scope:[main] from main::@2 [8] phi() @@ -3571,10 +3571,10 @@ REGISTER UPLIFT POTENTIAL REGISTERS Equivalence Class zp[1]:67 [ bitmap_init::$4 ] has ALU potential. Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *((byte*)CIA2) = main::vicSelectGfxBank1_toDd001_return#0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [7] *D016 = VIC_CSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [7] *D016 = VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [35] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] ( bitmap_init:10 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:4 [ bitmap_init::y#2 bitmap_init::y#1 ] @@ -3682,10 +3682,10 @@ Statement [210] mul16u::$1 = mul16u::a#3 & 1 [ mul16u::res#2 mul16u::a#3 mul16u: Statement [212] mul16u::res#1 = mul16u::res#2 + mul16u::mb#2 [ mul16u::a#3 mul16u::mb#2 mul16u::res#1 ] ( sin16s_gen2:14::mul16s:56::mul16u:152 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 mul16s::a#0 mul16u::a#3 mul16u::mb#2 mul16u::res#1 ] { { mul16s::a#0 = sin16s::return#0 } { mul16s::return#0 = mul16s::return#2 } { mul16u::a#1 = mul16u::a#6 } { mul16u::return#2 = mul16u::res#2 } } sin16s_gen2:14::sin16s:53::mulu16_sel:121::mul16u:199 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#3 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen2::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::return#0 = mulu16_sel::return#12 } { mul16u::a#2 = mul16u::a#6 mul16u::b#2 mul16u::b#1 mulu16_sel::v2#5 mulu16_sel::v2#0 mulu16_sel::v1#5 mulu16_sel::v1#0 sin16s::x1#0 } { mul16u::return#3 = mul16u::res#2 } } sin16s_gen2:14::sin16s:53::mulu16_sel:126::mul16u:199 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 sin16s::isUpper#2 sin16s::x1#0 mulu16_sel::select#5 mul16u::a#3 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen2::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::return#1 = mulu16_sel::return#12 } { mul16u::b#1 = mul16u::b#2 mulu16_sel::v2#5 mulu16_sel::v2#1 sin16s::x1#0 } { mul16u::a#2 = mul16u::a#6 mulu16_sel::v1#5 mulu16_sel::v1#1 sin16s::x2#0 } { mul16u::return#3 = mul16u::res#2 } } sin16s_gen2:14::sin16s:53::mulu16_sel:130::mul16u:199 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::x3#0 mulu16_sel::select#5 mul16u::a#3 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen2::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::return#12 = mulu16_sel::return#2 } { mul16u::b#1 = mul16u::b#2 mulu16_sel::v2#5 } { mul16u::a#2 = mul16u::a#6 mulu16_sel::v1#5 mulu16_sel::v1#2 sin16s::x3#0 } { mul16u::return#3 = mul16u::res#2 } } sin16s_gen2:14::sin16s:53::mulu16_sel:136::mul16u:199 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 sin16s::isUpper#2 sin16s::x1#0 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#3 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen2::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::return#10 = mulu16_sel::return#12 } { mul16u::b#1 = mul16u::b#2 mulu16_sel::v2#5 mulu16_sel::v2#3 sin16s::x1#0 } { mul16u::a#2 = mul16u::a#6 mulu16_sel::v1#5 mulu16_sel::v1#3 sin16s::x3#0 } { mul16u::return#3 = mul16u::res#2 } } sin16s_gen2:14::sin16s:53::mulu16_sel:141::mul16u:199 [ sin16s_gen2::step#0 sin16s_gen2::i#2 sin16s_gen2::x#2 sin16s_gen2::sintab#2 sin16s::isUpper#2 sin16s::usinx#0 mulu16_sel::select#5 mul16u::a#3 mul16u::mb#2 mul16u::res#1 ] { { sin16s::x#0 = sin16s_gen2::x#2 } { sin16s::return#0 = sin16s::return#1 } { mulu16_sel::return#11 = mulu16_sel::return#12 } { mul16u::b#1 = mul16u::b#2 mulu16_sel::v2#5 mulu16_sel::v2#4 sin16s::x1#0 } { mul16u::a#2 = mul16u::a#6 mulu16_sel::v1#5 mulu16_sel::v1#4 sin16s::x4#0 } { mul16u::return#3 = mul16u::res#2 } } ) always clobbers reg byte a Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *((byte*)CIA2) = main::vicSelectGfxBank1_toDd001_return#0 [ ] ( [ ] { } ) always clobbers reg byte a -Statement [7] *D016 = VIC_CSEL [ ] ( [ ] { } ) always clobbers reg byte a +Statement [7] *D016 = VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [28] bitmap_init::$7 = bitmap_init::y#2 & 7 [ bitmap_init::y#2 bitmap_init::yoffs#2 bitmap_init::$7 ] ( bitmap_init:10 [ bitmap_init::y#2 bitmap_init::yoffs#2 bitmap_init::$7 ] { } ) always clobbers reg byte a Statement [35] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] ( bitmap_init:10 [ bitmap_init::y#2 bitmap_init::yoffs#1 ] { } ) always clobbers reg byte a @@ -4002,10 +4002,10 @@ ASSEMBLER BEFORE OPTIMIZATION .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_CSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -4051,8 +4051,8 @@ main: { // [2] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2 lda #PROCPORT_RAM_IO sta PROCPORT - // [3] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 jmp vicSelectGfxBank1 // main::vicSelectGfxBank1 @@ -4074,8 +4074,8 @@ main: { jmp __b2 // main::@2 __b2: - // [7] *D016 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL + // [7] *D016 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL sta D016 // [8] phi from main::@2 to main::toD0181 [phi:main::@2->main::toD0181] toD0181_from___b2: @@ -5714,10 +5714,10 @@ const byte* SCREEN = (byte*) 1024 const nomodify word SIN_SIZE = $200 const byte SIZEOF_SIGNED_WORD = 2 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) byte bitmap_clear::bgcol @@ -6032,10 +6032,10 @@ Score: 24554 .segment Basic :BasicUpstart(main) // Global Constants & labels - .const VIC_BMM = $20 - .const VIC_DEN = $10 - .const VIC_RSEL = 8 - .const VIC_CSEL = 8 + .const VICII_BMM = $20 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 + .const VICII_CSEL = 8 // Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written .const PROCPORT_DDR_MEMORY_MASK = 7 // RAM in 0xA000, 0xE000 I/O in 0xD000 @@ -6084,9 +6084,9 @@ main: { // [2] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2 lda #PROCPORT_RAM_IO sta PROCPORT - // *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 - // [3] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_BMM|VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 + // [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_BMM|VICII_DEN|VICII_RSEL|3 sta D011 // main::vicSelectGfxBank1 // CIA2->PORT_A_DDR = %00000011 @@ -6101,9 +6101,9 @@ main: { lda #vicSelectGfxBank1_toDd001_return sta CIA2 // main::@2 - // *D016 = VIC_CSEL - // [7] *D016 = VIC_CSEL -- _deref_pbuc1=vbuc2 - lda #VIC_CSEL + // *D016 = VICII_CSEL + // [7] *D016 = VICII_CSEL -- _deref_pbuc1=vbuc2 + lda #VICII_CSEL sta D016 // [8] phi from main::@2 to main::toD0181 [phi:main::@2->main::toD0181] // main::toD0181 diff --git a/src/test/ref/examples/sinplotter/sine-plotter.sym b/src/test/ref/examples/sinplotter/sine-plotter.sym index 99a85e2a6..bc1d203a3 100644 --- a/src/test/ref/examples/sinplotter/sine-plotter.sym +++ b/src/test/ref/examples/sinplotter/sine-plotter.sym @@ -16,10 +16,10 @@ const byte* SCREEN = (byte*) 1024 const nomodify word SIN_SIZE = $200 const byte SIZEOF_SIGNED_WORD = 2 const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_CSEL = 8 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_CSEL = 8 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 void bitmap_clear(byte bitmap_clear::bgcol , byte bitmap_clear::fgcol) byte bitmap_clear::bgcol diff --git a/src/test/ref/irq-hardware-clobber-jsr.asm b/src/test/ref/irq-hardware-clobber-jsr.asm index 34a2de6bd..cd4466cdb 100644 --- a/src/test/ref/irq-hardware-clobber-jsr.asm +++ b/src/test/ref/irq-hardware-clobber-jsr.asm @@ -25,7 +25,7 @@ .label RASTER = $d012 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 // VIC II IRQ Enable Register @@ -63,11 +63,11 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL |=$80 + // *VICII_CONTROL |=$80 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 lda #0 sta RASTER diff --git a/src/test/ref/irq-hardware-clobber-jsr.cfg b/src/test/ref/irq-hardware-clobber-jsr.cfg index 2cdf0fb5b..88943736a 100644 --- a/src/test/ref/irq-hardware-clobber-jsr.cfg +++ b/src/test/ref/irq-hardware-clobber-jsr.cfg @@ -14,7 +14,7 @@ main: scope:[main] from [4] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [5] *PROCPORT = PROCPORT_RAM_IO [6] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [7] *VIC_CONTROL = *VIC_CONTROL | $80 + [7] *VICII_CONTROL = *VICII_CONTROL | $80 [8] *RASTER = 0 [9] *IRQ_ENABLE = IRQ_RASTER [10] *HARDWARE_IRQ = &irq diff --git a/src/test/ref/irq-hardware-clobber-jsr.log b/src/test/ref/irq-hardware-clobber-jsr.log index e0093ddc3..e1ce900f7 100644 --- a/src/test/ref/irq-hardware-clobber-jsr.log +++ b/src/test/ref/irq-hardware-clobber-jsr.log @@ -9,7 +9,7 @@ main: scope:[main] from __start *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK *PROCPORT = PROCPORT_RAM_IO *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - *VIC_CONTROL = *VIC_CONTROL | $80 + *VICII_CONTROL = *VICII_CONTROL | $80 *RASTER = 0 *IRQ_ENABLE = IRQ_RASTER *HARDWARE_IRQ = &irq @@ -71,14 +71,14 @@ const nomodify byte* PROCPORT_DDR = (byte*)0 const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*)$d012 -const nomodify byte* VIC_CONTROL = (byte*)$d011 +const nomodify byte* VICII_CONTROL = (byte*)$d011 const nomodify byte WHITE = 1 void __start() void do_irq() __interrupt(hardware_clobber) void irq() void main() -Adding number conversion cast (unumber) $80 in *VIC_CONTROL = *VIC_CONTROL | $80 +Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80 Adding number conversion cast (unumber) 0 in *RASTER = 0 Successful SSA optimization PassNAddNumberTypeConversions Inlining cast *RASTER = (unumber)0 @@ -138,7 +138,7 @@ main: scope:[main] from [4] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [5] *PROCPORT = PROCPORT_RAM_IO [6] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR - [7] *VIC_CONTROL = *VIC_CONTROL | $80 + [7] *VICII_CONTROL = *VICII_CONTROL | $80 [8] *RASTER = 0 [9] *IRQ_ENABLE = IRQ_RASTER [10] *HARDWARE_IRQ = &irq @@ -171,7 +171,7 @@ Statement [2] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x re Statement [4] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a Statement [5] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a -Statement [7] *VIC_CONTROL = *VIC_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [7] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] *HARDWARE_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a @@ -228,7 +228,7 @@ ASSEMBLER BEFORE OPTIMIZATION .label RASTER = $d012 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 // VIC II IRQ Enable Register @@ -273,11 +273,11 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // [7] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // [7] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // [8] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 sta RASTER @@ -346,7 +346,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0 const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*) 53266 -const nomodify byte* VIC_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL = (byte*) 53265 const nomodify byte WHITE = 1 void do_irq() __interrupt(hardware_clobber) void irq() @@ -387,7 +387,7 @@ Score: 296 .label RASTER = $d012 .label BORDER_COLOR = $d020 .label BG_COLOR = $d021 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 // VIC II IRQ Enable Register @@ -436,12 +436,12 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL |=$80 - // [7] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // *VICII_CONTROL |=$80 + // [7] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 // [8] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 diff --git a/src/test/ref/irq-hardware-clobber-jsr.sym b/src/test/ref/irq-hardware-clobber-jsr.sym index eeb135922..39e013d41 100644 --- a/src/test/ref/irq-hardware-clobber-jsr.sym +++ b/src/test/ref/irq-hardware-clobber-jsr.sym @@ -13,7 +13,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0 const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*) 53266 -const nomodify byte* VIC_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL = (byte*) 53265 const nomodify byte WHITE = 1 void do_irq() __interrupt(hardware_clobber) void irq() diff --git a/src/test/ref/irq-hardware-stack.asm b/src/test/ref/irq-hardware-stack.asm index ee28df2df..6464b7e3f 100644 --- a/src/test/ref/irq-hardware-stack.asm +++ b/src/test/ref/irq-hardware-stack.asm @@ -18,7 +18,7 @@ .const PROCPORT_RAM_IO = $35 .label HARDWARE_IRQ = $fffe .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label IRQ_STATUS = $d019 .label IRQ_ENABLE = $d01a .label BG_COLOR = $d020 @@ -69,11 +69,11 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1_INTERRUPT - // *VIC_CONTROL |=$80 + // *VICII_CONTROL |=$80 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 lda #0 sta RASTER diff --git a/src/test/ref/irq-hardware-stack.cfg b/src/test/ref/irq-hardware-stack.cfg index a8578eac9..299ca9f84 100644 --- a/src/test/ref/irq-hardware-stack.cfg +++ b/src/test/ref/irq-hardware-stack.cfg @@ -15,7 +15,7 @@ main: scope:[main] from [5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [6] *PROCPORT = PROCPORT_RAM_IO [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR - [8] *VIC_CONTROL = *VIC_CONTROL | $80 + [8] *VICII_CONTROL = *VICII_CONTROL | $80 [9] *RASTER = 0 [10] *IRQ_ENABLE = IRQ_RASTER [11] *HARDWARE_IRQ = &irq diff --git a/src/test/ref/irq-hardware-stack.log b/src/test/ref/irq-hardware-stack.log index a5d1683a0..8a7682482 100644 --- a/src/test/ref/irq-hardware-stack.log +++ b/src/test/ref/irq-hardware-stack.log @@ -8,7 +8,7 @@ main: scope:[main] from __start *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK *PROCPORT = PROCPORT_RAM_IO *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR - *VIC_CONTROL = *VIC_CONTROL | $80 + *VICII_CONTROL = *VICII_CONTROL | $80 *RASTER = 0 *IRQ_ENABLE = IRQ_RASTER *HARDWARE_IRQ = &irq @@ -59,13 +59,13 @@ const nomodify byte* PROCPORT_DDR = (byte*)0 const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = $35 const nomodify byte* RASTER = (byte*)$d012 -const nomodify byte* VIC_CONTROL = (byte*)$d011 +const nomodify byte* VICII_CONTROL = (byte*)$d011 const nomodify byte WHITE = 1 void __start() __interrupt(hardware_all) void irq() void main() -Adding number conversion cast (unumber) $80 in *VIC_CONTROL = *VIC_CONTROL | $80 +Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80 Adding number conversion cast (unumber) 0 in *RASTER = 0 Successful SSA optimization PassNAddNumberTypeConversions Inlining cast *RASTER = (unumber)0 @@ -121,7 +121,7 @@ main: scope:[main] from [5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [6] *PROCPORT = PROCPORT_RAM_IO [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR - [8] *VIC_CONTROL = *VIC_CONTROL | $80 + [8] *VICII_CONTROL = *VICII_CONTROL | $80 [9] *RASTER = 0 [10] *IRQ_ENABLE = IRQ_RASTER [11] *HARDWARE_IRQ = &irq @@ -146,7 +146,7 @@ Statement [3] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x re Statement [5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a Statement [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a -Statement [8] *VIC_CONTROL = *VIC_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [8] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a Statement [9] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [10] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a Statement [11] *HARDWARE_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a @@ -184,7 +184,7 @@ ASSEMBLER BEFORE OPTIMIZATION .const PROCPORT_RAM_IO = $35 .label HARDWARE_IRQ = $fffe .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label IRQ_STATUS = $d019 .label IRQ_ENABLE = $d01a .label BG_COLOR = $d020 @@ -242,11 +242,11 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1_INTERRUPT - // [8] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // [8] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // [9] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 sta RASTER @@ -293,7 +293,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0 const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = $35 const nomodify byte* RASTER = (byte*) 53266 -const nomodify byte* VIC_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL = (byte*) 53265 const nomodify byte WHITE = 1 __interrupt(hardware_all) void irq() void main() @@ -326,7 +326,7 @@ Score: 514 .const PROCPORT_RAM_IO = $35 .label HARDWARE_IRQ = $fffe .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label IRQ_STATUS = $d019 .label IRQ_ENABLE = $d01a .label BG_COLOR = $d020 @@ -390,12 +390,12 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1_INTERRUPT - // *VIC_CONTROL |=$80 - // [8] *VIC_CONTROL = *VIC_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 + // *VICII_CONTROL |=$80 + // [8] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2 // Set raster line to $100 lda #$80 - ora VIC_CONTROL - sta VIC_CONTROL + ora VICII_CONTROL + sta VICII_CONTROL // *RASTER = $00 // [9] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 diff --git a/src/test/ref/irq-hardware-stack.sym b/src/test/ref/irq-hardware-stack.sym index ce59ba768..31006327c 100644 --- a/src/test/ref/irq-hardware-stack.sym +++ b/src/test/ref/irq-hardware-stack.sym @@ -12,7 +12,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0 const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7 const nomodify byte PROCPORT_RAM_IO = $35 const nomodify byte* RASTER = (byte*) 53266 -const nomodify byte* VIC_CONTROL = (byte*) 53265 +const nomodify byte* VICII_CONTROL = (byte*) 53265 const nomodify byte WHITE = 1 __interrupt(hardware_all) void irq() void main() diff --git a/src/test/ref/irq-idx-problem.asm b/src/test/ref/irq-idx-problem.asm index 8802f0aaa..45d71d58b 100644 --- a/src/test/ref/irq-idx-problem.asm +++ b/src/test/ref/irq-idx-problem.asm @@ -14,11 +14,11 @@ .const CIA_INTERRUPT_CLEAR = $7f // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 - .const VIC_SIZE = $30 + .const VICII_SIZE = $30 .const IRQ_CHANGE_NEXT = $7f .const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d .label RASTER = $d012 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 // VIC II IRQ Enable Register @@ -28,7 +28,7 @@ // The vector used when the KERNAL serves IRQ interrupts .label KERNEL_IRQ = $314 .label SCREEN = $400 - .label VIC_BASE = $d000 + .label VICII_BASE = $d000 .label irq_idx = 2 .segment Code __start: { @@ -47,11 +47,11 @@ table_driven_irq: { ldx IRQ_CHANGE_VAL,y // irq_idx++; inc.z irq_idx - // if (idx < VIC_SIZE) - cmp #VIC_SIZE + // if (idx < VICII_SIZE) + cmp #VICII_SIZE bcc __b2 - // if (idx < VIC_SIZE + 8) - cmp #VIC_SIZE+8 + // if (idx < VICII_SIZE + 8) + cmp #VICII_SIZE+8 bcc __b3 // *IRQ_STATUS = IRQ_RASTER lda #IRQ_RASTER @@ -71,16 +71,16 @@ table_driven_irq: { // } jmp $ea81 __b3: - // SCREEN[idx + $3f8 - VIC_SIZE] = val + // SCREEN[idx + $3f8 - VICII_SIZE] = val tay txa - sta SCREEN+-VIC_SIZE+$3f8,y + sta SCREEN+-VICII_SIZE+$3f8,y jmp __b1 __b2: - // VIC_BASE[idx] = val + // VICII_BASE[idx] = val tay txa - sta VIC_BASE,y + sta VICII_BASE,y jmp __b1 } main: { @@ -90,11 +90,11 @@ main: { // Disable CIA 1 Timer IRQ lda #CIA_INTERRUPT_CLEAR sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT - // *VIC_CONTROL &=$7f + // *VICII_CONTROL &=$7f // Set raster line to $60 lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // *RASTER = $60 lda #$60 sta RASTER diff --git a/src/test/ref/irq-idx-problem.cfg b/src/test/ref/irq-idx-problem.cfg index e1005685f..97a7bce98 100644 --- a/src/test/ref/irq-idx-problem.cfg +++ b/src/test/ref/irq-idx-problem.cfg @@ -22,10 +22,10 @@ table_driven_irq::@1: scope:[table_driven_irq] from table_driven_irq table_driv [6] table_driven_irq::idx#0 = IRQ_CHANGE_IDX[irq_idx] [7] table_driven_irq::val#0 = IRQ_CHANGE_VAL[irq_idx] [8] irq_idx = ++ irq_idx - [9] if(table_driven_irq::idx#0= *RASTER from [26] table_driven_irq::$2 = table_driven_irq::val#3 < *RASTER Successful SSA optimization Pass2UnaryNotSimplification Alias table_driven_irq::val#0 = table_driven_irq::val#1 table_driven_irq::val#4 table_driven_irq::val#2 table_driven_irq::val#3 Alias table_driven_irq::idx#0 = table_driven_irq::idx#1 table_driven_irq::idx#2 table_driven_irq::idx#3 Successful SSA optimization Pass2AliasElimination -Simple Condition table_driven_irq::$0 [13] if(table_driven_irq::idx#0=*RASTER) goto table_driven_irq::@return Successful SSA optimization Pass2ConditionalJumpSimplification if() condition always true - replacing block destination [26] if(true) goto table_driven_irq::@1 @@ -174,9 +174,9 @@ Consolidated constant in assignment table_driven_irq::$6 Successful SSA optimization Pass2ConstantAdditionElimination Alias table_driven_irq::idx#0 = table_driven_irq::$5 Successful SSA optimization Pass2AliasElimination -Converting *(pointer+n) to pointer[n] [16] *table_driven_irq::$6 = table_driven_irq::val#0 -- (SCREEN+-VIC_SIZE+$3f8)[table_driven_irq::idx#0] +Converting *(pointer+n) to pointer[n] [16] *table_driven_irq::$6 = table_driven_irq::val#0 -- (SCREEN+-VICII_SIZE+$3f8)[table_driven_irq::idx#0] Successful SSA optimization Pass2InlineDerefIdx -Eliminating unused variable table_driven_irq::$6 and assignment [15] table_driven_irq::$6 = SCREEN+-VIC_SIZE+$3f8 + table_driven_irq::idx#0 +Eliminating unused variable table_driven_irq::$6 and assignment [15] table_driven_irq::$6 = SCREEN+-VICII_SIZE+$3f8 + table_driven_irq::idx#0 Successful SSA optimization PassNEliminateUnusedVars Adding NOP phi() at start of __start Adding NOP phi() at start of __start::@1 @@ -222,10 +222,10 @@ table_driven_irq::@1: scope:[table_driven_irq] from table_driven_irq table_driv [6] table_driven_irq::idx#0 = IRQ_CHANGE_IDX[irq_idx] [7] table_driven_irq::val#0 = IRQ_CHANGE_VAL[irq_idx] [8] irq_idx = ++ irq_idx - [9] if(table_driven_irq::idx#0PORT_A_DDR = %00000011 lda #3 diff --git a/src/test/ref/line-anim.cfg b/src/test/ref/line-anim.cfg index d1e26a209..466dcf64d 100644 --- a/src/test/ref/line-anim.cfg +++ b/src/test/ref/line-anim.cfg @@ -4,7 +4,7 @@ main: scope:[main] from asm { sei } [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [2] *PROCPORT = PROCPORT_RAM_IO - [3] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::vicSelectGfxBank1 main::vicSelectGfxBank1: scope:[main] from main [4] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 diff --git a/src/test/ref/line-anim.log b/src/test/ref/line-anim.log index aa86a8934..1ad116b62 100644 --- a/src/test/ref/line-anim.log +++ b/src/test/ref/line-anim.log @@ -178,7 +178,7 @@ main: scope:[main] from __start::@1 asm { sei } *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK *PROCPORT = PROCPORT_RAM_IO - *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 main::vicSelectGfxBank1_gfx#0 = SCREEN to:main::vicSelectGfxBank1 main::vicSelectGfxBank1: scope:[main] from main @@ -594,9 +594,9 @@ const nomodify byte* RASTER = (byte*)$d012 const byte* SCREEN = (byte*)$8800 const nomodify byte SIZE = 4 const byte SIZEOF_WORD = 2 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 void __start() void bitmap_clear() bool~ bitmap_clear::$0 @@ -1012,8 +1012,8 @@ Adding number conversion cast (snumber) 0 in divr16s::$3 = divr16s::divisor#1 < Adding number conversion cast (unumber) 1 in divr16s::$9 = divr16s::neg#3 ^ 1 Adding number conversion cast (unumber) divr16s::$9 in divr16s::$9 = divr16s::neg#3 ^ (unumber)1 Adding number conversion cast (unumber) 0 in divr16s::$5 = divr16s::neg#4 == 0 -Adding number conversion cast (unumber) VIC_BMM|VIC_DEN|VIC_RSEL|3 in *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_BMM|VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_BMM|VICII_DEN|VICII_RSEL|3 in *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_BMM|VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) 3 in *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 Adding number conversion cast (unumber) $40 in main::vicSelectGfxBank1_toDd001_$1 = main::vicSelectGfxBank1_toDd001_$0 / $40 Adding number conversion cast (unumber) main::vicSelectGfxBank1_toDd001_$1 in main::vicSelectGfxBank1_toDd001_$1 = main::vicSelectGfxBank1_toDd001_$0 / (unumber)$40 @@ -1061,7 +1061,7 @@ Adding number conversion cast (unumber) $fff8 in bitmap_plot::$0 = bitmap_plot:: Adding number conversion cast (unumber) bitmap_plot::$0 in bitmap_plot::$0 = bitmap_plot::x#1 & (unumber)$fff8 Successful SSA optimization PassNAddNumberTypeConversions Inlining cast divr16s::neg#1 = (unumber)1 -Inlining cast *D011 = (unumber)VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3 Inlining cast screen_fill::ch#0 = (unumber)$10 Inlining cast x_add[point_init::point_idx#3] = (snumber)-$10 @@ -1091,7 +1091,7 @@ Simplifying constant integer cast 1 Simplifying constant integer cast 0 Simplifying constant integer cast 1 Simplifying constant integer cast 0 -Simplifying constant integer cast VIC_BMM|VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_BMM|VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast 3 Simplifying constant integer cast $40 @@ -1673,7 +1673,7 @@ main: scope:[main] from asm { sei } [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [2] *PROCPORT = PROCPORT_RAM_IO - [3] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 + [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 to:main::vicSelectGfxBank1 main::vicSelectGfxBank1: scope:[main] from main [4] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 @@ -2310,7 +2310,7 @@ REGISTER UPLIFT POTENTIAL REGISTERS Equivalence Class zp[1]:40 [ bitmap_init::$4 ] has ALU potential. Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a -Statement [3] *D011 = VIC_BMM|VIC_DEN|VIC_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a +Statement [3] *D011 = VICII_BMM|VICII_DEN|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [4] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a Statement [6] *((byte*)CIA2) = main::vicSelectGfxBank1_toDd001_return#0 [ ] ( [ ] { } ) always clobbers reg byte a Statement [8] *D018 = main::toD0181_return#0 [ ] ( [ ] { } ) always clobbers reg byte a @@ -2389,7 +2389,7 @@ Statement [140] if(divr16u::rem#5PORT_A_DDR = %00000011 diff --git a/src/test/ref/line-anim.sym b/src/test/ref/line-anim.sym index 85a029707..017596f35 100644 --- a/src/test/ref/line-anim.sym +++ b/src/test/ref/line-anim.sym @@ -12,9 +12,9 @@ const nomodify byte PROCPORT_RAM_IO = 5 const nomodify byte* RASTER = (byte*) 53266 const byte* SCREEN = (byte*) 34816 const nomodify byte SIZE = 4 -const nomodify byte VIC_BMM = $20 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte VICII_BMM = $20 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 void bitmap_clear() byte* bitmap_clear::bitmap word bitmap_clear::bitmap#0 bitmap zp[2]:3 11.0 diff --git a/src/test/ref/millfork-benchmarks/plasma-kc.asm b/src/test/ref/millfork-benchmarks/plasma-kc.asm index 2f622d2fb..6c7186559 100644 --- a/src/test/ref/millfork-benchmarks/plasma-kc.asm +++ b/src/test/ref/millfork-benchmarks/plasma-kc.asm @@ -10,7 +10,7 @@ :BasicUpstart(__start) .const PAGE1 = SCREEN1>>6&$f0|CHARSET>>$a&$e .const PAGE2 = SCREEN2>>6&$f0|CHARSET>>$a&$e - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 // The CIA#2: Serial bus, RS-232, VIC memory bank .label CIA2 = $dd00 .label SCREEN1 = $e000 @@ -49,8 +49,8 @@ main: { and.z block // CIA2->PORT_A = tmp sta CIA2 - // v = *VIC_MEMORY - lda VIC_MEMORY + // v = *VICII_MEMORY + lda VICII_MEMORY sta.z v lda #<$1f4 sta.z count @@ -62,9 +62,9 @@ main: { lda.z count ora.z count+1 bne __b2 - // *VIC_MEMORY = v + // *VICII_MEMORY = v lda.z v - sta VIC_MEMORY + sta VICII_MEMORY // CIA2->PORT_A = block lda.z block sta CIA2 @@ -81,9 +81,9 @@ main: { lda #>SCREEN1 sta.z doplasma.scrn+1 jsr doplasma - // *VIC_MEMORY = PAGE1 + // *VICII_MEMORY = PAGE1 lda #PAGE1 - sta VIC_MEMORY + sta VICII_MEMORY // doplasma ((char*)SCREEN2) /* Build page 2, then make it visible */ lda #SCREEN2 sta.z doplasma.scrn+1 jsr doplasma - // *VIC_MEMORY = PAGE2 + // *VICII_MEMORY = PAGE2 lda #PAGE2 - sta VIC_MEMORY + sta VICII_MEMORY // --count; lda.z count bne !+ diff --git a/src/test/ref/millfork-benchmarks/plasma-kc.cfg b/src/test/ref/millfork-benchmarks/plasma-kc.cfg index 29c50e7f7..6ae7abe57 100644 --- a/src/test/ref/millfork-benchmarks/plasma-kc.cfg +++ b/src/test/ref/millfork-benchmarks/plasma-kc.cfg @@ -27,14 +27,14 @@ main::@5: scope:[main] from main::@4 [9] main::block#1 = *((byte*)CIA2) [10] main::tmp#1 = main::block#1 & $fc [11] *((byte*)CIA2) = main::tmp#1 - [12] main::v#1 = *VIC_MEMORY + [12] main::v#1 = *VICII_MEMORY to:main::@1 main::@1: scope:[main] from main::@5 main::@7 [13] main::count#2 = phi( main::@5/$1f4, main::@7/main::count#1 ) [14] if(0!=main::count#2) goto main::@2 to:main::@3 main::@3: scope:[main] from main::@1 - [15] *VIC_MEMORY = main::v#1 + [15] *VICII_MEMORY = main::v#1 [16] *((byte*)CIA2) = main::block#1 [17] call end to:main::@return @@ -46,11 +46,11 @@ main::@2: scope:[main] from main::@1 [20] call doplasma to:main::@6 main::@6: scope:[main] from main::@2 - [21] *VIC_MEMORY = PAGE1 + [21] *VICII_MEMORY = PAGE1 [22] call doplasma to:main::@7 main::@7: scope:[main] from main::@6 - [23] *VIC_MEMORY = PAGE2 + [23] *VICII_MEMORY = PAGE2 [24] main::count#1 = -- main::count#2 to:main::@1 diff --git a/src/test/ref/millfork-benchmarks/plasma-kc.log b/src/test/ref/millfork-benchmarks/plasma-kc.log index b51e7f8d3..8b66345bf 100644 --- a/src/test/ref/millfork-benchmarks/plasma-kc.log +++ b/src/test/ref/millfork-benchmarks/plasma-kc.log @@ -432,7 +432,7 @@ main::@5: scope:[main] from main::@4 main::tmp#1 = main::$2 main::tmp#2 = main::tmp#1 | (byte)(word)SCREEN1>>$e^3 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = main::tmp#2 - main::v#1 = *VIC_MEMORY + main::v#1 = *VICII_MEMORY to:main::@1 main::@1: scope:[main] from main::@5 main::@7 rand_state#31 = phi( main::@5/rand_state#35, main::@7/rand_state#36 ) @@ -464,7 +464,7 @@ main::@6: scope:[main] from main::@2 main::block#5 = phi( main::@2/main::block#6 ) main::v#5 = phi( main::@2/main::v#6 ) main::count#5 = phi( main::@2/main::count#7 ) - *VIC_MEMORY = PAGE1 + *VICII_MEMORY = PAGE1 doplasma::scrn#2 = (byte*)SCREEN2 call doplasma to:main::@7 @@ -476,7 +476,7 @@ main::@7: scope:[main] from main::@6 main::block#4 = phi( main::@6/main::block#5 ) main::v#4 = phi( main::@6/main::v#5 ) main::count#3 = phi( main::@6/main::count#5 ) - *VIC_MEMORY = PAGE2 + *VICII_MEMORY = PAGE2 main::count#1 = -- main::count#3 to:main::@1 main::@3: scope:[main] from main::@1 @@ -486,7 +486,7 @@ main::@3: scope:[main] from main::@1 Ticks#15 = phi( main::@1/Ticks#18 ) main::block#2 = phi( main::@1/main::block#3 ) main::v#2 = phi( main::@1/main::v#3 ) - *VIC_MEMORY = main::v#2 + *VICII_MEMORY = main::v#2 *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = main::block#2 call end to:main::@8 @@ -597,7 +597,7 @@ word Ticks#6 word Ticks#7 word Ticks#8 word Ticks#9 -const nomodify byte* VIC_MEMORY = (byte*)$d018 +const nomodify byte* VICII_MEMORY = (byte*)$d018 void __start() const to_nomodify byte* bittab[] = { 1, 2, 4, 8, $10, $20, $40, $80 } void doplasma(byte* doplasma::scrn) @@ -1538,14 +1538,14 @@ main::@5: scope:[main] from main::@4 [9] main::block#1 = *((byte*)CIA2) [10] main::tmp#1 = main::block#1 & $fc [11] *((byte*)CIA2) = main::tmp#1 - [12] main::v#1 = *VIC_MEMORY + [12] main::v#1 = *VICII_MEMORY to:main::@1 main::@1: scope:[main] from main::@5 main::@7 [13] main::count#2 = phi( main::@5/$1f4, main::@7/main::count#1 ) [14] if(0!=main::count#2) goto main::@2 to:main::@3 main::@3: scope:[main] from main::@1 - [15] *VIC_MEMORY = main::v#1 + [15] *VICII_MEMORY = main::v#1 [16] *((byte*)CIA2) = main::block#1 [17] call end to:main::@return @@ -1557,11 +1557,11 @@ main::@2: scope:[main] from main::@1 [20] call doplasma to:main::@6 main::@6: scope:[main] from main::@2 - [21] *VIC_MEMORY = PAGE1 + [21] *VICII_MEMORY = PAGE1 [22] call doplasma to:main::@7 main::@7: scope:[main] from main::@6 - [23] *VIC_MEMORY = PAGE2 + [23] *VICII_MEMORY = PAGE2 [24] main::count#1 = -- main::count#2 to:main::@1 @@ -2026,8 +2026,8 @@ Statement [1] last_time = 0 [ last_time ] ( [ last_time ] { } ) always clobber Statement [14] if(0!=main::count#2) goto main::@2 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:29 [ main::block#1 ] Removing always clobbered register reg byte a as potential for zp[1]:31 [ main::v#1 ] -Statement [21] *VIC_MEMORY = PAGE1 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a -Statement [23] *VIC_MEMORY = PAGE2 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a +Statement [21] *VICII_MEMORY = PAGE1 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a +Statement [23] *VICII_MEMORY = PAGE2 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a Statement [24] main::count#1 = -- main::count#2 [ last_time main::block#1 main::v#1 main::count#1 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#1 ] { } ) always clobbers reg byte a Statement [27] if(makechar::c#3<$100) goto makechar::@2 [ makechar::c#3 rand_state#14 ] ( main:3::makechar:6 [ last_time makechar::c#3 rand_state#14 ] { } ) always clobbers reg byte a Statement [29] makechar::$9 = (byte)makechar::c#3 [ makechar::c#3 rand_state#14 makechar::$9 ] ( main:3::makechar:6 [ last_time makechar::c#3 rand_state#14 makechar::$9 ] { } ) always clobbers reg byte a @@ -2083,8 +2083,8 @@ Removing always clobbered register reg byte y as potential for zp[1]:23 [ print_ Statement [1] last_time = 0 [ last_time ] ( [ last_time ] { } ) always clobbers reg byte a Statement [10] main::tmp#1 = main::block#1 & $fc [ last_time main::block#1 main::tmp#1 ] ( main:3 [ last_time main::block#1 main::tmp#1 ] { } ) always clobbers reg byte a Statement [14] if(0!=main::count#2) goto main::@2 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a -Statement [21] *VIC_MEMORY = PAGE1 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a -Statement [23] *VIC_MEMORY = PAGE2 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a +Statement [21] *VICII_MEMORY = PAGE1 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a +Statement [23] *VICII_MEMORY = PAGE2 [ last_time main::block#1 main::v#1 main::count#2 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#2 ] { } ) always clobbers reg byte a Statement [24] main::count#1 = -- main::count#2 [ last_time main::block#1 main::v#1 main::count#1 ] ( main:3 [ last_time main::block#1 main::v#1 main::count#1 ] { } ) always clobbers reg byte a Statement [27] if(makechar::c#3<$100) goto makechar::@2 [ makechar::c#3 rand_state#14 ] ( main:3::makechar:6 [ last_time makechar::c#3 rand_state#14 ] { } ) always clobbers reg byte a Statement [29] makechar::$9 = (byte)makechar::c#3 [ makechar::c#3 rand_state#14 makechar::$9 ] ( main:3::makechar:6 [ last_time makechar::c#3 rand_state#14 makechar::$9 ] { } ) always clobbers reg byte a @@ -2280,7 +2280,7 @@ ASSEMBLER BEFORE OPTIMIZATION // Global Constants & labels .const PAGE1 = SCREEN1>>6&$f0|CHARSET>>$a&$e .const PAGE2 = SCREEN2>>6&$f0|CHARSET>>$a&$e - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 // The CIA#2: Serial bus, RS-232, VIC memory bank .label CIA2 = $dd00 .label SCREEN1 = $e000 @@ -2347,8 +2347,8 @@ main: { and.z block // [11] *((byte*)CIA2) = main::tmp#1 -- _deref_pbuc1=vbuaa sta CIA2 - // [12] main::v#1 = *VIC_MEMORY -- vbuz1=_deref_pbuc1 - lda VIC_MEMORY + // [12] main::v#1 = *VICII_MEMORY -- vbuz1=_deref_pbuc1 + lda VICII_MEMORY sta.z v // [13] phi from main::@5 to main::@1 [phi:main::@5->main::@1] __b1_from___b5: @@ -2368,9 +2368,9 @@ main: { jmp __b3 // main::@3 __b3: - // [15] *VIC_MEMORY = main::v#1 -- _deref_pbuc1=vbuz1 + // [15] *VICII_MEMORY = main::v#1 -- _deref_pbuc1=vbuz1 lda.z v - sta VIC_MEMORY + sta VICII_MEMORY // [16] *((byte*)CIA2) = main::block#1 -- _deref_pbuc1=vbuz1 lda.z block sta CIA2 @@ -2400,9 +2400,9 @@ main: { jmp __b6 // main::@6 __b6: - // [21] *VIC_MEMORY = PAGE1 -- _deref_pbuc1=vbuc2 + // [21] *VICII_MEMORY = PAGE1 -- _deref_pbuc1=vbuc2 lda #PAGE1 - sta VIC_MEMORY + sta VICII_MEMORY // [22] call doplasma /* Build page 2, then make it visible */ // [61] phi from main::@6 to doplasma [phi:main::@6->doplasma] @@ -2416,9 +2416,9 @@ main: { jmp __b7 // main::@7 __b7: - // [23] *VIC_MEMORY = PAGE2 -- _deref_pbuc1=vbuc2 + // [23] *VICII_MEMORY = PAGE2 -- _deref_pbuc1=vbuc2 lda #PAGE2 - sta VIC_MEMORY + sta VICII_MEMORY // [24] main::count#1 = -- main::count#2 -- vwuz1=_dec_vwuz1 lda.z count bne !+ @@ -3154,7 +3154,7 @@ const nomodify byte* SCREEN2 = (byte*) 58368 word Ticks word Ticks#0 Ticks zp[2]:20 101.0 word Ticks#1 Ticks_1 zp[2]:22 202.0 -const nomodify byte* VIC_MEMORY = (byte*) 53272 +const nomodify byte* VICII_MEMORY = (byte*) 53272 void __start() const to_nomodify byte* bittab[] = { 1, 2, 4, 8, $10, $20, $40, $80 } void doplasma(byte* doplasma::scrn) @@ -3325,7 +3325,7 @@ Score: 102109 // Global Constants & labels .const PAGE1 = SCREEN1>>6&$f0|CHARSET>>$a&$e .const PAGE2 = SCREEN2>>6&$f0|CHARSET>>$a&$e - .label VIC_MEMORY = $d018 + .label VICII_MEMORY = $d018 // The CIA#2: Serial bus, RS-232, VIC memory bank .label CIA2 = $dd00 .label SCREEN1 = $e000 @@ -3383,9 +3383,9 @@ main: { // CIA2->PORT_A = tmp // [11] *((byte*)CIA2) = main::tmp#1 -- _deref_pbuc1=vbuaa sta CIA2 - // v = *VIC_MEMORY - // [12] main::v#1 = *VIC_MEMORY -- vbuz1=_deref_pbuc1 - lda VIC_MEMORY + // v = *VICII_MEMORY + // [12] main::v#1 = *VICII_MEMORY -- vbuz1=_deref_pbuc1 + lda VICII_MEMORY sta.z v // [13] phi from main::@5 to main::@1 [phi:main::@5->main::@1] // [13] phi main::count#2 = $1f4 [phi:main::@5->main::@1#0] -- vwuz1=vwuc1 @@ -3402,10 +3402,10 @@ main: { ora.z count+1 bne __b2 // main::@3 - // *VIC_MEMORY = v - // [15] *VIC_MEMORY = main::v#1 -- _deref_pbuc1=vbuz1 + // *VICII_MEMORY = v + // [15] *VICII_MEMORY = main::v#1 -- _deref_pbuc1=vbuz1 lda.z v - sta VIC_MEMORY + sta VICII_MEMORY // CIA2->PORT_A = block // [16] *((byte*)CIA2) = main::block#1 -- _deref_pbuc1=vbuz1 lda.z block @@ -3432,10 +3432,10 @@ main: { sta.z doplasma.scrn+1 jsr doplasma // main::@6 - // *VIC_MEMORY = PAGE1 - // [21] *VIC_MEMORY = PAGE1 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = PAGE1 + // [21] *VICII_MEMORY = PAGE1 -- _deref_pbuc1=vbuc2 lda #PAGE1 - sta VIC_MEMORY + sta VICII_MEMORY // doplasma ((char*)SCREEN2) // [22] call doplasma /* Build page 2, then make it visible */ @@ -3447,10 +3447,10 @@ main: { sta.z doplasma.scrn+1 jsr doplasma // main::@7 - // *VIC_MEMORY = PAGE2 - // [23] *VIC_MEMORY = PAGE2 -- _deref_pbuc1=vbuc2 + // *VICII_MEMORY = PAGE2 + // [23] *VICII_MEMORY = PAGE2 -- _deref_pbuc1=vbuc2 lda #PAGE2 - sta VIC_MEMORY + sta VICII_MEMORY // --count; // [24] main::count#1 = -- main::count#2 -- vwuz1=_dec_vwuz1 lda.z count diff --git a/src/test/ref/millfork-benchmarks/plasma-kc.sym b/src/test/ref/millfork-benchmarks/plasma-kc.sym index 5f5fd1278..cd249791c 100644 --- a/src/test/ref/millfork-benchmarks/plasma-kc.sym +++ b/src/test/ref/millfork-benchmarks/plasma-kc.sym @@ -11,7 +11,7 @@ const nomodify byte* SCREEN2 = (byte*) 58368 word Ticks word Ticks#0 Ticks zp[2]:20 101.0 word Ticks#1 Ticks_1 zp[2]:22 202.0 -const nomodify byte* VIC_MEMORY = (byte*) 53272 +const nomodify byte* VICII_MEMORY = (byte*) 53272 void __start() const to_nomodify byte* bittab[] = { 1, 2, 4, 8, $10, $20, $40, $80 } void doplasma(byte* doplasma::scrn) diff --git a/src/test/ref/multiplexer-irq/simple-multiplexer-irq.asm b/src/test/ref/multiplexer-irq/simple-multiplexer-irq.asm index be5b8abd7..d89d08768 100644 --- a/src/test/ref/multiplexer-irq/simple-multiplexer-irq.asm +++ b/src/test/ref/multiplexer-irq/simple-multiplexer-irq.asm @@ -12,8 +12,8 @@ :BasicUpstart(__start) // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 .const WHITE = 1 @@ -29,7 +29,7 @@ .label SPRITES_ENABLE = $d015 .label RASTER = $d012 .label BORDER_COLOR = $d020 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 @@ -227,8 +227,8 @@ plexShowSprite: { init: { // Set the x-positions & pointers .label xp = 2 - // *D011 = VIC_DEN | VIC_RSEL | 3 - lda #VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_DEN | VICII_RSEL | 3 + lda #VICII_DEN|VICII_RSEL|3 sta D011 // plexInit(SCREEN) // Initialize the multiplexer @@ -291,10 +291,10 @@ init: { sta KERNEL_IRQ lda #>plex_irq sta KERNEL_IRQ+1 - // *VIC_CONTROL &= 0x7f + // *VICII_CONTROL &= 0x7f lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // *RASTER = 0x0 lda #0 sta RASTER diff --git a/src/test/ref/multiplexer-irq/simple-multiplexer-irq.cfg b/src/test/ref/multiplexer-irq/simple-multiplexer-irq.cfg index 8cef1e267..45d1944b5 100644 --- a/src/test/ref/multiplexer-irq/simple-multiplexer-irq.cfg +++ b/src/test/ref/multiplexer-irq/simple-multiplexer-irq.cfg @@ -116,7 +116,7 @@ plexShowSprite::@1: scope:[plexShowSprite] from plexShowSprite::@5 void init() init: scope:[init] from main - [57] *D011 = VIC_DEN|VIC_RSEL|3 + [57] *D011 = VICII_DEN|VICII_RSEL|3 [58] call plexInit to:init::@1 init::@1: scope:[init] from init init::@1 @@ -144,7 +144,7 @@ init::@4: scope:[init] from init::@3 [73] *IRQ_ENABLE = IRQ_RASTER [74] *IRQ_STATUS = IRQ_RASTER [75] *KERNEL_IRQ = &plex_irq - [76] *VIC_CONTROL = *VIC_CONTROL & $7f + [76] *VICII_CONTROL = *VICII_CONTROL & $7f [77] *RASTER = 0 asm { cli } to:init::@return diff --git a/src/test/ref/multiplexer-irq/simple-multiplexer-irq.log b/src/test/ref/multiplexer-irq/simple-multiplexer-irq.log index 0cd97307e..ca2152504 100644 --- a/src/test/ref/multiplexer-irq/simple-multiplexer-irq.log +++ b/src/test/ref/multiplexer-irq/simple-multiplexer-irq.log @@ -168,7 +168,7 @@ main::@return: scope:[main] from main::@2 void init() init: scope:[init] from main - *D011 = VIC_DEN|VIC_RSEL|3 + *D011 = VICII_DEN|VICII_RSEL|3 plexInit::screen#0 = SCREEN call plexInit to:init::@5 @@ -204,7 +204,7 @@ init::@4: scope:[init] from init::@3 *IRQ_ENABLE = IRQ_RASTER *IRQ_STATUS = IRQ_RASTER *KERNEL_IRQ = &plex_irq - *VIC_CONTROL = *VIC_CONTROL & $7f + *VICII_CONTROL = *VICII_CONTROL & $7f *RASTER = 0 asm { cli } to:init::@return @@ -358,9 +358,9 @@ const nomodify byte* SPRITES_ENABLE = (byte*)$d015 const nomodify byte* SPRITES_XMSB = (byte*)$d010 const nomodify byte* SPRITES_XPOS = (byte*)$d000 const nomodify byte* SPRITES_YPOS = (byte*)$d001 -const nomodify byte* VIC_CONTROL = (byte*)$d011 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*)$d011 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 const byte* YSIN[$100] = kickasm {{ .fill $100, round(139.5+89.5*sin(toRadians(360*i/256))) }} @@ -532,13 +532,13 @@ Adding number conversion cast (unumber) plexShowSprite::$6 in plexShowSprite::$6 Adding number conversion cast (unumber) 1 in plex_sprite_msb = plex_sprite_msb << 1 Adding number conversion cast (unumber) 0 in plexShowSprite::$7 = plex_sprite_msb == 0 Adding number conversion cast (unumber) 1 in plex_sprite_msb = 1 -Adding number conversion cast (unumber) VIC_DEN|VIC_RSEL|3 in *D011 = VIC_DEN|VIC_RSEL|3 -Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VIC_DEN|VIC_RSEL|3 +Adding number conversion cast (unumber) VICII_DEN|VICII_RSEL|3 in *D011 = VICII_DEN|VICII_RSEL|3 +Adding number conversion cast (unumber) 3 in *D011 = ((unumber)) VICII_DEN|VICII_RSEL|3 Adding number conversion cast (unumber) $40 in PLEX_PTR[init::sx#2] = (byte)SPRITE/$40 Adding number conversion cast (unumber) 9 in init::xp#1 = init::xp#2 + 9 Adding number conversion cast (unumber) 1 in init::sx#1 = init::sx#2 + rangenext(0,PLEX_COUNT-1) Adding number conversion cast (unumber) $ff in *SPRITES_ENABLE = $ff -Adding number conversion cast (unumber) $7f in *VIC_CONTROL = *VIC_CONTROL & $7f +Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f Adding number conversion cast (unumber) 0 in *RASTER = 0 Adding number conversion cast (unumber) 2 in plex_irq::$4 = *RASTER + 2 Adding number conversion cast (unumber) plex_irq::$4 in plex_irq::$4 = *RASTER + (unumber)2 @@ -554,7 +554,7 @@ Inlining cast plex_sprite_msb = (unumber)1 Inlining cast PLEX_FREE_YPOS[plexSort::plexFreePrepare1_s#2] = (unumber)0 Inlining cast plex_free_next = (unumber)0 Inlining cast plex_sprite_msb = (unumber)1 -Inlining cast *D011 = (unumber)VIC_DEN|VIC_RSEL|(unumber)3 +Inlining cast *D011 = (unumber)VICII_DEN|VICII_RSEL|(unumber)3 Inlining cast *SPRITES_ENABLE = (unumber)$ff Inlining cast *RASTER = (unumber)0 Inlining cast *RASTER = (unumber)0 @@ -596,7 +596,7 @@ Simplifying constant integer cast 7 Simplifying constant integer cast 1 Simplifying constant integer cast 0 Simplifying constant integer cast 1 -Simplifying constant integer cast VIC_DEN|VIC_RSEL|(unumber)3 +Simplifying constant integer cast VICII_DEN|VICII_RSEL|(unumber)3 Simplifying constant integer cast 3 Simplifying constant integer cast $40 Simplifying constant integer cast 9 @@ -1018,7 +1018,7 @@ plexShowSprite::@1: scope:[plexShowSprite] from plexShowSprite::@5 void init() init: scope:[init] from main - [57] *D011 = VIC_DEN|VIC_RSEL|3 + [57] *D011 = VICII_DEN|VICII_RSEL|3 [58] call plexInit to:init::@1 init::@1: scope:[init] from init init::@1 @@ -1046,7 +1046,7 @@ init::@4: scope:[init] from init::@3 [73] *IRQ_ENABLE = IRQ_RASTER [74] *IRQ_STATUS = IRQ_RASTER [75] *KERNEL_IRQ = &plex_irq - [76] *VIC_CONTROL = *VIC_CONTROL & $7f + [76] *VICII_CONTROL = *VICII_CONTROL & $7f [77] *RASTER = 0 asm { cli } to:init::@return @@ -1371,7 +1371,7 @@ Statement [47] *SPRITES_XMSB = *SPRITES_XMSB & plexShowSprite::$9 [ PLEX_SCREEN_ Statement [53] if(plex_sprite_msb!=0) goto plexShowSprite::@return [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] ( plexShowSprite:13 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] { } ) always clobbers reg byte a Statement [54] plex_sprite_msb = 1 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] ( plexShowSprite:13 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] { } ) always clobbers reg byte a Statement [56] *SPRITES_XMSB = *SPRITES_XMSB | plex_sprite_msb [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] ( plexShowSprite:13 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] { } ) always clobbers reg byte a -Statement [57] *D011 = VIC_DEN|VIC_RSEL|3 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a +Statement [57] *D011 = VICII_DEN|VICII_RSEL|3 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [60] PLEX_PTR[init::sx#2] = (byte)SPRITE/$40 [ init::sx#2 init::xp#2 ] ( main:8::init:27 [ framedone init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:2 [ init::sx#2 init::sx#1 ] Statement [61] init::$3 = init::sx#2 << 1 [ init::sx#2 init::xp#2 init::$3 ] ( main:8::init:27 [ framedone init::sx#2 init::xp#2 init::$3 ] { } ) always clobbers reg byte a @@ -1384,7 +1384,7 @@ Statement [72] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUP Statement [73] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [74] *IRQ_STATUS = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [75] *KERNEL_IRQ = &plex_irq [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a -Statement [76] *VIC_CONTROL = *VIC_CONTROL & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a +Statement [76] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [77] *RASTER = 0 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [82] if(framedone) goto loop::@3 [ framedone loop::sin_idx#6 ] ( main:8::loop:29 [ framedone loop::sin_idx#6 ] { } ) always clobbers reg byte a Removing always clobbered register reg byte a as potential for zp[1]:6 [ loop::sin_idx#6 loop::sin_idx#1 ] @@ -1439,7 +1439,7 @@ Statement [47] *SPRITES_XMSB = *SPRITES_XMSB & plexShowSprite::$9 [ PLEX_SCREEN_ Statement [53] if(plex_sprite_msb!=0) goto plexShowSprite::@return [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] ( plexShowSprite:13 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] { } ) always clobbers reg byte a Statement [54] plex_sprite_msb = 1 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] ( plexShowSprite:13 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] { } ) always clobbers reg byte a Statement [56] *SPRITES_XMSB = *SPRITES_XMSB | plex_sprite_msb [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] ( plexShowSprite:13 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] { } ) always clobbers reg byte a -Statement [57] *D011 = VIC_DEN|VIC_RSEL|3 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a +Statement [57] *D011 = VICII_DEN|VICII_RSEL|3 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [60] PLEX_PTR[init::sx#2] = (byte)SPRITE/$40 [ init::sx#2 init::xp#2 ] ( main:8::init:27 [ framedone init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a Statement [61] init::$3 = init::sx#2 << 1 [ init::sx#2 init::xp#2 init::$3 ] ( main:8::init:27 [ framedone init::sx#2 init::xp#2 init::$3 ] { } ) always clobbers reg byte a Statement [62] PLEX_XPOS[init::$3] = init::xp#2 [ init::sx#2 init::xp#2 ] ( main:8::init:27 [ framedone init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a @@ -1450,7 +1450,7 @@ Statement [72] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUP Statement [73] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [74] *IRQ_STATUS = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [75] *KERNEL_IRQ = &plex_irq [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a -Statement [76] *VIC_CONTROL = *VIC_CONTROL & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a +Statement [76] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [77] *RASTER = 0 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [82] if(framedone) goto loop::@3 [ framedone loop::sin_idx#6 ] ( main:8::loop:29 [ framedone loop::sin_idx#6 ] { } ) always clobbers reg byte a Statement [83] *BORDER_COLOR = RED [ loop::sin_idx#6 ] ( main:8::loop:29 [ loop::sin_idx#6 ] { } ) always clobbers reg byte a @@ -1497,7 +1497,7 @@ Statement [47] *SPRITES_XMSB = *SPRITES_XMSB & plexShowSprite::$9 [ PLEX_SCREEN_ Statement [53] if(plex_sprite_msb!=0) goto plexShowSprite::@return [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] ( plexShowSprite:13 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] { } ) always clobbers reg byte a Statement [54] plex_sprite_msb = 1 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] ( plexShowSprite:13 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] { } ) always clobbers reg byte a Statement [56] *SPRITES_XMSB = *SPRITES_XMSB | plex_sprite_msb [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] ( plexShowSprite:13 [ PLEX_SCREEN_PTR plex_show_idx plex_sprite_idx plex_sprite_msb plex_free_next ] { } ) always clobbers reg byte a -Statement [57] *D011 = VIC_DEN|VIC_RSEL|3 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a +Statement [57] *D011 = VICII_DEN|VICII_RSEL|3 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [60] PLEX_PTR[init::sx#2] = (byte)SPRITE/$40 [ init::sx#2 init::xp#2 ] ( main:8::init:27 [ framedone init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a Statement [61] init::$3 = init::sx#2 << 1 [ init::sx#2 init::xp#2 init::$3 ] ( main:8::init:27 [ framedone init::sx#2 init::xp#2 init::$3 ] { } ) always clobbers reg byte a Statement [62] PLEX_XPOS[init::$3] = init::xp#2 [ init::sx#2 init::xp#2 ] ( main:8::init:27 [ framedone init::sx#2 init::xp#2 ] { } ) always clobbers reg byte a @@ -1508,7 +1508,7 @@ Statement [72] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUP Statement [73] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [74] *IRQ_STATUS = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [75] *KERNEL_IRQ = &plex_irq [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a -Statement [76] *VIC_CONTROL = *VIC_CONTROL & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a +Statement [76] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [77] *RASTER = 0 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a Statement [82] if(framedone) goto loop::@3 [ framedone loop::sin_idx#6 ] ( main:8::loop:29 [ framedone loop::sin_idx#6 ] { } ) always clobbers reg byte a Statement [83] *BORDER_COLOR = RED [ loop::sin_idx#6 ] ( main:8::loop:29 [ loop::sin_idx#6 ] { } ) always clobbers reg byte a @@ -1667,8 +1667,8 @@ ASSEMBLER BEFORE OPTIMIZATION // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 .const WHITE = 1 @@ -1684,7 +1684,7 @@ ASSEMBLER BEFORE OPTIMIZATION .label SPRITES_ENABLE = $d015 .label RASTER = $d012 .label BORDER_COLOR = $d020 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 @@ -1957,8 +1957,8 @@ plexShowSprite: { init: { // Set the x-positions & pointers .label xp = 2 - // [57] *D011 = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_RSEL|3 + // [57] *D011 = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 sta D011 // [58] call plexInit // Initialize the multiplexer @@ -2053,10 +2053,10 @@ init: { sta KERNEL_IRQ lda #>plex_irq sta KERNEL_IRQ+1 - // [76] *VIC_CONTROL = *VIC_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // [76] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // [77] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 sta RASTER @@ -2495,9 +2495,9 @@ const nomodify byte* SPRITES_ENABLE = (byte*) 53269 const nomodify byte* SPRITES_XMSB = (byte*) 53264 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 const byte* YSIN[$100] = kickasm {{ .fill $100, round(139.5+89.5*sin(toRadians(360*i/256))) }} @@ -2631,8 +2631,8 @@ Score: 43654 // Global Constants & labels // Value that disables all CIA interrupts when stored to the CIA Interrupt registers .const CIA_INTERRUPT_CLEAR = $7f - .const VIC_DEN = $10 - .const VIC_RSEL = 8 + .const VICII_DEN = $10 + .const VICII_RSEL = 8 // Bits for the VICII IRQ Status/Enable Registers .const IRQ_RASTER = 1 .const WHITE = 1 @@ -2648,7 +2648,7 @@ Score: 43654 .label SPRITES_ENABLE = $d015 .label RASTER = $d012 .label BORDER_COLOR = $d020 - .label VIC_CONTROL = $d011 + .label VICII_CONTROL = $d011 .label D011 = $d011 // VIC II IRQ Status Register .label IRQ_STATUS = $d019 @@ -2931,9 +2931,9 @@ plexShowSprite: { init: { // Set the x-positions & pointers .label xp = 2 - // *D011 = VIC_DEN | VIC_RSEL | 3 - // [57] *D011 = VIC_DEN|VIC_RSEL|3 -- _deref_pbuc1=vbuc2 - lda #VIC_DEN|VIC_RSEL|3 + // *D011 = VICII_DEN | VICII_RSEL | 3 + // [57] *D011 = VICII_DEN|VICII_RSEL|3 -- _deref_pbuc1=vbuc2 + lda #VICII_DEN|VICII_RSEL|3 sta D011 // plexInit(SCREEN) // [58] call plexInit @@ -3027,11 +3027,11 @@ init: { sta KERNEL_IRQ lda #>plex_irq sta KERNEL_IRQ+1 - // *VIC_CONTROL &= 0x7f - // [76] *VIC_CONTROL = *VIC_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 + // *VICII_CONTROL &= 0x7f + // [76] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2 lda #$7f - and VIC_CONTROL - sta VIC_CONTROL + and VICII_CONTROL + sta VICII_CONTROL // *RASTER = 0x0 // [77] *RASTER = 0 -- _deref_pbuc1=vbuc2 lda #0 diff --git a/src/test/ref/multiplexer-irq/simple-multiplexer-irq.sym b/src/test/ref/multiplexer-irq/simple-multiplexer-irq.sym index 5f6501d87..baf8d4048 100644 --- a/src/test/ref/multiplexer-irq/simple-multiplexer-irq.sym +++ b/src/test/ref/multiplexer-irq/simple-multiplexer-irq.sym @@ -28,9 +28,9 @@ const nomodify byte* SPRITES_ENABLE = (byte*) 53269 const nomodify byte* SPRITES_XMSB = (byte*) 53264 const nomodify byte* SPRITES_XPOS = (byte*) 53248 const nomodify byte* SPRITES_YPOS = (byte*) 53249 -const nomodify byte* VIC_CONTROL = (byte*) 53265 -const nomodify byte VIC_DEN = $10 -const nomodify byte VIC_RSEL = 8 +const nomodify byte* VICII_CONTROL = (byte*) 53265 +const nomodify byte VICII_DEN = $10 +const nomodify byte VICII_RSEL = 8 const nomodify byte WHITE = 1 const byte* YSIN[$100] = kickasm {{ .fill $100, round(139.5+89.5*sin(toRadians(360*i/256))) }}