mirror of
https://gitlab.com/camelot/kickc.git
synced 2024-12-21 14:30:21 +00:00
Added support for CPU HUC6280.
This commit is contained in:
parent
7b06467064
commit
77d21270fb
2
pom.xml
2
pom.xml
@ -79,7 +79,7 @@
|
||||
<dependency>
|
||||
<groupId>cml.kickass</groupId>
|
||||
<artifactId>kickassembler</artifactId>
|
||||
<version>5.23-65ce02.a</version>
|
||||
<version>5.24-65ce02.a</version>
|
||||
</dependency>
|
||||
<dependency>
|
||||
<groupId>dk.camelot64.kickass.xexplugin</groupId>
|
||||
|
Binary file not shown.
@ -0,0 +1 @@
|
||||
706b9bd33b7210650444f124565e67d8
|
@ -0,0 +1 @@
|
||||
09ec10ac3bab9d74e26fd994c703beec3d6be316
|
@ -0,0 +1,9 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<project xsi:schemaLocation="http://maven.apache.org/POM/4.0.0 https://maven.apache.org/xsd/maven-4.0.0.xsd" xmlns="http://maven.apache.org/POM/4.0.0"
|
||||
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
|
||||
<modelVersion>4.0.0</modelVersion>
|
||||
<groupId>cml.kickass</groupId>
|
||||
<artifactId>kickassembler</artifactId>
|
||||
<version>5.24-65ce02.a</version>
|
||||
<description>POM was created from install:install-file</description>
|
||||
</project>
|
@ -0,0 +1 @@
|
||||
8612884a503a28444126f04a53ec80a3
|
@ -0,0 +1 @@
|
||||
2f37d51ae13bb589e4b464faa0f43622a6e58d16
|
@ -3,7 +3,7 @@
|
||||
<groupId>cml.kickass</groupId>
|
||||
<artifactId>kickassembler</artifactId>
|
||||
<versioning>
|
||||
<release>5.23-65ce02.a</release>
|
||||
<release>5.24-65ce02.a</release>
|
||||
<versions>
|
||||
<version>4.19</version>
|
||||
<version>5.7</version>
|
||||
@ -27,7 +27,8 @@
|
||||
<version>5.21-65ce02.a</version>
|
||||
<version>5.22-65ce02.a</version>
|
||||
<version>5.23-65ce02.a</version>
|
||||
<version>5.24-65ce02.a</version>
|
||||
</versions>
|
||||
<lastUpdated>20211224003322</lastUpdated>
|
||||
<lastUpdated>20220123234604</lastUpdated>
|
||||
</versioning>
|
||||
</metadata>
|
||||
|
@ -1 +1 @@
|
||||
cf1132a6f0c566ff7881a03ace81803f
|
||||
e21df397cfbdfffab5bdf0710903e415
|
@ -1 +1 @@
|
||||
a5bf0ed1d73ec9e53edd76fffe9b7b5d2fe3ab65
|
||||
e1786fe7f339b0358623f3109c1e3aa3306c9011
|
@ -164,7 +164,8 @@ ASM_MNEMONIC:
|
||||
'rmb0'| 'rmb1'| 'rmb2'| 'rmb3'| 'rmb4'| 'rmb5'| 'rmb6'| 'rmb7'| 'smb0'| 'smb1'| 'smb2'| 'smb3'| 'smb4'| 'smb5'| 'smb6'| 'smb7'| 'stp' | 'stz' | 'trb' |
|
||||
'tsb' | 'wai' | 'cle' | 'see' | 'tsy' | 'lbpl'| 'inz' | 'tys' | 'lbmi'| 'dez' | 'neg' | 'asr' | 'taz' | 'lbvc'| 'tab' | 'map' | 'rtn' | 'lbsr'| 'tza' |
|
||||
'lbvs'| 'tba' | 'lbra'| 'lbcc'| 'ldz' | 'lbcs'| 'cpz' | 'dew' | 'asw' | 'lbne'| 'phz' | 'inw' | 'row' | 'lbeq'| 'phw' | 'plz' | 'eom' | 'adcq'| 'andq'|
|
||||
'aslq'| 'asrq'| 'bitq'| 'cpq' | 'deq' | 'eorq'| 'inq' | 'ldq' | 'lsrq'| 'orq' | 'rolq'| 'rorq'| 'sbcq'| 'stq'
|
||||
'aslq'| 'asrq'| 'bitq'| 'cpq' | 'deq' | 'eorq'| 'inq' | 'ldq' | 'lsrq'| 'orq' | 'rolq'| 'rorq'| 'sbcq'| 'stq' | 'sxy' | 'st0' | 'st1' | 'st2' | 'say' |
|
||||
'tma' | 'bsr' | 'tam' | 'csl' | 'cla' | 'clx' | 'cly' | 'csh' | 'set'
|
||||
;
|
||||
|
||||
ASM_IMM : '#' ;
|
||||
|
@ -0,0 +1,50 @@
|
||||
package dk.camelot64.cpufamily6502.cpus;
|
||||
|
||||
import dk.camelot64.cpufamily6502.Cpu65xx;
|
||||
import dk.camelot64.cpufamily6502.CpuAddressingMode;
|
||||
|
||||
/**
|
||||
* The HUC6280 instruction set.
|
||||
* https://www.chrismcovell.com/PCEdev/HuC6280_opcodes.html
|
||||
* http://shu.emuunlim.com/download/pcedocs/pce_cpu.html
|
||||
*/
|
||||
public class CpuHuc6280 extends Cpu65xx {
|
||||
|
||||
/** The HUC6280 CPU name. */
|
||||
public final static String NAME = "huc6280";
|
||||
|
||||
/** The HUC6280 CPU. */
|
||||
public final static CpuHuc6280 INSTANCE = new CpuHuc6280();
|
||||
|
||||
public CpuHuc6280() {
|
||||
super(NAME, Cpu65C02.INSTANCE, true);
|
||||
|
||||
// The following instructions are not supported yet:
|
||||
// TST #imm, zp
|
||||
// TST #imm, zp,x
|
||||
// TST #imm, abs
|
||||
// TST #imm, abs,x
|
||||
// TII SHSL,DHDL, LHLL
|
||||
// TIN SHSL,DHDL, LHLL
|
||||
// TDD SHSL,DHDL, LHLL
|
||||
// TIA SHSL,DHDL, LHLL
|
||||
// TAI SHSL,DHDL, LHLL
|
||||
|
||||
addOpcode(0x02,"sxy", CpuAddressingMode.NON,3,"XY");
|
||||
addOpcode(0x03,"st0", CpuAddressingMode.IMM,4,"");
|
||||
addOpcode(0x13,"st1", CpuAddressingMode.IMM,4,"");
|
||||
addOpcode(0x22,"sax", CpuAddressingMode.NON,3,"AX");
|
||||
addOpcode(0x23,"st2", CpuAddressingMode.IMM,4,"");
|
||||
addOpcode(0x42,"say", CpuAddressingMode.NON,3,"AY");
|
||||
addOpcode(0x43,"tma", CpuAddressingMode.IMM,4,"A");
|
||||
addOpcode(0x44,"bsr", CpuAddressingMode.REL,8,"PS");
|
||||
addOpcode(0x53,"tam", CpuAddressingMode.IMM,5,"");
|
||||
addOpcode(0x54,"csl", CpuAddressingMode.NON,2,"");
|
||||
addOpcode(0x62,"cla", CpuAddressingMode.NON,2,"A");
|
||||
addOpcode(0x82,"clx", CpuAddressingMode.NON,2,"X");
|
||||
addOpcode(0xc2,"cly", CpuAddressingMode.NON,2,"Y");
|
||||
addOpcode(0xd4,"csh", CpuAddressingMode.NON,2,"");
|
||||
addOpcode(0xf4,"set", CpuAddressingMode.NON,2,"");
|
||||
}
|
||||
|
||||
}
|
@ -25,6 +25,8 @@ public enum TargetCpu {
|
||||
WDC65C02("wdc65c02", CPU_65C02.name, Cpu65C02.INSTANCE, Arrays.asList(Feature.MOS6502_COMMON, Feature.WDC65C02_COMMON, Feature.WDC65C02_SPECIFIC)),
|
||||
/** CSG 65CE02 CPU - Even more addressing modes and instructions, no self-modifying code. http://www.zimmers.net/anonftp/pub/cbm/documents/chipdata/65ce02.txt */
|
||||
CSG65CE02("csg65ce02", CPU_65CE02.name, Cpu65CE02.INSTANCE, Arrays.asList(Feature.MOS6502_COMMON, Feature.WDC65C02_COMMON, Feature.CSG65CE02_COMMON)),
|
||||
/** Hudson HuC6280 CPU - PC Engine CPU with more addressing modes and instructions, no self-modifying code. http://shu.emuunlim.com/download/pcedocs/pce_cpu.html */
|
||||
HUC6280("huc6280", CPU_HUC6280.name, CpuHuc6280.INSTANCE, Arrays.asList(Feature.MOS6502_COMMON, Feature.WDC65C02_COMMON, Feature.WDC65C02_COMMON, Feature.HUC6280_SPECIFIC)),
|
||||
/** 45GS02 CPU - Even more addressing modes and instructions, no self-modifying code. https://github.com/MEGA65/mega65-user-guide/blob/master/MEGA65-Book_draft.pdf */
|
||||
MEGA45GS02("mega45gs02", CPU_45GS02.name, Cpu45GS02.INSTANCE, Arrays.asList(Feature.MOS6502_COMMON, Feature.WDC65C02_COMMON, Feature.CSG65CE02_COMMON, Feature.MEGA45GS02_COMMON)),
|
||||
///** 65C186 CPU - 16-bit instructions, 24-bit addressing modes and more instructions. http://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf */
|
||||
@ -48,6 +50,8 @@ public enum TargetCpu {
|
||||
WDC65C02_SPECIFIC("wdc65c02-specific"),
|
||||
/** Added instructions of the CSG 65CE02 CPU that are also present on the descendant 45GS02. http://archive.6502.org/datasheets/mos_65ce02_mpu.pdf */
|
||||
CSG65CE02_COMMON("csg65ce02-common"),
|
||||
/** Added instructions of the HUC 6280 CPU. https://www.chrismcovell.com/PCEdev/HuC6280_opcodes.html */
|
||||
HUC6280_SPECIFIC("huc6280-specific"),
|
||||
/** Added instructions of the MEGA 45GS02 CPU. https://github.com/MEGA65/mega65-user-guide/blob/master/MEGA65-Book_draft.pdf */
|
||||
MEGA45GS02_COMMON("mega45gs02-common"),
|
||||
;
|
||||
|
@ -4,7 +4,7 @@
|
||||
cp ./repo/cml/kickass/kickassembler/maven-metadata.xml ./repo/cml/kickass/kickassembler/maven-metadata-local.xml
|
||||
|
||||
# mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Applications/KickAssembler/KickAss.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.16
|
||||
mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.23-65ce02.a
|
||||
mvn install:install-file -Dmaven.repo.local=./repo/ -Dfile=/Users/jespergravgaard/c64/kickassembler65ce02/out/KickAss65CE02.jar -DgroupId=cml.kickass -DartifactId=kickassembler -Dpackaging=jar -DgeneratePom=true -DcreateChecksum=true -Dversion=5.24-65ce02.a
|
||||
|
||||
# Finalize by making the local metadata official
|
||||
pushd ./repo/cml/kickass/kickassembler
|
||||
|
@ -31,6 +31,11 @@ public class TestCpuFamilyKickAssCompatibility {
|
||||
assertOpcodesMatch(Cpu65CE02.INSTANCE, CPU_65CE02.instance);
|
||||
}
|
||||
|
||||
@Test
|
||||
public void testOpcodesHuc6280() {
|
||||
assertOpcodesMatch(CpuHuc6280.INSTANCE, CPU_HUC6280.instance);
|
||||
}
|
||||
|
||||
@Test
|
||||
public void testOpcodes45GS02() {
|
||||
assertOpcodesMatch(Cpu45GS02.INSTANCE, CPU_45GS02.instance);
|
||||
|
@ -554,6 +554,11 @@ public class TestProgramsFast extends TestPrograms {
|
||||
// compileAndCompare("library-constructor-0.c");
|
||||
//}
|
||||
|
||||
@Test
|
||||
public void testCpuHuc6280() throws IOException {
|
||||
compileAndCompare("cpu-huc6280.c");
|
||||
}
|
||||
|
||||
@Test
|
||||
public void testCpu45GS02AddressingModes() throws IOException {
|
||||
compileAndCompare("cpu-45gs02-addressing-modes.c");
|
||||
|
27
src/test/kc/cpu-huc6280.c
Normal file
27
src/test/kc/cpu-huc6280.c
Normal file
@ -0,0 +1,27 @@
|
||||
// Tests the HUC6280 instructions
|
||||
|
||||
#pragma cpu(huc6280)
|
||||
|
||||
void main() {
|
||||
|
||||
asm {
|
||||
sxy
|
||||
st0 #$55
|
||||
st1 #$aa
|
||||
sax
|
||||
st2 #$be
|
||||
say
|
||||
tma #2
|
||||
bsr !+
|
||||
tam #4
|
||||
csl
|
||||
cla
|
||||
clx
|
||||
cly
|
||||
csh
|
||||
set
|
||||
!:
|
||||
rts
|
||||
}
|
||||
|
||||
}
|
32
src/test/ref/cpu-huc6280.asm
Normal file
32
src/test/ref/cpu-huc6280.asm
Normal file
@ -0,0 +1,32 @@
|
||||
// Tests the HUC6280 instructions
|
||||
.cpu _huc6280
|
||||
// Commodore 64 PRG executable file
|
||||
.file [name="cpu-huc6280.prg", type="prg", segments="Program"]
|
||||
.segmentdef Program [segments="Basic, Code, Data"]
|
||||
.segmentdef Basic [start=$0801]
|
||||
.segmentdef Code [start=$80d]
|
||||
.segmentdef Data [startAfter="Code"]
|
||||
.segment Basic
|
||||
:BasicUpstart(main)
|
||||
.segment Code
|
||||
main: {
|
||||
// asm
|
||||
sxy
|
||||
st0 #$55
|
||||
st1 #$aa
|
||||
sax
|
||||
st2 #$be
|
||||
say
|
||||
tma #2
|
||||
bsr !+
|
||||
tam #4
|
||||
csl
|
||||
cla
|
||||
clx
|
||||
cly
|
||||
csh
|
||||
set
|
||||
!:
|
||||
rts
|
||||
// }
|
||||
}
|
8
src/test/ref/cpu-huc6280.cfg
Normal file
8
src/test/ref/cpu-huc6280.cfg
Normal file
@ -0,0 +1,8 @@
|
||||
|
||||
void main()
|
||||
main: scope:[main] from
|
||||
asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set !: rts }
|
||||
to:main::@return
|
||||
main::@return: scope:[main] from main
|
||||
[1] return
|
||||
to:@return
|
161
src/test/ref/cpu-huc6280.log
Normal file
161
src/test/ref/cpu-huc6280.log
Normal file
@ -0,0 +1,161 @@
|
||||
|
||||
CONTROL FLOW GRAPH SSA
|
||||
|
||||
void main()
|
||||
main: scope:[main] from __start
|
||||
asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set !: rts }
|
||||
to:main::@return
|
||||
main::@return: scope:[main] from main
|
||||
return
|
||||
to:@return
|
||||
|
||||
void __start()
|
||||
__start: scope:[__start] from
|
||||
call main
|
||||
to:__start::@1
|
||||
__start::@1: scope:[__start] from __start
|
||||
to:__start::@return
|
||||
__start::@return: scope:[__start] from __start::@1
|
||||
return
|
||||
to:@return
|
||||
|
||||
SYMBOL TABLE SSA
|
||||
void __start()
|
||||
void main()
|
||||
|
||||
Removing unused procedure __start
|
||||
Removing unused procedure block __start
|
||||
Removing unused procedure block __start::@1
|
||||
Removing unused procedure block __start::@return
|
||||
Successful SSA optimization PassNEliminateEmptyStart
|
||||
CALL GRAPH
|
||||
|
||||
Created 0 initial phi equivalence classes
|
||||
Coalesced down to 0 phi equivalence classes
|
||||
|
||||
FINAL CONTROL FLOW GRAPH
|
||||
|
||||
void main()
|
||||
main: scope:[main] from
|
||||
asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set !: rts }
|
||||
to:main::@return
|
||||
main::@return: scope:[main] from main
|
||||
[1] return
|
||||
to:@return
|
||||
|
||||
|
||||
VARIABLE REGISTER WEIGHTS
|
||||
void main()
|
||||
|
||||
Initial phi equivalence classes
|
||||
Complete equivalence classes
|
||||
REGISTER UPLIFT POTENTIAL REGISTERS
|
||||
Statement asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set !: rts } always clobbers reg byte a reg byte x reg byte y
|
||||
|
||||
REGISTER UPLIFT SCOPES
|
||||
Uplift Scope [main]
|
||||
Uplift Scope []
|
||||
|
||||
Uplifting [main] best 65 combination
|
||||
Uplifting [] best 65 combination
|
||||
|
||||
ASSEMBLER BEFORE OPTIMIZATION
|
||||
// File Comments
|
||||
// Tests the HUC6280 instructions
|
||||
// Upstart
|
||||
.cpu _huc6280
|
||||
// Commodore 64 PRG executable file
|
||||
.file [name="cpu-huc6280.prg", type="prg", segments="Program"]
|
||||
.segmentdef Program [segments="Basic, Code, Data"]
|
||||
.segmentdef Basic [start=$0801]
|
||||
.segmentdef Code [start=$80d]
|
||||
.segmentdef Data [startAfter="Code"]
|
||||
.segment Basic
|
||||
:BasicUpstart(main)
|
||||
// Global Constants & labels
|
||||
.segment Code
|
||||
// main
|
||||
main: {
|
||||
// asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set !: rts }
|
||||
sxy
|
||||
st0 #$55
|
||||
st1 #$aa
|
||||
sax
|
||||
st2 #$be
|
||||
say
|
||||
tma #2
|
||||
bsr !+
|
||||
tam #4
|
||||
csl
|
||||
cla
|
||||
clx
|
||||
cly
|
||||
csh
|
||||
set
|
||||
!:
|
||||
rts
|
||||
jmp __breturn
|
||||
// main::@return
|
||||
__breturn:
|
||||
// [1] return
|
||||
rts
|
||||
}
|
||||
// File Data
|
||||
|
||||
ASSEMBLER OPTIMIZATIONS
|
||||
Removing instruction jmp __breturn
|
||||
Succesful ASM optimization Pass5NextJumpElimination
|
||||
Removing instruction __breturn:
|
||||
Succesful ASM optimization Pass5UnusedLabelElimination
|
||||
Removing unreachable instruction rts
|
||||
Succesful ASM optimization Pass5UnreachableCodeElimination
|
||||
|
||||
FINAL SYMBOL TABLE
|
||||
void main()
|
||||
|
||||
|
||||
|
||||
FINAL ASSEMBLER
|
||||
Score: 56
|
||||
|
||||
// File Comments
|
||||
// Tests the HUC6280 instructions
|
||||
// Upstart
|
||||
.cpu _huc6280
|
||||
// Commodore 64 PRG executable file
|
||||
.file [name="cpu-huc6280.prg", type="prg", segments="Program"]
|
||||
.segmentdef Program [segments="Basic, Code, Data"]
|
||||
.segmentdef Basic [start=$0801]
|
||||
.segmentdef Code [start=$80d]
|
||||
.segmentdef Data [startAfter="Code"]
|
||||
.segment Basic
|
||||
:BasicUpstart(main)
|
||||
// Global Constants & labels
|
||||
.segment Code
|
||||
// main
|
||||
main: {
|
||||
// asm
|
||||
// asm { sxy st0#$55 st1#$aa sax st2#$be say tma#2 bsr!+ tam#4 csl cla clx cly csh set !: rts }
|
||||
sxy
|
||||
st0 #$55
|
||||
st1 #$aa
|
||||
sax
|
||||
st2 #$be
|
||||
say
|
||||
tma #2
|
||||
bsr !+
|
||||
tam #4
|
||||
csl
|
||||
cla
|
||||
clx
|
||||
cly
|
||||
csh
|
||||
set
|
||||
!:
|
||||
rts
|
||||
// main::@return
|
||||
// }
|
||||
// [1] return
|
||||
}
|
||||
// File Data
|
||||
|
2
src/test/ref/cpu-huc6280.sym
Normal file
2
src/test/ref/cpu-huc6280.sym
Normal file
@ -0,0 +1,2 @@
|
||||
void main()
|
||||
|
Loading…
Reference in New Issue
Block a user