6502/kickc
1
0
Fork 0
mirror of https://gitlab.com/camelot/kickc.git synced 2025-04-14 10:37:36 +00:00
Code Issues Projects Releases Wiki Activity

Renamed VICII_CONTROL to VICII_CONTROL1.

Browse Source
This commit is contained in:
jespergravgaard 2021-02-07 16:14:44 +01:00
parent 0f01dbb700
commit f3a878014b
94 changed files with 809 additions and 809 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/main/kc/include/mos6569.h
View File

@ -172,7 +172,7 @@ char* const BG_COLOR3 = $d024;
char* const SPRITES_MC1 = $d025;
char* const SPRITES_MC2 = $d026;
char* const VICII_CONTROL = $d011;
char* const VICII_CONTROL1 = $d011;
char* const D011 = $d011;
const char VICII_RST8 = %10000000;
const char VICII_ECM = %01000000;

2
src/test/kc/bitmap-plot-0.c
View File

@ -40,7 +40,7 @@ void init_irq() {
// Disable CIA 1 Timer IRQ
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $100
*VICII_CONTROL |=$80;
*VICII_CONTROL1 |=$80;
*RASTER = $00;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

2
src/test/kc/bitmap-plot-1.c
View File

@ -47,7 +47,7 @@ void init_irq() {
// Disable CIA 1 Timer IRQ
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $100
*VICII_CONTROL |=$80;
*VICII_CONTROL1 |=$80;
*RASTER = $00;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

2
src/test/kc/bitmap-plot-2.c
View File

@ -56,7 +56,7 @@ void init_irq() {
// Disable CIA 1 Timer IRQ
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $100
*VICII_CONTROL |=$80;
*VICII_CONTROL1 |=$80;
*RASTER = $00;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

6
src/test/kc/c64dtv-8bppcharstretch.c
View File

@ -16,7 +16,7 @@ void main() {
*DTV_FEATURE = DTV_FEATURE_ENABLE;
// 8BPP Pixel Cell Mode
*DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY | DTV_BADLINE_OFF;
*VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3;
*VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3;
*VICII_CONTROL2 = VICII_MCM | VICII_CSEL;
// Plane A: SCREEN
*DTV_PLANEA_START_LO = < SCREEN;
@ -59,14 +59,14 @@ void main() {
bne stabilize
}
*VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3;
*VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3;
*BORDER_COLOR = 0;
byte rst = $42;
while(*RASTER!=rst) {}
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
do {
rst = *RASTER;
*VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7);
*VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7);
*BORDER_COLOR = rst*$10;
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
} while (rst!=$f2);

6
src/test/kc/c64dtv-8bppchunkystretch.c
View File

@ -14,7 +14,7 @@ void main() {
*DTV_FEATURE = DTV_FEATURE_ENABLE;
// 8BPP Pixel Cell Mode
*DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_COLORRAM_OFF | DTV_CHUNKY | DTV_BADLINE_OFF;
*VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3;
*VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3;
*VICII_CONTROL2 = VICII_MCM | VICII_CSEL;
// Plane B: CHUNKY
*DTV_PLANEB_START_LO = < CHUNKY;
@ -50,14 +50,14 @@ void main() {
bne stabilize
}
*VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3;
*VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3;
*BORDER_COLOR = 0;
byte rst = $42;
while(*RASTER!=rst) {}
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
do {
rst = *RASTER;
*VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7);
*VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7);
*BORDER_COLOR = rst*$10;
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
} while (rst!=$f2);

2
src/test/kc/c64dtv-gfxexplorer.c
View File

@ -324,7 +324,7 @@ void gfx_mode() {
if(*form_ctrl_bmm!=0) {
VICII_control = VICII_control | VICII_BMM;
}
*VICII_CONTROL = VICII_control;
*VICII_CONTROL1 = VICII_control;
byte VICII_control2 = VICII_CSEL;
if(*form_ctrl_mcm!=0) {
VICII_control2 = VICII_control2 | VICII_MCM;

26
src/test/kc/c64dtv-gfxmodes.c
View File

@ -55,7 +55,7 @@ void menu() {
CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input
CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank
// VIC Graphics Mode
*VICII_CONTROL = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_CSEL;
// VIC Memory Pointers
*VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400));
@ -202,7 +202,7 @@ void mode_stdchar() {
CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input
CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank
// VIC Graphics Mode
*VICII_CONTROL = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_CSEL;
// VIC Memory Pointers
*VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400));
@ -253,7 +253,7 @@ void mode_ecmchar() {
CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input
CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank
// VIC Graphics Mode
*VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3;
*VICII_CONTROL1 = VICII_DEN|VICII_RSEL|VICII_ECM|3;
*VICII_CONTROL2 = VICII_CSEL;
// VIC Memory Pointers
*VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400));
@ -309,7 +309,7 @@ void mode_mcchar() {
CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input
CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank
// VIC Graphics Mode
*VICII_CONTROL = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_CSEL|VICII_MCM;
// VIC Memory Pointers
*VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400));
@ -355,7 +355,7 @@ void mode_stdbitmap() {
CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input
CIA2->PORT_A = %00000011 ^ (byte)((word)BITMAP/$4000); // Set VIC Bank
// VIC Graphics Mode
*VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_BMM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_CSEL;
// VIC Memory Pointers
*VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)BITMAP&$3fff)/$400));
@ -411,7 +411,7 @@ void mode_hicolstdchar() {
CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input
CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank
// VIC Graphics Mode
*VICII_CONTROL = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_CSEL;
// VIC Memory Pointers
*VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400));
@ -464,7 +464,7 @@ void mode_hicolecmchar() {
CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input
CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank
// VIC Graphics Mode
*VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3;
*VICII_CONTROL1 = VICII_DEN|VICII_RSEL|VICII_ECM|3;
*VICII_CONTROL2 = VICII_CSEL;
// VIC Memory Pointers
*VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400));
@ -520,7 +520,7 @@ void mode_hicolmcchar() {
CIA2->PORT_A_DDR = %00000011; // Set VIC Bank bits to output - all others to input
CIA2->PORT_A = %00000011 ^ (byte)((word)CHARSET/$4000); // Set VIC Bank
// VIC Graphics Mode
*VICII_CONTROL = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_CSEL|VICII_MCM;
// VIC Memory Pointers
*VICII_MEMORY = (byte)((((word)SCREEN&$3fff)/$40)|(((word)CHARSET&$3fff)/$400));
@ -564,7 +564,7 @@ void mode_twoplanebitmap() {
dtv_control = DTV_HIGHCOLOR | DTV_LINEAR;
*DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR;
// VIC Graphics Mode
*VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_CSEL;
// Linear Graphics Plane A Counter
*DTV_PLANEA_START_LO = <PLANEA;
@ -634,7 +634,7 @@ void mode_sixsfred() {
dtv_control = DTV_HIGHCOLOR | DTV_LINEAR;
*DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR;
// VIC Graphics Mode
*VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_MCM|VICII_CSEL;
// Linear Graphics Plane A Counter
*DTV_PLANEA_START_LO = <PLANEA;
@ -700,7 +700,7 @@ void mode_sixsfred2() {
dtv_control = DTV_LINEAR;
*DTV_CONTROL = DTV_LINEAR;
// VIC Graphics Mode
*VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_MCM|VICII_CSEL;
// Linear Graphics Plane A Counter
*DTV_PLANEA_START_LO = <PLANEA;
@ -771,7 +771,7 @@ void mode_8bpppixelcell() {
dtv_control = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY;
*DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY;
// VIC Graphics Mode
*VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL1 = VICII_ECM|VICII_DEN|VICII_RSEL|3;
*VICII_CONTROL2 = VICII_MCM|VICII_CSEL;
// Linear Graphics Plane A Counter
*DTV_PLANEA_START_LO = <PLANEA;
@ -839,7 +839,7 @@ void mode_8bppchunkybmm() {
dtv_control = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY | DTV_COLORRAM_OFF;
*DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY | DTV_COLORRAM_OFF;
// VIC Graphics Mode
*VICII_CONTROL = VICII_ECM | VICII_DEN | VICII_RSEL | 3;
*VICII_CONTROL1 = VICII_ECM | VICII_DEN | VICII_RSEL | 3;
*VICII_CONTROL2 = VICII_MCM | VICII_CSEL;
// Linear Graphics Plane B Counter
*DTV_PLANEB_START_LO = < < PLANEB;

2
src/test/kc/complex/new_30_years_low_resolution/new_30_years_low_resolution.c
View File

@ -89,7 +89,7 @@ void demo_init() {
void demo_start() {
demo_init();
// Set raster line to 0x00
*VICII_CONTROL &= 0x7f;
*VICII_CONTROL1 &= 0x7f;
*RASTER = 0;
// Set the IRQ routine
*HARDWARE_IRQ = &irq_demo;

14
src/test/kc/complex/new_30_years_low_resolution/part1-happynewyear.c
View File

@ -128,7 +128,7 @@ void part1_run() {
// Acknowledge any VIC IRQ
*IRQ_STATUS = 0x0f;
// Set raster line to 0x136
*VICII_CONTROL |= 0x80;
*VICII_CONTROL1 |= 0x80;
*RASTER = IRQ_PART1_TOP_LINE;
// Set the IRQ routine
*HARDWARE_IRQ = &irq_part1_top;
@ -214,9 +214,9 @@ __interrupt void irq_part1_top() {
// Set up the flipper IRQ
if(>irq_flipper_top_line)
*VICII_CONTROL |= 0x80;
*VICII_CONTROL1 |= 0x80;
else
*VICII_CONTROL &= 0x7f;
*VICII_CONTROL1 &= 0x7f;
*RASTER = (<irq_flipper_top_line)&0xf8;
*HARDWARE_IRQ = &irq_flipper_top;
// Signal main routine to play music
@ -236,16 +236,16 @@ __interrupt void irq_flipper_top() {
ldy #$1b // VICII->CONTROL1 &= ~VICII_BMM;
sta VICII_MEMORY
stx BORDER_COLOR
sty VICII_CONTROL
sty VICII_CONTROL1
stx BG_COLOR
lda #$c8 // VICII->CONTROL2 &= ~VICII_MCM;
sta VICII_CONTROL2
}
// Set up the flipper IRQ
if(>irq_flipper_bottom_line)
*VICII_CONTROL |= 0x80;
*VICII_CONTROL1 |= 0x80;
else
*VICII_CONTROL &= 0x7f;
*VICII_CONTROL1 &= 0x7f;
*RASTER = (<irq_flipper_bottom_line)&0xf8;
*HARDWARE_IRQ = &irq_flipper_bottom;
// Acknowledge the IRQ
@ -287,7 +287,7 @@ __interrupt void irq_flipper_bottom() {
}
// Set up the IRQ again
*VICII_CONTROL |=0x80;
*VICII_CONTROL1 |=0x80;
*RASTER = IRQ_PART1_TOP_LINE;
*HARDWARE_IRQ = &irq_part1_top;
// Acknowledge the IRQ

2
src/test/kc/complex/new_30_years_low_resolution/part2-swingplex.c
View File

@ -301,7 +301,7 @@ void part2_run() {
// Acknowledge any VIC IRQ
*IRQ_STATUS = 0x0f;
// Set raster line to first bucket
*VICII_CONTROL &=0x7f;
*VICII_CONTROL1 &=0x7f;
*RASTER = BUCKET_YPOS[0];
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

6
src/test/kc/complex/new_30_years_low_resolution/vsp.c
View File

@ -23,7 +23,7 @@ volatile __zp char vsp_scroll = 0;
// - Set the raster IRQ to occur on line 0x2d (since this modifies the IRQ line)
// - Set the hardware IRQ vector (since this modifies the hardware IRQ vector)
void inline vsp_perform() {
kickasm(uses vsp_scroll, uses HARDWARE_IRQ, uses RASTER, uses IRQ_STATUS, uses IRQ_RASTER, uses VICII_CONTROL, clobbers "AX") {{
kickasm(uses vsp_scroll, uses HARDWARE_IRQ, uses RASTER, uses IRQ_STATUS, uses IRQ_RASTER, uses VICII_CONTROL1, clobbers "AX") {{
// Stabilize the raster by using the double IRQ method
// Acknowledge the IRQ
lda #IRQ_RASTER
@ -71,7 +71,7 @@ void inline vsp_perform() {
ldx #$18
lda #$1b // TODO: To control Y-scrolling this must be flexible!
// The STX $d011 must be line $30 cycle $10 for vsp_scroll==0
stx VICII_CONTROL // Enable the display - starts DMA
sta VICII_CONTROL
stx VICII_CONTROL1 // Enable the display - starts DMA
sta VICII_CONTROL1
}}
}

2
src/test/kc/irq-hardware-clobber-jsr.c
View File

@ -9,7 +9,7 @@ void main() {
// Disable CIA 1 Timer IRQ
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $100
*VICII_CONTROL |=$80;
*VICII_CONTROL1 |=$80;
*RASTER = $00;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

4
src/test/kc/irq-hardware-clobber.c
View File

@ -3,7 +3,7 @@
void()** const KERNEL_IRQ = $0314;
void()** const HARDWARE_IRQ = $fffe;
byte* const RASTER = $d012;
byte* const VICII_CONTROL = $d011;
byte* const VICII_CONTROL1 = $d011;
byte* const IRQ_STATUS = $d019;
byte* const IRQ_ENABLE = $d01a;
const byte IRQ_RASTER = %00000001;
@ -37,7 +37,7 @@ void main() {
// Disable CIA 1 Timer IRQ
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $100
*VICII_CONTROL |=$80;
*VICII_CONTROL1 |=$80;
*RASTER = $00;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

4
src/test/kc/irq-hardware-stack.c
View File

@ -5,7 +5,7 @@
void()** const KERNEL_IRQ = $0314;
void()** const HARDWARE_IRQ = $fffe;
byte* const RASTER = $d012;
byte* const VICII_CONTROL = $d011;
byte* const VICII_CONTROL1 = $d011;
byte* const IRQ_STATUS = $d019;
byte* const IRQ_ENABLE = $d01a;
const byte IRQ_RASTER = %00000001;
@ -39,7 +39,7 @@ void main() {
// Disable CIA 1 Timer IRQ
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $100
*VICII_CONTROL |=$80;
*VICII_CONTROL1 |=$80;
*RASTER = $00;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

4
src/test/kc/irq-hardware.c
View File

@ -3,7 +3,7 @@
void()** const KERNEL_IRQ = $0314;
void()** const HARDWARE_IRQ = $fffe;
byte* const RASTER = $d012;
byte* const VICII_CONTROL = $d011;
byte* const VICII_CONTROL1 = $d011;
byte* const IRQ_STATUS = $d019;
byte* const IRQ_ENABLE = $d01a;
const byte IRQ_RASTER = %00000001;
@ -37,7 +37,7 @@ void main() {
// Disable CIA 1 Timer IRQ
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $100
*VICII_CONTROL |=$80;
*VICII_CONTROL1 |=$80;
*RASTER = $00;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

2
src/test/kc/irq-idx-problem.c
View File

@ -8,7 +8,7 @@ void main() {
// Disable CIA 1 Timer IRQ
CIA1->INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $60
*VICII_CONTROL &=$7f;
*VICII_CONTROL1 &=$7f;
*RASTER = $60;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

4
src/test/kc/irq-kernel.c
View File

@ -2,7 +2,7 @@
void()** const KERNEL_IRQ = $0314;
byte* const RASTER = $d012;
byte* const VICII_CONTROL = $d011;
byte* const VICII_CONTROL1 = $d011;
byte* const IRQ_STATUS = $d019;
byte* const IRQ_ENABLE = $d01a;
const byte IRQ_RASTER = %00000001;
@ -21,7 +21,7 @@ void main() {
// Disable CIA 1 Timer IRQ
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $100
*VICII_CONTROL |=$80;
*VICII_CONTROL1 |=$80;
*RASTER = $00;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

4
src/test/kc/irq-local-var-overlap-problem.c
View File

@ -2,7 +2,7 @@
void()** const KERNEL_IRQ = $0314;
byte* const RASTER = $d012;
byte* const VICII_CONTROL = $d011;
byte* const VICII_CONTROL1 = $d011;
byte* const IRQ_STATUS = $d019;
byte* const IRQ_ENABLE = $d01a;
const byte IRQ_RASTER = %00000001;
@ -18,7 +18,7 @@ void main() {
// Disable CIA 1 Timer IRQ
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $0fd
*VICII_CONTROL &=$7f;
*VICII_CONTROL1 &=$7f;
*RASTER = $fd;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

4
src/test/kc/irq-raster.c
View File

@ -2,7 +2,7 @@
void()** const KERNEL_IRQ = $0314;
byte* const RASTER = $d012;
byte* const VICII_CONTROL = $d011;
byte* const VICII_CONTROL1 = $d011;
byte* const IRQ_STATUS = $d019;
byte* const IRQ_ENABLE = $d01a;
const byte IRQ_RASTER = %00000001;
@ -21,7 +21,7 @@ void main() {
// Disable CIA 1 Timer IRQ
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $100
*VICII_CONTROL |=$80;
*VICII_CONTROL1 |=$80;
*RASTER = $00;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

4
src/test/kc/irq-volatile-bool-problem.c
View File

@ -3,7 +3,7 @@
void()** const KERNEL_IRQ = $0314;
byte* const RASTER = $d012;
byte* const VICII_CONTROL = $d011;
byte* const VICII_CONTROL1 = $d011;
byte* const IRQ_STATUS = $d019;
byte* const IRQ_ENABLE = $d01a;
const byte IRQ_RASTER = %00000001;
@ -18,7 +18,7 @@ void main() {
// Disable CIA 1 Timer IRQ
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR;
// Set raster line to $0fd
*VICII_CONTROL &=$7f;
*VICII_CONTROL1 &=$7f;
*RASTER = $fd;
// Enable Raster Interrupt
*IRQ_ENABLE = IRQ_RASTER;

2
src/test/kc/multiplexer-irq/simple-multiplexer-irq.c
View File

@ -44,7 +44,7 @@ void init() {
*IRQ_ENABLE = IRQ_RASTER;
*IRQ_STATUS = IRQ_RASTER;
*KERNEL_IRQ = &plex_irq;
*VICII_CONTROL &= 0x7f;
*VICII_CONTROL1 &= 0x7f;
*RASTER = 0x0;
asm { cli }
}

8
src/test/ref/bitmap-plot-0.asm
View File

@ -28,7 +28,7 @@
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
.label RASTER = $d012
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
.label D018 = $d018
// VIC II IRQ Status Register
@ -268,11 +268,11 @@ init_irq: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL |=$80
// *VICII_CONTROL1 |=$80
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
lda #0
sta RASTER

2
src/test/ref/bitmap-plot-0.cfg
View File

@ -147,7 +147,7 @@ init_irq: scope:[init_irq] from main::@7
[62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[63] *PROCPORT = PROCPORT_RAM_IO
[64] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[65] *VICII_CONTROL = *VICII_CONTROL | $80
[65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[66] *RASTER = 0
[67] *IRQ_ENABLE = IRQ_RASTER
[68] *HARDWARE_IRQ = &irq

32
src/test/ref/bitmap-plot-0.log
View File

@ -333,7 +333,7 @@ init_irq: scope:[init_irq] from main::@7
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
*PROCPORT = PROCPORT_RAM_IO
*((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = 0
*IRQ_ENABLE = IRQ_RASTER
*HARDWARE_IRQ = &irq
@ -408,7 +408,7 @@ const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*)$d012
const byte* SCREEN = (byte*)$400
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1
@ -711,7 +711,7 @@ Adding number conversion cast (unumber) $13f in main::$5 = main::x#1 == $13f
Adding number conversion cast (unumber) 0 in main::$6 = main::x#1 == 0
Adding number conversion cast (unumber) $c7 in main::$10 = main::y#4 == $c7
Adding number conversion cast (unumber) 0 in main::$11 = main::y#4 == 0
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 0 in *RASTER = 0
Adding number conversion cast (unumber) 0 in irq::$1 = 0 != frame_cnt
Successful SSA optimization PassNAddNumberTypeConversions
@ -1288,7 +1288,7 @@ init_irq: scope:[init_irq] from main::@7
[62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[63] *PROCPORT = PROCPORT_RAM_IO
[64] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[65] *VICII_CONTROL = *VICII_CONTROL | $80
[65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[66] *RASTER = 0
[67] *IRQ_ENABLE = IRQ_RASTER
[68] *HARDWARE_IRQ = &irq
@ -1510,7 +1510,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:10 [ bitmap
Statement [62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [63] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [64] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [65] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [66] *RASTER = 0 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [67] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [68] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
@ -1550,7 +1550,7 @@ Statement [51] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitma
Statement [62] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [63] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [64] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [65] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [66] *RASTER = 0 [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [67] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [68] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:18 [ frame_cnt ] { } ) always clobbers reg byte a
@ -1674,7 +1674,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
.label RASTER = $d012
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
.label D018 = $d018
// VIC II IRQ Status Register
@ -2083,11 +2083,11 @@ init_irq: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// [65] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [66] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -2339,7 +2339,7 @@ const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*) 53266
const byte* SCREEN = (byte*) 1024
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1
@ -2478,7 +2478,7 @@ Score: 3222
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
.label RASTER = $d012
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
.label D018 = $d018
// VIC II IRQ Status Register
@ -2851,12 +2851,12 @@ init_irq: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL |=$80
// [65] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=$80
// [65] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
// [66] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/bitmap-plot-0.sym
View File

@ -17,7 +17,7 @@ const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*) 53266
const byte* SCREEN = (byte*) 1024
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1

8
src/test/ref/bitmap-plot-1.asm
View File

@ -35,7 +35,7 @@
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
.label RASTER = $d012
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
.label D018 = $d018
// VIC II IRQ Status Register
@ -488,11 +488,11 @@ init_irq: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL |=$80
// *VICII_CONTROL1 |=$80
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
lda #0
sta RASTER

2
src/test/ref/bitmap-plot-1.cfg
View File

@ -204,7 +204,7 @@ init_irq: scope:[init_irq] from main::@5
[101] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[102] *PROCPORT = PROCPORT_RAM_IO
[103] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[104] *VICII_CONTROL = *VICII_CONTROL | $80
[104] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[105] *RASTER = 0
[106] *IRQ_ENABLE = IRQ_RASTER
[107] *HARDWARE_IRQ = &irq

32
src/test/ref/bitmap-plot-1.log
View File

@ -848,7 +848,7 @@ init_irq: scope:[init_irq] from main::@7
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
*PROCPORT = PROCPORT_RAM_IO
*((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = 0
*IRQ_ENABLE = IRQ_RASTER
*HARDWARE_IRQ = &irq
@ -934,7 +934,7 @@ const byte* SCREEN = (byte*)$400
const signed word* SINE[$200] = { fill( $200, 0) }
const byte SIZEOF_SIGNED_WORD = 2
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1
@ -1704,7 +1704,7 @@ Adding number conversion cast (unumber) $200 in main::$14 = main::idx_x#1 == $20
Adding number conversion cast (unumber) $200 in main::$16 = main::idx_y#1 == $200
Adding number conversion cast (unumber) 0 in main::idx_x#2 = 0
Adding number conversion cast (unumber) 0 in main::idx_y#2 = 0
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 0 in *RASTER = 0
Adding number conversion cast (unumber) 0 in irq::$1 = 0 != frame_cnt
Successful SSA optimization PassNAddNumberTypeConversions
@ -2762,7 +2762,7 @@ init_irq: scope:[init_irq] from main::@5
[101] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[102] *PROCPORT = PROCPORT_RAM_IO
[103] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[104] *VICII_CONTROL = *VICII_CONTROL | $80
[104] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[105] *RASTER = 0
[106] *IRQ_ENABLE = IRQ_RASTER
[107] *HARDWARE_IRQ = &irq
@ -3621,7 +3621,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:16 [ bitmap
Statement [101] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [102] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [103] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [104] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [104] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [105] *RASTER = 0 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [106] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [107] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
@ -3748,7 +3748,7 @@ Statement [90] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitma
Statement [101] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [102] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [103] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [104] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [104] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [105] *RASTER = 0 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [106] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [107] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
@ -4094,7 +4094,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
.label RASTER = $d012
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
.label D018 = $d018
// VIC II IRQ Status Register
@ -4782,11 +4782,11 @@ init_irq: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// [104] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [104] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [105] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -5908,7 +5908,7 @@ const byte* SCREEN = (byte*) 1024
const signed word* SINE[$200] = { fill( $200, 0) }
const byte SIZEOF_SIGNED_WORD = 2
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1
@ -6254,7 +6254,7 @@ Score: 20494
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
.label RASTER = $d012
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
.label D018 = $d018
// VIC II IRQ Status Register
@ -6904,12 +6904,12 @@ init_irq: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL |=$80
// [104] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=$80
// [104] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
// [105] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/bitmap-plot-1.sym
View File

@ -22,7 +22,7 @@ const byte* SCREEN = (byte*) 1024
const signed word* SINE[$200] = { fill( $200, 0) }
const byte SIZEOF_SIGNED_WORD = 2
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1

8
src/test/ref/bitmap-plot-2.asm
View File

@ -36,7 +36,7 @@
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
.label D018 = $d018
// VIC II IRQ Status Register
@ -524,11 +524,11 @@ init_irq: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL |=$80
// *VICII_CONTROL1 |=$80
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
lda #0
sta RASTER

2
src/test/ref/bitmap-plot-2.cfg
View File

@ -223,7 +223,7 @@ init_irq: scope:[init_irq] from main::@8
[110] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[111] *PROCPORT = PROCPORT_RAM_IO
[112] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[113] *VICII_CONTROL = *VICII_CONTROL | $80
[113] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[114] *RASTER = 0
[115] *IRQ_ENABLE = IRQ_RASTER
[116] *HARDWARE_IRQ = &irq

32
src/test/ref/bitmap-plot-2.log
View File

@ -910,7 +910,7 @@ init_irq: scope:[init_irq] from main::@11
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
*PROCPORT = PROCPORT_RAM_IO
*((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = 0
*IRQ_ENABLE = IRQ_RASTER
*HARDWARE_IRQ = &irq
@ -997,7 +997,7 @@ const byte* SCREEN = (byte*)$400
const signed word* SINE[$200] = { fill( $200, 0) }
const byte SIZEOF_SIGNED_WORD = 2
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1
@ -1821,7 +1821,7 @@ Adding number conversion cast (unumber) 1 in main::$20 = main::r_add#4 != 1
Adding number conversion cast (unumber) 0 in main::idx_y#2 = 0
Adding number conversion cast (snumber) $200*$c+$100 in main::$23 = main::r#5 >= $200*$c+$100
Adding number conversion cast (unumber) 2 in main::r_add#1 = main::r_add#5 / 2
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 0 in *RASTER = 0
Adding number conversion cast (unumber) 0 in irq::$1 = 0 != frame_cnt
Successful SSA optimization PassNAddNumberTypeConversions
@ -2952,7 +2952,7 @@ init_irq: scope:[init_irq] from main::@8
[110] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[111] *PROCPORT = PROCPORT_RAM_IO
[112] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[113] *VICII_CONTROL = *VICII_CONTROL | $80
[113] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[114] *RASTER = 0
[115] *IRQ_ENABLE = IRQ_RASTER
[116] *HARDWARE_IRQ = &irq
@ -3837,7 +3837,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:19 [ bitmap
Statement [110] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [111] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [112] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [113] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [113] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [114] *RASTER = 0 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [115] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [116] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
@ -3974,7 +3974,7 @@ Statement [99] bitmap_init::yoffs#1 = bitmap_init::yoffs#2 + (word)$28*8 [ bitma
Statement [110] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [111] *PROCPORT = PROCPORT_RAM_IO [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [112] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [113] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [113] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [114] *RASTER = 0 [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [115] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
Statement [116] *HARDWARE_IRQ = &irq [ ] ( main:3::init_irq:20 [ frame_cnt ] { } ) always clobbers reg byte a
@ -4327,7 +4327,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
.label D018 = $d018
// VIC II IRQ Status Register
@ -5073,11 +5073,11 @@ init_irq: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// [113] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [113] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [114] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -6216,7 +6216,7 @@ const byte* SCREEN = (byte*) 1024
const signed word* SINE[$200] = { fill( $200, 0) }
const byte SIZEOF_SIGNED_WORD = 2
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1
@ -6572,7 +6572,7 @@ Score: 20654
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
.label D018 = $d018
// VIC II IRQ Status Register
@ -7276,12 +7276,12 @@ init_irq: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL |=$80
// [113] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=$80
// [113] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
// [114] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/bitmap-plot-2.sym
View File

@ -23,7 +23,7 @@ const byte* SCREEN = (byte*) 1024
const signed word* SINE[$200] = { fill( $200, 0) }
const byte SIZEOF_SIGNED_WORD = 2
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1

14
src/test/ref/c64dtv-8bppcharstretch.asm
View File

@ -31,7 +31,7 @@
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -88,9 +88,9 @@ main: {
// 8BPP Pixel Cell Mode
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF
sta DTV_CONTROL
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_MCM | VICII_CSEL
lda #VICII_MCM|VICII_CSEL
sta VICII_CONTROL2
@ -189,9 +189,9 @@ main: {
inx
cpx #8
bne stabilize
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *BORDER_COLOR = 0
lda #0
sta BORDER_COLOR
@ -227,8 +227,8 @@ main: {
and #7
// VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
ora #VICII_DEN|VICII_ECM|VICII_RSEL
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
sta VICII_CONTROL
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
sta VICII_CONTROL1
// rst*$10
txa
asl

6
src/test/ref/c64dtv-8bppcharstretch.cfg
View File

@ -9,7 +9,7 @@ main: scope:[main] from
main::@6: scope:[main] from main
[4] *DTV_FEATURE = DTV_FEATURE_ENABLE
[5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF
[6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
[6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
[7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
[8] *DTV_PLANEA_START_LO = 0
[9] *DTV_PLANEA_START_MI = >SCREEN
@ -35,7 +35,7 @@ main::@1: scope:[main] from main::@1 main::@6
to:main::@2
main::@2: scope:[main] from main::@1 main::@5
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
[28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
[28] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
[29] *BORDER_COLOR = 0
to:main::@3
main::@3: scope:[main] from main::@2 main::@3
@ -48,7 +48,7 @@ main::@5: scope:[main] from main::@4 main::@5
[32] main::rst#1 = *RASTER
[33] main::$3 = main::rst#1 & 7
[34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
[35] *VICII_CONTROL = main::$4
[35] *VICII_CONTROL1 = main::$4
[36] main::$5 = main::rst#1 << 4
[37] *BORDER_COLOR = main::$5
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }

70
src/test/ref/c64dtv-8bppcharstretch.log
View File

@ -23,7 +23,7 @@ main: scope:[main] from __start::@1
main::@7: scope:[main] from main
*DTV_FEATURE = DTV_FEATURE_ENABLE
*DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF
*VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
*VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
*VICII_CONTROL2 = VICII_MCM|VICII_CSEL
*DTV_PLANEA_START_LO = <SCREEN
*DTV_PLANEA_START_MI = >SCREEN
@ -54,7 +54,7 @@ main::@2: scope:[main] from main::@1 main::@6
to:main::@return
main::@3: scope:[main] from main::@2
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
*VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
*VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
*BORDER_COLOR = 0
main::rst#0 = $42
to:main::@4
@ -70,7 +70,7 @@ main::@6: scope:[main] from main::@5 main::@6
main::rst#1 = *RASTER
main::$3 = main::rst#1 & 7
main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
*VICII_CONTROL = main::$4
*VICII_CONTROL1 = main::$4
main::$5 = main::rst#1 * $10
*BORDER_COLOR = main::$5
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
@ -281,7 +281,7 @@ const nomodify byte PROCPORT_RAM_CHARROM = 1
const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* SCREEN = (byte*)$7c00
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte* VICII_CONTROL2 = (byte*)$d016
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10
@ -412,8 +412,8 @@ byte main::rst#0
byte main::rst#1
byte main::rst#2
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 3 in *VICII_CONTROL1 = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 0 in *DTV_PLANEA_START_HI = 0
Adding number conversion cast (unumber) 1 in *DTV_PLANEA_STEP = 1
Adding number conversion cast (unumber) 0 in *DTV_PLANEA_MODULO_LO = 0
@ -430,8 +430,8 @@ Adding number conversion cast (unumber) (byte)(word)SCREEN&$3fff/$40|>(word)SCRE
Adding number conversion cast (unumber) >(word)SCREEN&$3fff/4 in *VICII_MEMORY = ((unumber)) (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4
Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (byte)(word)SCREEN&$3fff/$40|(unumber)>(word)SCREEN&$3fff/4
Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (byte)(word)SCREEN&(unumber)$3fff/$40|(unumber)>(word)SCREEN&$3fff/4
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 3 in *VICII_CONTROL1 = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0
Adding number conversion cast (unumber) 7 in main::$3 = main::rst#1 & 7
Adding number conversion cast (unumber) main::$3 in main::$3 = main::rst#1 & (unumber)7
@ -459,7 +459,7 @@ Adding number conversion cast (unumber) $40 in *VICII_MEMORY = ((unumber)) (byte
Adding number conversion cast (unumber) 4 in *VICII_MEMORY = ((unumber)) (byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(unumber)>(word)SCREEN&(unumber)$3fff/4
Adding number conversion cast (unumber) $4000 in gfx_init_plane_charset8::gfxa#0 = (byte*)$4000+(word)CHARSET8&(unumber)$3fff
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
Inlining cast *VICII_CONTROL1 = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
Inlining cast *DTV_PLANEA_START_HI = (unumber)0
Inlining cast *DTV_PLANEA_STEP = (unumber)1
Inlining cast *DTV_PLANEA_MODULO_LO = (unumber)0
@ -471,7 +471,7 @@ Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0
Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3
Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)SCREEN/(unumber)$4000
Inlining cast *VICII_MEMORY = (unumber)(byte)(word)SCREEN&(unumber)$3fff/(unumber)$40|(unumber)>(word)SCREEN&(unumber)$3fff/(unumber)4
Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
Inlining cast *VICII_CONTROL1 = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
Inlining cast *BORDER_COLOR = (unumber)0
Successful SSA optimization Pass2InlineCast
Simplifying constant pointer cast (byte*) 53266
@ -807,7 +807,7 @@ main: scope:[main] from
main::@6: scope:[main] from main
[4] *DTV_FEATURE = DTV_FEATURE_ENABLE
[5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF
[6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
[6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
[7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
[8] *DTV_PLANEA_START_LO = 0
[9] *DTV_PLANEA_START_MI = >SCREEN
@ -833,7 +833,7 @@ main::@1: scope:[main] from main::@1 main::@6
to:main::@2
main::@2: scope:[main] from main::@1 main::@5
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
[28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
[28] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
[29] *BORDER_COLOR = 0
to:main::@3
main::@3: scope:[main] from main::@2 main::@3
@ -846,7 +846,7 @@ main::@5: scope:[main] from main::@4 main::@5
[32] main::rst#1 = *RASTER
[33] main::$3 = main::rst#1 & 7
[34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
[35] *VICII_CONTROL = main::$4
[35] *VICII_CONTROL1 = main::$4
[36] main::$5 = main::rst#1 << 4
[37] *BORDER_COLOR = main::$5
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
@ -1099,7 +1099,7 @@ Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always
Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a
Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *DTV_PLANEA_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *DTV_PLANEA_START_MI = >SCREEN [ ] ( [ ] { } ) always clobbers reg byte a
@ -1117,7 +1117,7 @@ Statement [20] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [
Statement [21] *((byte*)CIA2) = 3^(byte)(word)SCREEN/$4000 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [22] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 [ ] ( [ ] { } ) always clobbers reg byte a
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
Statement [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [28] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [29] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [30] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a
@ -1148,7 +1148,7 @@ Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always
Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a
Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *DTV_PLANEA_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *DTV_PLANEA_START_MI = >SCREEN [ ] ( [ ] { } ) always clobbers reg byte a
@ -1166,7 +1166,7 @@ Statement [20] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [
Statement [21] *((byte*)CIA2) = 3^(byte)(word)SCREEN/$4000 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [22] *VICII_MEMORY = (byte)(word)SCREEN&$3fff/$40|>(word)SCREEN&$3fff/4 [ ] ( [ ] { } ) always clobbers reg byte a
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
Statement [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [28] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [29] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [30] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [33] main::$3 = main::rst#1 & 7 [ main::rst#1 main::$3 ] ( [ main::rst#1 main::$3 ] { } ) always clobbers reg byte a
@ -1288,7 +1288,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -1351,9 +1351,9 @@ main: {
// 8BPP Pixel Cell Mode
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF
sta DTV_CONTROL
// [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
// [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2
lda #VICII_MCM|VICII_CSEL
sta VICII_CONTROL2
@ -1469,9 +1469,9 @@ main: {
inx
cpx #8
bne stabilize
// [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
// [28] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// [29] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2
lda #0
sta BORDER_COLOR
@ -1514,8 +1514,8 @@ main: {
and #7
// [34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa
ora #VICII_DEN|VICII_ECM|VICII_RSEL
// [35] *VICII_CONTROL = main::$4 -- _deref_pbuc1=vbuaa
sta VICII_CONTROL
// [35] *VICII_CONTROL1 = main::$4 -- _deref_pbuc1=vbuaa
sta VICII_CONTROL1
// [36] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4
txa
asl
@ -1954,7 +1954,7 @@ const nomodify byte PROCPORT_RAM_CHARROM = 1
const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* SCREEN = (byte*) 31744
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte* VICII_CONTROL2 = (byte*) 53270
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10
@ -2086,7 +2086,7 @@ Score: 75375
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -2152,10 +2152,10 @@ main: {
// 8BPP Pixel Cell Mode
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_BADLINE_OFF
sta DTV_CONTROL
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_MCM | VICII_CSEL
// [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2
lda #VICII_MCM|VICII_CSEL
@ -2280,10 +2280,10 @@ main: {
inx
cpx #8
bne stabilize
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// [28] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// [28] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *BORDER_COLOR = 0
// [29] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2
lda #0
@ -2328,9 +2328,9 @@ main: {
// VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
// [34] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa
ora #VICII_DEN|VICII_ECM|VICII_RSEL
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
// [35] *VICII_CONTROL = main::$4 -- _deref_pbuc1=vbuaa
sta VICII_CONTROL
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
// [35] *VICII_CONTROL1 = main::$4 -- _deref_pbuc1=vbuaa
sta VICII_CONTROL1
// rst*$10
// [36] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4
txa

2
src/test/ref/c64dtv-8bppcharstretch.sym
View File

@ -30,7 +30,7 @@ const nomodify byte PROCPORT_RAM_CHARROM = 1
const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* SCREEN = (byte*) 31744
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte* VICII_CONTROL2 = (byte*) 53270
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10

14
src/test/ref/c64dtv-8bppchunkystretch.asm
View File

@ -30,7 +30,7 @@
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -76,9 +76,9 @@ main: {
// 8BPP Pixel Cell Mode
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
sta DTV_CONTROL
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_MCM | VICII_CSEL
lda #VICII_MCM|VICII_CSEL
sta VICII_CONTROL2
@ -162,9 +162,9 @@ main: {
inx
cpx #8
bne stabilize
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *BORDER_COLOR = 0
lda #0
sta BORDER_COLOR
@ -200,8 +200,8 @@ main: {
and #7
// VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
ora #VICII_DEN|VICII_ECM|VICII_RSEL
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
sta VICII_CONTROL
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
sta VICII_CONTROL1
// rst*$10
txa
asl

6
src/test/ref/c64dtv-8bppchunkystretch.cfg
View File

@ -9,7 +9,7 @@ main: scope:[main] from
main::@6: scope:[main] from main
[4] *DTV_FEATURE = DTV_FEATURE_ENABLE
[5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
[6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
[6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
[7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
[8] *DTV_PLANEB_START_LO = 0
[9] *DTV_PLANEB_START_MI = >CHUNKY
@ -29,7 +29,7 @@ main::@1: scope:[main] from main::@1 main::@6
to:main::@2
main::@2: scope:[main] from main::@1 main::@5
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
[22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
[22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
[23] *BORDER_COLOR = 0
to:main::@3
main::@3: scope:[main] from main::@2 main::@3
@ -42,7 +42,7 @@ main::@5: scope:[main] from main::@4 main::@5
[26] main::rst#1 = *RASTER
[27] main::$3 = main::rst#1 & 7
[28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
[29] *VICII_CONTROL = main::$4
[29] *VICII_CONTROL1 = main::$4
[30] main::$5 = main::rst#1 << 4
[31] *BORDER_COLOR = main::$5
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }

70
src/test/ref/c64dtv-8bppchunkystretch.log
View File

@ -23,7 +23,7 @@ main: scope:[main] from __start::@1
main::@7: scope:[main] from main
*DTV_FEATURE = DTV_FEATURE_ENABLE
*DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
*VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
*VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
*VICII_CONTROL2 = VICII_MCM|VICII_CSEL
*DTV_PLANEB_START_LO = <CHUNKY
*DTV_PLANEB_START_MI = >CHUNKY
@ -48,7 +48,7 @@ main::@2: scope:[main] from main::@1 main::@6
to:main::@return
main::@3: scope:[main] from main::@2
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
*VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
*VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
*BORDER_COLOR = 0
main::rst#0 = $42
to:main::@4
@ -64,7 +64,7 @@ main::@6: scope:[main] from main::@5 main::@6
main::rst#1 = *RASTER
main::$3 = main::rst#1 & 7
main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
*VICII_CONTROL = main::$4
*VICII_CONTROL1 = main::$4
main::$5 = main::rst#1 * $10
*BORDER_COLOR = main::$5
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
@ -187,7 +187,7 @@ const nomodify byte* PROCPORT_DDR = (byte*)0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte* VICII_CONTROL2 = (byte*)$d016
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10
@ -262,8 +262,8 @@ byte main::rst#0
byte main::rst#1
byte main::rst#2
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 3 in *VICII_CONTROL1 = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 0 in *DTV_PLANEB_START_HI = 0
Adding number conversion cast (unumber) 8 in *DTV_PLANEB_STEP = 8
Adding number conversion cast (unumber) 0 in *DTV_PLANEB_MODULO_LO = 0
@ -276,8 +276,8 @@ Adding number conversion cast (unumber) (byte)(word)CHUNKY&$3fff/$40|>(word)CHUN
Adding number conversion cast (unumber) >(word)CHUNKY&$3fff/4 in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&$3fff/$40|>(word)CHUNKY&$3fff/4
Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&$3fff/$40|(unumber)>(word)CHUNKY&$3fff/4
Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&(unumber)$3fff/$40|(unumber)>(word)CHUNKY&$3fff/4
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 3 in *VICII_CONTROL = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 3 in *VICII_CONTROL1 = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0
Adding number conversion cast (unumber) 7 in main::$3 = main::rst#1 & 7
Adding number conversion cast (unumber) main::$3 in main::$3 = main::rst#1 & (unumber)7
@ -291,7 +291,7 @@ Successful SSA optimization PassNAddNumberTypeConversions
Adding number conversion cast (unumber) $40 in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&(unumber)$3fff/$40|(unumber)>(word)CHUNKY&(unumber)$3fff/4
Adding number conversion cast (unumber) 4 in *VICII_MEMORY = ((unumber)) (byte)(word)CHUNKY&(unumber)$3fff/(unumber)$40|(unumber)>(word)CHUNKY&(unumber)$3fff/4
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
Inlining cast *VICII_CONTROL1 = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
Inlining cast *DTV_PLANEB_START_HI = (unumber)0
Inlining cast *DTV_PLANEB_STEP = (unumber)8
Inlining cast *DTV_PLANEB_MODULO_LO = (unumber)0
@ -299,7 +299,7 @@ Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0
Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3
Inlining cast *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(byte)(word)CHUNKY/(unumber)$4000
Inlining cast *VICII_MEMORY = (unumber)(byte)(word)CHUNKY&(unumber)$3fff/(unumber)$40|(unumber)>(word)CHUNKY&(unumber)$3fff/(unumber)4
Inlining cast *VICII_CONTROL = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
Inlining cast *VICII_CONTROL1 = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
Inlining cast *BORDER_COLOR = (unumber)0
Inlining cast gfx_init_chunky::gfxb#2 = (byte*)$4000
Successful SSA optimization Pass2InlineCast
@ -528,7 +528,7 @@ main: scope:[main] from
main::@6: scope:[main] from main
[4] *DTV_FEATURE = DTV_FEATURE_ENABLE
[5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
[6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
[6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
[7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
[8] *DTV_PLANEB_START_LO = 0
[9] *DTV_PLANEB_START_MI = >CHUNKY
@ -548,7 +548,7 @@ main::@1: scope:[main] from main::@1 main::@6
to:main::@2
main::@2: scope:[main] from main::@1 main::@5
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
[22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3
[22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
[23] *BORDER_COLOR = 0
to:main::@3
main::@3: scope:[main] from main::@2 main::@3
@ -561,7 +561,7 @@ main::@5: scope:[main] from main::@4 main::@5
[26] main::rst#1 = *RASTER
[27] main::$3 = main::rst#1 & 7
[28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
[29] *VICII_CONTROL = main::$4
[29] *VICII_CONTROL1 = main::$4
[30] main::$5 = main::rst#1 << 4
[31] *BORDER_COLOR = main::$5
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
@ -702,7 +702,7 @@ Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always
Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a
Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *DTV_PLANEB_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *DTV_PLANEB_START_MI = >CHUNKY [ ] ( [ ] { } ) always clobbers reg byte a
@ -714,7 +714,7 @@ Statement [14] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [
Statement [15] *((byte*)CIA2) = 3^(byte)(word)CHUNKY/$4000 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [16] *VICII_MEMORY = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
Statement [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [23] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [24] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a
@ -734,7 +734,7 @@ Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always
Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a
Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *DTV_PLANEB_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *DTV_PLANEB_START_MI = >CHUNKY [ ] ( [ ] { } ) always clobbers reg byte a
@ -746,7 +746,7 @@ Statement [14] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [
Statement [15] *((byte*)CIA2) = 3^(byte)(word)CHUNKY/$4000 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [16] *VICII_MEMORY = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
Statement [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [23] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [24] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [27] main::$3 = main::rst#1 & 7 [ main::rst#1 main::$3 ] ( [ main::rst#1 main::$3 ] { } ) always clobbers reg byte a
@ -833,7 +833,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -885,9 +885,9 @@ main: {
// 8BPP Pixel Cell Mode
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
sta DTV_CONTROL
// [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
// [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2
lda #VICII_MCM|VICII_CSEL
sta VICII_CONTROL2
@ -984,9 +984,9 @@ main: {
inx
cpx #8
bne stabilize
// [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
// [22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// [23] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2
lda #0
sta BORDER_COLOR
@ -1029,8 +1029,8 @@ main: {
and #7
// [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa
ora #VICII_DEN|VICII_ECM|VICII_RSEL
// [29] *VICII_CONTROL = main::$4 -- _deref_pbuc1=vbuaa
sta VICII_CONTROL
// [29] *VICII_CONTROL1 = main::$4 -- _deref_pbuc1=vbuaa
sta VICII_CONTROL1
// [30] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4
txa
asl
@ -1310,7 +1310,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte* VICII_CONTROL2 = (byte*) 53270
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10
@ -1405,7 +1405,7 @@ Score: 19882
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -1460,10 +1460,10 @@ main: {
// 8BPP Pixel Cell Mode
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
sta DTV_CONTROL
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// [6] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_MCM | VICII_CSEL
// [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2
lda #VICII_MCM|VICII_CSEL
@ -1567,10 +1567,10 @@ main: {
inx
cpx #8
bne stabilize
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// [22] *VICII_CONTROL = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
// [22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *BORDER_COLOR = 0
// [23] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2
lda #0
@ -1615,9 +1615,9 @@ main: {
// VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
// [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa
ora #VICII_DEN|VICII_ECM|VICII_RSEL
// *VICII_CONTROL = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
// [29] *VICII_CONTROL = main::$4 -- _deref_pbuc1=vbuaa
sta VICII_CONTROL
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
// [29] *VICII_CONTROL1 = main::$4 -- _deref_pbuc1=vbuaa
sta VICII_CONTROL1
// rst*$10
// [30] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4
txa

2
src/test/ref/c64dtv-8bppchunkystretch.sym
View File

@ -22,7 +22,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte* VICII_CONTROL2 = (byte*) 53270
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10

6
src/test/ref/c64dtv-gfxexplorer.asm
View File

@ -82,7 +82,7 @@
.const OFFSET_STRUCT_MOS6569_VICII_MEMORY = $18
// Number of form fields
.const form_fields_cnt = $24
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -499,8 +499,8 @@ gfx_mode: {
ora #VICII_BMM
tax
__b8:
// *VICII_CONTROL = VICII_control
stx VICII_CONTROL
// *VICII_CONTROL1 = VICII_control
stx VICII_CONTROL1
// if(*form_ctrl_mcm!=0)
lda form_ctrl_mcm
cmp #0

2
src/test/ref/c64dtv-gfxexplorer.cfg
View File

@ -257,7 +257,7 @@ gfx_mode::@17: scope:[gfx_mode] from gfx_mode::@7
to:gfx_mode::@8
gfx_mode::@8: scope:[gfx_mode] from gfx_mode::@17 gfx_mode::@7
[122] gfx_mode::VICII_control#4 = phi( gfx_mode::@17/gfx_mode::VICII_control#2, gfx_mode::@7/gfx_mode::VICII_control#5 )
[123] *VICII_CONTROL = gfx_mode::VICII_control#4
[123] *VICII_CONTROL1 = gfx_mode::VICII_control#4
[124] if(*form_ctrl_mcm==0) goto gfx_mode::@9
to:gfx_mode::@18
gfx_mode::@18: scope:[gfx_mode] from gfx_mode::@8

22
src/test/ref/c64dtv-gfxexplorer.log
View File

@ -1564,7 +1564,7 @@ gfx_mode::@8: scope:[gfx_mode] from gfx_mode::@18 gfx_mode::@7
keyboard_modifiers#110 = phi( gfx_mode::@18/keyboard_modifiers#111, gfx_mode::@7/keyboard_modifiers#112 )
keyboard_events_size#129 = phi( gfx_mode::@18/keyboard_events_size#130, gfx_mode::@7/keyboard_events_size#131 )
gfx_mode::VICII_control#4 = phi( gfx_mode::@18/gfx_mode::VICII_control#2, gfx_mode::@7/gfx_mode::VICII_control#6 )
*VICII_CONTROL = gfx_mode::VICII_control#4
*VICII_CONTROL1 = gfx_mode::VICII_control#4
gfx_mode::VICII_control2#0 = VICII_CSEL
gfx_mode::$16 = *form_ctrl_mcm != 0
gfx_mode::$17 = ! gfx_mode::$16
@ -3346,7 +3346,7 @@ const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*)$d000
const nomodify byte* VICII_BITMAP = (byte*)$6000
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CHARSET_ROM = (byte*)$5800
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte* VICII_CONTROL2 = (byte*)$d016
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10
@ -9309,7 +9309,7 @@ gfx_mode::@17: scope:[gfx_mode] from gfx_mode::@7
to:gfx_mode::@8
gfx_mode::@8: scope:[gfx_mode] from gfx_mode::@17 gfx_mode::@7
[122] gfx_mode::VICII_control#4 = phi( gfx_mode::@17/gfx_mode::VICII_control#2, gfx_mode::@7/gfx_mode::VICII_control#5 )
[123] *VICII_CONTROL = gfx_mode::VICII_control#4
[123] *VICII_CONTROL1 = gfx_mode::VICII_control#4
[124] if(*form_ctrl_mcm==0) goto gfx_mode::@9
to:gfx_mode::@18
gfx_mode::@18: scope:[gfx_mode] from gfx_mode::@8
@ -13481,7 +13481,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const OFFSET_STRUCT_MOS6569_VICII_MEMORY = $18
// Number of form fields
.const form_fields_cnt = $24
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -14236,8 +14236,8 @@ gfx_mode: {
jmp __b8
// gfx_mode::@8
__b8:
// [123] *VICII_CONTROL = gfx_mode::VICII_control#4 -- _deref_pbuc1=vbuxx
stx VICII_CONTROL
// [123] *VICII_CONTROL1 = gfx_mode::VICII_control#4 -- _deref_pbuc1=vbuxx
stx VICII_CONTROL1
// [124] if(*form_ctrl_mcm==0) goto gfx_mode::@9 -- _deref_pbuc1_eq_0_then_la1
lda form_ctrl_mcm
cmp #0
@ -19688,7 +19688,7 @@ const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248
const nomodify byte* VICII_BITMAP = (byte*) 24576
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CHARSET_ROM = (byte*) 22528
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte* VICII_CONTROL2 = (byte*) 53270
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10
@ -20676,7 +20676,7 @@ Score: 10117301
.const OFFSET_STRUCT_MOS6569_VICII_MEMORY = $18
// Number of form fields
.const form_fields_cnt = $24
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -21332,9 +21332,9 @@ gfx_mode: {
// [122] phi gfx_mode::VICII_control#4 = gfx_mode::VICII_control#2 [phi:gfx_mode::@17/gfx_mode::@7->gfx_mode::@8#0] -- register_copy
// gfx_mode::@8
__b8:
// *VICII_CONTROL = VICII_control
// [123] *VICII_CONTROL = gfx_mode::VICII_control#4 -- _deref_pbuc1=vbuxx
stx VICII_CONTROL
// *VICII_CONTROL1 = VICII_control
// [123] *VICII_CONTROL1 = gfx_mode::VICII_control#4 -- _deref_pbuc1=vbuxx
stx VICII_CONTROL1
// if(*form_ctrl_mcm!=0)
// [124] if(*form_ctrl_mcm==0) goto gfx_mode::@9 -- _deref_pbuc1_eq_0_then_la1
lda form_ctrl_mcm

2
src/test/ref/c64dtv-gfxexplorer.sym
View File

@ -79,7 +79,7 @@ const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248
const nomodify byte* VICII_BITMAP = (byte*) 24576
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CHARSET_ROM = (byte*) 22528
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte* VICII_CONTROL2 = (byte*) 53270
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10

54
src/test/ref/c64dtv-gfxmodes.asm
View File

@ -64,7 +64,7 @@
.label BG_COLOR1 = $d022
.label BG_COLOR2 = $d023
.label BG_COLOR3 = $d024
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// Processor port data direction register
@ -164,11 +164,11 @@ menu: {
// Set VIC Bank bits to output - all others to input
lda #3^CHARSET/$4000
sta CIA2
// *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
// Set VIC Bank
// VIC Graphics Mode
lda #VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_CSEL
lda #VICII_CSEL
sta VICII_CONTROL2
@ -497,11 +497,11 @@ mode_stdchar: {
// Set VIC Bank bits to output - all others to input
lda #3^CHARSET/$4000
sta CIA2
// *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
// Set VIC Bank
// VIC Graphics Mode
lda #VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_CSEL
lda #VICII_CSEL
sta VICII_CONTROL2
@ -632,11 +632,11 @@ mode_ecmchar: {
// Set VIC Bank bits to output - all others to input
lda #3^CHARSET/$4000
sta CIA2
// *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3
// *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|VICII_ECM|3
// Set VIC Bank
// VIC Graphics Mode
lda #VICII_DEN|VICII_RSEL|VICII_ECM|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_CSEL
lda #VICII_CSEL
sta VICII_CONTROL2
@ -777,11 +777,11 @@ mode_mcchar: {
// Set VIC Bank bits to output - all others to input
lda #3^CHARSET/$4000
sta CIA2
// *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
// Set VIC Bank
// VIC Graphics Mode
lda #VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_CSEL|VICII_MCM
lda #VICII_CSEL|VICII_MCM
sta VICII_CONTROL2
@ -907,11 +907,11 @@ mode_stdbitmap: {
// Set VIC Bank bits to output - all others to input
lda #3^BITMAP/$4000
sta CIA2
// *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_BMM|VICII_DEN|VICII_RSEL|3
// Set VIC Bank
// VIC Graphics Mode
lda #VICII_BMM|VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_CSEL
lda #VICII_CSEL
sta VICII_CONTROL2
@ -1067,11 +1067,11 @@ mode_hicolstdchar: {
// Set VIC Bank bits to output - all others to input
lda #3^CHARSET/$4000
sta CIA2
// *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
// Set VIC Bank
// VIC Graphics Mode
lda #VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_CSEL
lda #VICII_CSEL
sta VICII_CONTROL2
@ -1197,11 +1197,11 @@ mode_hicolecmchar: {
// Set VIC Bank bits to output - all others to input
lda #3^CHARSET/$4000
sta CIA2
// *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3
// *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|VICII_ECM|3
// Set VIC Bank
// VIC Graphics Mode
lda #VICII_DEN|VICII_RSEL|VICII_ECM|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_CSEL
lda #VICII_CSEL
sta VICII_CONTROL2
@ -1338,11 +1338,11 @@ mode_hicolmcchar: {
// Set VIC Bank bits to output - all others to input
lda #3^CHARSET/$4000
sta CIA2
// *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
// Set VIC Bank
// VIC Graphics Mode
lda #VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_CSEL|VICII_MCM
lda #VICII_CSEL|VICII_MCM
sta VICII_CONTROL2
@ -1455,10 +1455,10 @@ mode_sixsfred2: {
// *DTV_CONTROL = DTV_LINEAR
lda #DTV_LINEAR
sta DTV_CONTROL
// *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
// VIC Graphics Mode
lda #VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
lda #VICII_MCM|VICII_CSEL
sta VICII_CONTROL2
@ -1655,10 +1655,10 @@ mode_twoplanebitmap: {
// *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR
lda #DTV_HIGHCOLOR|DTV_LINEAR
sta DTV_CONTROL
// *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
// VIC Graphics Mode
lda #VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_CSEL
lda #VICII_CSEL
sta VICII_CONTROL2
@ -1866,10 +1866,10 @@ mode_sixsfred: {
// *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR
lda #DTV_HIGHCOLOR|DTV_LINEAR
sta DTV_CONTROL
// *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
// VIC Graphics Mode
lda #VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
lda #VICII_MCM|VICII_CSEL
sta VICII_CONTROL2
@ -2059,10 +2059,10 @@ mode_8bpppixelcell: {
// *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY
sta DTV_CONTROL
// *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3
// *VICII_CONTROL1 = VICII_ECM|VICII_DEN|VICII_RSEL|3
// VIC Graphics Mode
lda #VICII_ECM|VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
lda #VICII_MCM|VICII_CSEL
sta VICII_CONTROL2
@ -2244,10 +2244,10 @@ mode_8bppchunkybmm: {
// *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_CHUNKY | DTV_COLORRAM_OFF
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF
sta DTV_CONTROL
// *VICII_CONTROL = VICII_ECM | VICII_DEN | VICII_RSEL | 3
// *VICII_CONTROL1 = VICII_ECM | VICII_DEN | VICII_RSEL | 3
// VIC Graphics Mode
lda #VICII_ECM|VICII_DEN|VICII_RSEL|3
sta VICII_CONTROL
sta VICII_CONTROL1
// *VICII_CONTROL2 = VICII_MCM | VICII_CSEL
lda #VICII_MCM|VICII_CSEL
sta VICII_CONTROL2

26
src/test/ref/c64dtv-gfxmodes.cfg
View File

@ -23,7 +23,7 @@ menu: scope:[menu] from main::@2
[10] *DTV_CONTROL = 0
[11] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
[12] *((byte*)CIA2) = 3^(byte)(word)menu::CHARSET/$4000
[13] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
[13] *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
[14] *VICII_CONTROL2 = VICII_CSEL
[15] *VICII_MEMORY = (byte)(word)menu::CHARSET&$3fff/$400
to:menu::@1
@ -285,7 +285,7 @@ mode_stdchar: scope:[mode_stdchar] from menu::@17
[146] *DTV_CONTROL = 0
[147] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
[148] *((byte*)CIA2) = 3^(byte)(word)mode_stdchar::CHARSET/$4000
[149] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
[149] *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
[150] *VICII_CONTROL2 = VICII_CSEL
[151] *VICII_MEMORY = (byte)(word)mode_stdchar::CHARSET&$3fff/$400
to:mode_stdchar::@1
@ -341,7 +341,7 @@ mode_ecmchar: scope:[mode_ecmchar] from menu::@18
[180] *DTV_CONTROL = 0
[181] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
[182] *((byte*)CIA2) = 3^(byte)(word)mode_ecmchar::CHARSET/$4000
[183] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3
[183] *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|VICII_ECM|3
[184] *VICII_CONTROL2 = VICII_CSEL
[185] *VICII_MEMORY = (byte)(word)mode_ecmchar::CHARSET&$3fff/$400
to:mode_ecmchar::@1
@ -400,7 +400,7 @@ mode_mcchar: scope:[mode_mcchar] from menu::@19
[217] *DTV_CONTROL = 0
[218] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
[219] *((byte*)CIA2) = 3^(byte)(word)mode_mcchar::CHARSET/$4000
[220] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
[220] *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
[221] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM
[222] *VICII_MEMORY = (byte)(word)mode_mcchar::CHARSET&$3fff/$400
to:mode_mcchar::@1
@ -456,7 +456,7 @@ mode_stdbitmap: scope:[mode_stdbitmap] from menu::@20
[251] *DTV_CONTROL = 0
[252] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
[253] *((byte*)CIA2) = 3^(byte)(word)mode_stdbitmap::BITMAP/$4000
[254] *VICII_CONTROL = VICII_BMM|VICII_DEN|VICII_RSEL|3
[254] *VICII_CONTROL1 = VICII_BMM|VICII_DEN|VICII_RSEL|3
[255] *VICII_CONTROL2 = VICII_CSEL
[256] *VICII_MEMORY = (byte)(word)mode_stdbitmap::BITMAP&$3fff/$400
to:mode_stdbitmap::@1
@ -526,7 +526,7 @@ mode_hicolstdchar: scope:[mode_hicolstdchar] from menu::@21
[293] *DTV_CONTROL = DTV_HIGHCOLOR
[294] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
[295] *((byte*)CIA2) = 3^(byte)(word)mode_hicolstdchar::CHARSET/$4000
[296] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
[296] *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
[297] *VICII_CONTROL2 = VICII_CSEL
[298] *VICII_MEMORY = (byte)(word)mode_hicolstdchar::CHARSET&$3fff/$400
to:mode_hicolstdchar::@1
@ -580,7 +580,7 @@ mode_hicolecmchar: scope:[mode_hicolecmchar] from menu::@22
[325] *DTV_CONTROL = DTV_HIGHCOLOR
[326] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
[327] *((byte*)CIA2) = 3^(byte)(word)mode_hicolecmchar::CHARSET/$4000
[328] *VICII_CONTROL = VICII_DEN|VICII_RSEL|VICII_ECM|3
[328] *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|VICII_ECM|3
[329] *VICII_CONTROL2 = VICII_CSEL
[330] *VICII_MEMORY = (byte)(word)mode_hicolecmchar::CHARSET&$3fff/$400
to:mode_hicolecmchar::@1
@ -637,7 +637,7 @@ mode_hicolmcchar: scope:[mode_hicolmcchar] from menu::@23
[360] *DTV_CONTROL = DTV_HIGHCOLOR
[361] *((byte*)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
[362] *((byte*)CIA2) = 3^(byte)(word)mode_hicolmcchar::CHARSET/$4000
[363] *VICII_CONTROL = VICII_DEN|VICII_RSEL|3
[363] *VICII_CONTROL1 = VICII_DEN|VICII_RSEL|3
[364] *VICII_CONTROL2 = VICII_CSEL|VICII_MCM
[365] *VICII_MEMORY = (byte)(word)mode_hicolmcchar::CHARSET&$3fff/$400
to:mode_hicolmcchar::@1
@ -688,7 +688,7 @@ mode_hicolmcchar::@return: scope:[mode_hicolmcchar] from mode_hicolmcchar::@6
void mode_sixsfred2()
mode_sixsfred2: scope:[mode_sixsfred2] from menu::@24
[391] *DTV_CONTROL = DTV_LINEAR
[392] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
[392] *VICII_CONTROL1 = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
[393] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
[394] *DTV_PLANEA_START_LO = 0
[395] *DTV_PLANEA_START_MI = >mode_sixsfred2::PLANEA
@ -779,7 +779,7 @@ mode_sixsfred2::@return: scope:[mode_sixsfred2] from mode_sixsfred2::@12
void mode_twoplanebitmap()
mode_twoplanebitmap: scope:[mode_twoplanebitmap] from menu::@25
[446] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR
[447] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
[447] *VICII_CONTROL1 = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
[448] *VICII_CONTROL2 = VICII_CSEL
[449] *DTV_PLANEA_START_LO = 0
[450] *DTV_PLANEA_START_MI = >mode_twoplanebitmap::PLANEA
@ -881,7 +881,7 @@ mode_twoplanebitmap::@8: scope:[mode_twoplanebitmap] from mode_twoplanebitmap::
void mode_sixsfred()
mode_sixsfred: scope:[mode_sixsfred] from menu::@26
[506] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR
[507] *VICII_CONTROL = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
[507] *VICII_CONTROL1 = VICII_ECM|VICII_BMM|VICII_DEN|VICII_RSEL|3
[508] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
[509] *DTV_PLANEA_START_LO = 0
[510] *DTV_PLANEA_START_MI = >mode_sixsfred::PLANEA
@ -970,7 +970,7 @@ mode_sixsfred::@return: scope:[mode_sixsfred] from mode_sixsfred::@12
void mode_8bpppixelcell()
mode_8bpppixelcell: scope:[mode_8bpppixelcell] from menu::@27
[559] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY
[560] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3
[560] *VICII_CONTROL1 = VICII_ECM|VICII_DEN|VICII_RSEL|3
[561] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
[562] *DTV_PLANEA_START_LO = 0
[563] *DTV_PLANEA_START_MI = >mode_8bpppixelcell::PLANEA
@ -1068,7 +1068,7 @@ mode_8bpppixelcell::@return: scope:[mode_8bpppixelcell] from mode_8bpppixelcell
void mode_8bppchunkybmm()
mode_8bppchunkybmm: scope:[mode_8bppchunkybmm] from menu::@28
[614] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_CHUNKY|DTV_COLORRAM_OFF
[615] *VICII_CONTROL = VICII_ECM|VICII_DEN|VICII_RSEL|3
[615] *VICII_CONTROL1 = VICII_ECM|VICII_DEN|VICII_RSEL|3
[616] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
[617] *DTV_PLANEB_START_LO = 0
[618] *DTV_PLANEB_START_MI = 0

320
src/test/ref/c64dtv-gfxmodes.log
View File

File diff suppressed because it is too large Load Diff

2
src/test/ref/c64dtv-gfxmodes.sym
View File

@ -69,7 +69,7 @@ const byte RADIX::HEXADECIMAL = $10
const byte RADIX::OCTAL = 8
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte* VICII_CONTROL2 = (byte*) 53270
const nomodify byte VICII_CSEL = 8
const nomodify byte VICII_DEN = $10

56
src/test/ref/complex/new_30_years_low_resolution/new_30_years_low_resolution.asm
View File

@ -82,7 +82,7 @@
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// VIC II IRQ Status Register
@ -629,8 +629,8 @@ irq_swing_vsp: {
ldx #$18
lda #$1b // TODO: To control Y-scrolling this must be flexible!
// The STX $d011 must be line $30 cycle $10 for vsp_scroll==0
stx VICII_CONTROL // Enable the display - starts DMA
sta VICII_CONTROL
stx VICII_CONTROL1 // Enable the display - starts DMA
sta VICII_CONTROL1
// VICII->CONTROL1 |= VICII_BMM
// Set BMM
@ -869,11 +869,11 @@ irq_flipper_bottom: {
lda #1
sta.z flipper_done
__b1:
// *VICII_CONTROL |=0x80
// *VICII_CONTROL1 |=0x80
// Set up the IRQ again
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = IRQ_PART1_TOP_LINE
lda #IRQ_PART1_TOP_LINE
sta RASTER
@ -951,7 +951,7 @@ irq_flipper_top: {
ldy #$1b
sta VICII_MEMORY
stx BORDER_COLOR
sty VICII_CONTROL
sty VICII_CONTROL1
stx BG_COLOR
lda #$c8
sta VICII_CONTROL2
@ -961,10 +961,10 @@ irq_flipper_top: {
// Set up the flipper IRQ
cmp #0
bne __b1
// *VICII_CONTROL &= 0x7f
// *VICII_CONTROL1 &= 0x7f
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
__b2:
// <irq_flipper_bottom_line
lda.z irq_flipper_bottom_line
@ -990,10 +990,10 @@ irq_flipper_top: {
ldy #0
rti
__b1:
// *VICII_CONTROL |= 0x80
// *VICII_CONTROL1 |= 0x80
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
jmp __b2
}
// IRQ running during set-up
@ -1031,10 +1031,10 @@ irq_part1_top: {
// Set up the flipper IRQ
cmp #0
bne __b1
// *VICII_CONTROL &= 0x7f
// *VICII_CONTROL1 &= 0x7f
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
__b2:
// <irq_flipper_top_line
lda.z irq_flipper_top_line
@ -1060,10 +1060,10 @@ irq_part1_top: {
lda #0
rti
__b1:
// *VICII_CONTROL |= 0x80
// *VICII_CONTROL1 |= 0x80
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
jmp __b2
}
.segment Code
@ -1510,11 +1510,11 @@ byteboozer_decrunch: {
demo_start: {
// demo_init()
jsr demo_init
// *VICII_CONTROL &= 0x7f
// *VICII_CONTROL1 &= 0x7f
// Set raster line to 0x00
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = 0
lda #0
sta RASTER
@ -1682,11 +1682,11 @@ part1_run: {
// Acknowledge any VIC IRQ
lda #$f
sta IRQ_STATUS
// *VICII_CONTROL |= 0x80
// *VICII_CONTROL1 |= 0x80
// Set raster line to 0x136
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = IRQ_PART1_TOP_LINE
lda #IRQ_PART1_TOP_LINE
sta RASTER
@ -2004,11 +2004,11 @@ part2_run: {
// Acknowledge any VIC IRQ
lda #$f
sta IRQ_STATUS
// *VICII_CONTROL &=0x7f
// *VICII_CONTROL1 &=0x7f
// Set raster line to first bucket
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = BUCKET_YPOS[0]
lda BUCKET_YPOS
sta RASTER

24
src/test/ref/complex/new_30_years_low_resolution/new_30_years_low_resolution.cfg
View File

@ -164,7 +164,7 @@ irq_swing_vsp: scope:[irq_swing_vsp] from
[96] phi()
to:irq_swing_vsp::vsp_perform1
irq_swing_vsp::vsp_perform1: scope:[irq_swing_vsp] from irq_swing_vsp
kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL) {{ // Stabilize the raster by using the double IRQ method
kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL1) {{ // Stabilize the raster by using the double IRQ method
// Acknowledge the IRQ
lda #IRQ_RASTER
sta IRQ_STATUS
@ -211,8 +211,8 @@ irq_swing_vsp::vsp_perform1: scope:[irq_swing_vsp] from irq_swing_vsp
ldx #$18
lda #$1b // TODO: To control Y-scrolling this must be flexible!
// The STX $d011 must be line $30 cycle $10 for vsp_scroll==0
stx VICII_CONTROL // Enable the display - starts DMA
sta VICII_CONTROL
stx VICII_CONTROL1 // Enable the display - starts DMA
sta VICII_CONTROL1
}}
to:irq_swing_vsp::@1
irq_swing_vsp::@1: scope:[irq_swing_vsp] from irq_swing_vsp::vsp_perform1
@ -294,7 +294,7 @@ irq_flipper_bottom::@9: scope:[irq_flipper_bottom] from irq_flipper_bottom::@7
[139] flipper_done = 1
to:irq_flipper_bottom::@1
irq_flipper_bottom::@1: scope:[irq_flipper_bottom] from irq_flipper_bottom::@10 irq_flipper_bottom::@7 irq_flipper_bottom::@9
[140] *VICII_CONTROL = *VICII_CONTROL | $80
[140] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[141] *RASTER = IRQ_PART1_TOP_LINE
[142] *HARDWARE_IRQ = &irq_part1_top
[143] *IRQ_STATUS = IRQ_RASTER
@ -318,12 +318,12 @@ irq_flipper_top: scope:[irq_flipper_top] from
[151] call raster_fine
to:irq_flipper_top::@4
irq_flipper_top::@4: scope:[irq_flipper_top] from irq_flipper_top
asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL1 stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
[153] irq_flipper_top::$3 = > irq_flipper_bottom_line
[154] if(0!=irq_flipper_top::$3) goto irq_flipper_top::@1
to:irq_flipper_top::@3
irq_flipper_top::@3: scope:[irq_flipper_top] from irq_flipper_top::@4
[155] *VICII_CONTROL = *VICII_CONTROL & $7f
[155] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
to:irq_flipper_top::@2
irq_flipper_top::@2: scope:[irq_flipper_top] from irq_flipper_top::@1 irq_flipper_top::@3
[156] irq_flipper_top::$4 = < irq_flipper_bottom_line
@ -336,7 +336,7 @@ irq_flipper_top::@return: scope:[irq_flipper_top] from irq_flipper_top::@2
[161] return
to:@return
irq_flipper_top::@1: scope:[irq_flipper_top] from irq_flipper_top::@4
[162] *VICII_CONTROL = *VICII_CONTROL | $80
[162] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
to:irq_flipper_top::@2
__interrupt(hardware_clobber) void irq_part1_top()
@ -361,7 +361,7 @@ irq_part1_top::@5: scope:[irq_part1_top] from irq_part1_top::toD0181
[172] if(0!=irq_part1_top::$2) goto irq_part1_top::@1
to:irq_part1_top::@3
irq_part1_top::@3: scope:[irq_part1_top] from irq_part1_top::@5
[173] *VICII_CONTROL = *VICII_CONTROL & $7f
[173] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
to:irq_part1_top::@2
irq_part1_top::@2: scope:[irq_part1_top] from irq_part1_top::@1 irq_part1_top::@3
[174] irq_part1_top::$3 = < irq_flipper_top_line
@ -375,7 +375,7 @@ irq_part1_top::@return: scope:[irq_part1_top] from irq_part1_top::@2
[180] return
to:@return
irq_part1_top::@1: scope:[irq_part1_top] from irq_part1_top::@5
[181] *VICII_CONTROL = *VICII_CONTROL | $80
[181] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
to:irq_part1_top::@2
void main()
@ -677,7 +677,7 @@ demo_start: scope:[demo_start] from main::@7 part1_loop::@6
[283] call demo_init
to:demo_start::@1
demo_start::@1: scope:[demo_start] from demo_start
[284] *VICII_CONTROL = *VICII_CONTROL & $7f
[284] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[285] *RASTER = 0
[286] *HARDWARE_IRQ = &irq_demo
[287] *IRQ_ENABLE = IRQ_RASTER
@ -753,7 +753,7 @@ part1_run::@1: scope:[part1_run] from part1_run::SEI1
[321] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
asm { ldaCIA1_INTERRUPT }
[323] *IRQ_STATUS = $f
[324] *VICII_CONTROL = *VICII_CONTROL | $80
[324] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[325] *RASTER = IRQ_PART1_TOP_LINE
[326] *HARDWARE_IRQ = &irq_part1_top
[327] *IRQ_ENABLE = IRQ_RASTER
@ -913,7 +913,7 @@ part2_run::@3: scope:[part2_run] from part2_run::toD0181
[403] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
asm { ldaCIA1_INTERRUPT }
[405] *IRQ_STATUS = $f
[406] *VICII_CONTROL = *VICII_CONTROL & $7f
[406] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[407] *RASTER = *BUCKET_YPOS
[408] *IRQ_ENABLE = IRQ_RASTER
[409] *HARDWARE_IRQ = &irq_swing_top

252
src/test/ref/complex/new_30_years_low_resolution/new_30_years_low_resolution.log
View File

@ -272,7 +272,7 @@ part1_run::@1: scope:[part1_run] from part1_run::SEI1
*((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
asm { ldaCIA1_INTERRUPT }
*IRQ_STATUS = $f
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = IRQ_PART1_TOP_LINE
*HARDWARE_IRQ = &irq_part1_top
*IRQ_ENABLE = IRQ_RASTER
@ -439,10 +439,10 @@ irq_part1_top::@5: scope:[irq_part1_top] from irq_part1_top::toD0181_@return
if(irq_part1_top::$5) goto irq_part1_top::@1
to:irq_part1_top::@3
irq_part1_top::@1: scope:[irq_part1_top] from irq_part1_top::@5
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
to:irq_part1_top::@2
irq_part1_top::@3: scope:[irq_part1_top] from irq_part1_top::@5
*VICII_CONTROL = *VICII_CONTROL & $7f
*VICII_CONTROL1 = *VICII_CONTROL1 & $7f
to:irq_part1_top::@2
irq_part1_top::@2: scope:[irq_part1_top] from irq_part1_top::@1 irq_part1_top::@3
irq_part1_top::$3 = < irq_flipper_top_line
@ -465,16 +465,16 @@ irq_flipper_top: scope:[irq_flipper_top] from
call raster_fine
to:irq_flipper_top::@4
irq_flipper_top::@4: scope:[irq_flipper_top] from irq_flipper_top
asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL1 stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
irq_flipper_top::$3 = > irq_flipper_bottom_line
irq_flipper_top::$6 = 0 != irq_flipper_top::$3
if(irq_flipper_top::$6) goto irq_flipper_top::@1
to:irq_flipper_top::@3
irq_flipper_top::@1: scope:[irq_flipper_top] from irq_flipper_top::@4
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
to:irq_flipper_top::@2
irq_flipper_top::@3: scope:[irq_flipper_top] from irq_flipper_top::@4
*VICII_CONTROL = *VICII_CONTROL & $7f
*VICII_CONTROL1 = *VICII_CONTROL1 & $7f
to:irq_flipper_top::@2
irq_flipper_top::@2: scope:[irq_flipper_top] from irq_flipper_top::@1 irq_flipper_top::@3
irq_flipper_top::$4 = < irq_flipper_bottom_line
@ -529,7 +529,7 @@ irq_flipper_bottom::@10: scope:[irq_flipper_bottom] from irq_flipper_bottom::to
if(irq_flipper_bottom::$5) goto irq_flipper_bottom::@1
to:irq_flipper_bottom::@2
irq_flipper_bottom::@1: scope:[irq_flipper_bottom] from irq_flipper_bottom::@10 irq_flipper_bottom::@7 irq_flipper_bottom::@9
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = IRQ_PART1_TOP_LINE
*HARDWARE_IRQ = &irq_part1_top
*IRQ_STATUS = IRQ_RASTER
@ -1169,7 +1169,7 @@ part2_run::@3: scope:[part2_run] from part2_run::toD0181_@return
*((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
asm { ldaCIA1_INTERRUPT }
*IRQ_STATUS = $f
*VICII_CONTROL = *VICII_CONTROL & $7f
*VICII_CONTROL1 = *VICII_CONTROL1 & $7f
*RASTER = BUCKET_YPOS[0]
*IRQ_ENABLE = IRQ_RASTER
*HARDWARE_IRQ = &irq_swing_top
@ -1386,7 +1386,7 @@ __interrupt(hardware_clobber) void irq_swing_vsp()
irq_swing_vsp: scope:[irq_swing_vsp] from
to:irq_swing_vsp::vsp_perform1
irq_swing_vsp::vsp_perform1: scope:[irq_swing_vsp] from irq_swing_vsp
kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL) {{ // Stabilize the raster by using the double IRQ method
kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL1) {{ // Stabilize the raster by using the double IRQ method
// Acknowledge the IRQ
lda #IRQ_RASTER
sta IRQ_STATUS
@ -1433,8 +1433,8 @@ irq_swing_vsp::vsp_perform1: scope:[irq_swing_vsp] from irq_swing_vsp
ldx #$18
lda #$1b // TODO: To control Y-scrolling this must be flexible!
// The STX $d011 must be line $30 cycle $10 for vsp_scroll==0
stx VICII_CONTROL // Enable the display - starts DMA
sta VICII_CONTROL
stx VICII_CONTROL1 // Enable the display - starts DMA
sta VICII_CONTROL1
}}
to:irq_swing_vsp::@1
irq_swing_vsp::@1: scope:[irq_swing_vsp] from irq_swing_vsp::vsp_perform1
@ -1728,7 +1728,7 @@ demo_start: scope:[demo_start] from main::@7 part1_loop::@6
call demo_init
to:demo_start::@1
demo_start::@1: scope:[demo_start] from demo_start
*VICII_CONTROL = *VICII_CONTROL & $7f
*VICII_CONTROL1 = *VICII_CONTROL1 & $7f
*RASTER = 0
*HARDWARE_IRQ = &irq_demo
*IRQ_ENABLE = IRQ_RASTER
@ -2055,7 +2055,7 @@ const nomodify byte* SPRITES_YPOS = (byte*)$d001
const byte* SPRITE_COLOR_SEQUENCE[] = { WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, YELLOW, CYAN, GREEN, PURPLE, RED, BLUE, RED, PURPLE, GREEN, CYAN, YELLOW, WHITE, WHITE }
const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*)$d000
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte* VICII_CONTROL2 = (byte*)$d016
const nomodify byte VICII_MCM = $10
const nomodify byte* VICII_MEMORY = (byte*)$d018
@ -2842,7 +2842,7 @@ Adding number conversion cast (unumber) $800 in memcpy::num#0 = $800
Adding number conversion cast (unumber) $400 in memcpy::num#1 = $400
Adding number conversion cast (unumber) $3e8 in memcpy::num#2 = $3e8
Adding number conversion cast (unumber) $f in *IRQ_STATUS = $f
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 1 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_SPRITES_MC) = 1
Adding number conversion cast (unumber) 1 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_SPRITES_XMSB) = 1
Adding number conversion cast (unumber) $16 in *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_SPRITE0_X) = $16
@ -2877,16 +2877,16 @@ Adding number conversion cast (unumber) $f in irq_part1_top::toD0181_$5 = irq_pa
Adding number conversion cast (unumber) irq_part1_top::toD0181_$5 in irq_part1_top::toD0181_$5 = irq_part1_top::toD0181_$4 & (unumber)$f
Adding number conversion cast (unumber) irq_part1_top::toD0181_$6 in irq_part1_top::toD0181_$6 = irq_part1_top::toD0181_$2 | irq_part1_top::toD0181_$5
Adding number conversion cast (unumber) 0 in irq_part1_top::$5 = 0 != irq_part1_top::$2
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) $7f in *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
Adding number conversion cast (unumber) $f8 in irq_part1_top::$4 = irq_part1_top::$3 & $f8
Adding number conversion cast (unumber) irq_part1_top::$4 in irq_part1_top::$4 = irq_part1_top::$3 & (unumber)$f8
Adding number conversion cast (unumber) 1 in p1_work_ready = 1
Adding number conversion cast (unumber) 7 in irq_flipper_top::$1 = irq_flipper_top::$0 & 7
Adding number conversion cast (unumber) irq_flipper_top::$1 in irq_flipper_top::$1 = irq_flipper_top::$0 & (unumber)7
Adding number conversion cast (unumber) 0 in irq_flipper_top::$6 = 0 != irq_flipper_top::$3
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) $7f in *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
Adding number conversion cast (unumber) $f8 in irq_flipper_top::$5 = irq_flipper_top::$4 & $f8
Adding number conversion cast (unumber) irq_flipper_top::$5 in irq_flipper_top::$5 = irq_flipper_top::$4 & (unumber)$f8
Adding number conversion cast (unumber) 7 in irq_flipper_bottom::$1 = irq_flipper_bottom::$0 & 7
@ -2902,7 +2902,7 @@ Adding number conversion cast (unumber) $f in irq_flipper_bottom::toD0181_$5 = i
Adding number conversion cast (unumber) irq_flipper_bottom::toD0181_$5 in irq_flipper_bottom::toD0181_$5 = irq_flipper_bottom::toD0181_$4 & (unumber)$f
Adding number conversion cast (unumber) irq_flipper_bottom::toD0181_$6 in irq_flipper_bottom::toD0181_$6 = irq_flipper_bottom::toD0181_$2 | irq_flipper_bottom::toD0181_$5
Adding number conversion cast (unumber) 0 in irq_flipper_bottom::$13 = 0 != flipper_done
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 8 in irq_flipper_bottom::$6 = irq_flipper_bottom::irq_flipper_line#0 < 8
Adding number conversion cast (unumber) 0 in irq_flipper_top_line = 0
Adding number conversion cast (unumber) 8 in irq_flipper_bottom::$7 = irq_flipper_bottom::irq_flipper_line#1 - 8
@ -2996,7 +2996,7 @@ Adding number conversion cast (unumber) part2_run::toD0181_$5 in part2_run::toD0
Adding number conversion cast (unumber) part2_run::toD0181_$6 in part2_run::toD0181_$6 = part2_run::toD0181_$2 | part2_run::toD0181_$5
Adding number conversion cast (unumber) $ff in *SPRITES_ENABLE = $ff
Adding number conversion cast (unumber) $f in *IRQ_STATUS = $f
Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f
Adding number conversion cast (unumber) $7f in *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
Adding number conversion cast (unumber) 0 in *RASTER = BUCKET_YPOS[0]
Adding number conversion cast (unumber) 0 in plex_frame_id = 0
Adding number conversion cast (unumber) 0 in plex_id_offset = 0
@ -3066,7 +3066,7 @@ Adding number conversion cast (unumber) 5*$32 in main::$8 = demo_frame_count < 5
Adding number conversion cast (unumber) $10*$32 in main::$9 = demo_frame_count < $10*$32
Adding number conversion cast (unumber) 0 in sparkler_active = 0
Adding number conversion cast (unumber) $f in *IRQ_STATUS = $f
Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f
Adding number conversion cast (unumber) $7f in *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
Adding number conversion cast (unumber) 0 in *RASTER = 0
Adding number conversion cast (unumber) 0 in demo_work::$3 = 0 != sparkler_active
Adding number conversion cast (unumber) $1e in sparkler_anim::$0 = sparkler_idx == $1e
@ -4919,7 +4919,7 @@ irq_swing_vsp: scope:[irq_swing_vsp] from
[96] phi()
to:irq_swing_vsp::vsp_perform1
irq_swing_vsp::vsp_perform1: scope:[irq_swing_vsp] from irq_swing_vsp
kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL) {{ // Stabilize the raster by using the double IRQ method
kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL1) {{ // Stabilize the raster by using the double IRQ method
// Acknowledge the IRQ
lda #IRQ_RASTER
sta IRQ_STATUS
@ -4966,8 +4966,8 @@ irq_swing_vsp::vsp_perform1: scope:[irq_swing_vsp] from irq_swing_vsp
ldx #$18
lda #$1b // TODO: To control Y-scrolling this must be flexible!
// The STX $d011 must be line $30 cycle $10 for vsp_scroll==0
stx VICII_CONTROL // Enable the display - starts DMA
sta VICII_CONTROL
stx VICII_CONTROL1 // Enable the display - starts DMA
sta VICII_CONTROL1
}}
to:irq_swing_vsp::@1
irq_swing_vsp::@1: scope:[irq_swing_vsp] from irq_swing_vsp::vsp_perform1
@ -5049,7 +5049,7 @@ irq_flipper_bottom::@9: scope:[irq_flipper_bottom] from irq_flipper_bottom::@7
[139] flipper_done = 1
to:irq_flipper_bottom::@1
irq_flipper_bottom::@1: scope:[irq_flipper_bottom] from irq_flipper_bottom::@10 irq_flipper_bottom::@7 irq_flipper_bottom::@9
[140] *VICII_CONTROL = *VICII_CONTROL | $80
[140] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[141] *RASTER = IRQ_PART1_TOP_LINE
[142] *HARDWARE_IRQ = &irq_part1_top
[143] *IRQ_STATUS = IRQ_RASTER
@ -5073,12 +5073,12 @@ irq_flipper_top: scope:[irq_flipper_top] from
[151] call raster_fine
to:irq_flipper_top::@4
irq_flipper_top::@4: scope:[irq_flipper_top] from irq_flipper_top
asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL1 stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
[153] irq_flipper_top::$3 = > irq_flipper_bottom_line
[154] if(0!=irq_flipper_top::$3) goto irq_flipper_top::@1
to:irq_flipper_top::@3
irq_flipper_top::@3: scope:[irq_flipper_top] from irq_flipper_top::@4
[155] *VICII_CONTROL = *VICII_CONTROL & $7f
[155] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
to:irq_flipper_top::@2
irq_flipper_top::@2: scope:[irq_flipper_top] from irq_flipper_top::@1 irq_flipper_top::@3
[156] irq_flipper_top::$4 = < irq_flipper_bottom_line
@ -5091,7 +5091,7 @@ irq_flipper_top::@return: scope:[irq_flipper_top] from irq_flipper_top::@2
[161] return
to:@return
irq_flipper_top::@1: scope:[irq_flipper_top] from irq_flipper_top::@4
[162] *VICII_CONTROL = *VICII_CONTROL | $80
[162] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
to:irq_flipper_top::@2
__interrupt(hardware_clobber) void irq_part1_top()
@ -5116,7 +5116,7 @@ irq_part1_top::@5: scope:[irq_part1_top] from irq_part1_top::toD0181
[172] if(0!=irq_part1_top::$2) goto irq_part1_top::@1
to:irq_part1_top::@3
irq_part1_top::@3: scope:[irq_part1_top] from irq_part1_top::@5
[173] *VICII_CONTROL = *VICII_CONTROL & $7f
[173] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
to:irq_part1_top::@2
irq_part1_top::@2: scope:[irq_part1_top] from irq_part1_top::@1 irq_part1_top::@3
[174] irq_part1_top::$3 = < irq_flipper_top_line
@ -5130,7 +5130,7 @@ irq_part1_top::@return: scope:[irq_part1_top] from irq_part1_top::@2
[180] return
to:@return
irq_part1_top::@1: scope:[irq_part1_top] from irq_part1_top::@5
[181] *VICII_CONTROL = *VICII_CONTROL | $80
[181] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
to:irq_part1_top::@2
void main()
@ -5432,7 +5432,7 @@ demo_start: scope:[demo_start] from main::@7 part1_loop::@6
[283] call demo_init
to:demo_start::@1
demo_start::@1: scope:[demo_start] from demo_start
[284] *VICII_CONTROL = *VICII_CONTROL & $7f
[284] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[285] *RASTER = 0
[286] *HARDWARE_IRQ = &irq_demo
[287] *IRQ_ENABLE = IRQ_RASTER
@ -5508,7 +5508,7 @@ part1_run::@1: scope:[part1_run] from part1_run::SEI1
[321] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
asm { ldaCIA1_INTERRUPT }
[323] *IRQ_STATUS = $f
[324] *VICII_CONTROL = *VICII_CONTROL | $80
[324] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[325] *RASTER = IRQ_PART1_TOP_LINE
[326] *HARDWARE_IRQ = &irq_part1_top
[327] *IRQ_ENABLE = IRQ_RASTER
@ -5668,7 +5668,7 @@ part2_run::@3: scope:[part2_run] from part2_run::toD0181
[403] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
asm { ldaCIA1_INTERRUPT }
[405] *IRQ_STATUS = $f
[406] *VICII_CONTROL = *VICII_CONTROL & $7f
[406] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[407] *RASTER = *BUCKET_YPOS
[408] *IRQ_ENABLE = IRQ_RASTER
[409] *HARDWARE_IRQ = &irq_swing_top
@ -6818,7 +6818,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:2 [ irq_swi
Statement [91] irq_swing_plex::x_offset1#0 = $50 - vsp_coarse_scroll [ p2_plex_scroller_moving x_movement_idx scroll_text_next sprite_color_idx irq_swing_plex::new_coarse_scroll#0 irq_swing_plex::x_offset1#0 ] ( [ p2_plex_scroller_moving x_movement_idx scroll_text_next sprite_color_idx irq_swing_plex::new_coarse_scroll#0 irq_swing_plex::x_offset1#0 ] { { irq_swing_plex::x_offset1#0 = vsp_update_screen::x_offset } } ) always clobbers reg byte a
Statement [94] *HARDWARE_IRQ = &irq_swing_plex [ plex_bucket_id ] ( [ plex_bucket_id ] { } ) always clobbers reg byte a
Statement [95] *RASTER = BUCKET_YPOS[plex_bucket_id] [ ] ( [ ] { } ) always clobbers reg byte a reg byte y
Statement kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL) {{ // Stabilize the raster by using the double IRQ method
Statement kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL1) {{ // Stabilize the raster by using the double IRQ method
// Acknowledge the IRQ
lda #IRQ_RASTER
sta IRQ_STATUS
@ -6865,8 +6865,8 @@ Statement kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS
ldx #$18
lda #$1b // TODO: To control Y-scrolling this must be flexible!
// The STX $d011 must be line $30 cycle $10 for vsp_scroll==0
stx VICII_CONTROL // Enable the display - starts DMA
sta VICII_CONTROL
stx VICII_CONTROL1 // Enable the display - starts DMA
sta VICII_CONTROL1
}} always clobbers reg byte a reg byte x
Statement [98] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_BMM [ vsp_fine_scroll ] ( [ vsp_fine_scroll ] { } ) always clobbers reg byte a
Statement [99] irq_swing_vsp::$1 = vsp_fine_scroll | VICII_MCM [ irq_swing_vsp::$1 ] ( [ irq_swing_vsp::$1 ] { } ) always clobbers reg byte a
@ -6897,31 +6897,31 @@ Statement [136] irq_flipper_bottom::$9 = irq_flipper_bottom::irq_flipper_line#0
Statement [137] irq_flipper_bottom_line = irq_flipper_bottom::$9 [ irq_flipper_bottom::irq_flipper_line#0 ] ( [ irq_flipper_bottom::irq_flipper_line#0 ] { } ) always clobbers reg byte a
Statement [138] if(irq_flipper_bottom::irq_flipper_line#0!=$130) goto irq_flipper_bottom::@1 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [139] flipper_done = 1 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [140] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [140] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [141] *RASTER = IRQ_PART1_TOP_LINE [ ] ( [ ] { } ) always clobbers reg byte a
Statement [142] *HARDWARE_IRQ = &irq_part1_top [ ] ( [ ] { } ) always clobbers reg byte a
Statement [143] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [144] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
Statement [145] irq_flipper_bottom_line = $130 [ irq_flipper_bottom::irq_flipper_line#0 ] ( [ irq_flipper_bottom::irq_flipper_line#0 ] { } ) always clobbers reg byte a
Statement [146] irq_flipper_top_line = 0 [ irq_flipper_bottom::irq_flipper_line#0 ] ( [ irq_flipper_bottom::irq_flipper_line#0 ] { } ) always clobbers reg byte a
Statement asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL stxBG_COLOR lda#$c8 staVICII_CONTROL2 } always clobbers reg byte a reg byte x reg byte y
Statement [155] *VICII_CONTROL = *VICII_CONTROL & $7f [ irq_flipper_bottom_line ] ( [ irq_flipper_bottom_line ] { } ) always clobbers reg byte a
Statement asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL1 stxBG_COLOR lda#$c8 staVICII_CONTROL2 } always clobbers reg byte a reg byte x reg byte y
Statement [155] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ irq_flipper_bottom_line ] ( [ irq_flipper_bottom_line ] { } ) always clobbers reg byte a
Statement [159] *HARDWARE_IRQ = &irq_flipper_bottom [ ] ( [ ] { } ) always clobbers reg byte a
Statement [160] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [161] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
Statement [162] *VICII_CONTROL = *VICII_CONTROL | $80 [ irq_flipper_bottom_line ] ( [ irq_flipper_bottom_line ] { } ) always clobbers reg byte a
Statement [162] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ irq_flipper_bottom_line ] ( [ irq_flipper_bottom_line ] { } ) always clobbers reg byte a
Statement [163] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [164] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = BLACK [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [165] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_BMM [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [166] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) | VICII_MCM [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [168] *((byte*)CIA2) = irq_part1_top::toDd001_return#0 [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [170] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = irq_part1_top::toD0181_return#0 [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [173] *VICII_CONTROL = *VICII_CONTROL & $7f [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [173] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [177] *HARDWARE_IRQ = &irq_flipper_top [ ] ( [ ] { } ) always clobbers reg byte a
Statement [178] p1_work_ready = 1 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [179] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [180] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
Statement [181] *VICII_CONTROL = *VICII_CONTROL | $80 [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [181] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [184] byteboozer_decrunch::crunched = DEMO_MUSIC_CRUNCHED [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx byteboozer_decrunch::crunched ] ( main:30 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx byteboozer_decrunch::crunched ] { } ) always clobbers reg byte a
Statement asm { lda#0 } always clobbers reg byte a
Statement [187] call *musicInit [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a reg byte x reg byte y
@ -7045,7 +7045,7 @@ Statement [276] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRU
Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a
Statement [278] *IRQ_STATUS = $f [ ] ( main:30::demo_init:183 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::demo_start:188::demo_init:283 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467::demo_init:283 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement asm { ldycrunched ldxcrunched+1 jsrb2.Decrunch } always clobbers reg byte a reg byte x reg byte y
Statement [284] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement [284] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement [285] *RASTER = 0 [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement [286] *HARDWARE_IRQ = &irq_demo [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement [287] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
@ -7067,7 +7067,7 @@ Statement [320] *PROCPORT = PROCPORT_RAM_IO [ irq_flipper_top_line flipper_charl
Statement [321] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a
Statement [323] *IRQ_STATUS = $f [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [324] *VICII_CONTROL = *VICII_CONTROL | $80 [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [324] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [325] *RASTER = IRQ_PART1_TOP_LINE [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [326] *HARDWARE_IRQ = &irq_part1_top [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [327] *IRQ_ENABLE = IRQ_RASTER [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
@ -7113,7 +7113,7 @@ Statement [402] *SPRITES_ENABLE = $ff [ p2_logo_revealing p2_logo_reveal_done p2
Statement [403] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a
Statement [405] *IRQ_STATUS = $f [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [406] *VICII_CONTROL = *VICII_CONTROL & $7f [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [406] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [407] *RASTER = *BUCKET_YPOS [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [408] *IRQ_ENABLE = IRQ_RASTER [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [409] *HARDWARE_IRQ = &irq_swing_top [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
@ -7288,7 +7288,7 @@ Statement [89] SPRITES_COLOR[irq_swing_plex::s#2] = SPRITE_COLOR_SEQUENCE[sprite
Statement [91] irq_swing_plex::x_offset1#0 = $50 - vsp_coarse_scroll [ p2_plex_scroller_moving x_movement_idx scroll_text_next sprite_color_idx irq_swing_plex::new_coarse_scroll#0 irq_swing_plex::x_offset1#0 ] ( [ p2_plex_scroller_moving x_movement_idx scroll_text_next sprite_color_idx irq_swing_plex::new_coarse_scroll#0 irq_swing_plex::x_offset1#0 ] { { irq_swing_plex::x_offset1#0 = vsp_update_screen::x_offset } } ) always clobbers reg byte a
Statement [94] *HARDWARE_IRQ = &irq_swing_plex [ plex_bucket_id ] ( [ plex_bucket_id ] { } ) always clobbers reg byte a
Statement [95] *RASTER = BUCKET_YPOS[plex_bucket_id] [ ] ( [ ] { } ) always clobbers reg byte a reg byte y
Statement kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL) {{ // Stabilize the raster by using the double IRQ method
Statement kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL1) {{ // Stabilize the raster by using the double IRQ method
// Acknowledge the IRQ
lda #IRQ_RASTER
sta IRQ_STATUS
@ -7335,8 +7335,8 @@ Statement kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS
ldx #$18
lda #$1b // TODO: To control Y-scrolling this must be flexible!
// The STX $d011 must be line $30 cycle $10 for vsp_scroll==0
stx VICII_CONTROL // Enable the display - starts DMA
sta VICII_CONTROL
stx VICII_CONTROL1 // Enable the display - starts DMA
sta VICII_CONTROL1
}} always clobbers reg byte a reg byte x
Statement [98] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_BMM [ vsp_fine_scroll ] ( [ vsp_fine_scroll ] { } ) always clobbers reg byte a
Statement [99] irq_swing_vsp::$1 = vsp_fine_scroll | VICII_MCM [ irq_swing_vsp::$1 ] ( [ irq_swing_vsp::$1 ] { } ) always clobbers reg byte a
@ -7367,31 +7367,31 @@ Statement [136] irq_flipper_bottom::$9 = irq_flipper_bottom::irq_flipper_line#0
Statement [137] irq_flipper_bottom_line = irq_flipper_bottom::$9 [ irq_flipper_bottom::irq_flipper_line#0 ] ( [ irq_flipper_bottom::irq_flipper_line#0 ] { } ) always clobbers reg byte a
Statement [138] if(irq_flipper_bottom::irq_flipper_line#0!=$130) goto irq_flipper_bottom::@1 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [139] flipper_done = 1 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [140] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [140] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [141] *RASTER = IRQ_PART1_TOP_LINE [ ] ( [ ] { } ) always clobbers reg byte a
Statement [142] *HARDWARE_IRQ = &irq_part1_top [ ] ( [ ] { } ) always clobbers reg byte a
Statement [143] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [144] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
Statement [145] irq_flipper_bottom_line = $130 [ irq_flipper_bottom::irq_flipper_line#0 ] ( [ irq_flipper_bottom::irq_flipper_line#0 ] { } ) always clobbers reg byte a
Statement [146] irq_flipper_top_line = 0 [ irq_flipper_bottom::irq_flipper_line#0 ] ( [ irq_flipper_bottom::irq_flipper_line#0 ] { } ) always clobbers reg byte a
Statement asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL stxBG_COLOR lda#$c8 staVICII_CONTROL2 } always clobbers reg byte a reg byte x reg byte y
Statement [155] *VICII_CONTROL = *VICII_CONTROL & $7f [ irq_flipper_bottom_line ] ( [ irq_flipper_bottom_line ] { } ) always clobbers reg byte a
Statement asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL1 stxBG_COLOR lda#$c8 staVICII_CONTROL2 } always clobbers reg byte a reg byte x reg byte y
Statement [155] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ irq_flipper_bottom_line ] ( [ irq_flipper_bottom_line ] { } ) always clobbers reg byte a
Statement [159] *HARDWARE_IRQ = &irq_flipper_bottom [ ] ( [ ] { } ) always clobbers reg byte a
Statement [160] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [161] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
Statement [162] *VICII_CONTROL = *VICII_CONTROL | $80 [ irq_flipper_bottom_line ] ( [ irq_flipper_bottom_line ] { } ) always clobbers reg byte a
Statement [162] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ irq_flipper_bottom_line ] ( [ irq_flipper_bottom_line ] { } ) always clobbers reg byte a
Statement [163] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BORDER_COLOR) = BLACK [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [164] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_BG_COLOR) = BLACK [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [165] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL1) | VICII_BMM [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [166] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) = *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_CONTROL2) | VICII_MCM [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [168] *((byte*)CIA2) = irq_part1_top::toDd001_return#0 [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [170] *((byte*)VICII+OFFSET_STRUCT_MOS6569_VICII_MEMORY) = irq_part1_top::toD0181_return#0 [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [173] *VICII_CONTROL = *VICII_CONTROL & $7f [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [173] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [177] *HARDWARE_IRQ = &irq_flipper_top [ ] ( [ ] { } ) always clobbers reg byte a
Statement [178] p1_work_ready = 1 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [179] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [180] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x reg byte y
Statement [181] *VICII_CONTROL = *VICII_CONTROL | $80 [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [181] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ irq_flipper_top_line ] ( [ irq_flipper_top_line ] { } ) always clobbers reg byte a
Statement [184] byteboozer_decrunch::crunched = DEMO_MUSIC_CRUNCHED [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx byteboozer_decrunch::crunched ] ( main:30 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx byteboozer_decrunch::crunched ] { } ) always clobbers reg byte a
Statement asm { lda#0 } always clobbers reg byte a
Statement [187] call *musicInit [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a reg byte x reg byte y
@ -7501,7 +7501,7 @@ Statement [276] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRU
Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a
Statement [278] *IRQ_STATUS = $f [ ] ( main:30::demo_init:183 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::demo_start:188::demo_init:283 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467::demo_init:283 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement asm { ldycrunched ldxcrunched+1 jsrb2.Decrunch } always clobbers reg byte a reg byte x reg byte y
Statement [284] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement [284] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement [285] *RASTER = 0 [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement [286] *HARDWARE_IRQ = &irq_demo [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
Statement [287] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:30::demo_start:188 [ irq_flipper_top_line flipper_charline p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } main:30::part1_run:193::part1_loop:339::demo_start:467 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_idx ] { } ) always clobbers reg byte a
@ -7523,7 +7523,7 @@ Statement [320] *PROCPORT = PROCPORT_RAM_IO [ irq_flipper_top_line flipper_charl
Statement [321] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a
Statement [323] *IRQ_STATUS = $f [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [324] *VICII_CONTROL = *VICII_CONTROL | $80 [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [324] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [325] *RASTER = IRQ_PART1_TOP_LINE [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [326] *HARDWARE_IRQ = &irq_part1_top [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [327] *IRQ_ENABLE = IRQ_RASTER [ irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] ( main:30::part1_run:193 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx irq_flipper_top_line flipper_charline demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
@ -7564,7 +7564,7 @@ Statement [402] *SPRITES_ENABLE = $ff [ p2_logo_revealing p2_logo_reveal_done p2
Statement [403] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement asm { ldaCIA1_INTERRUPT } always clobbers reg byte a
Statement [405] *IRQ_STATUS = $f [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [406] *VICII_CONTROL = *VICII_CONTROL & $7f [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [406] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [407] *RASTER = *BUCKET_YPOS [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [408] *IRQ_ENABLE = IRQ_RASTER [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
Statement [409] *HARDWARE_IRQ = &irq_swing_top [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] ( main:30::part2_run:198 [ p2_logo_revealing p2_logo_reveal_done p2_logo_swinging p2_plex_scroller_moving p2_logo_reveal_idx demo_frame_count sparkler_active sparkler_idx ] { } ) always clobbers reg byte a
@ -8143,7 +8143,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// VIC II IRQ Status Register
@ -8770,7 +8770,7 @@ irq_swing_vsp: {
jmp vsp_perform1
// irq_swing_vsp::vsp_perform1
vsp_perform1:
// kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL) {{ // Stabilize the raster by using the double IRQ method // Acknowledge the IRQ lda #IRQ_RASTER sta IRQ_STATUS // Set-up IRQ for the next line inc RASTER // Point IRQ to almost stable code lda #<stable sta HARDWARE_IRQ lda #>stable sta HARDWARE_IRQ+1 tsx // Save stack pointer cli // Reenable interrupts // Wait for new IRQ using NOP's to ensure minimal jitter when it hits .fill 15, NOP .align $100 stable: txs // Restore stack pointer ldx #9 // Wait till the raster has almost crossed to the next line (48 cycles) !: dex bne !- nop lda RASTER cmp RASTER bne !+ // And correct the last cycle of potential jitter !: // Raster is now completely stable! (Line $2f cycle 7) // Perform VSP by waiting an exact number of cycles and then enabling the display // See http://www.zimmers.net/cbmpics/cbm/c64/vic-ii.txt (Section 3.14.6. DMA delay) ldx #8 // Wait 45 cycles to get the VSP timing right !: dex bne !- nop nop lda vsp_scroll lsr // Put bit 0 into carry bcc dma1 // Spend 2 or 3 cycles depending on the carry (bit 0) dma1: sta dma2+1 // Update the branch clv dma2: bvc dma2 // This branch is updated with vsp_scroll/2 - changing the number of NOP's executed // 20 NOP's - enabling vsp scroll from 0-40 .fill 20, NOP ldx #$18 lda #$1b // TODO: To control Y-scrolling this must be flexible! // The STX $d011 must be line $30 cycle $10 for vsp_scroll==0 stx VICII_CONTROL // Enable the display - starts DMA sta VICII_CONTROL }}
// kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL1) {{ // Stabilize the raster by using the double IRQ method // Acknowledge the IRQ lda #IRQ_RASTER sta IRQ_STATUS // Set-up IRQ for the next line inc RASTER // Point IRQ to almost stable code lda #<stable sta HARDWARE_IRQ lda #>stable sta HARDWARE_IRQ+1 tsx // Save stack pointer cli // Reenable interrupts // Wait for new IRQ using NOP's to ensure minimal jitter when it hits .fill 15, NOP .align $100 stable: txs // Restore stack pointer ldx #9 // Wait till the raster has almost crossed to the next line (48 cycles) !: dex bne !- nop lda RASTER cmp RASTER bne !+ // And correct the last cycle of potential jitter !: // Raster is now completely stable! (Line $2f cycle 7) // Perform VSP by waiting an exact number of cycles and then enabling the display // See http://www.zimmers.net/cbmpics/cbm/c64/vic-ii.txt (Section 3.14.6. DMA delay) ldx #8 // Wait 45 cycles to get the VSP timing right !: dex bne !- nop nop lda vsp_scroll lsr // Put bit 0 into carry bcc dma1 // Spend 2 or 3 cycles depending on the carry (bit 0) dma1: sta dma2+1 // Update the branch clv dma2: bvc dma2 // This branch is updated with vsp_scroll/2 - changing the number of NOP's executed // 20 NOP's - enabling vsp scroll from 0-40 .fill 20, NOP ldx #$18 lda #$1b // TODO: To control Y-scrolling this must be flexible! // The STX $d011 must be line $30 cycle $10 for vsp_scroll==0 stx VICII_CONTROL1 // Enable the display - starts DMA sta VICII_CONTROL1 }}
// Stabilize the raster by using the double IRQ method
// Acknowledge the IRQ
lda #IRQ_RASTER
@ -8818,8 +8818,8 @@ irq_swing_vsp: {
ldx #$18
lda #$1b // TODO: To control Y-scrolling this must be flexible!
// The STX $d011 must be line $30 cycle $10 for vsp_scroll==0
stx VICII_CONTROL // Enable the display - starts DMA
sta VICII_CONTROL
stx VICII_CONTROL1 // Enable the display - starts DMA
sta VICII_CONTROL1
jmp __b1
// irq_swing_vsp::@1
@ -9116,11 +9116,11 @@ irq_flipper_bottom: {
jmp __b1
// irq_flipper_bottom::@1
__b1:
// [140] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [140] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set up the IRQ again
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [141] *RASTER = IRQ_PART1_TOP_LINE -- _deref_pbuc1=vbuc2
lda #IRQ_PART1_TOP_LINE
sta RASTER
@ -9205,13 +9205,13 @@ irq_flipper_top: {
jmp __b4
// irq_flipper_top::@4
__b4:
// asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
// asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL1 stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
lda #$9a
ldx #LIGHT_GREEN
ldy #$1b
sta VICII_MEMORY
stx BORDER_COLOR
sty VICII_CONTROL
sty VICII_CONTROL1
stx BG_COLOR
lda #$c8
sta VICII_CONTROL2
@ -9224,10 +9224,10 @@ irq_flipper_top: {
jmp __b3
// irq_flipper_top::@3
__b3:
// [155] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// [155] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
jmp __b2
// irq_flipper_top::@2
__b2:
@ -9260,10 +9260,10 @@ irq_flipper_top: {
rti
// irq_flipper_top::@1
__b1:
// [162] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [162] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
jmp __b2
}
// irq_part1_top
@ -9323,10 +9323,10 @@ irq_part1_top: {
jmp __b3
// irq_part1_top::@3
__b3:
// [173] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// [173] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
jmp __b2
// irq_part1_top::@2
__b2:
@ -9359,10 +9359,10 @@ irq_part1_top: {
rti
// irq_part1_top::@1
__b1:
// [181] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [181] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
jmp __b2
}
.segment Code
@ -9987,11 +9987,11 @@ demo_start: {
jmp __b1
// demo_start::@1
__b1:
// [284] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// [284] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to 0x00
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// [285] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -10236,11 +10236,11 @@ part1_run: {
// Acknowledge any VIC IRQ
lda #$f
sta IRQ_STATUS
// [324] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [324] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to 0x136
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [325] *RASTER = IRQ_PART1_TOP_LINE -- _deref_pbuc1=vbuc2
lda #IRQ_PART1_TOP_LINE
sta RASTER
@ -10747,11 +10747,11 @@ part2_run: {
// Acknowledge any VIC IRQ
lda #$f
sta IRQ_STATUS
// [406] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// [406] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to first bucket
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// [407] *RASTER = *BUCKET_YPOS -- _deref_pbuc1=_deref_pbuc2
lda BUCKET_YPOS
sta RASTER
@ -12664,7 +12664,7 @@ const nomodify byte* SPRITES_YPOS = (byte*) 53249
const byte* SPRITE_COLOR_SEQUENCE[] = { WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, YELLOW, CYAN, GREEN, PURPLE, RED, BLUE, RED, PURPLE, GREEN, CYAN, YELLOW, WHITE, WHITE }
const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte* VICII_CONTROL2 = (byte*) 53270
const nomodify byte VICII_MCM = $10
const nomodify byte* VICII_MEMORY = (byte*) 53272
@ -13187,7 +13187,7 @@ Score: 79918
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label VICII_CONTROL2 = $d016
.label VICII_MEMORY = $d018
// VIC II IRQ Status Register
@ -13824,7 +13824,7 @@ irq_swing_vsp: {
stx regx+1
// irq_swing_vsp::vsp_perform1
// kickasm
// kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL) {{ // Stabilize the raster by using the double IRQ method // Acknowledge the IRQ lda #IRQ_RASTER sta IRQ_STATUS // Set-up IRQ for the next line inc RASTER // Point IRQ to almost stable code lda #<stable sta HARDWARE_IRQ lda #>stable sta HARDWARE_IRQ+1 tsx // Save stack pointer cli // Reenable interrupts // Wait for new IRQ using NOP's to ensure minimal jitter when it hits .fill 15, NOP .align $100 stable: txs // Restore stack pointer ldx #9 // Wait till the raster has almost crossed to the next line (48 cycles) !: dex bne !- nop lda RASTER cmp RASTER bne !+ // And correct the last cycle of potential jitter !: // Raster is now completely stable! (Line $2f cycle 7) // Perform VSP by waiting an exact number of cycles and then enabling the display // See http://www.zimmers.net/cbmpics/cbm/c64/vic-ii.txt (Section 3.14.6. DMA delay) ldx #8 // Wait 45 cycles to get the VSP timing right !: dex bne !- nop nop lda vsp_scroll lsr // Put bit 0 into carry bcc dma1 // Spend 2 or 3 cycles depending on the carry (bit 0) dma1: sta dma2+1 // Update the branch clv dma2: bvc dma2 // This branch is updated with vsp_scroll/2 - changing the number of NOP's executed // 20 NOP's - enabling vsp scroll from 0-40 .fill 20, NOP ldx #$18 lda #$1b // TODO: To control Y-scrolling this must be flexible! // The STX $d011 must be line $30 cycle $10 for vsp_scroll==0 stx VICII_CONTROL // Enable the display - starts DMA sta VICII_CONTROL }}
// kickasm( uses vsp_scroll uses HARDWARE_IRQ uses RASTER uses IRQ_STATUS uses IRQ_RASTER uses VICII_CONTROL1) {{ // Stabilize the raster by using the double IRQ method // Acknowledge the IRQ lda #IRQ_RASTER sta IRQ_STATUS // Set-up IRQ for the next line inc RASTER // Point IRQ to almost stable code lda #<stable sta HARDWARE_IRQ lda #>stable sta HARDWARE_IRQ+1 tsx // Save stack pointer cli // Reenable interrupts // Wait for new IRQ using NOP's to ensure minimal jitter when it hits .fill 15, NOP .align $100 stable: txs // Restore stack pointer ldx #9 // Wait till the raster has almost crossed to the next line (48 cycles) !: dex bne !- nop lda RASTER cmp RASTER bne !+ // And correct the last cycle of potential jitter !: // Raster is now completely stable! (Line $2f cycle 7) // Perform VSP by waiting an exact number of cycles and then enabling the display // See http://www.zimmers.net/cbmpics/cbm/c64/vic-ii.txt (Section 3.14.6. DMA delay) ldx #8 // Wait 45 cycles to get the VSP timing right !: dex bne !- nop nop lda vsp_scroll lsr // Put bit 0 into carry bcc dma1 // Spend 2 or 3 cycles depending on the carry (bit 0) dma1: sta dma2+1 // Update the branch clv dma2: bvc dma2 // This branch is updated with vsp_scroll/2 - changing the number of NOP's executed // 20 NOP's - enabling vsp scroll from 0-40 .fill 20, NOP ldx #$18 lda #$1b // TODO: To control Y-scrolling this must be flexible! // The STX $d011 must be line $30 cycle $10 for vsp_scroll==0 stx VICII_CONTROL1 // Enable the display - starts DMA sta VICII_CONTROL1 }}
// Stabilize the raster by using the double IRQ method
// Acknowledge the IRQ
lda #IRQ_RASTER
@ -13872,8 +13872,8 @@ irq_swing_vsp: {
ldx #$18
lda #$1b // TODO: To control Y-scrolling this must be flexible!
// The STX $d011 must be line $30 cycle $10 for vsp_scroll==0
stx VICII_CONTROL // Enable the display - starts DMA
sta VICII_CONTROL
stx VICII_CONTROL1 // Enable the display - starts DMA
sta VICII_CONTROL1
// irq_swing_vsp::@1
// VICII->CONTROL1 |= VICII_BMM
@ -14176,12 +14176,12 @@ irq_flipper_bottom: {
sta.z flipper_done
// irq_flipper_bottom::@1
__b1:
// *VICII_CONTROL |=0x80
// [140] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=0x80
// [140] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set up the IRQ again
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = IRQ_PART1_TOP_LINE
// [141] *RASTER = IRQ_PART1_TOP_LINE -- _deref_pbuc1=vbuc2
lda #IRQ_PART1_TOP_LINE
@ -14272,13 +14272,13 @@ irq_flipper_top: {
jsr raster_fine
// irq_flipper_top::@4
// asm
// asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
// asm { lda#$9a ldx#LIGHT_GREEN ldy#$1b staVICII_MEMORY stxBORDER_COLOR styVICII_CONTROL1 stxBG_COLOR lda#$c8 staVICII_CONTROL2 }
lda #$9a
ldx #LIGHT_GREEN
ldy #$1b
sta VICII_MEMORY
stx BORDER_COLOR
sty VICII_CONTROL
sty VICII_CONTROL1
stx BG_COLOR
lda #$c8
sta VICII_CONTROL2
@ -14291,11 +14291,11 @@ irq_flipper_top: {
cmp #0
bne __b1
// irq_flipper_top::@3
// *VICII_CONTROL &= 0x7f
// [155] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// *VICII_CONTROL1 &= 0x7f
// [155] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// irq_flipper_top::@2
__b2:
// <irq_flipper_bottom_line
@ -14331,11 +14331,11 @@ irq_flipper_top: {
rti
// irq_flipper_top::@1
__b1:
// *VICII_CONTROL |= 0x80
// [162] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |= 0x80
// [162] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
jmp __b2
}
// irq_part1_top
@ -14390,11 +14390,11 @@ irq_part1_top: {
cmp #0
bne __b1
// irq_part1_top::@3
// *VICII_CONTROL &= 0x7f
// [173] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// *VICII_CONTROL1 &= 0x7f
// [173] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// irq_part1_top::@2
__b2:
// <irq_flipper_top_line
@ -14431,11 +14431,11 @@ irq_part1_top: {
rti
// irq_part1_top::@1
__b1:
// *VICII_CONTROL |= 0x80
// [181] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |= 0x80
// [181] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
jmp __b2
}
.segment Code
@ -15054,12 +15054,12 @@ demo_start: {
// [272] phi from demo_start to demo_init [phi:demo_start->demo_init]
jsr demo_init
// demo_start::@1
// *VICII_CONTROL &= 0x7f
// [284] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// *VICII_CONTROL1 &= 0x7f
// [284] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to 0x00
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = 0
// [285] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
@ -15298,12 +15298,12 @@ part1_run: {
// Acknowledge any VIC IRQ
lda #$f
sta IRQ_STATUS
// *VICII_CONTROL |= 0x80
// [324] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |= 0x80
// [324] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to 0x136
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = IRQ_PART1_TOP_LINE
// [325] *RASTER = IRQ_PART1_TOP_LINE -- _deref_pbuc1=vbuc2
lda #IRQ_PART1_TOP_LINE
@ -15783,12 +15783,12 @@ part2_run: {
// Acknowledge any VIC IRQ
lda #$f
sta IRQ_STATUS
// *VICII_CONTROL &=0x7f
// [406] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// *VICII_CONTROL1 &=0x7f
// [406] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to first bucket
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = BUCKET_YPOS[0]
// [407] *RASTER = *BUCKET_YPOS -- _deref_pbuc1=_deref_pbuc2
lda BUCKET_YPOS

2
src/test/ref/complex/new_30_years_low_resolution/new_30_years_low_resolution.sym
View File

@ -197,7 +197,7 @@ const nomodify byte* SPRITES_YPOS = (byte*) 53249
const byte* SPRITE_COLOR_SEQUENCE[] = { WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, WHITE, YELLOW, CYAN, GREEN, PURPLE, RED, BLUE, RED, PURPLE, GREEN, CYAN, YELLOW, WHITE, WHITE }
const nomodify struct MOS6569_VICII* VICII = (struct MOS6569_VICII*) 53248
const nomodify byte VICII_BMM = $20
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte* VICII_CONTROL2 = (byte*) 53270
const nomodify byte VICII_MCM = $10
const nomodify byte* VICII_MEMORY = (byte*) 53272

8
src/test/ref/irq-hardware-clobber-jsr.asm
View File

@ -25,7 +25,7 @@
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
// VIC II IRQ Status Register
.label IRQ_STATUS = $d019
// VIC II IRQ Enable Register
@ -63,11 +63,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL |=$80
// *VICII_CONTROL1 |=$80
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
lda #0
sta RASTER

2
src/test/ref/irq-hardware-clobber-jsr.cfg
View File

@ -14,7 +14,7 @@ main: scope:[main] from
[4] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[5] *PROCPORT = PROCPORT_RAM_IO
[6] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[7] *VICII_CONTROL = *VICII_CONTROL | $80
[7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[8] *RASTER = 0
[9] *IRQ_ENABLE = IRQ_RASTER
[10] *HARDWARE_IRQ = &irq

30
src/test/ref/irq-hardware-clobber-jsr.log
View File

@ -9,7 +9,7 @@ main: scope:[main] from __start
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
*PROCPORT = PROCPORT_RAM_IO
*((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = 0
*IRQ_ENABLE = IRQ_RASTER
*HARDWARE_IRQ = &irq
@ -71,14 +71,14 @@ const nomodify byte* PROCPORT_DDR = (byte*)0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte WHITE = 1
void __start()
void do_irq()
__interrupt(hardware_clobber) void irq()
void main()
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 0 in *RASTER = 0
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast *RASTER = (unumber)0
@ -138,7 +138,7 @@ main: scope:[main] from
[4] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[5] *PROCPORT = PROCPORT_RAM_IO
[6] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[7] *VICII_CONTROL = *VICII_CONTROL | $80
[7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[8] *RASTER = 0
[9] *IRQ_ENABLE = IRQ_RASTER
[10] *HARDWARE_IRQ = &irq
@ -171,7 +171,7 @@ Statement [2] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x re
Statement [4] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a
Statement [5] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [10] *HARDWARE_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
@ -228,7 +228,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
// VIC II IRQ Status Register
.label IRQ_STATUS = $d019
// VIC II IRQ Enable Register
@ -273,11 +273,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// [7] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [8] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -346,7 +346,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
void do_irq()
__interrupt(hardware_clobber) void irq()
@ -387,7 +387,7 @@ Score: 296
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label BG_COLOR = $d021
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
// VIC II IRQ Status Register
.label IRQ_STATUS = $d019
// VIC II IRQ Enable Register
@ -436,12 +436,12 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL |=$80
// [7] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=$80
// [7] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
// [8] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/irq-hardware-clobber-jsr.sym
View File

@ -13,7 +13,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = 5
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
void do_irq()
__interrupt(hardware_clobber) void irq()

8
src/test/ref/irq-hardware-clobber.asm
View File

@ -17,7 +17,7 @@
.const PROCPORT_RAM_IO = $35
.label HARDWARE_IRQ = $fffe
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -61,11 +61,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// *VICII_CONTROL1 |=$80
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
lda #0
sta RASTER

2
src/test/ref/irq-hardware-clobber.cfg
View File

@ -15,7 +15,7 @@ main: scope:[main] from
[5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[6] *PROCPORT = PROCPORT_RAM_IO
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[8] *VICII_CONTROL = *VICII_CONTROL | $80
[8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[9] *RASTER = 0
[10] *IRQ_ENABLE = IRQ_RASTER
[11] *HARDWARE_IRQ = &irq

30
src/test/ref/irq-hardware-clobber.log
View File

@ -8,7 +8,7 @@ main: scope:[main] from __start
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
*PROCPORT = PROCPORT_RAM_IO
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = 0
*IRQ_ENABLE = IRQ_RASTER
*HARDWARE_IRQ = &irq
@ -59,13 +59,13 @@ const nomodify byte* PROCPORT_DDR = (byte*)0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = $35
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte WHITE = 1
void __start()
__interrupt(hardware_clobber) void irq()
void main()
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 0 in *RASTER = 0
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast *RASTER = (unumber)0
@ -121,7 +121,7 @@ main: scope:[main] from
[5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[6] *PROCPORT = PROCPORT_RAM_IO
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[8] *VICII_CONTROL = *VICII_CONTROL | $80
[8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[9] *RASTER = 0
[10] *IRQ_ENABLE = IRQ_RASTER
[11] *HARDWARE_IRQ = &irq
@ -146,7 +146,7 @@ Statement [3] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x re
Statement [5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [10] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [11] *HARDWARE_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
@ -184,7 +184,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const PROCPORT_RAM_IO = $35
.label HARDWARE_IRQ = $fffe
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -235,11 +235,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// [8] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [9] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -286,7 +286,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = $35
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(hardware_clobber) void irq()
void main()
@ -318,7 +318,7 @@ Score: 284
.const PROCPORT_RAM_IO = $35
.label HARDWARE_IRQ = $fffe
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -375,12 +375,12 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// [8] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=$80
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
// [9] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/irq-hardware-clobber.sym
View File

@ -12,7 +12,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = $35
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(hardware_clobber) void irq()
void main()

8
src/test/ref/irq-hardware-stack.asm
View File

@ -18,7 +18,7 @@
.const PROCPORT_RAM_IO = $35
.label HARDWARE_IRQ = $fffe
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -69,11 +69,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// *VICII_CONTROL1 |=$80
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
lda #0
sta RASTER

2
src/test/ref/irq-hardware-stack.cfg
View File

@ -15,7 +15,7 @@ main: scope:[main] from
[5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[6] *PROCPORT = PROCPORT_RAM_IO
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[8] *VICII_CONTROL = *VICII_CONTROL | $80
[8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[9] *RASTER = 0
[10] *IRQ_ENABLE = IRQ_RASTER
[11] *HARDWARE_IRQ = &irq

30
src/test/ref/irq-hardware-stack.log
View File

@ -8,7 +8,7 @@ main: scope:[main] from __start
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
*PROCPORT = PROCPORT_RAM_IO
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = 0
*IRQ_ENABLE = IRQ_RASTER
*HARDWARE_IRQ = &irq
@ -59,13 +59,13 @@ const nomodify byte* PROCPORT_DDR = (byte*)0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = $35
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte WHITE = 1
void __start()
__interrupt(hardware_all) void irq()
void main()
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 0 in *RASTER = 0
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast *RASTER = (unumber)0
@ -121,7 +121,7 @@ main: scope:[main] from
[5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[6] *PROCPORT = PROCPORT_RAM_IO
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[8] *VICII_CONTROL = *VICII_CONTROL | $80
[8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[9] *RASTER = 0
[10] *IRQ_ENABLE = IRQ_RASTER
[11] *HARDWARE_IRQ = &irq
@ -146,7 +146,7 @@ Statement [3] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x re
Statement [5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [10] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [11] *HARDWARE_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
@ -184,7 +184,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const PROCPORT_RAM_IO = $35
.label HARDWARE_IRQ = $fffe
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -242,11 +242,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// [8] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [9] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -293,7 +293,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = $35
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(hardware_all) void irq()
void main()
@ -326,7 +326,7 @@ Score: 514
.const PROCPORT_RAM_IO = $35
.label HARDWARE_IRQ = $fffe
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -390,12 +390,12 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// [8] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=$80
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
// [9] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/irq-hardware-stack.sym
View File

@ -12,7 +12,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = $35
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(hardware_all) void irq()
void main()

8
src/test/ref/irq-hardware.asm
View File

@ -17,7 +17,7 @@
.const PROCPORT_RAM_IO = $35
.label HARDWARE_IRQ = $fffe
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -67,11 +67,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// *VICII_CONTROL1 |=$80
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
lda #0
sta RASTER

2
src/test/ref/irq-hardware.cfg
View File

@ -15,7 +15,7 @@ main: scope:[main] from
[5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[6] *PROCPORT = PROCPORT_RAM_IO
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[8] *VICII_CONTROL = *VICII_CONTROL | $80
[8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[9] *RASTER = 0
[10] *IRQ_ENABLE = IRQ_RASTER
[11] *HARDWARE_IRQ = &irq

30
src/test/ref/irq-hardware.log
View File

@ -8,7 +8,7 @@ main: scope:[main] from __start
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
*PROCPORT = PROCPORT_RAM_IO
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = 0
*IRQ_ENABLE = IRQ_RASTER
*HARDWARE_IRQ = &irq
@ -59,13 +59,13 @@ const nomodify byte* PROCPORT_DDR = (byte*)0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = $35
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte WHITE = 1
void __start()
__interrupt(hardware_all) void irq()
void main()
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 0 in *RASTER = 0
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast *RASTER = (unumber)0
@ -121,7 +121,7 @@ main: scope:[main] from
[5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
[6] *PROCPORT = PROCPORT_RAM_IO
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[8] *VICII_CONTROL = *VICII_CONTROL | $80
[8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[9] *RASTER = 0
[10] *IRQ_ENABLE = IRQ_RASTER
[11] *HARDWARE_IRQ = &irq
@ -146,7 +146,7 @@ Statement [3] return [ ] ( [ ] { } ) always clobbers reg byte a reg byte x re
Statement [5] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [10] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [11] *HARDWARE_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
@ -183,7 +183,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const PROCPORT_RAM_IO = $35
.label HARDWARE_IRQ = $fffe
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -240,11 +240,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// [8] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [9] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -291,7 +291,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = $35
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(hardware_all) void irq()
void main()
@ -323,7 +323,7 @@ Score: 404
.const PROCPORT_RAM_IO = $35
.label HARDWARE_IRQ = $fffe
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -386,12 +386,12 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// [8] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=$80
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
// [9] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/irq-hardware.sym
View File

@ -12,7 +12,7 @@ const nomodify byte* PROCPORT_DDR = (byte*) 0
const nomodify byte PROCPORT_DDR_MEMORY_MASK = 7
const nomodify byte PROCPORT_RAM_IO = $35
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(hardware_all) void irq()
void main()

8
src/test/ref/irq-idx-problem.asm
View File

@ -18,7 +18,7 @@
.const IRQ_CHANGE_NEXT = $7f
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
// VIC II IRQ Status Register
.label IRQ_STATUS = $d019
// VIC II IRQ Enable Register
@ -90,11 +90,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL &=$7f
// *VICII_CONTROL1 &=$7f
// Set raster line to $60
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $60
lda #$60
sta RASTER

2
src/test/ref/irq-idx-problem.cfg
View File

@ -49,7 +49,7 @@ void main()
main: scope:[main] from __start::@1
asm { sei }
[19] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[20] *VICII_CONTROL = *VICII_CONTROL & $7f
[20] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[21] *RASTER = $60
[22] *IRQ_ENABLE = IRQ_RASTER
[23] *IRQ_STATUS = IRQ_RASTER

32
src/test/ref/irq-idx-problem.log
View File

@ -8,7 +8,7 @@ void main()
main: scope:[main] from __start::@1
asm { sei }
*((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL & $7f
*VICII_CONTROL1 = *VICII_CONTROL1 & $7f
*RASTER = $60
*IRQ_ENABLE = IRQ_RASTER
*IRQ_STATUS = IRQ_RASTER
@ -94,7 +94,7 @@ const byte OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* SCREEN = (byte*)$400
const nomodify byte* VICII_BASE = (byte*)$d000
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte VICII_SIZE = $30
void __start()
volatile byte irq_idx loadstore
@ -118,7 +118,7 @@ byte table_driven_irq::val#2
byte table_driven_irq::val#3
byte table_driven_irq::val#4
Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f
Adding number conversion cast (unumber) $7f in *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
Adding number conversion cast (unumber) $60 in *RASTER = $60
Adding number conversion cast (unumber) VICII_SIZE+8 in table_driven_irq::$1 = table_driven_irq::idx#2 < VICII_SIZE+8
Adding number conversion cast (unumber) 8 in table_driven_irq::$1 = table_driven_irq::idx#2 < (unumber)VICII_SIZE+8
@ -249,7 +249,7 @@ void main()
main: scope:[main] from __start::@1
asm { sei }
[19] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR
[20] *VICII_CONTROL = *VICII_CONTROL & $7f
[20] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[21] *RASTER = $60
[22] *IRQ_ENABLE = IRQ_RASTER
[23] *IRQ_STATUS = IRQ_RASTER
@ -293,7 +293,7 @@ Statement [14] irq_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [16] (SCREEN+-VICII_SIZE+$3f8)[table_driven_irq::idx#0] = table_driven_irq::val#0 [ irq_idx ] ( [ irq_idx ] { } ) always clobbers reg byte a
Statement [17] VICII_BASE[table_driven_irq::idx#0] = table_driven_irq::val#0 [ irq_idx ] ( [ irq_idx ] { } ) always clobbers reg byte a
Statement [19] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [20] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [20] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [21] *RASTER = $60 [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [22] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [23] *IRQ_STATUS = IRQ_RASTER [ ] ( main:3 [ ] { } ) always clobbers reg byte a
@ -306,7 +306,7 @@ Statement [14] irq_idx = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [16] (SCREEN+-VICII_SIZE+$3f8)[table_driven_irq::idx#0] = table_driven_irq::val#0 [ irq_idx ] ( [ irq_idx ] { } ) always clobbers reg byte a
Statement [17] VICII_BASE[table_driven_irq::idx#0] = table_driven_irq::val#0 [ irq_idx ] ( [ irq_idx ] { } ) always clobbers reg byte a
Statement [19] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUPT_CLEAR [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [20] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [20] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [21] *RASTER = $60 [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [22] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:3 [ ] { } ) always clobbers reg byte a
Statement [23] *IRQ_STATUS = IRQ_RASTER [ ] ( main:3 [ ] { } ) always clobbers reg byte a
@ -358,7 +358,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const IRQ_CHANGE_NEXT = $7f
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
// VIC II IRQ Status Register
.label IRQ_STATUS = $d019
// VIC II IRQ Enable Register
@ -463,11 +463,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// [20] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// [20] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to $60
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// [21] *RASTER = $60 -- _deref_pbuc1=vbuc2
lda #$60
sta RASTER
@ -542,7 +542,7 @@ const byte OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* SCREEN = (byte*) 1024
const nomodify byte* VICII_BASE = (byte*) 53248
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_SIZE = $30
void __start()
volatile byte irq_idx loadstore zp[1]:2 6.0
@ -584,7 +584,7 @@ Score: 631
.const IRQ_CHANGE_NEXT = $7f
.const OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
// VIC II IRQ Status Register
.label IRQ_STATUS = $d019
// VIC II IRQ Enable Register
@ -689,12 +689,12 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT
// *VICII_CONTROL &=$7f
// [20] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// *VICII_CONTROL1 &=$7f
// [20] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to $60
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $60
// [21] *RASTER = $60 -- _deref_pbuc1=vbuc2
lda #$60

2
src/test/ref/irq-idx-problem.sym
View File

@ -11,7 +11,7 @@ const byte OFFSET_STRUCT_MOS6526_CIA_INTERRUPT = $d
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* SCREEN = (byte*) 1024
const nomodify byte* VICII_BASE = (byte*) 53248
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_SIZE = $30
void __start()
volatile byte irq_idx loadstore zp[1]:2 6.0

8
src/test/ref/irq-kernel.asm
View File

@ -13,7 +13,7 @@
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -41,11 +41,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// *VICII_CONTROL1 |=$80
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
lda #0
sta RASTER

2
src/test/ref/irq-kernel.cfg
View File

@ -13,7 +13,7 @@ void main()
main: scope:[main] from
asm { sei }
[5] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[6] *VICII_CONTROL = *VICII_CONTROL | $80
[6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[7] *RASTER = 0
[8] *IRQ_ENABLE = IRQ_RASTER
[9] *KERNEL_IRQ = &irq

30
src/test/ref/irq-kernel.log
View File

@ -6,7 +6,7 @@ void main()
main: scope:[main] from __start
asm { sei }
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = 0
*IRQ_ENABLE = IRQ_RASTER
*KERNEL_IRQ = &irq
@ -46,13 +46,13 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*)$d019
const nomodify void()** KERNEL_IRQ = (void()**)$314
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte WHITE = 1
void __start()
__interrupt(rom_sys_c64) void irq()
void main()
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 0 in *RASTER = 0
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast *RASTER = (unumber)0
@ -96,7 +96,7 @@ void main()
main: scope:[main] from
asm { sei }
[5] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[6] *VICII_CONTROL = *VICII_CONTROL | $80
[6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[7] *RASTER = 0
[8] *IRQ_ENABLE = IRQ_RASTER
[9] *KERNEL_IRQ = &irq
@ -118,7 +118,7 @@ Statement [0] *BG_COLOR = WHITE [ ] ( [ ] { } ) always clobbers reg byte a
Statement [1] *BG_COLOR = BLACK [ ] ( [ ] { } ) always clobbers reg byte a
Statement [2] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [5] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *KERNEL_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
@ -151,7 +151,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -186,11 +186,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// [6] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [7] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -232,7 +232,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*) 53273
const nomodify void()** KERNEL_IRQ = (void()**) 788
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(rom_sys_c64) void irq()
void main()
@ -260,7 +260,7 @@ Score: 98
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -299,12 +299,12 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// [6] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=$80
// [6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
// [7] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/irq-kernel.sym
View File

@ -7,7 +7,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*) 53273
const nomodify void()** KERNEL_IRQ = (void()**) 788
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(rom_sys_c64) void irq()
void main()

8
src/test/ref/irq-local-var-overlap-problem.asm
View File

@ -11,7 +11,7 @@
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -75,11 +75,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL &=$7f
// *VICII_CONTROL1 &=$7f
// Set raster line to $0fd
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $fd
lda #$fd
sta RASTER

2
src/test/ref/irq-local-var-overlap-problem.cfg
View File

@ -40,7 +40,7 @@ void main()
main: scope:[main] from
asm { sei }
[18] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[19] *VICII_CONTROL = *VICII_CONTROL & $7f
[19] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[20] *RASTER = $fd
[21] *IRQ_ENABLE = IRQ_RASTER
[22] *KERNEL_IRQ = &irq

32
src/test/ref/irq-local-var-overlap-problem.log
View File

@ -6,7 +6,7 @@ void main()
main: scope:[main] from __start
asm { sei }
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL & $7f
*VICII_CONTROL1 = *VICII_CONTROL1 & $7f
*RASTER = $fd
*IRQ_ENABLE = IRQ_RASTER
*KERNEL_IRQ = &irq
@ -215,7 +215,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*)$d019
const nomodify void()** KERNEL_IRQ = (void()**)$314
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
void __start()
__interrupt(rom_min_c64) void irq()
byte~ irq::$2
@ -320,7 +320,7 @@ byte sub_main::k#0
byte sub_main::k#1
byte sub_main::k#2
Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f
Adding number conversion cast (unumber) $7f in *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
Adding number conversion cast (unumber) $fd in *RASTER = $fd
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast *RASTER = (unumber)$fd
@ -588,7 +588,7 @@ void main()
main: scope:[main] from
asm { sei }
[18] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[19] *VICII_CONTROL = *VICII_CONTROL & $7f
[19] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[20] *RASTER = $fd
[21] *IRQ_ENABLE = IRQ_RASTER
[22] *KERNEL_IRQ = &irq
@ -804,7 +804,7 @@ Removing always clobbered register reg byte a as potential for zp[1]:4 [ irq::k#
Statement [5] irq::$3 = irq::$2 + irq::k#2 [ irq::i#7 irq::j#4 irq::k#2 irq::$3 ] ( [ irq::i#7 irq::j#4 irq::k#2 irq::$3 ] { } ) always clobbers reg byte a
Statement [14] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [18] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
Statement [19] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( [ ] { } ) always clobbers reg byte a
Statement [19] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( [ ] { } ) always clobbers reg byte a
Statement [20] *RASTER = $fd [ ] ( [ ] { } ) always clobbers reg byte a
Statement [21] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [22] *KERNEL_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
@ -827,7 +827,7 @@ Statement [4] irq::$2 = irq::i#7 + irq::j#4 [ irq::i#7 irq::j#4 irq::k#2 irq::$2
Statement [5] irq::$3 = irq::$2 + irq::k#2 [ irq::i#7 irq::j#4 irq::k#2 irq::$3 ] ( [ irq::i#7 irq::j#4 irq::k#2 irq::$3 ] { } ) always clobbers reg byte a
Statement [14] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [18] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
Statement [19] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( [ ] { } ) always clobbers reg byte a
Statement [19] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( [ ] { } ) always clobbers reg byte a
Statement [20] *RASTER = $fd [ ] ( [ ] { } ) always clobbers reg byte a
Statement [21] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [22] *KERNEL_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
@ -909,7 +909,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -1026,11 +1026,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// [19] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// [19] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to $0fd
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// [20] *RASTER = $fd -- _deref_pbuc1=vbuc2
lda #$fd
sta RASTER
@ -1402,7 +1402,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*) 53273
const nomodify void()** KERNEL_IRQ = (void()**) 788
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
__interrupt(rom_min_c64) void irq()
byte~ irq::$2 reg byte a 2002.0
byte~ irq::$3 reg byte a 2002.0
@ -1493,7 +1493,7 @@ Score: 314173671
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -1598,12 +1598,12 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL &=$7f
// [19] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// *VICII_CONTROL1 &=$7f
// [19] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to $0fd
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $fd
// [20] *RASTER = $fd -- _deref_pbuc1=vbuc2
lda #$fd

2
src/test/ref/irq-local-var-overlap-problem.sym
View File

@ -7,7 +7,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*) 53273
const nomodify void()** KERNEL_IRQ = (void()**) 788
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
__interrupt(rom_min_c64) void irq()
byte~ irq::$2 reg byte a 2002.0
byte~ irq::$3 reg byte a 2002.0

8
src/test/ref/irq-raster.asm
View File

@ -13,7 +13,7 @@
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -41,11 +41,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// *VICII_CONTROL1 |=$80
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
lda #0
sta RASTER

2
src/test/ref/irq-raster.cfg
View File

@ -13,7 +13,7 @@ void main()
main: scope:[main] from
asm { sei }
[5] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[6] *VICII_CONTROL = *VICII_CONTROL | $80
[6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[7] *RASTER = 0
[8] *IRQ_ENABLE = IRQ_RASTER
[9] *KERNEL_IRQ = &irq

30
src/test/ref/irq-raster.log
View File

@ -6,7 +6,7 @@ void main()
main: scope:[main] from __start
asm { sei }
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL | $80
*VICII_CONTROL1 = *VICII_CONTROL1 | $80
*RASTER = 0
*IRQ_ENABLE = IRQ_RASTER
*KERNEL_IRQ = &irq
@ -46,13 +46,13 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*)$d019
const nomodify void()** KERNEL_IRQ = (void()**)$314
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte WHITE = 1
void __start()
__interrupt(rom_min_c64) void irq()
void main()
Adding number conversion cast (unumber) $80 in *VICII_CONTROL = *VICII_CONTROL | $80
Adding number conversion cast (unumber) $80 in *VICII_CONTROL1 = *VICII_CONTROL1 | $80
Adding number conversion cast (unumber) 0 in *RASTER = 0
Successful SSA optimization PassNAddNumberTypeConversions
Inlining cast *RASTER = (unumber)0
@ -96,7 +96,7 @@ void main()
main: scope:[main] from
asm { sei }
[5] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[6] *VICII_CONTROL = *VICII_CONTROL | $80
[6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80
[7] *RASTER = 0
[8] *IRQ_ENABLE = IRQ_RASTER
[9] *KERNEL_IRQ = &irq
@ -118,7 +118,7 @@ Statement [0] *BG_COLOR = WHITE [ ] ( [ ] { } ) always clobbers reg byte a
Statement [1] *BG_COLOR = BLACK [ ] ( [ ] { } ) always clobbers reg byte a
Statement [2] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [5] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL = *VICII_CONTROL | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *RASTER = 0 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *KERNEL_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
@ -151,7 +151,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -186,11 +186,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// [6] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// [6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// [7] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -232,7 +232,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*) 53273
const nomodify void()** KERNEL_IRQ = (void()**) 788
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(rom_min_c64) void irq()
void main()
@ -260,7 +260,7 @@ Score: 98
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -299,12 +299,12 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL |=$80
// [6] *VICII_CONTROL = *VICII_CONTROL | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// *VICII_CONTROL1 |=$80
// [6] *VICII_CONTROL1 = *VICII_CONTROL1 | $80 -- _deref_pbuc1=_deref_pbuc1_bor_vbuc2
// Set raster line to $100
lda #$80
ora VICII_CONTROL
sta VICII_CONTROL
ora VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $00
// [7] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/irq-raster.sym
View File

@ -7,7 +7,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*) 53273
const nomodify void()** KERNEL_IRQ = (void()**) 788
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte WHITE = 1
__interrupt(rom_min_c64) void irq()
void main()

8
src/test/ref/irq-volatile-bool-problem.asm
View File

@ -12,7 +12,7 @@
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -39,11 +39,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL &=$7f
// *VICII_CONTROL1 &=$7f
// Set raster line to $0fd
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $fd
lda #$fd
sta RASTER

2
src/test/ref/irq-volatile-bool-problem.cfg
View File

@ -19,7 +19,7 @@ void main()
main: scope:[main] from
asm { sei }
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[8] *VICII_CONTROL = *VICII_CONTROL & $7f
[8] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[9] *RASTER = $fd
[10] *IRQ_ENABLE = IRQ_RASTER
[11] *KERNEL_IRQ = &irq

30
src/test/ref/irq-volatile-bool-problem.log
View File

@ -8,7 +8,7 @@ void main()
main: scope:[main] from __start::@1
asm { sei }
*CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
*VICII_CONTROL = *VICII_CONTROL & $7f
*VICII_CONTROL1 = *VICII_CONTROL1 & $7f
*RASTER = $fd
*IRQ_ENABLE = IRQ_RASTER
*KERNEL_IRQ = &irq
@ -68,7 +68,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*)$d019
const nomodify void()** KERNEL_IRQ = (void()**)$314
const nomodify byte* RASTER = (byte*)$d012
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
void __start()
__interrupt(rom_min_c64) void irq()
bool~ irq::$1
@ -77,7 +77,7 @@ void main()
bool~ main::$0
bool~ main::$1
Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f
Adding number conversion cast (unumber) $7f in *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
Adding number conversion cast (unumber) $fd in *RASTER = $fd
Adding number conversion cast (unumber) $14 in main::$0 = *RASTER < $14
Adding number conversion cast (unumber) $32 in irq::$1 = *RASTER > $32
@ -162,7 +162,7 @@ void main()
main: scope:[main] from
asm { sei }
[7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR
[8] *VICII_CONTROL = *VICII_CONTROL & $7f
[8] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[9] *RASTER = $fd
[10] *IRQ_ENABLE = IRQ_RASTER
[11] *KERNEL_IRQ = &irq
@ -186,7 +186,7 @@ REGISTER UPLIFT POTENTIAL REGISTERS
Statement [1] *IRQ_STATUS = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [2] if(*RASTER<$32+1) goto irq::@1 [ ] ( [ ] { } ) always clobbers reg byte a
Statement [7] *CIA1_INTERRUPT = CIA_INTERRUPT_CLEAR [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( [ ] { } ) always clobbers reg byte a
Statement [8] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( [ ] { } ) always clobbers reg byte a
Statement [9] *RASTER = $fd [ ] ( [ ] { } ) always clobbers reg byte a
Statement [10] *IRQ_ENABLE = IRQ_RASTER [ ] ( [ ] { } ) always clobbers reg byte a
Statement [11] *KERNEL_IRQ = &irq [ ] ( [ ] { } ) always clobbers reg byte a
@ -219,7 +219,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -262,11 +262,11 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// [8] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to $0fd
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// [9] *RASTER = $fd -- _deref_pbuc1=vbuc2
lda #$fd
sta RASTER
@ -326,7 +326,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*) 53273
const nomodify void()** KERNEL_IRQ = (void()**) 788
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
__interrupt(rom_min_c64) void irq()
void main()
@ -352,7 +352,7 @@ Score: 978
.const CIA_INTERRUPT_CLEAR = $7f
.label KERNEL_IRQ = $314
.label RASTER = $d012
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label IRQ_STATUS = $d019
.label IRQ_ENABLE = $d01a
.label BG_COLOR = $d020
@ -394,12 +394,12 @@ main: {
// Disable CIA 1 Timer IRQ
lda #CIA_INTERRUPT_CLEAR
sta CIA1_INTERRUPT
// *VICII_CONTROL &=$7f
// [8] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// *VICII_CONTROL1 &=$7f
// [8] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// Set raster line to $0fd
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = $fd
// [9] *RASTER = $fd -- _deref_pbuc1=vbuc2
lda #$fd

2
src/test/ref/irq-volatile-bool-problem.sym
View File

@ -6,7 +6,7 @@ const nomodify byte IRQ_RASTER = 1
const nomodify byte* IRQ_STATUS = (byte*) 53273
const nomodify void()** KERNEL_IRQ = (void()**) 788
const nomodify byte* RASTER = (byte*) 53266
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
__interrupt(rom_min_c64) void irq()
void main()

8
src/test/ref/multiplexer-irq/simple-multiplexer-irq.asm
View File

@ -29,7 +29,7 @@
.label SPRITES_ENABLE = $d015
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
// VIC II IRQ Status Register
.label IRQ_STATUS = $d019
@ -291,10 +291,10 @@ init: {
sta KERNEL_IRQ
lda #>plex_irq
sta KERNEL_IRQ+1
// *VICII_CONTROL &= 0x7f
// *VICII_CONTROL1 &= 0x7f
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = 0x0
lda #0
sta RASTER

2
src/test/ref/multiplexer-irq/simple-multiplexer-irq.cfg
View File

@ -144,7 +144,7 @@ init::@4: scope:[init] from init::@3
[73] *IRQ_ENABLE = IRQ_RASTER
[74] *IRQ_STATUS = IRQ_RASTER
[75] *KERNEL_IRQ = &plex_irq
[76] *VICII_CONTROL = *VICII_CONTROL & $7f
[76] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[77] *RASTER = 0
asm { cli }
to:init::@return

34
src/test/ref/multiplexer-irq/simple-multiplexer-irq.log
View File

@ -204,7 +204,7 @@ init::@4: scope:[init] from init::@3
*IRQ_ENABLE = IRQ_RASTER
*IRQ_STATUS = IRQ_RASTER
*KERNEL_IRQ = &plex_irq
*VICII_CONTROL = *VICII_CONTROL & $7f
*VICII_CONTROL1 = *VICII_CONTROL1 & $7f
*RASTER = 0
asm { cli }
to:init::@return
@ -358,7 +358,7 @@ const nomodify byte* SPRITES_ENABLE = (byte*)$d015
const nomodify byte* SPRITES_XMSB = (byte*)$d010
const nomodify byte* SPRITES_XPOS = (byte*)$d000
const nomodify byte* SPRITES_YPOS = (byte*)$d001
const nomodify byte* VICII_CONTROL = (byte*)$d011
const nomodify byte* VICII_CONTROL1 = (byte*)$d011
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1
@ -538,7 +538,7 @@ Adding number conversion cast (unumber) $40 in PLEX_PTR[init::sx#2] = (byte)SPRI
Adding number conversion cast (unumber) 9 in init::xp#1 = init::xp#2 + 9
Adding number conversion cast (unumber) 1 in init::sx#1 = init::sx#2 + rangenext(0,PLEX_COUNT-1)
Adding number conversion cast (unumber) $ff in *SPRITES_ENABLE = $ff
Adding number conversion cast (unumber) $7f in *VICII_CONTROL = *VICII_CONTROL & $7f
Adding number conversion cast (unumber) $7f in *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
Adding number conversion cast (unumber) 0 in *RASTER = 0
Adding number conversion cast (unumber) 2 in plex_irq::$4 = *RASTER + 2
Adding number conversion cast (unumber) plex_irq::$4 in plex_irq::$4 = *RASTER + (unumber)2
@ -1046,7 +1046,7 @@ init::@4: scope:[init] from init::@3
[73] *IRQ_ENABLE = IRQ_RASTER
[74] *IRQ_STATUS = IRQ_RASTER
[75] *KERNEL_IRQ = &plex_irq
[76] *VICII_CONTROL = *VICII_CONTROL & $7f
[76] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f
[77] *RASTER = 0
asm { cli }
to:init::@return
@ -1384,7 +1384,7 @@ Statement [72] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUP
Statement [73] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [74] *IRQ_STATUS = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [75] *KERNEL_IRQ = &plex_irq [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [76] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [76] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [77] *RASTER = 0 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [82] if(framedone) goto loop::@3 [ framedone loop::sin_idx#6 ] ( main:8::loop:29 [ framedone loop::sin_idx#6 ] { } ) always clobbers reg byte a
Removing always clobbered register reg byte a as potential for zp[1]:6 [ loop::sin_idx#6 loop::sin_idx#1 ]
@ -1450,7 +1450,7 @@ Statement [72] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUP
Statement [73] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [74] *IRQ_STATUS = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [75] *KERNEL_IRQ = &plex_irq [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [76] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [76] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [77] *RASTER = 0 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [82] if(framedone) goto loop::@3 [ framedone loop::sin_idx#6 ] ( main:8::loop:29 [ framedone loop::sin_idx#6 ] { } ) always clobbers reg byte a
Statement [83] *BORDER_COLOR = RED [ loop::sin_idx#6 ] ( main:8::loop:29 [ loop::sin_idx#6 ] { } ) always clobbers reg byte a
@ -1508,7 +1508,7 @@ Statement [72] *((byte*)CIA1+OFFSET_STRUCT_MOS6526_CIA_INTERRUPT) = CIA_INTERRUP
Statement [73] *IRQ_ENABLE = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [74] *IRQ_STATUS = IRQ_RASTER [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [75] *KERNEL_IRQ = &plex_irq [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [76] *VICII_CONTROL = *VICII_CONTROL & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [76] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [77] *RASTER = 0 [ ] ( main:8::init:27 [ framedone ] { } ) always clobbers reg byte a
Statement [82] if(framedone) goto loop::@3 [ framedone loop::sin_idx#6 ] ( main:8::loop:29 [ framedone loop::sin_idx#6 ] { } ) always clobbers reg byte a
Statement [83] *BORDER_COLOR = RED [ loop::sin_idx#6 ] ( main:8::loop:29 [ loop::sin_idx#6 ] { } ) always clobbers reg byte a
@ -1684,7 +1684,7 @@ ASSEMBLER BEFORE OPTIMIZATION
.label SPRITES_ENABLE = $d015
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
// VIC II IRQ Status Register
.label IRQ_STATUS = $d019
@ -2053,10 +2053,10 @@ init: {
sta KERNEL_IRQ
lda #>plex_irq
sta KERNEL_IRQ+1
// [76] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// [76] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// [77] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0
sta RASTER
@ -2495,7 +2495,7 @@ const nomodify byte* SPRITES_ENABLE = (byte*) 53269
const nomodify byte* SPRITES_XMSB = (byte*) 53264
const nomodify byte* SPRITES_XPOS = (byte*) 53248
const nomodify byte* SPRITES_YPOS = (byte*) 53249
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1
@ -2648,7 +2648,7 @@ Score: 43654
.label SPRITES_ENABLE = $d015
.label RASTER = $d012
.label BORDER_COLOR = $d020
.label VICII_CONTROL = $d011
.label VICII_CONTROL1 = $d011
.label D011 = $d011
// VIC II IRQ Status Register
.label IRQ_STATUS = $d019
@ -3027,11 +3027,11 @@ init: {
sta KERNEL_IRQ
lda #>plex_irq
sta KERNEL_IRQ+1
// *VICII_CONTROL &= 0x7f
// [76] *VICII_CONTROL = *VICII_CONTROL & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
// *VICII_CONTROL1 &= 0x7f
// [76] *VICII_CONTROL1 = *VICII_CONTROL1 & $7f -- _deref_pbuc1=_deref_pbuc1_band_vbuc2
lda #$7f
and VICII_CONTROL
sta VICII_CONTROL
and VICII_CONTROL1
sta VICII_CONTROL1
// *RASTER = 0x0
// [77] *RASTER = 0 -- _deref_pbuc1=vbuc2
lda #0

2
src/test/ref/multiplexer-irq/simple-multiplexer-irq.sym
View File

@ -28,7 +28,7 @@ const nomodify byte* SPRITES_ENABLE = (byte*) 53269
const nomodify byte* SPRITES_XMSB = (byte*) 53264
const nomodify byte* SPRITES_XPOS = (byte*) 53248
const nomodify byte* SPRITES_YPOS = (byte*) 53249
const nomodify byte* VICII_CONTROL = (byte*) 53265
const nomodify byte* VICII_CONTROL1 = (byte*) 53265
const nomodify byte VICII_DEN = $10
const nomodify byte VICII_RSEL = 8
const nomodify byte WHITE = 1