mirror of
https://gitlab.com/camelot/kickc.git
synced 2024-06-02 00:41:42 +00:00
1892 lines
88 KiB
Plaintext
1892 lines
88 KiB
Plaintext
Inlined call vicSelectGfxBank::$0 = call toDd00(vicSelectGfxBank::gfx)
|
|
Inlined call call __init
|
|
|
|
CONTROL FLOW GRAPH SSA
|
|
|
|
void dtvSetCpuBankSegment1(char cpuBankIdx)
|
|
dtvSetCpuBankSegment1: scope:[dtvSetCpuBankSegment1] from gfx_init_chunky gfx_init_chunky::@4 gfx_init_chunky::@6
|
|
dtvSetCpuBankSegment1::cpuBankIdx#3 = phi( gfx_init_chunky/dtvSetCpuBankSegment1::cpuBankIdx#0, gfx_init_chunky::@4/dtvSetCpuBankSegment1::cpuBankIdx#1, gfx_init_chunky::@6/dtvSetCpuBankSegment1::cpuBankIdx#2 )
|
|
*dtvSetCpuBankSegment1::cpuBank = dtvSetCpuBankSegment1::cpuBankIdx#3
|
|
asm { .byte$32,$dd lda$ff .byte$32,$00 }
|
|
to:dtvSetCpuBankSegment1::@return
|
|
dtvSetCpuBankSegment1::@return: scope:[dtvSetCpuBankSegment1] from dtvSetCpuBankSegment1
|
|
return
|
|
to:@return
|
|
|
|
void main()
|
|
main: scope:[main] from __start::@1
|
|
asm { sei }
|
|
*PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
|
*PROCPORT = PROCPORT_RAM_IO
|
|
call gfx_init_chunky
|
|
to:main::@7
|
|
main::@7: scope:[main] from main
|
|
*DTV_FEATURE = DTV_FEATURE_ENABLE
|
|
*DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
|
|
*VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
*VICII_CONTROL2 = VICII_MCM|VICII_CSEL
|
|
*DTV_PLANEB_START_LO = byte0 CHUNKY
|
|
*DTV_PLANEB_START_MI = byte1 CHUNKY
|
|
*DTV_PLANEB_START_HI = 0
|
|
*DTV_PLANEB_STEP = 8
|
|
*DTV_PLANEB_MODULO_LO = 0
|
|
*DTV_PLANEB_MODULO_HI = 0
|
|
*((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
|
|
*((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(char)(unsigned int)CHUNKY/$4000
|
|
*VICII_MEMORY = (char)(unsigned int)CHUNKY&$3fff/$40|byte1 (unsigned int)CHUNKY&$3fff/4
|
|
main::j#0 = 0
|
|
to:main::@1
|
|
main::@1: scope:[main] from main::@1 main::@7
|
|
main::j#2 = phi( main::@1/main::j#1, main::@7/main::j#0 )
|
|
DTV_PALETTE[main::j#2] = main::j#2
|
|
main::j#1 = main::j#2 + rangenext(0,$f)
|
|
main::$1 = main::j#1 != rangelast(0,$f)
|
|
if(main::$1) goto main::@1
|
|
to:main::@2
|
|
main::@2: scope:[main] from main::@1 main::@6
|
|
if(true) goto main::@3
|
|
to:main::@return
|
|
main::@3: scope:[main] from main::@2
|
|
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
|
|
*VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
*BORDER_COLOR = 0
|
|
main::rst#0 = $42
|
|
to:main::@4
|
|
main::@4: scope:[main] from main::@3 main::@4
|
|
main::rst#2 = phi( main::@3/main::rst#0, main::@4/main::rst#2 )
|
|
main::$2 = *RASTER != main::rst#2
|
|
if(main::$2) goto main::@4
|
|
to:main::@5
|
|
main::@5: scope:[main] from main::@4
|
|
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
|
to:main::@6
|
|
main::@6: scope:[main] from main::@5 main::@6
|
|
main::rst#1 = *RASTER
|
|
main::$3 = main::rst#1 & 7
|
|
main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
|
|
*VICII_CONTROL1 = main::$4
|
|
main::$5 = main::rst#1 * $10
|
|
*BORDER_COLOR = main::$5
|
|
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
|
main::$6 = main::rst#1 != $f2
|
|
if(main::$6) goto main::@6
|
|
to:main::@2
|
|
main::@return: scope:[main] from main::@2
|
|
return
|
|
to:@return
|
|
|
|
void gfx_init_chunky()
|
|
gfx_init_chunky: scope:[gfx_init_chunky] from main
|
|
gfx_init_chunky::gfxbCpuBank#0 = (char)CHUNKY/$4000
|
|
dtvSetCpuBankSegment1::cpuBankIdx#0 = gfx_init_chunky::gfxbCpuBank#0
|
|
call dtvSetCpuBankSegment1
|
|
to:gfx_init_chunky::@7
|
|
gfx_init_chunky::@7: scope:[gfx_init_chunky] from gfx_init_chunky
|
|
gfx_init_chunky::gfxbCpuBank#3 = phi( gfx_init_chunky/gfx_init_chunky::gfxbCpuBank#0 )
|
|
gfx_init_chunky::gfxbCpuBank#1 = ++ gfx_init_chunky::gfxbCpuBank#3
|
|
gfx_init_chunky::gfxb#0 = (char *)$4000
|
|
gfx_init_chunky::y#0 = 0
|
|
to:gfx_init_chunky::@1
|
|
gfx_init_chunky::@1: scope:[gfx_init_chunky] from gfx_init_chunky::@5 gfx_init_chunky::@7
|
|
gfx_init_chunky::gfxbCpuBank#7 = phi( gfx_init_chunky::@5/gfx_init_chunky::gfxbCpuBank#9, gfx_init_chunky::@7/gfx_init_chunky::gfxbCpuBank#1 )
|
|
gfx_init_chunky::y#6 = phi( gfx_init_chunky::@5/gfx_init_chunky::y#1, gfx_init_chunky::@7/gfx_init_chunky::y#0 )
|
|
gfx_init_chunky::gfxb#5 = phi( gfx_init_chunky::@5/gfx_init_chunky::gfxb#6, gfx_init_chunky::@7/gfx_init_chunky::gfxb#0 )
|
|
gfx_init_chunky::x#0 = 0
|
|
to:gfx_init_chunky::@2
|
|
gfx_init_chunky::@2: scope:[gfx_init_chunky] from gfx_init_chunky::@1 gfx_init_chunky::@3
|
|
gfx_init_chunky::gfxbCpuBank#6 = phi( gfx_init_chunky::@1/gfx_init_chunky::gfxbCpuBank#7, gfx_init_chunky::@3/gfx_init_chunky::gfxbCpuBank#8 )
|
|
gfx_init_chunky::y#4 = phi( gfx_init_chunky::@1/gfx_init_chunky::y#6, gfx_init_chunky::@3/gfx_init_chunky::y#2 )
|
|
gfx_init_chunky::x#3 = phi( gfx_init_chunky::@1/gfx_init_chunky::x#0, gfx_init_chunky::@3/gfx_init_chunky::x#1 )
|
|
gfx_init_chunky::gfxb#3 = phi( gfx_init_chunky::@1/gfx_init_chunky::gfxb#5, gfx_init_chunky::@3/gfx_init_chunky::gfxb#1 )
|
|
gfx_init_chunky::$2 = gfx_init_chunky::gfxb#3 == $8000
|
|
gfx_init_chunky::$3 = ! gfx_init_chunky::$2
|
|
if(gfx_init_chunky::$3) goto gfx_init_chunky::@3
|
|
to:gfx_init_chunky::@4
|
|
gfx_init_chunky::@3: scope:[gfx_init_chunky] from gfx_init_chunky::@2 gfx_init_chunky::@8
|
|
gfx_init_chunky::gfxbCpuBank#8 = phi( gfx_init_chunky::@2/gfx_init_chunky::gfxbCpuBank#6, gfx_init_chunky::@8/gfx_init_chunky::gfxbCpuBank#2 )
|
|
gfx_init_chunky::gfxb#4 = phi( gfx_init_chunky::@2/gfx_init_chunky::gfxb#3, gfx_init_chunky::@8/gfx_init_chunky::gfxb#2 )
|
|
gfx_init_chunky::y#2 = phi( gfx_init_chunky::@2/gfx_init_chunky::y#4, gfx_init_chunky::@8/gfx_init_chunky::y#5 )
|
|
gfx_init_chunky::x#2 = phi( gfx_init_chunky::@2/gfx_init_chunky::x#3, gfx_init_chunky::@8/gfx_init_chunky::x#4 )
|
|
gfx_init_chunky::$5 = gfx_init_chunky::x#2 + gfx_init_chunky::y#2
|
|
gfx_init_chunky::c#0 = (char)gfx_init_chunky::$5
|
|
*gfx_init_chunky::gfxb#4 = gfx_init_chunky::c#0
|
|
gfx_init_chunky::gfxb#1 = ++ gfx_init_chunky::gfxb#4
|
|
gfx_init_chunky::x#1 = gfx_init_chunky::x#2 + rangenext(0,$13f)
|
|
gfx_init_chunky::$6 = gfx_init_chunky::x#1 != rangelast(0,$13f)
|
|
if(gfx_init_chunky::$6) goto gfx_init_chunky::@2
|
|
to:gfx_init_chunky::@5
|
|
gfx_init_chunky::@4: scope:[gfx_init_chunky] from gfx_init_chunky::@2
|
|
gfx_init_chunky::y#7 = phi( gfx_init_chunky::@2/gfx_init_chunky::y#4 )
|
|
gfx_init_chunky::x#5 = phi( gfx_init_chunky::@2/gfx_init_chunky::x#3 )
|
|
gfx_init_chunky::gfxbCpuBank#4 = phi( gfx_init_chunky::@2/gfx_init_chunky::gfxbCpuBank#6 )
|
|
dtvSetCpuBankSegment1::cpuBankIdx#1 = gfx_init_chunky::gfxbCpuBank#4
|
|
call dtvSetCpuBankSegment1
|
|
to:gfx_init_chunky::@8
|
|
gfx_init_chunky::@8: scope:[gfx_init_chunky] from gfx_init_chunky::@4
|
|
gfx_init_chunky::y#5 = phi( gfx_init_chunky::@4/gfx_init_chunky::y#7 )
|
|
gfx_init_chunky::x#4 = phi( gfx_init_chunky::@4/gfx_init_chunky::x#5 )
|
|
gfx_init_chunky::gfxbCpuBank#5 = phi( gfx_init_chunky::@4/gfx_init_chunky::gfxbCpuBank#4 )
|
|
gfx_init_chunky::gfxbCpuBank#2 = ++ gfx_init_chunky::gfxbCpuBank#5
|
|
gfx_init_chunky::gfxb#2 = (char *)$4000
|
|
to:gfx_init_chunky::@3
|
|
gfx_init_chunky::@5: scope:[gfx_init_chunky] from gfx_init_chunky::@3
|
|
gfx_init_chunky::gfxbCpuBank#9 = phi( gfx_init_chunky::@3/gfx_init_chunky::gfxbCpuBank#8 )
|
|
gfx_init_chunky::gfxb#6 = phi( gfx_init_chunky::@3/gfx_init_chunky::gfxb#1 )
|
|
gfx_init_chunky::y#3 = phi( gfx_init_chunky::@3/gfx_init_chunky::y#2 )
|
|
gfx_init_chunky::y#1 = gfx_init_chunky::y#3 + rangenext(0,$32)
|
|
gfx_init_chunky::$7 = gfx_init_chunky::y#1 != rangelast(0,$32)
|
|
if(gfx_init_chunky::$7) goto gfx_init_chunky::@1
|
|
to:gfx_init_chunky::@6
|
|
gfx_init_chunky::@6: scope:[gfx_init_chunky] from gfx_init_chunky::@5
|
|
dtvSetCpuBankSegment1::cpuBankIdx#2 = (char)$4000/$4000
|
|
call dtvSetCpuBankSegment1
|
|
to:gfx_init_chunky::@9
|
|
gfx_init_chunky::@9: scope:[gfx_init_chunky] from gfx_init_chunky::@6
|
|
to:gfx_init_chunky::@return
|
|
gfx_init_chunky::@return: scope:[gfx_init_chunky] from gfx_init_chunky::@9
|
|
return
|
|
to:@return
|
|
|
|
void __start()
|
|
__start: scope:[__start] from
|
|
to:__start::__init1
|
|
__start::__init1: scope:[__start] from __start
|
|
to:__start::@1
|
|
__start::@1: scope:[__start] from __start::__init1
|
|
call main
|
|
to:__start::@2
|
|
__start::@2: scope:[__start] from __start::@1
|
|
to:__start::@return
|
|
__start::@return: scope:[__start] from __start::@2
|
|
return
|
|
to:@return
|
|
|
|
SYMBOL TABLE SSA
|
|
__constant char * const BORDER_COLOR = (char *)$d020
|
|
__constant char * const CHUNKY = (char *)$8000
|
|
__constant struct MOS6526_CIA * const CIA2 = (struct MOS6526_CIA *)$dd00
|
|
__constant const char DTV_BADLINE_OFF = $20
|
|
__constant const char DTV_CHUNKY = $40
|
|
__constant const char DTV_COLORRAM_OFF = $10
|
|
__constant char * const DTV_CONTROL = (char *)$d03c
|
|
__constant char * const DTV_FEATURE = (char *)$d03f
|
|
__constant const char DTV_FEATURE_ENABLE = 1
|
|
__constant const char DTV_HIGHCOLOR = 4
|
|
__constant const char DTV_LINEAR = 1
|
|
__constant char * const DTV_PALETTE = (char *)$d200
|
|
__constant char * const DTV_PLANEB_MODULO_HI = (char *)$d048
|
|
__constant char * const DTV_PLANEB_MODULO_LO = (char *)$d047
|
|
__constant char * const DTV_PLANEB_START_HI = (char *)$d04b
|
|
__constant char * const DTV_PLANEB_START_LO = (char *)$d049
|
|
__constant char * const DTV_PLANEB_START_MI = (char *)$d04a
|
|
__constant char * const DTV_PLANEB_STEP = (char *)$d04c
|
|
__constant char OFFSET_STRUCT_MOS6526_CIA_PORT_A = 0
|
|
__constant char OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
|
|
__constant char * const PROCPORT = (char *)1
|
|
__constant char * const PROCPORT_DDR = (char *)0
|
|
__constant const char PROCPORT_DDR_MEMORY_MASK = 7
|
|
__constant const char PROCPORT_RAM_IO = 5
|
|
__constant char * const RASTER = (char *)$d012
|
|
__constant char * const VICII_CONTROL1 = (char *)$d011
|
|
__constant char * const VICII_CONTROL2 = (char *)$d016
|
|
__constant const char VICII_CSEL = 8
|
|
__constant const char VICII_DEN = $10
|
|
__constant const char VICII_ECM = $40
|
|
__constant const char VICII_MCM = $10
|
|
__constant char * const VICII_MEMORY = (char *)$d018
|
|
__constant const char VICII_RSEL = 8
|
|
void __start()
|
|
void dtvSetCpuBankSegment1(char cpuBankIdx)
|
|
__constant char *dtvSetCpuBankSegment1::cpuBank = (char *)$ff
|
|
char dtvSetCpuBankSegment1::cpuBankIdx
|
|
char dtvSetCpuBankSegment1::cpuBankIdx#0
|
|
char dtvSetCpuBankSegment1::cpuBankIdx#1
|
|
char dtvSetCpuBankSegment1::cpuBankIdx#2
|
|
char dtvSetCpuBankSegment1::cpuBankIdx#3
|
|
void gfx_init_chunky()
|
|
bool gfx_init_chunky::$2
|
|
bool gfx_init_chunky::$3
|
|
unsigned int gfx_init_chunky::$5
|
|
bool gfx_init_chunky::$6
|
|
bool gfx_init_chunky::$7
|
|
char gfx_init_chunky::c
|
|
char gfx_init_chunky::c#0
|
|
char *gfx_init_chunky::gfxb
|
|
char *gfx_init_chunky::gfxb#0
|
|
char *gfx_init_chunky::gfxb#1
|
|
char *gfx_init_chunky::gfxb#2
|
|
char *gfx_init_chunky::gfxb#3
|
|
char *gfx_init_chunky::gfxb#4
|
|
char *gfx_init_chunky::gfxb#5
|
|
char *gfx_init_chunky::gfxb#6
|
|
char gfx_init_chunky::gfxbCpuBank
|
|
char gfx_init_chunky::gfxbCpuBank#0
|
|
char gfx_init_chunky::gfxbCpuBank#1
|
|
char gfx_init_chunky::gfxbCpuBank#2
|
|
char gfx_init_chunky::gfxbCpuBank#3
|
|
char gfx_init_chunky::gfxbCpuBank#4
|
|
char gfx_init_chunky::gfxbCpuBank#5
|
|
char gfx_init_chunky::gfxbCpuBank#6
|
|
char gfx_init_chunky::gfxbCpuBank#7
|
|
char gfx_init_chunky::gfxbCpuBank#8
|
|
char gfx_init_chunky::gfxbCpuBank#9
|
|
unsigned int gfx_init_chunky::x
|
|
unsigned int gfx_init_chunky::x#0
|
|
unsigned int gfx_init_chunky::x#1
|
|
unsigned int gfx_init_chunky::x#2
|
|
unsigned int gfx_init_chunky::x#3
|
|
unsigned int gfx_init_chunky::x#4
|
|
unsigned int gfx_init_chunky::x#5
|
|
char gfx_init_chunky::y
|
|
char gfx_init_chunky::y#0
|
|
char gfx_init_chunky::y#1
|
|
char gfx_init_chunky::y#2
|
|
char gfx_init_chunky::y#3
|
|
char gfx_init_chunky::y#4
|
|
char gfx_init_chunky::y#5
|
|
char gfx_init_chunky::y#6
|
|
char gfx_init_chunky::y#7
|
|
void main()
|
|
bool main::$1
|
|
bool main::$2
|
|
number main::$3
|
|
number main::$4
|
|
number main::$5
|
|
bool main::$6
|
|
char main::j
|
|
char main::j#0
|
|
char main::j#1
|
|
char main::j#2
|
|
char main::rst
|
|
char main::rst#0
|
|
char main::rst#1
|
|
char main::rst#2
|
|
|
|
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
Adding number conversion cast (unumber) 3 in *VICII_CONTROL1 = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
Adding number conversion cast (unumber) 0 in *DTV_PLANEB_START_HI = 0
|
|
Adding number conversion cast (unumber) 8 in *DTV_PLANEB_STEP = 8
|
|
Adding number conversion cast (unumber) 0 in *DTV_PLANEB_MODULO_LO = 0
|
|
Adding number conversion cast (unumber) 0 in *DTV_PLANEB_MODULO_HI = 0
|
|
Adding number conversion cast (unumber) 3 in *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
|
|
Adding number conversion cast (unumber) 3^(char)(unsigned int)CHUNKY/$4000 in *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(char)(unsigned int)CHUNKY/$4000
|
|
Adding number conversion cast (unumber) 3 in *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) 3^(char)(unsigned int)CHUNKY/$4000
|
|
Adding number conversion cast (unumber) $4000 in *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = ((unumber)) (unumber)3^(char)(unsigned int)CHUNKY/$4000
|
|
Adding number conversion cast (unumber) (char)(unsigned int)CHUNKY&$3fff/$40|byte1 (unsigned int)CHUNKY&$3fff/4 in *VICII_MEMORY = (char)(unsigned int)CHUNKY&$3fff/$40|byte1 (unsigned int)CHUNKY&$3fff/4
|
|
Adding number conversion cast (unumber) byte1 (unsigned int)CHUNKY&$3fff/4 in *VICII_MEMORY = ((unumber)) (char)(unsigned int)CHUNKY&$3fff/$40|byte1 (unsigned int)CHUNKY&$3fff/4
|
|
Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (char)(unsigned int)CHUNKY&$3fff/$40|(unumber)byte1 (unsigned int)CHUNKY&$3fff/4
|
|
Adding number conversion cast (unumber) 4 in *VICII_MEMORY = ((unumber)) (char)(unsigned int)CHUNKY&(unumber)$3fff/$40|(unumber)byte1 (unsigned int)CHUNKY&$3fff/4
|
|
Adding number conversion cast (unumber) $3fff in *VICII_MEMORY = ((unumber)) (char)(unsigned int)CHUNKY&(unumber)$3fff/$40|(unumber)byte1 (unsigned int)CHUNKY&$3fff/(unumber)4
|
|
Adding number conversion cast (unumber) VICII_DEN|VICII_ECM|VICII_RSEL|3 in *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
Adding number conversion cast (unumber) 3 in *VICII_CONTROL1 = ((unumber)) VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
Adding number conversion cast (unumber) 0 in *BORDER_COLOR = 0
|
|
Adding number conversion cast (unumber) 7 in main::$3 = main::rst#1 & 7
|
|
Adding number conversion cast (unumber) main::$3 in main::$3 = main::rst#1 & (unumber)7
|
|
Adding number conversion cast (unumber) main::$4 in main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
|
|
Adding number conversion cast (unumber) $10 in main::$5 = main::rst#1 * $10
|
|
Adding number conversion cast (unumber) main::$5 in main::$5 = main::rst#1 * (unumber)$10
|
|
Adding number conversion cast (unumber) $f2 in main::$6 = main::rst#1 != $f2
|
|
Adding number conversion cast (unumber) $4000 in gfx_init_chunky::gfxbCpuBank#0 = (char)CHUNKY/$4000
|
|
Adding number conversion cast (unumber) $8000 in gfx_init_chunky::$2 = gfx_init_chunky::gfxb#3 == $8000
|
|
Successful SSA optimization PassNAddNumberTypeConversions
|
|
Adding number conversion cast (unumber) $40 in *VICII_MEMORY = ((unumber)) (char)(unsigned int)CHUNKY&(unumber)$3fff/$40|(unumber)byte1 (unsigned int)CHUNKY&(unumber)$3fff/(unumber)4
|
|
Successful SSA optimization PassNAddNumberTypeConversions
|
|
Inlining cast *VICII_CONTROL1 = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
|
|
Inlining cast *DTV_PLANEB_START_HI = (unumber)0
|
|
Inlining cast *DTV_PLANEB_STEP = (unumber)8
|
|
Inlining cast *DTV_PLANEB_MODULO_LO = (unumber)0
|
|
Inlining cast *DTV_PLANEB_MODULO_HI = (unumber)0
|
|
Inlining cast *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = (unumber)3
|
|
Inlining cast *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = (unumber)(unumber)3^(char)(unsigned int)CHUNKY/(unumber)$4000
|
|
Inlining cast *VICII_MEMORY = (unumber)(char)(unsigned int)CHUNKY&(unumber)$3fff/(unumber)$40|(unumber)byte1 (unsigned int)CHUNKY&(unumber)$3fff/(unumber)4
|
|
Inlining cast *VICII_CONTROL1 = (unumber)VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
|
|
Inlining cast *BORDER_COLOR = (unumber)0
|
|
Successful SSA optimization Pass2InlineCast
|
|
Simplifying constant pointer cast (char *) 53266
|
|
Simplifying constant pointer cast (char *) 53280
|
|
Simplifying constant pointer cast (char *) 53265
|
|
Simplifying constant pointer cast (char *) 53270
|
|
Simplifying constant pointer cast (char *) 53272
|
|
Simplifying constant pointer cast (char *) 0
|
|
Simplifying constant pointer cast (char *) 1
|
|
Simplifying constant pointer cast (struct MOS6526_CIA *) 56576
|
|
Simplifying constant pointer cast (char *) 53311
|
|
Simplifying constant pointer cast (char *) 53308
|
|
Simplifying constant pointer cast (char *) 53760
|
|
Simplifying constant pointer cast (char *) 53321
|
|
Simplifying constant pointer cast (char *) 53322
|
|
Simplifying constant pointer cast (char *) 53323
|
|
Simplifying constant pointer cast (char *) 53324
|
|
Simplifying constant pointer cast (char *) 53319
|
|
Simplifying constant pointer cast (char *) 53320
|
|
Simplifying constant pointer cast (char *) 255
|
|
Simplifying constant pointer cast (char *) 32768
|
|
Simplifying constant integer cast VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
|
|
Simplifying constant integer cast 3
|
|
Simplifying constant integer cast 0
|
|
Simplifying constant integer cast 8
|
|
Simplifying constant integer cast 0
|
|
Simplifying constant integer cast 0
|
|
Simplifying constant integer cast 3
|
|
Simplifying constant integer cast (unumber)3^(char)(unsigned int)CHUNKY/(unumber)$4000
|
|
Simplifying constant integer cast 3
|
|
Simplifying constant integer cast $4000
|
|
Simplifying constant integer cast (char)(unsigned int)CHUNKY&(unumber)$3fff/(unumber)$40|(unumber)byte1 (unsigned int)CHUNKY&(unumber)$3fff/(unumber)4
|
|
Simplifying constant integer cast $3fff
|
|
Simplifying constant integer cast $40
|
|
Simplifying constant integer cast byte1 (unsigned int)CHUNKY&(unumber)$3fff/(unumber)4
|
|
Simplifying constant integer cast $3fff
|
|
Simplifying constant integer cast 4
|
|
Simplifying constant integer cast VICII_DEN|VICII_ECM|VICII_RSEL|(unumber)3
|
|
Simplifying constant integer cast 3
|
|
Simplifying constant integer cast 0
|
|
Simplifying constant integer cast 7
|
|
Simplifying constant integer cast $10
|
|
Simplifying constant integer cast $f2
|
|
Simplifying constant integer cast $4000
|
|
Simplifying constant pointer cast (char *) 16384
|
|
Simplifying constant integer cast $8000
|
|
Simplifying constant pointer cast (char *) 16384
|
|
Successful SSA optimization PassNCastSimplification
|
|
Finalized unsigned number type (char) 3
|
|
Finalized unsigned number type (char) 0
|
|
Finalized unsigned number type (char) 8
|
|
Finalized unsigned number type (char) 0
|
|
Finalized unsigned number type (char) 0
|
|
Finalized unsigned number type (char) 3
|
|
Finalized unsigned number type (char) 3
|
|
Finalized unsigned number type (unsigned int) $4000
|
|
Finalized unsigned number type (unsigned int) $3fff
|
|
Finalized unsigned number type (char) $40
|
|
Finalized unsigned number type (unsigned int) $3fff
|
|
Finalized unsigned number type (char) 4
|
|
Finalized unsigned number type (char) 3
|
|
Finalized unsigned number type (char) 0
|
|
Finalized unsigned number type (char) 7
|
|
Finalized unsigned number type (char) $10
|
|
Finalized unsigned number type (char) $f2
|
|
Finalized unsigned number type (unsigned int) $4000
|
|
Finalized unsigned number type (unsigned int) $8000
|
|
Successful SSA optimization PassNFinalizeNumberTypeConversions
|
|
Inferred type updated to char in main::$3 = main::rst#1 & 7
|
|
Inferred type updated to char in main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
|
|
Inferred type updated to char in main::$5 = main::rst#1 * $10
|
|
Inversing boolean not [57] gfx_init_chunky::$3 = gfx_init_chunky::gfxb#3 != $8000 from [56] gfx_init_chunky::$2 = gfx_init_chunky::gfxb#3 == $8000
|
|
Successful SSA optimization Pass2UnaryNotSimplification
|
|
Alias gfx_init_chunky::gfxbCpuBank#0 = gfx_init_chunky::gfxbCpuBank#3
|
|
Alias gfx_init_chunky::gfxbCpuBank#4 = gfx_init_chunky::gfxbCpuBank#6 gfx_init_chunky::gfxbCpuBank#5
|
|
Alias gfx_init_chunky::x#3 = gfx_init_chunky::x#5 gfx_init_chunky::x#4
|
|
Alias gfx_init_chunky::y#4 = gfx_init_chunky::y#7 gfx_init_chunky::y#5
|
|
Alias gfx_init_chunky::y#2 = gfx_init_chunky::y#3
|
|
Alias gfx_init_chunky::gfxb#1 = gfx_init_chunky::gfxb#6
|
|
Alias gfx_init_chunky::gfxbCpuBank#8 = gfx_init_chunky::gfxbCpuBank#9
|
|
Successful SSA optimization Pass2AliasElimination
|
|
Alias gfx_init_chunky::x#2 = gfx_init_chunky::x#3
|
|
Alias gfx_init_chunky::y#2 = gfx_init_chunky::y#4
|
|
Successful SSA optimization Pass2AliasElimination
|
|
Identical Phi Values main::rst#2 main::rst#0
|
|
Identical Phi Values gfx_init_chunky::y#2 gfx_init_chunky::y#6
|
|
Successful SSA optimization Pass2IdenticalPhiElimination
|
|
Simple Condition main::$1 [26] if(main::j#1!=rangelast(0,$f)) goto main::@1
|
|
Simple Condition main::$2 [34] if(*RASTER!=main::rst#0) goto main::@4
|
|
Simple Condition main::$6 [44] if(main::rst#1!=$f2) goto main::@6
|
|
Simple Condition gfx_init_chunky::$3 [56] if(gfx_init_chunky::gfxb#3!=$8000) goto gfx_init_chunky::@3
|
|
Simple Condition gfx_init_chunky::$6 [64] if(gfx_init_chunky::x#1!=rangelast(0,$13f)) goto gfx_init_chunky::@2
|
|
Simple Condition gfx_init_chunky::$7 [71] if(gfx_init_chunky::y#1!=rangelast(0,$32)) goto gfx_init_chunky::@1
|
|
Successful SSA optimization Pass2ConditionalJumpSimplification
|
|
Constant main::j#0 = 0
|
|
Constant main::rst#0 = $42
|
|
Constant gfx_init_chunky::gfxbCpuBank#0 = (char)CHUNKY/$4000
|
|
Constant gfx_init_chunky::gfxb#0 = (char *) 16384
|
|
Constant gfx_init_chunky::y#0 = 0
|
|
Constant gfx_init_chunky::x#0 = 0
|
|
Constant gfx_init_chunky::gfxb#2 = (char *) 16384
|
|
Constant dtvSetCpuBankSegment1::cpuBankIdx#2 = (char)$4000/$4000
|
|
Successful SSA optimization Pass2ConstantIdentification
|
|
Constant dtvSetCpuBankSegment1::cpuBankIdx#0 = gfx_init_chunky::gfxbCpuBank#0
|
|
Successful SSA optimization Pass2ConstantIdentification
|
|
if() condition always true - replacing block destination [27] if(true) goto main::@3
|
|
Successful SSA optimization Pass2ConstantIfs
|
|
Resolved ranged next value [24] main::j#1 = ++ main::j#2 to ++
|
|
Resolved ranged comparison value [26] if(main::j#1!=rangelast(0,$f)) goto main::@1 to $10
|
|
Resolved ranged next value [62] gfx_init_chunky::x#1 = ++ gfx_init_chunky::x#2 to ++
|
|
Resolved ranged comparison value [64] if(gfx_init_chunky::x#1!=rangelast(0,$13f)) goto gfx_init_chunky::@2 to $140
|
|
Resolved ranged next value [69] gfx_init_chunky::y#1 = ++ gfx_init_chunky::y#6 to ++
|
|
Resolved ranged comparison value [71] if(gfx_init_chunky::y#1!=rangelast(0,$32)) goto gfx_init_chunky::@1 to $33
|
|
Simplifying constant evaluating to zero byte0 CHUNKY in [12] *DTV_PLANEB_START_LO = byte0 CHUNKY
|
|
Simplifying constant evaluating to zero (char)(unsigned int)CHUNKY&$3fff/$40|byte1 (unsigned int)CHUNKY&$3fff/4 in [20] *VICII_MEMORY = (char)(unsigned int)CHUNKY&$3fff/$40|byte1 (unsigned int)CHUNKY&$3fff/4
|
|
Successful SSA optimization PassNSimplifyConstantZero
|
|
Simplifying expression containing zero (char *)CIA2 in [19] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A) = 3^(char)(unsigned int)CHUNKY/$4000
|
|
Successful SSA optimization PassNSimplifyExpressionWithZero
|
|
Removing unused block main::@return
|
|
Successful SSA optimization Pass2EliminateUnusedBlocks
|
|
Eliminating unused constant OFFSET_STRUCT_MOS6526_CIA_PORT_A
|
|
Successful SSA optimization PassNEliminateUnusedVars
|
|
Removing unused procedure __start
|
|
Removing unused procedure block __start
|
|
Removing unused procedure block __start::__init1
|
|
Removing unused procedure block __start::@1
|
|
Removing unused procedure block __start::@2
|
|
Removing unused procedure block __start::@return
|
|
Successful SSA optimization PassNEliminateEmptyStart
|
|
Adding number conversion cast (unumber) $10 in [24] if(main::j#1!=$10) goto main::@1
|
|
Adding number conversion cast (unumber) $140 in [49] if(gfx_init_chunky::x#1!=$140) goto gfx_init_chunky::@2
|
|
Adding number conversion cast (unumber) $33 in [54] if(gfx_init_chunky::y#1!=$33) goto gfx_init_chunky::@1
|
|
Successful SSA optimization PassNAddNumberTypeConversions
|
|
Simplifying constant integer cast $10
|
|
Simplifying constant integer cast $140
|
|
Simplifying constant integer cast $33
|
|
Successful SSA optimization PassNCastSimplification
|
|
Finalized unsigned number type (char) $10
|
|
Finalized unsigned number type (unsigned int) $140
|
|
Finalized unsigned number type (char) $33
|
|
Successful SSA optimization PassNFinalizeNumberTypeConversions
|
|
Constant right-side identified [39] gfx_init_chunky::gfxbCpuBank#1 = ++ gfx_init_chunky::gfxbCpuBank#0
|
|
Successful SSA optimization Pass2ConstantRValueConsolidation
|
|
Constant gfx_init_chunky::gfxbCpuBank#1 = ++gfx_init_chunky::gfxbCpuBank#0
|
|
Successful SSA optimization Pass2ConstantIdentification
|
|
Rewriting multiplication to use shift [34] main::$5 = main::rst#1 * $10
|
|
Successful SSA optimization Pass2MultiplyToShiftRewriting
|
|
Inlining constant with var siblings dtvSetCpuBankSegment1::cpuBankIdx#2
|
|
Inlining constant with var siblings dtvSetCpuBankSegment1::cpuBankIdx#0
|
|
Inlining constant with var siblings main::j#0
|
|
Inlining constant with var siblings main::rst#0
|
|
Inlining constant with var siblings gfx_init_chunky::gfxbCpuBank#0
|
|
Inlining constant with var siblings gfx_init_chunky::gfxb#0
|
|
Inlining constant with var siblings gfx_init_chunky::y#0
|
|
Inlining constant with var siblings gfx_init_chunky::x#0
|
|
Inlining constant with var siblings gfx_init_chunky::gfxb#2
|
|
Inlining constant with var siblings gfx_init_chunky::gfxbCpuBank#1
|
|
Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#0 = (char)CHUNKY/$4000
|
|
Constant inlined main::rst#0 = $42
|
|
Constant inlined dtvSetCpuBankSegment1::cpuBankIdx#2 = (char)$4000/$4000
|
|
Constant inlined gfx_init_chunky::gfxbCpuBank#1 = ++(char)CHUNKY/$4000
|
|
Constant inlined gfx_init_chunky::y#0 = 0
|
|
Constant inlined main::j#0 = 0
|
|
Constant inlined gfx_init_chunky::x#0 = 0
|
|
Constant inlined gfx_init_chunky::gfxb#2 = (char *) 16384
|
|
Constant inlined gfx_init_chunky::gfxb#0 = (char *) 16384
|
|
Constant inlined gfx_init_chunky::gfxbCpuBank#0 = (char)CHUNKY/$4000
|
|
Successful SSA optimization Pass2ConstantInlining
|
|
Finalized unsigned number type (unsigned int) $4000
|
|
Finalized unsigned number type (unsigned int) $4000
|
|
Successful SSA optimization PassNFinalizeNumberTypeConversions
|
|
Added new block during phi lifting main::@8(between main::@1 and main::@1)
|
|
Added new block during phi lifting gfx_init_chunky::@10(between gfx_init_chunky::@5 and gfx_init_chunky::@1)
|
|
Added new block during phi lifting gfx_init_chunky::@11(between gfx_init_chunky::@3 and gfx_init_chunky::@2)
|
|
Added new block during phi lifting gfx_init_chunky::@12(between gfx_init_chunky::@2 and gfx_init_chunky::@3)
|
|
Adding NOP phi() at start of main::@2
|
|
Adding NOP phi() at start of gfx_init_chunky
|
|
Adding NOP phi() at start of gfx_init_chunky::@7
|
|
Adding NOP phi() at start of gfx_init_chunky::@6
|
|
Adding NOP phi() at start of gfx_init_chunky::@9
|
|
CALL GRAPH
|
|
Calls in [main] to gfx_init_chunky:3
|
|
Calls in [gfx_init_chunky] to dtvSetCpuBankSegment1:37 dtvSetCpuBankSegment1:46 dtvSetCpuBankSegment1:59
|
|
|
|
Created 10 initial phi equivalence classes
|
|
Coalesced [35] main::j#3 = main::j#1
|
|
Coalesced [40] gfx_init_chunky::gfxb#8 = gfx_init_chunky::gfxb#5
|
|
Coalesced [41] gfx_init_chunky::gfxbCpuBank#11 = gfx_init_chunky::gfxbCpuBank#7
|
|
Coalesced [45] dtvSetCpuBankSegment1::cpuBankIdx#4 = dtvSetCpuBankSegment1::cpuBankIdx#1
|
|
Coalesced [48] gfx_init_chunky::gfxbCpuBank#14 = gfx_init_chunky::gfxbCpuBank#2
|
|
Coalesced [62] gfx_init_chunky::gfxb#7 = gfx_init_chunky::gfxb#1
|
|
Coalesced [63] gfx_init_chunky::y#8 = gfx_init_chunky::y#1
|
|
Coalesced [64] gfx_init_chunky::gfxbCpuBank#10 = gfx_init_chunky::gfxbCpuBank#8
|
|
Coalesced (already) [65] gfx_init_chunky::gfxb#9 = gfx_init_chunky::gfxb#1
|
|
Coalesced [66] gfx_init_chunky::x#6 = gfx_init_chunky::x#1
|
|
Coalesced (already) [67] gfx_init_chunky::gfxbCpuBank#12 = gfx_init_chunky::gfxbCpuBank#8
|
|
Coalesced [68] gfx_init_chunky::gfxb#10 = gfx_init_chunky::gfxb#3
|
|
Coalesced (already) [69] gfx_init_chunky::gfxbCpuBank#13 = gfx_init_chunky::gfxbCpuBank#4
|
|
Coalesced down to 6 phi equivalence classes
|
|
Culled Empty Block label main::@2
|
|
Culled Empty Block label main::@8
|
|
Culled Empty Block label gfx_init_chunky::@7
|
|
Culled Empty Block label gfx_init_chunky::@9
|
|
Culled Empty Block label gfx_init_chunky::@10
|
|
Culled Empty Block label gfx_init_chunky::@11
|
|
Culled Empty Block label gfx_init_chunky::@12
|
|
Renumbering block main::@3 to main::@2
|
|
Renumbering block main::@4 to main::@3
|
|
Renumbering block main::@5 to main::@4
|
|
Renumbering block main::@6 to main::@5
|
|
Renumbering block main::@7 to main::@6
|
|
Renumbering block gfx_init_chunky::@8 to gfx_init_chunky::@7
|
|
Adding NOP phi() at start of gfx_init_chunky
|
|
Adding NOP phi() at start of gfx_init_chunky::@6
|
|
|
|
FINAL CONTROL FLOW GRAPH
|
|
|
|
void main()
|
|
main: scope:[main] from
|
|
asm { sei }
|
|
[1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
|
[2] *PROCPORT = PROCPORT_RAM_IO
|
|
[3] call gfx_init_chunky
|
|
to:main::@6
|
|
main::@6: scope:[main] from main
|
|
[4] *DTV_FEATURE = DTV_FEATURE_ENABLE
|
|
[5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
|
|
[6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
[7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL
|
|
[8] *DTV_PLANEB_START_LO = 0
|
|
[9] *DTV_PLANEB_START_MI = byte1 CHUNKY
|
|
[10] *DTV_PLANEB_START_HI = 0
|
|
[11] *DTV_PLANEB_STEP = 8
|
|
[12] *DTV_PLANEB_MODULO_LO = 0
|
|
[13] *DTV_PLANEB_MODULO_HI = 0
|
|
[14] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3
|
|
[15] *((char *)CIA2) = 3^(char)(unsigned int)CHUNKY/$4000
|
|
[16] *VICII_MEMORY = 0
|
|
to:main::@1
|
|
main::@1: scope:[main] from main::@1 main::@6
|
|
[17] main::j#2 = phi( main::@1/main::j#1, main::@6/0 )
|
|
[18] DTV_PALETTE[main::j#2] = main::j#2
|
|
[19] main::j#1 = ++ main::j#2
|
|
[20] if(main::j#1!=$10) goto main::@1
|
|
to:main::@2
|
|
main::@2: scope:[main] from main::@1 main::@5
|
|
asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
|
|
[22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
[23] *BORDER_COLOR = 0
|
|
to:main::@3
|
|
main::@3: scope:[main] from main::@2 main::@3
|
|
[24] if(*RASTER!=$42) goto main::@3
|
|
to:main::@4
|
|
main::@4: scope:[main] from main::@3
|
|
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
|
to:main::@5
|
|
main::@5: scope:[main] from main::@4 main::@5
|
|
[26] main::rst#1 = *RASTER
|
|
[27] main::$3 = main::rst#1 & 7
|
|
[28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3
|
|
[29] *VICII_CONTROL1 = main::$4
|
|
[30] main::$5 = main::rst#1 << 4
|
|
[31] *BORDER_COLOR = main::$5
|
|
asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
|
[33] if(main::rst#1!=$f2) goto main::@5
|
|
to:main::@2
|
|
|
|
void gfx_init_chunky()
|
|
gfx_init_chunky: scope:[gfx_init_chunky] from main
|
|
[34] phi()
|
|
[35] call dtvSetCpuBankSegment1
|
|
to:gfx_init_chunky::@1
|
|
gfx_init_chunky::@1: scope:[gfx_init_chunky] from gfx_init_chunky gfx_init_chunky::@5
|
|
[36] gfx_init_chunky::gfxbCpuBank#7 = phi( gfx_init_chunky::@5/gfx_init_chunky::gfxbCpuBank#8, gfx_init_chunky/++(char)CHUNKY/$4000 )
|
|
[36] gfx_init_chunky::y#6 = phi( gfx_init_chunky::@5/gfx_init_chunky::y#1, gfx_init_chunky/0 )
|
|
[36] gfx_init_chunky::gfxb#5 = phi( gfx_init_chunky::@5/gfx_init_chunky::gfxb#1, gfx_init_chunky/(char *) 16384 )
|
|
to:gfx_init_chunky::@2
|
|
gfx_init_chunky::@2: scope:[gfx_init_chunky] from gfx_init_chunky::@1 gfx_init_chunky::@3
|
|
[37] gfx_init_chunky::gfxbCpuBank#4 = phi( gfx_init_chunky::@1/gfx_init_chunky::gfxbCpuBank#7, gfx_init_chunky::@3/gfx_init_chunky::gfxbCpuBank#8 )
|
|
[37] gfx_init_chunky::x#2 = phi( gfx_init_chunky::@1/0, gfx_init_chunky::@3/gfx_init_chunky::x#1 )
|
|
[37] gfx_init_chunky::gfxb#3 = phi( gfx_init_chunky::@1/gfx_init_chunky::gfxb#5, gfx_init_chunky::@3/gfx_init_chunky::gfxb#1 )
|
|
[38] if(gfx_init_chunky::gfxb#3!=$8000) goto gfx_init_chunky::@3
|
|
to:gfx_init_chunky::@4
|
|
gfx_init_chunky::@4: scope:[gfx_init_chunky] from gfx_init_chunky::@2
|
|
[39] dtvSetCpuBankSegment1::cpuBankIdx#1 = gfx_init_chunky::gfxbCpuBank#4
|
|
[40] call dtvSetCpuBankSegment1
|
|
to:gfx_init_chunky::@7
|
|
gfx_init_chunky::@7: scope:[gfx_init_chunky] from gfx_init_chunky::@4
|
|
[41] gfx_init_chunky::gfxbCpuBank#2 = ++ gfx_init_chunky::gfxbCpuBank#4
|
|
to:gfx_init_chunky::@3
|
|
gfx_init_chunky::@3: scope:[gfx_init_chunky] from gfx_init_chunky::@2 gfx_init_chunky::@7
|
|
[42] gfx_init_chunky::gfxbCpuBank#8 = phi( gfx_init_chunky::@2/gfx_init_chunky::gfxbCpuBank#4, gfx_init_chunky::@7/gfx_init_chunky::gfxbCpuBank#2 )
|
|
[42] gfx_init_chunky::gfxb#4 = phi( gfx_init_chunky::@2/gfx_init_chunky::gfxb#3, gfx_init_chunky::@7/(char *) 16384 )
|
|
[43] gfx_init_chunky::$5 = gfx_init_chunky::x#2 + gfx_init_chunky::y#6
|
|
[44] gfx_init_chunky::c#0 = (char)gfx_init_chunky::$5
|
|
[45] *gfx_init_chunky::gfxb#4 = gfx_init_chunky::c#0
|
|
[46] gfx_init_chunky::gfxb#1 = ++ gfx_init_chunky::gfxb#4
|
|
[47] gfx_init_chunky::x#1 = ++ gfx_init_chunky::x#2
|
|
[48] if(gfx_init_chunky::x#1!=$140) goto gfx_init_chunky::@2
|
|
to:gfx_init_chunky::@5
|
|
gfx_init_chunky::@5: scope:[gfx_init_chunky] from gfx_init_chunky::@3
|
|
[49] gfx_init_chunky::y#1 = ++ gfx_init_chunky::y#6
|
|
[50] if(gfx_init_chunky::y#1!=$33) goto gfx_init_chunky::@1
|
|
to:gfx_init_chunky::@6
|
|
gfx_init_chunky::@6: scope:[gfx_init_chunky] from gfx_init_chunky::@5
|
|
[51] phi()
|
|
[52] call dtvSetCpuBankSegment1
|
|
to:gfx_init_chunky::@return
|
|
gfx_init_chunky::@return: scope:[gfx_init_chunky] from gfx_init_chunky::@6
|
|
[53] return
|
|
to:@return
|
|
|
|
void dtvSetCpuBankSegment1(char cpuBankIdx)
|
|
dtvSetCpuBankSegment1: scope:[dtvSetCpuBankSegment1] from gfx_init_chunky gfx_init_chunky::@4 gfx_init_chunky::@6
|
|
[54] dtvSetCpuBankSegment1::cpuBankIdx#3 = phi( gfx_init_chunky/(char)CHUNKY/$4000, gfx_init_chunky::@4/dtvSetCpuBankSegment1::cpuBankIdx#1, gfx_init_chunky::@6/(char)$4000/$4000 )
|
|
[55] *dtvSetCpuBankSegment1::cpuBank = dtvSetCpuBankSegment1::cpuBankIdx#3
|
|
asm { .byte$32,$dd lda$ff .byte$32,$00 }
|
|
to:dtvSetCpuBankSegment1::@return
|
|
dtvSetCpuBankSegment1::@return: scope:[dtvSetCpuBankSegment1] from dtvSetCpuBankSegment1
|
|
[57] return
|
|
to:@return
|
|
|
|
|
|
VARIABLE REGISTER WEIGHTS
|
|
void dtvSetCpuBankSegment1(char cpuBankIdx)
|
|
char dtvSetCpuBankSegment1::cpuBankIdx
|
|
char dtvSetCpuBankSegment1::cpuBankIdx#1 // 2002.0
|
|
char dtvSetCpuBankSegment1::cpuBankIdx#3 // 11002.0
|
|
void gfx_init_chunky()
|
|
unsigned int gfx_init_chunky::$5 // 1001.0
|
|
char gfx_init_chunky::c
|
|
char gfx_init_chunky::c#0 // 2002.0
|
|
char *gfx_init_chunky::gfxb
|
|
char *gfx_init_chunky::gfxb#1 // 420.59999999999997
|
|
char *gfx_init_chunky::gfxb#3 // 1552.0
|
|
char *gfx_init_chunky::gfxb#4 // 750.75
|
|
char *gfx_init_chunky::gfxb#5 // 202.0
|
|
char gfx_init_chunky::gfxbCpuBank
|
|
char gfx_init_chunky::gfxbCpuBank#2 // 2002.0
|
|
char gfx_init_chunky::gfxbCpuBank#4 // 1026.25
|
|
char gfx_init_chunky::gfxbCpuBank#7 // 202.0
|
|
char gfx_init_chunky::gfxbCpuBank#8 // 344.8888888888889
|
|
unsigned int gfx_init_chunky::x
|
|
unsigned int gfx_init_chunky::x#1 // 1501.5
|
|
unsigned int gfx_init_chunky::x#2 // 300.29999999999995
|
|
char gfx_init_chunky::y
|
|
char gfx_init_chunky::y#1 // 151.5
|
|
char gfx_init_chunky::y#6 // 92.53846153846155
|
|
void main()
|
|
char main::$3 // 202.0
|
|
char main::$4 // 202.0
|
|
char main::$5 // 202.0
|
|
char main::j
|
|
char main::j#1 // 16.5
|
|
char main::j#2 // 22.0
|
|
char main::rst
|
|
char main::rst#1 // 57.714285714285715
|
|
|
|
Initial phi equivalence classes
|
|
[ main::j#2 main::j#1 ]
|
|
[ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
[ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
|
|
[ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
|
[ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
|
[ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
|
Added variable main::rst#1 to live range equivalence class [ main::rst#1 ]
|
|
Added variable main::$3 to live range equivalence class [ main::$3 ]
|
|
Added variable main::$4 to live range equivalence class [ main::$4 ]
|
|
Added variable main::$5 to live range equivalence class [ main::$5 ]
|
|
Added variable gfx_init_chunky::$5 to live range equivalence class [ gfx_init_chunky::$5 ]
|
|
Added variable gfx_init_chunky::c#0 to live range equivalence class [ gfx_init_chunky::c#0 ]
|
|
Complete equivalence classes
|
|
[ main::j#2 main::j#1 ]
|
|
[ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
[ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
|
|
[ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
|
[ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
|
[ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
|
[ main::rst#1 ]
|
|
[ main::$3 ]
|
|
[ main::$4 ]
|
|
[ main::$5 ]
|
|
[ gfx_init_chunky::$5 ]
|
|
[ gfx_init_chunky::c#0 ]
|
|
Allocated zp[1]:2 [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
|
Allocated zp[1]:3 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
|
Allocated zp[2]:4 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
|
Allocated zp[1]:6 [ gfx_init_chunky::c#0 ]
|
|
Allocated zp[2]:7 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
|
|
Allocated zp[2]:9 [ gfx_init_chunky::$5 ]
|
|
Allocated zp[1]:11 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
Allocated zp[1]:12 [ main::$3 ]
|
|
Allocated zp[1]:13 [ main::$4 ]
|
|
Allocated zp[1]:14 [ main::$5 ]
|
|
Allocated zp[1]:15 [ main::rst#1 ]
|
|
Allocated zp[1]:16 [ main::j#2 main::j#1 ]
|
|
REGISTER UPLIFT POTENTIAL REGISTERS
|
|
Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [8] *DTV_PLANEB_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [9] *DTV_PLANEB_START_MI = byte1 CHUNKY [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [10] *DTV_PLANEB_START_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [11] *DTV_PLANEB_STEP = 8 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [12] *DTV_PLANEB_MODULO_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [13] *DTV_PLANEB_MODULO_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [14] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [15] *((char *)CIA2) = 3^(char)(unsigned int)CHUNKY/$4000 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [16] *VICII_MEMORY = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
|
|
Statement [22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [23] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [24] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a
|
|
Removing always clobbered register reg byte a as potential for zp[1]:15 [ main::rst#1 ]
|
|
Statement [30] main::$5 = main::rst#1 << 4 [ main::rst#1 main::$5 ] ( [ main::rst#1 main::$5 ] { } ) always clobbers reg byte a
|
|
Statement [38] if(gfx_init_chunky::gfxb#3!=$8000) goto gfx_init_chunky::@3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] { } ) always clobbers reg byte a
|
|
Removing always clobbered register reg byte a as potential for zp[1]:11 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
Removing always clobbered register reg byte a as potential for zp[1]:3 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
|
Statement [43] gfx_init_chunky::$5 = gfx_init_chunky::x#2 + gfx_init_chunky::y#6 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] { } ) always clobbers reg byte a
|
|
Statement [45] *gfx_init_chunky::gfxb#4 = gfx_init_chunky::c#0 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] { } ) always clobbers reg byte y
|
|
Removing always clobbered register reg byte y as potential for zp[1]:11 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
Removing always clobbered register reg byte y as potential for zp[1]:3 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
|
Statement [48] if(gfx_init_chunky::x#1!=$140) goto gfx_init_chunky::@2 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] { } ) always clobbers reg byte a
|
|
Statement asm { .byte$32,$dd lda$ff .byte$32,$00 } always clobbers reg byte a
|
|
Statement [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [2] *PROCPORT = PROCPORT_RAM_IO [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [4] *DTV_FEATURE = DTV_FEATURE_ENABLE [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [8] *DTV_PLANEB_START_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [9] *DTV_PLANEB_START_MI = byte1 CHUNKY [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [10] *DTV_PLANEB_START_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [11] *DTV_PLANEB_STEP = 8 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [12] *DTV_PLANEB_MODULO_LO = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [13] *DTV_PLANEB_MODULO_HI = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [14] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [15] *((char *)CIA2) = 3^(char)(unsigned int)CHUNKY/$4000 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [16] *VICII_MEMORY = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize } always clobbers reg byte x
|
|
Statement [22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [23] *BORDER_COLOR = 0 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [24] if(*RASTER!=$42) goto main::@3 [ ] ( [ ] { } ) always clobbers reg byte a
|
|
Statement [27] main::$3 = main::rst#1 & 7 [ main::rst#1 main::$3 ] ( [ main::rst#1 main::$3 ] { } ) always clobbers reg byte a
|
|
Statement [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 [ main::rst#1 main::$4 ] ( [ main::rst#1 main::$4 ] { } ) always clobbers reg byte a
|
|
Statement [30] main::$5 = main::rst#1 << 4 [ main::rst#1 main::$5 ] ( [ main::rst#1 main::$5 ] { } ) always clobbers reg byte a
|
|
Statement [38] if(gfx_init_chunky::gfxb#3!=$8000) goto gfx_init_chunky::@3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#3 gfx_init_chunky::x#2 gfx_init_chunky::gfxbCpuBank#4 ] { } ) always clobbers reg byte a
|
|
Statement [43] gfx_init_chunky::$5 = gfx_init_chunky::x#2 + gfx_init_chunky::y#6 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 gfx_init_chunky::$5 ] { } ) always clobbers reg byte a
|
|
Statement [45] *gfx_init_chunky::gfxb#4 = gfx_init_chunky::c#0 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#2 gfx_init_chunky::gfxb#4 ] { } ) always clobbers reg byte y
|
|
Statement [48] if(gfx_init_chunky::x#1!=$140) goto gfx_init_chunky::@2 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] ( gfx_init_chunky:3 [ gfx_init_chunky::y#6 gfx_init_chunky::gfxb#1 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::x#1 ] { } ) always clobbers reg byte a
|
|
Statement asm { .byte$32,$dd lda$ff .byte$32,$00 } always clobbers reg byte a
|
|
Potential registers zp[1]:16 [ main::j#2 main::j#1 ] : zp[1]:16 , reg byte a , reg byte x , reg byte y ,
|
|
Potential registers zp[1]:11 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ] : zp[1]:11 , reg byte x ,
|
|
Potential registers zp[2]:7 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ] : zp[2]:7 ,
|
|
Potential registers zp[1]:3 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ] : zp[1]:3 , reg byte x ,
|
|
Potential registers zp[2]:4 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ] : zp[2]:4 ,
|
|
Potential registers zp[1]:2 [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ] : zp[1]:2 , reg byte a , reg byte x , reg byte y ,
|
|
Potential registers zp[1]:15 [ main::rst#1 ] : zp[1]:15 , reg byte x , reg byte y ,
|
|
Potential registers zp[1]:12 [ main::$3 ] : zp[1]:12 , reg byte a , reg byte x , reg byte y ,
|
|
Potential registers zp[1]:13 [ main::$4 ] : zp[1]:13 , reg byte a , reg byte x , reg byte y ,
|
|
Potential registers zp[1]:14 [ main::$5 ] : zp[1]:14 , reg byte a , reg byte x , reg byte y ,
|
|
Potential registers zp[2]:9 [ gfx_init_chunky::$5 ] : zp[2]:9 ,
|
|
Potential registers zp[1]:6 [ gfx_init_chunky::c#0 ] : zp[1]:6 , reg byte a , reg byte x , reg byte y ,
|
|
|
|
REGISTER UPLIFT SCOPES
|
|
Uplift Scope [dtvSetCpuBankSegment1] 13,004: zp[1]:2 [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
|
Uplift Scope [gfx_init_chunky] 3,575.14: zp[1]:3 [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ] 2,925.35: zp[2]:4 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ] 2,002: zp[1]:6 [ gfx_init_chunky::c#0 ] 1,801.8: zp[2]:7 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ] 1,001: zp[2]:9 [ gfx_init_chunky::$5 ] 244.04: zp[1]:11 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
Uplift Scope [main] 202: zp[1]:12 [ main::$3 ] 202: zp[1]:13 [ main::$4 ] 202: zp[1]:14 [ main::$5 ] 57.71: zp[1]:15 [ main::rst#1 ] 38.5: zp[1]:16 [ main::j#2 main::j#1 ]
|
|
Uplift Scope [MOS6526_CIA]
|
|
Uplift Scope [MOS6569_VICII]
|
|
Uplift Scope [MOS6581_SID]
|
|
Uplift Scope []
|
|
|
|
Uplifting [dtvSetCpuBankSegment1] best 26156 combination reg byte a [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
|
Uplifting [gfx_init_chunky] best 25126 combination reg byte x [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ] zp[2]:4 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ] reg byte a [ gfx_init_chunky::c#0 ] zp[2]:7 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ] zp[2]:9 [ gfx_init_chunky::$5 ] zp[1]:11 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
Uplifting [main] best 22526 combination reg byte a [ main::$3 ] reg byte a [ main::$4 ] reg byte a [ main::$5 ] reg byte x [ main::rst#1 ] zp[1]:16 [ main::j#2 main::j#1 ]
|
|
Limited combination testing to 100 combinations of 768 possible.
|
|
Uplifting [MOS6526_CIA] best 22526 combination
|
|
Uplifting [MOS6569_VICII] best 22526 combination
|
|
Uplifting [MOS6581_SID] best 22526 combination
|
|
Uplifting [] best 22526 combination
|
|
Attempting to uplift remaining variables inzp[1]:11 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
Uplifting [gfx_init_chunky] best 22526 combination zp[1]:11 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
Attempting to uplift remaining variables inzp[1]:16 [ main::j#2 main::j#1 ]
|
|
Uplifting [main] best 22406 combination reg byte x [ main::j#2 main::j#1 ]
|
|
Allocated (was zp[2]:4) zp[2]:2 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
|
Allocated (was zp[2]:7) zp[2]:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
|
|
Allocated (was zp[2]:9) zp[2]:6 [ gfx_init_chunky::$5 ]
|
|
Allocated (was zp[1]:11) zp[1]:8 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
|
|
ASSEMBLER BEFORE OPTIMIZATION
|
|
// File Comments
|
|
// C64DTV 8bpp charmode stretcher
|
|
/// @file
|
|
/// C64 DTV version 2 Registers and Constants
|
|
///
|
|
/// Sources
|
|
/// (J) https://www.c64-wiki.com/wiki/C64DTV_Programming_Guide
|
|
/// (H) http://dtvhacking.cbm8bit.com/dtv_wiki/images/d/d9/Dtv_registers_full.txt
|
|
// Upstart
|
|
// Commodore 64 PRG executable file
|
|
.file [name="c64dtv-8bppchunkystretch.prg", type="prg", segments="Program"]
|
|
.segmentdef Program [segments="Basic, Code, Data"]
|
|
.segmentdef Basic [start=$0801]
|
|
.segmentdef Code [start=$80d]
|
|
.segmentdef Data [startAfter="Code"]
|
|
.segment Basic
|
|
:BasicUpstart(main)
|
|
// Global Constants & labels
|
|
/// $D011 Control Register #1 Bit#6: ECM Turn Extended Color Mode on/off
|
|
.const VICII_ECM = $40
|
|
/// $D011 Control Register #1 Bit#4: DEN Switch VIC-II output on/off
|
|
.const VICII_DEN = $10
|
|
/// $D011 Control Register #1 Bit#3: RSEL Switch betweem 25 or 24 visible rows
|
|
/// RSEL| Display window height | First line | Last line
|
|
/// ----+--------------------------+-------------+----------
|
|
/// 0 | 24 text lines/192 pixels | 55 ($37) | 246 ($f6)
|
|
/// 1 | 25 text lines/200 pixels | 51 ($33) | 250 ($fa)
|
|
.const VICII_RSEL = 8
|
|
/// $D016 Control register #2 Bit#4: MCM Turn Multicolor Mode on/off
|
|
.const VICII_MCM = $10
|
|
/// $D016 Control register #2 Bit#3: CSEL Switch betweem 40 or 38 visible columns
|
|
/// CSEL| Display window width | First X coo. | Last X coo.
|
|
/// ----+--------------------------+--------------+------------
|
|
/// 0 | 38 characters/304 pixels | 31 ($1f) | 334 ($14e)
|
|
/// 1 | 40 characters/320 pixels | 24 ($18) | 343 ($157)
|
|
.const VICII_CSEL = 8
|
|
/// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
|
.const PROCPORT_DDR_MEMORY_MASK = 7
|
|
/// RAM in 0xA000, 0xE000 I/O in 0xD000
|
|
.const PROCPORT_RAM_IO = 5
|
|
.const DTV_FEATURE_ENABLE = 1
|
|
.const DTV_LINEAR = 1
|
|
.const DTV_HIGHCOLOR = 4
|
|
.const DTV_COLORRAM_OFF = $10
|
|
.const DTV_BADLINE_OFF = $20
|
|
.const DTV_CHUNKY = $40
|
|
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
|
|
/// $D012 RASTER Raster counter
|
|
.label RASTER = $d012
|
|
/// $D020 Border Color
|
|
.label BORDER_COLOR = $d020
|
|
/// $D011 Control Register #1
|
|
/// - Bit#0-#2: YSCROLL Screen Soft Scroll Vertical
|
|
/// - Bit#3: RSEL Switch betweem 25 or 24 visible rows
|
|
/// RSEL| Display window height | First line | Last line
|
|
/// ----+--------------------------+-------------+----------
|
|
/// 0 | 24 text lines/192 pixels | 55 ($37) | 246 ($f6)
|
|
/// 1 | 25 text lines/200 pixels | 51 ($33) | 250 ($fa)
|
|
/// - Bit#4: DEN Switch VIC-II output on/off
|
|
/// - Bit#5: BMM Turn Bitmap Mode on/off
|
|
/// - Bit#6: ECM Turn Extended Color Mode on/off
|
|
/// - Bit#7: RST8 9th Bit for $D012 Rasterline counter
|
|
/// Initial Value: %10011011
|
|
.label VICII_CONTROL1 = $d011
|
|
/// $D016 Control register 2
|
|
/// - Bit#0-#2: XSCROLL Screen Soft Scroll Horizontal
|
|
/// - Bit#3: CSEL Switch betweem 40 or 38 visible columns
|
|
/// CSEL| Display window width | First X coo. | Last X coo.
|
|
/// ----+--------------------------+--------------+------------
|
|
/// 0 | 38 characters/304 pixels | 31 ($1f) | 334 ($14e)
|
|
/// 1 | 40 characters/320 pixels | 24 ($18) | 343 ($157)
|
|
/// - Bit#4: MCM Turn Multicolor Mode on/off
|
|
/// - Bit#5-#7: not used
|
|
/// Initial Value: %00001000
|
|
.label VICII_CONTROL2 = $d016
|
|
/// $D018 VIC-II base addresses
|
|
/// - Bit#0: not used
|
|
/// - Bit#1-#3: CB Address Bits 11-13 of the Character Set (*2048)
|
|
/// - Bit#4-#7: VM Address Bits 10-13 of the Screen RAM (*1024)
|
|
/// Initial Value: %00010100
|
|
.label VICII_MEMORY = $d018
|
|
/// Processor port data direction register
|
|
.label PROCPORT_DDR = 0
|
|
/// Processor Port Register controlling RAM/ROM configuration and the datasette
|
|
.label PROCPORT = 1
|
|
/// The CIA#2: Serial bus, RS-232, VIC memory bank
|
|
.label CIA2 = $dd00
|
|
/// Feature enables or disables the extra C64 DTV features
|
|
.label DTV_FEATURE = $d03f
|
|
/// Controls the graphics modes of the C64 DTV
|
|
.label DTV_CONTROL = $d03c
|
|
/// Defines colors for the 16 first colors ($00-$0f)
|
|
.label DTV_PALETTE = $d200
|
|
/// Linear Graphics Plane B Counter Control
|
|
.label DTV_PLANEB_START_LO = $d049
|
|
.label DTV_PLANEB_START_MI = $d04a
|
|
.label DTV_PLANEB_START_HI = $d04b
|
|
.label DTV_PLANEB_STEP = $d04c
|
|
.label DTV_PLANEB_MODULO_LO = $d047
|
|
.label DTV_PLANEB_MODULO_HI = $d048
|
|
// Plane with all pixels
|
|
.label CHUNKY = $8000
|
|
.segment Code
|
|
// main
|
|
main: {
|
|
// asm { sei }
|
|
sei
|
|
// [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK -- _deref_pbuc1=vbuc2
|
|
// Disable normal interrupt (prevent keyboard reading glitches and allows to hide basic/kernal)
|
|
// Disable kernal & basic
|
|
lda #PROCPORT_DDR_MEMORY_MASK
|
|
sta.z PROCPORT_DDR
|
|
// [2] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
|
lda #PROCPORT_RAM_IO
|
|
sta.z PROCPORT
|
|
// [3] call gfx_init_chunky
|
|
// [34] phi from main to gfx_init_chunky [phi:main->gfx_init_chunky]
|
|
gfx_init_chunky_from_main:
|
|
jsr gfx_init_chunky
|
|
jmp __b6
|
|
// main::@6
|
|
__b6:
|
|
// [4] *DTV_FEATURE = DTV_FEATURE_ENABLE -- _deref_pbuc1=vbuc2
|
|
// Enable DTV extended modes
|
|
lda #DTV_FEATURE_ENABLE
|
|
sta DTV_FEATURE
|
|
// [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF -- _deref_pbuc1=vbuc2
|
|
// 8BPP Pixel Cell Mode
|
|
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
|
|
sta DTV_CONTROL
|
|
// [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
|
|
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
sta VICII_CONTROL1
|
|
// [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2
|
|
lda #VICII_MCM|VICII_CSEL
|
|
sta VICII_CONTROL2
|
|
// [8] *DTV_PLANEB_START_LO = 0 -- _deref_pbuc1=vbuc2
|
|
// Plane B: CHUNKY
|
|
lda #0
|
|
sta DTV_PLANEB_START_LO
|
|
// [9] *DTV_PLANEB_START_MI = byte1 CHUNKY -- _deref_pbuc1=vbuc2
|
|
lda #>CHUNKY
|
|
sta DTV_PLANEB_START_MI
|
|
// [10] *DTV_PLANEB_START_HI = 0 -- _deref_pbuc1=vbuc2
|
|
lda #0
|
|
sta DTV_PLANEB_START_HI
|
|
// [11] *DTV_PLANEB_STEP = 8 -- _deref_pbuc1=vbuc2
|
|
lda #8
|
|
sta DTV_PLANEB_STEP
|
|
// [12] *DTV_PLANEB_MODULO_LO = 0 -- _deref_pbuc1=vbuc2
|
|
lda #0
|
|
sta DTV_PLANEB_MODULO_LO
|
|
// [13] *DTV_PLANEB_MODULO_HI = 0 -- _deref_pbuc1=vbuc2
|
|
lda #0
|
|
sta DTV_PLANEB_MODULO_HI
|
|
// [14] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 -- _deref_pbuc1=vbuc2
|
|
// VIC Graphics Bank
|
|
lda #3
|
|
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR
|
|
// [15] *((char *)CIA2) = 3^(char)(unsigned int)CHUNKY/$4000 -- _deref_pbuc1=vbuc2
|
|
// Set VIC Bank bits to output - all others to input
|
|
lda #3^CHUNKY/$4000
|
|
sta CIA2
|
|
// [16] *VICII_MEMORY = 0 -- _deref_pbuc1=vbuc2
|
|
// Set VIC Bank
|
|
// VIC memory
|
|
lda #0
|
|
sta VICII_MEMORY
|
|
// [17] phi from main::@6 to main::@1 [phi:main::@6->main::@1]
|
|
__b1_from___b6:
|
|
// [17] phi main::j#2 = 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1
|
|
ldx #0
|
|
jmp __b1
|
|
// DTV Palette - Grey Tones
|
|
// [17] phi from main::@1 to main::@1 [phi:main::@1->main::@1]
|
|
__b1_from___b1:
|
|
// [17] phi main::j#2 = main::j#1 [phi:main::@1->main::@1#0] -- register_copy
|
|
jmp __b1
|
|
// main::@1
|
|
__b1:
|
|
// [18] DTV_PALETTE[main::j#2] = main::j#2 -- pbuc1_derefidx_vbuxx=vbuxx
|
|
txa
|
|
sta DTV_PALETTE,x
|
|
// [19] main::j#1 = ++ main::j#2 -- vbuxx=_inc_vbuxx
|
|
inx
|
|
// [20] if(main::j#1!=$10) goto main::@1 -- vbuxx_neq_vbuc1_then_la1
|
|
cpx #$10
|
|
bne __b1_from___b1
|
|
jmp __b2
|
|
// main::@2
|
|
__b2:
|
|
// asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
|
|
// Stabilize Raster
|
|
ldx #$ff
|
|
rff:
|
|
cpx RASTER
|
|
bne rff
|
|
stabilize:
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
cpx RASTER
|
|
beq eat+0
|
|
eat:
|
|
inx
|
|
cpx #8
|
|
bne stabilize
|
|
// [22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
|
|
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
sta VICII_CONTROL1
|
|
// [23] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2
|
|
lda #0
|
|
sta BORDER_COLOR
|
|
jmp __b3
|
|
// main::@3
|
|
__b3:
|
|
// [24] if(*RASTER!=$42) goto main::@3 -- _deref_pbuc1_neq_vbuc2_then_la1
|
|
lda #$42
|
|
cmp RASTER
|
|
bne __b3
|
|
jmp __b4
|
|
// main::@4
|
|
__b4:
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
jmp __b5
|
|
// main::@5
|
|
__b5:
|
|
// [26] main::rst#1 = *RASTER -- vbuxx=_deref_pbuc1
|
|
ldx RASTER
|
|
// [27] main::$3 = main::rst#1 & 7 -- vbuaa=vbuxx_band_vbuc1
|
|
txa
|
|
and #7
|
|
// [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa
|
|
ora #VICII_DEN|VICII_ECM|VICII_RSEL
|
|
// [29] *VICII_CONTROL1 = main::$4 -- _deref_pbuc1=vbuaa
|
|
sta VICII_CONTROL1
|
|
// [30] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4
|
|
txa
|
|
asl
|
|
asl
|
|
asl
|
|
asl
|
|
// [31] *BORDER_COLOR = main::$5 -- _deref_pbuc1=vbuaa
|
|
sta BORDER_COLOR
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
// [33] if(main::rst#1!=$f2) goto main::@5 -- vbuxx_neq_vbuc1_then_la1
|
|
cpx #$f2
|
|
bne __b5
|
|
jmp __b2
|
|
}
|
|
// gfx_init_chunky
|
|
// Initialize Plane with 8bpp chunky
|
|
gfx_init_chunky: {
|
|
.label __5 = 6
|
|
.label gfxb = 2
|
|
.label x = 4
|
|
.label y = 8
|
|
// [35] call dtvSetCpuBankSegment1
|
|
// [54] phi from gfx_init_chunky to dtvSetCpuBankSegment1 [phi:gfx_init_chunky->dtvSetCpuBankSegment1]
|
|
dtvSetCpuBankSegment1_from_gfx_init_chunky:
|
|
// [54] phi dtvSetCpuBankSegment1::cpuBankIdx#3 = (char)CHUNKY/$4000 [phi:gfx_init_chunky->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
|
|
lda #CHUNKY/$4000
|
|
jsr dtvSetCpuBankSegment1
|
|
// [36] phi from gfx_init_chunky to gfx_init_chunky::@1 [phi:gfx_init_chunky->gfx_init_chunky::@1]
|
|
__b1_from_gfx_init_chunky:
|
|
// [36] phi gfx_init_chunky::gfxbCpuBank#7 = ++(char)CHUNKY/$4000 [phi:gfx_init_chunky->gfx_init_chunky::@1#0] -- vbuxx=vbuc1
|
|
ldx #($ff&CHUNKY/$4000)+1
|
|
// [36] phi gfx_init_chunky::y#6 = 0 [phi:gfx_init_chunky->gfx_init_chunky::@1#1] -- vbuz1=vbuc1
|
|
lda #0
|
|
sta.z y
|
|
// [36] phi gfx_init_chunky::gfxb#5 = (char *) 16384 [phi:gfx_init_chunky->gfx_init_chunky::@1#2] -- pbuz1=pbuc1
|
|
lda #<$4000
|
|
sta.z gfxb
|
|
lda #>$4000
|
|
sta.z gfxb+1
|
|
jmp __b1
|
|
// [36] phi from gfx_init_chunky::@5 to gfx_init_chunky::@1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1]
|
|
__b1_from___b5:
|
|
// [36] phi gfx_init_chunky::gfxbCpuBank#7 = gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#0] -- register_copy
|
|
// [36] phi gfx_init_chunky::y#6 = gfx_init_chunky::y#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#1] -- register_copy
|
|
// [36] phi gfx_init_chunky::gfxb#5 = gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#2] -- register_copy
|
|
jmp __b1
|
|
// gfx_init_chunky::@1
|
|
__b1:
|
|
// [37] phi from gfx_init_chunky::@1 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2]
|
|
__b2_from___b1:
|
|
// [37] phi gfx_init_chunky::gfxbCpuBank#4 = gfx_init_chunky::gfxbCpuBank#7 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#0] -- register_copy
|
|
// [37] phi gfx_init_chunky::x#2 = 0 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#1] -- vwuz1=vwuc1
|
|
lda #<0
|
|
sta.z x
|
|
lda #>0
|
|
sta.z x+1
|
|
// [37] phi gfx_init_chunky::gfxb#3 = gfx_init_chunky::gfxb#5 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#2] -- register_copy
|
|
jmp __b2
|
|
// [37] phi from gfx_init_chunky::@3 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2]
|
|
__b2_from___b3:
|
|
// [37] phi gfx_init_chunky::gfxbCpuBank#4 = gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#0] -- register_copy
|
|
// [37] phi gfx_init_chunky::x#2 = gfx_init_chunky::x#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#1] -- register_copy
|
|
// [37] phi gfx_init_chunky::gfxb#3 = gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#2] -- register_copy
|
|
jmp __b2
|
|
// gfx_init_chunky::@2
|
|
__b2:
|
|
// [38] if(gfx_init_chunky::gfxb#3!=$8000) goto gfx_init_chunky::@3 -- pbuz1_neq_vwuc1_then_la1
|
|
lda.z gfxb+1
|
|
cmp #>$8000
|
|
bne __b3_from___b2
|
|
lda.z gfxb
|
|
cmp #<$8000
|
|
bne __b3_from___b2
|
|
jmp __b4
|
|
// gfx_init_chunky::@4
|
|
__b4:
|
|
// [39] dtvSetCpuBankSegment1::cpuBankIdx#1 = gfx_init_chunky::gfxbCpuBank#4 -- vbuaa=vbuxx
|
|
txa
|
|
// [40] call dtvSetCpuBankSegment1
|
|
// [54] phi from gfx_init_chunky::@4 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1]
|
|
dtvSetCpuBankSegment1_from___b4:
|
|
// [54] phi dtvSetCpuBankSegment1::cpuBankIdx#3 = dtvSetCpuBankSegment1::cpuBankIdx#1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1#0] -- register_copy
|
|
jsr dtvSetCpuBankSegment1
|
|
jmp __b7
|
|
// gfx_init_chunky::@7
|
|
__b7:
|
|
// [41] gfx_init_chunky::gfxbCpuBank#2 = ++ gfx_init_chunky::gfxbCpuBank#4 -- vbuxx=_inc_vbuxx
|
|
inx
|
|
// [42] phi from gfx_init_chunky::@7 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3]
|
|
__b3_from___b7:
|
|
// [42] phi gfx_init_chunky::gfxbCpuBank#8 = gfx_init_chunky::gfxbCpuBank#2 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#0] -- register_copy
|
|
// [42] phi gfx_init_chunky::gfxb#4 = (char *) 16384 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#1] -- pbuz1=pbuc1
|
|
lda #<$4000
|
|
sta.z gfxb
|
|
lda #>$4000
|
|
sta.z gfxb+1
|
|
jmp __b3
|
|
// [42] phi from gfx_init_chunky::@2 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3]
|
|
__b3_from___b2:
|
|
// [42] phi gfx_init_chunky::gfxbCpuBank#8 = gfx_init_chunky::gfxbCpuBank#4 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#0] -- register_copy
|
|
// [42] phi gfx_init_chunky::gfxb#4 = gfx_init_chunky::gfxb#3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#1] -- register_copy
|
|
jmp __b3
|
|
// gfx_init_chunky::@3
|
|
__b3:
|
|
// [43] gfx_init_chunky::$5 = gfx_init_chunky::x#2 + gfx_init_chunky::y#6 -- vwuz1=vwuz2_plus_vbuz3
|
|
lda.z y
|
|
clc
|
|
adc.z x
|
|
sta.z __5
|
|
lda #0
|
|
adc.z x+1
|
|
sta.z __5+1
|
|
// [44] gfx_init_chunky::c#0 = (char)gfx_init_chunky::$5 -- vbuaa=_byte_vwuz1
|
|
lda.z __5
|
|
// [45] *gfx_init_chunky::gfxb#4 = gfx_init_chunky::c#0 -- _deref_pbuz1=vbuaa
|
|
ldy #0
|
|
sta (gfxb),y
|
|
// [46] gfx_init_chunky::gfxb#1 = ++ gfx_init_chunky::gfxb#4 -- pbuz1=_inc_pbuz1
|
|
inc.z gfxb
|
|
bne !+
|
|
inc.z gfxb+1
|
|
!:
|
|
// [47] gfx_init_chunky::x#1 = ++ gfx_init_chunky::x#2 -- vwuz1=_inc_vwuz1
|
|
inc.z x
|
|
bne !+
|
|
inc.z x+1
|
|
!:
|
|
// [48] if(gfx_init_chunky::x#1!=$140) goto gfx_init_chunky::@2 -- vwuz1_neq_vwuc1_then_la1
|
|
lda.z x+1
|
|
cmp #>$140
|
|
bne __b2_from___b3
|
|
lda.z x
|
|
cmp #<$140
|
|
bne __b2_from___b3
|
|
jmp __b5
|
|
// gfx_init_chunky::@5
|
|
__b5:
|
|
// [49] gfx_init_chunky::y#1 = ++ gfx_init_chunky::y#6 -- vbuz1=_inc_vbuz1
|
|
inc.z y
|
|
// [50] if(gfx_init_chunky::y#1!=$33) goto gfx_init_chunky::@1 -- vbuz1_neq_vbuc1_then_la1
|
|
lda #$33
|
|
cmp.z y
|
|
bne __b1_from___b5
|
|
// [51] phi from gfx_init_chunky::@5 to gfx_init_chunky::@6 [phi:gfx_init_chunky::@5->gfx_init_chunky::@6]
|
|
__b6_from___b5:
|
|
jmp __b6
|
|
// gfx_init_chunky::@6
|
|
__b6:
|
|
// [52] call dtvSetCpuBankSegment1
|
|
// Reset CPU BANK segment to $4000
|
|
// [54] phi from gfx_init_chunky::@6 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1]
|
|
dtvSetCpuBankSegment1_from___b6:
|
|
// [54] phi dtvSetCpuBankSegment1::cpuBankIdx#3 = (char)$4000/$4000 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
|
|
lda #$4000/$4000
|
|
jsr dtvSetCpuBankSegment1
|
|
jmp __breturn
|
|
// gfx_init_chunky::@return
|
|
__breturn:
|
|
// [53] return
|
|
rts
|
|
}
|
|
// dtvSetCpuBankSegment1
|
|
// Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff)
|
|
// This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff
|
|
// The actual memory addressed will be $4000*cpuSegmentIdx
|
|
// void dtvSetCpuBankSegment1(__register(A) char cpuBankIdx)
|
|
dtvSetCpuBankSegment1: {
|
|
// Move CPU BANK 1 SEGMENT ($4000-$7fff)
|
|
.label cpuBank = $ff
|
|
// [55] *dtvSetCpuBankSegment1::cpuBank = dtvSetCpuBankSegment1::cpuBankIdx#3 -- _deref_pbuc1=vbuaa
|
|
sta.z cpuBank
|
|
// asm { .byte$32,$dd lda$ff .byte$32,$00 }
|
|
.byte $32, $dd
|
|
lda.z $ff
|
|
.byte $32, 0
|
|
jmp __breturn
|
|
// dtvSetCpuBankSegment1::@return
|
|
__breturn:
|
|
// [57] return
|
|
rts
|
|
}
|
|
// File Data
|
|
|
|
ASSEMBLER OPTIMIZATIONS
|
|
Removing instruction jmp __b6
|
|
Removing instruction jmp __b1
|
|
Removing instruction jmp __b2
|
|
Removing instruction jmp __b3
|
|
Removing instruction jmp __b4
|
|
Removing instruction jmp __b5
|
|
Removing instruction jmp __b1
|
|
Removing instruction jmp __b2
|
|
Removing instruction jmp __b4
|
|
Removing instruction jmp __b7
|
|
Removing instruction jmp __b3
|
|
Removing instruction jmp __b5
|
|
Removing instruction jmp __b6
|
|
Removing instruction jmp __breturn
|
|
Removing instruction jmp __breturn
|
|
Succesful ASM optimization Pass5NextJumpElimination
|
|
Removing instruction lda #0
|
|
Removing instruction lda #>0
|
|
Succesful ASM optimization Pass5UnnecesaryLoadElimination
|
|
Replacing label __b1_from___b1 with __b1
|
|
Replacing label __b3_from___b2 with __b3
|
|
Replacing label __b3_from___b2 with __b3
|
|
Replacing label __b2_from___b3 with __b2
|
|
Replacing label __b2_from___b3 with __b2
|
|
Replacing label __b1_from___b5 with __b1
|
|
Removing instruction __b1_from___b1:
|
|
Removing instruction __b1_from___b5:
|
|
Removing instruction __b2_from___b1:
|
|
Removing instruction __b2_from___b3:
|
|
Removing instruction __b3_from___b2:
|
|
Removing instruction __b6_from___b5:
|
|
Succesful ASM optimization Pass5RedundantLabelElimination
|
|
Removing instruction gfx_init_chunky_from_main:
|
|
Removing instruction __b6:
|
|
Removing instruction __b1_from___b6:
|
|
Removing instruction __b4:
|
|
Removing instruction dtvSetCpuBankSegment1_from_gfx_init_chunky:
|
|
Removing instruction __b1_from_gfx_init_chunky:
|
|
Removing instruction __b4:
|
|
Removing instruction dtvSetCpuBankSegment1_from___b4:
|
|
Removing instruction __b7:
|
|
Removing instruction __b3_from___b7:
|
|
Removing instruction __b5:
|
|
Removing instruction __b6:
|
|
Removing instruction dtvSetCpuBankSegment1_from___b6:
|
|
Removing instruction __breturn:
|
|
Removing instruction __breturn:
|
|
Succesful ASM optimization Pass5UnusedLabelElimination
|
|
Removing instruction jmp __b1
|
|
Removing instruction jmp __b1
|
|
Removing instruction jmp __b2
|
|
Removing instruction jmp __b3
|
|
Succesful ASM optimization Pass5NextJumpElimination
|
|
Replacing instruction ldx #0 with TAX
|
|
|
|
FINAL SYMBOL TABLE
|
|
__constant char * const BORDER_COLOR = (char *) 53280
|
|
__constant char * const CHUNKY = (char *) 32768
|
|
__constant struct MOS6526_CIA * const CIA2 = (struct MOS6526_CIA *) 56576
|
|
__constant const char DTV_BADLINE_OFF = $20
|
|
__constant const char DTV_CHUNKY = $40
|
|
__constant const char DTV_COLORRAM_OFF = $10
|
|
__constant char * const DTV_CONTROL = (char *) 53308
|
|
__constant char * const DTV_FEATURE = (char *) 53311
|
|
__constant const char DTV_FEATURE_ENABLE = 1
|
|
__constant const char DTV_HIGHCOLOR = 4
|
|
__constant const char DTV_LINEAR = 1
|
|
__constant char * const DTV_PALETTE = (char *) 53760
|
|
__constant char * const DTV_PLANEB_MODULO_HI = (char *) 53320
|
|
__constant char * const DTV_PLANEB_MODULO_LO = (char *) 53319
|
|
__constant char * const DTV_PLANEB_START_HI = (char *) 53323
|
|
__constant char * const DTV_PLANEB_START_LO = (char *) 53321
|
|
__constant char * const DTV_PLANEB_START_MI = (char *) 53322
|
|
__constant char * const DTV_PLANEB_STEP = (char *) 53324
|
|
__constant char OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
|
|
__constant char * const PROCPORT = (char *) 1
|
|
__constant char * const PROCPORT_DDR = (char *) 0
|
|
__constant const char PROCPORT_DDR_MEMORY_MASK = 7
|
|
__constant const char PROCPORT_RAM_IO = 5
|
|
__constant char * const RASTER = (char *) 53266
|
|
__constant char * const VICII_CONTROL1 = (char *) 53265
|
|
__constant char * const VICII_CONTROL2 = (char *) 53270
|
|
__constant const char VICII_CSEL = 8
|
|
__constant const char VICII_DEN = $10
|
|
__constant const char VICII_ECM = $40
|
|
__constant const char VICII_MCM = $10
|
|
__constant char * const VICII_MEMORY = (char *) 53272
|
|
__constant const char VICII_RSEL = 8
|
|
void dtvSetCpuBankSegment1(char cpuBankIdx)
|
|
__constant char *dtvSetCpuBankSegment1::cpuBank = (char *) 255
|
|
char dtvSetCpuBankSegment1::cpuBankIdx
|
|
char dtvSetCpuBankSegment1::cpuBankIdx#1 // reg byte a 2002.0
|
|
char dtvSetCpuBankSegment1::cpuBankIdx#3 // reg byte a 11002.0
|
|
void gfx_init_chunky()
|
|
unsigned int gfx_init_chunky::$5 // zp[2]:6 1001.0
|
|
char gfx_init_chunky::c
|
|
char gfx_init_chunky::c#0 // reg byte a 2002.0
|
|
char *gfx_init_chunky::gfxb
|
|
char *gfx_init_chunky::gfxb#1 // gfxb zp[2]:2 420.59999999999997
|
|
char *gfx_init_chunky::gfxb#3 // gfxb zp[2]:2 1552.0
|
|
char *gfx_init_chunky::gfxb#4 // gfxb zp[2]:2 750.75
|
|
char *gfx_init_chunky::gfxb#5 // gfxb zp[2]:2 202.0
|
|
char gfx_init_chunky::gfxbCpuBank
|
|
char gfx_init_chunky::gfxbCpuBank#2 // reg byte x 2002.0
|
|
char gfx_init_chunky::gfxbCpuBank#4 // reg byte x 1026.25
|
|
char gfx_init_chunky::gfxbCpuBank#7 // reg byte x 202.0
|
|
char gfx_init_chunky::gfxbCpuBank#8 // reg byte x 344.8888888888889
|
|
unsigned int gfx_init_chunky::x
|
|
unsigned int gfx_init_chunky::x#1 // x zp[2]:4 1501.5
|
|
unsigned int gfx_init_chunky::x#2 // x zp[2]:4 300.29999999999995
|
|
char gfx_init_chunky::y
|
|
char gfx_init_chunky::y#1 // y zp[1]:8 151.5
|
|
char gfx_init_chunky::y#6 // y zp[1]:8 92.53846153846155
|
|
void main()
|
|
char main::$3 // reg byte a 202.0
|
|
char main::$4 // reg byte a 202.0
|
|
char main::$5 // reg byte a 202.0
|
|
char main::j
|
|
char main::j#1 // reg byte x 16.5
|
|
char main::j#2 // reg byte x 22.0
|
|
char main::rst
|
|
char main::rst#1 // reg byte x 57.714285714285715
|
|
|
|
reg byte x [ main::j#2 main::j#1 ]
|
|
zp[1]:8 [ gfx_init_chunky::y#6 gfx_init_chunky::y#1 ]
|
|
zp[2]:4 [ gfx_init_chunky::x#2 gfx_init_chunky::x#1 ]
|
|
reg byte x [ gfx_init_chunky::gfxbCpuBank#4 gfx_init_chunky::gfxbCpuBank#7 gfx_init_chunky::gfxbCpuBank#8 gfx_init_chunky::gfxbCpuBank#2 ]
|
|
zp[2]:2 [ gfx_init_chunky::gfxb#4 gfx_init_chunky::gfxb#3 gfx_init_chunky::gfxb#5 gfx_init_chunky::gfxb#1 ]
|
|
reg byte a [ dtvSetCpuBankSegment1::cpuBankIdx#3 dtvSetCpuBankSegment1::cpuBankIdx#1 ]
|
|
reg byte x [ main::rst#1 ]
|
|
reg byte a [ main::$3 ]
|
|
reg byte a [ main::$4 ]
|
|
reg byte a [ main::$5 ]
|
|
zp[2]:6 [ gfx_init_chunky::$5 ]
|
|
reg byte a [ gfx_init_chunky::c#0 ]
|
|
|
|
|
|
FINAL ASSEMBLER
|
|
Score: 19879
|
|
|
|
// File Comments
|
|
// C64DTV 8bpp charmode stretcher
|
|
/// @file
|
|
/// C64 DTV version 2 Registers and Constants
|
|
///
|
|
/// Sources
|
|
/// (J) https://www.c64-wiki.com/wiki/C64DTV_Programming_Guide
|
|
/// (H) http://dtvhacking.cbm8bit.com/dtv_wiki/images/d/d9/Dtv_registers_full.txt
|
|
// Upstart
|
|
// Commodore 64 PRG executable file
|
|
.file [name="c64dtv-8bppchunkystretch.prg", type="prg", segments="Program"]
|
|
.segmentdef Program [segments="Basic, Code, Data"]
|
|
.segmentdef Basic [start=$0801]
|
|
.segmentdef Code [start=$80d]
|
|
.segmentdef Data [startAfter="Code"]
|
|
.segment Basic
|
|
:BasicUpstart(main)
|
|
// Global Constants & labels
|
|
/// $D011 Control Register #1 Bit#6: ECM Turn Extended Color Mode on/off
|
|
.const VICII_ECM = $40
|
|
/// $D011 Control Register #1 Bit#4: DEN Switch VIC-II output on/off
|
|
.const VICII_DEN = $10
|
|
/// $D011 Control Register #1 Bit#3: RSEL Switch betweem 25 or 24 visible rows
|
|
/// RSEL| Display window height | First line | Last line
|
|
/// ----+--------------------------+-------------+----------
|
|
/// 0 | 24 text lines/192 pixels | 55 ($37) | 246 ($f6)
|
|
/// 1 | 25 text lines/200 pixels | 51 ($33) | 250 ($fa)
|
|
.const VICII_RSEL = 8
|
|
/// $D016 Control register #2 Bit#4: MCM Turn Multicolor Mode on/off
|
|
.const VICII_MCM = $10
|
|
/// $D016 Control register #2 Bit#3: CSEL Switch betweem 40 or 38 visible columns
|
|
/// CSEL| Display window width | First X coo. | Last X coo.
|
|
/// ----+--------------------------+--------------+------------
|
|
/// 0 | 38 characters/304 pixels | 31 ($1f) | 334 ($14e)
|
|
/// 1 | 40 characters/320 pixels | 24 ($18) | 343 ($157)
|
|
.const VICII_CSEL = 8
|
|
/// Mask for PROCESSOR_PORT_DDR which allows only memory configuration to be written
|
|
.const PROCPORT_DDR_MEMORY_MASK = 7
|
|
/// RAM in 0xA000, 0xE000 I/O in 0xD000
|
|
.const PROCPORT_RAM_IO = 5
|
|
.const DTV_FEATURE_ENABLE = 1
|
|
.const DTV_LINEAR = 1
|
|
.const DTV_HIGHCOLOR = 4
|
|
.const DTV_COLORRAM_OFF = $10
|
|
.const DTV_BADLINE_OFF = $20
|
|
.const DTV_CHUNKY = $40
|
|
.const OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR = 2
|
|
/// $D012 RASTER Raster counter
|
|
.label RASTER = $d012
|
|
/// $D020 Border Color
|
|
.label BORDER_COLOR = $d020
|
|
/// $D011 Control Register #1
|
|
/// - Bit#0-#2: YSCROLL Screen Soft Scroll Vertical
|
|
/// - Bit#3: RSEL Switch betweem 25 or 24 visible rows
|
|
/// RSEL| Display window height | First line | Last line
|
|
/// ----+--------------------------+-------------+----------
|
|
/// 0 | 24 text lines/192 pixels | 55 ($37) | 246 ($f6)
|
|
/// 1 | 25 text lines/200 pixels | 51 ($33) | 250 ($fa)
|
|
/// - Bit#4: DEN Switch VIC-II output on/off
|
|
/// - Bit#5: BMM Turn Bitmap Mode on/off
|
|
/// - Bit#6: ECM Turn Extended Color Mode on/off
|
|
/// - Bit#7: RST8 9th Bit for $D012 Rasterline counter
|
|
/// Initial Value: %10011011
|
|
.label VICII_CONTROL1 = $d011
|
|
/// $D016 Control register 2
|
|
/// - Bit#0-#2: XSCROLL Screen Soft Scroll Horizontal
|
|
/// - Bit#3: CSEL Switch betweem 40 or 38 visible columns
|
|
/// CSEL| Display window width | First X coo. | Last X coo.
|
|
/// ----+--------------------------+--------------+------------
|
|
/// 0 | 38 characters/304 pixels | 31 ($1f) | 334 ($14e)
|
|
/// 1 | 40 characters/320 pixels | 24 ($18) | 343 ($157)
|
|
/// - Bit#4: MCM Turn Multicolor Mode on/off
|
|
/// - Bit#5-#7: not used
|
|
/// Initial Value: %00001000
|
|
.label VICII_CONTROL2 = $d016
|
|
/// $D018 VIC-II base addresses
|
|
/// - Bit#0: not used
|
|
/// - Bit#1-#3: CB Address Bits 11-13 of the Character Set (*2048)
|
|
/// - Bit#4-#7: VM Address Bits 10-13 of the Screen RAM (*1024)
|
|
/// Initial Value: %00010100
|
|
.label VICII_MEMORY = $d018
|
|
/// Processor port data direction register
|
|
.label PROCPORT_DDR = 0
|
|
/// Processor Port Register controlling RAM/ROM configuration and the datasette
|
|
.label PROCPORT = 1
|
|
/// The CIA#2: Serial bus, RS-232, VIC memory bank
|
|
.label CIA2 = $dd00
|
|
/// Feature enables or disables the extra C64 DTV features
|
|
.label DTV_FEATURE = $d03f
|
|
/// Controls the graphics modes of the C64 DTV
|
|
.label DTV_CONTROL = $d03c
|
|
/// Defines colors for the 16 first colors ($00-$0f)
|
|
.label DTV_PALETTE = $d200
|
|
/// Linear Graphics Plane B Counter Control
|
|
.label DTV_PLANEB_START_LO = $d049
|
|
.label DTV_PLANEB_START_MI = $d04a
|
|
.label DTV_PLANEB_START_HI = $d04b
|
|
.label DTV_PLANEB_STEP = $d04c
|
|
.label DTV_PLANEB_MODULO_LO = $d047
|
|
.label DTV_PLANEB_MODULO_HI = $d048
|
|
// Plane with all pixels
|
|
.label CHUNKY = $8000
|
|
.segment Code
|
|
// main
|
|
main: {
|
|
// asm
|
|
// asm { sei }
|
|
sei
|
|
// *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK
|
|
// [1] *PROCPORT_DDR = PROCPORT_DDR_MEMORY_MASK -- _deref_pbuc1=vbuc2
|
|
// Disable normal interrupt (prevent keyboard reading glitches and allows to hide basic/kernal)
|
|
// Disable kernal & basic
|
|
lda #PROCPORT_DDR_MEMORY_MASK
|
|
sta.z PROCPORT_DDR
|
|
// *PROCPORT = PROCPORT_RAM_IO
|
|
// [2] *PROCPORT = PROCPORT_RAM_IO -- _deref_pbuc1=vbuc2
|
|
lda #PROCPORT_RAM_IO
|
|
sta.z PROCPORT
|
|
// gfx_init_chunky()
|
|
// [3] call gfx_init_chunky
|
|
// [34] phi from main to gfx_init_chunky [phi:main->gfx_init_chunky]
|
|
jsr gfx_init_chunky
|
|
// main::@6
|
|
// *DTV_FEATURE = DTV_FEATURE_ENABLE
|
|
// [4] *DTV_FEATURE = DTV_FEATURE_ENABLE -- _deref_pbuc1=vbuc2
|
|
// Enable DTV extended modes
|
|
lda #DTV_FEATURE_ENABLE
|
|
sta DTV_FEATURE
|
|
// *DTV_CONTROL = DTV_HIGHCOLOR | DTV_LINEAR | DTV_COLORRAM_OFF | DTV_CHUNKY | DTV_BADLINE_OFF
|
|
// [5] *DTV_CONTROL = DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF -- _deref_pbuc1=vbuc2
|
|
// 8BPP Pixel Cell Mode
|
|
lda #DTV_HIGHCOLOR|DTV_LINEAR|DTV_COLORRAM_OFF|DTV_CHUNKY|DTV_BADLINE_OFF
|
|
sta DTV_CONTROL
|
|
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
|
|
// [6] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
|
|
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
sta VICII_CONTROL1
|
|
// *VICII_CONTROL2 = VICII_MCM | VICII_CSEL
|
|
// [7] *VICII_CONTROL2 = VICII_MCM|VICII_CSEL -- _deref_pbuc1=vbuc2
|
|
lda #VICII_MCM|VICII_CSEL
|
|
sta VICII_CONTROL2
|
|
// *DTV_PLANEB_START_LO = BYTE0(CHUNKY)
|
|
// [8] *DTV_PLANEB_START_LO = 0 -- _deref_pbuc1=vbuc2
|
|
// Plane B: CHUNKY
|
|
lda #0
|
|
sta DTV_PLANEB_START_LO
|
|
// *DTV_PLANEB_START_MI = BYTE1(CHUNKY)
|
|
// [9] *DTV_PLANEB_START_MI = byte1 CHUNKY -- _deref_pbuc1=vbuc2
|
|
lda #>CHUNKY
|
|
sta DTV_PLANEB_START_MI
|
|
// *DTV_PLANEB_START_HI = 0
|
|
// [10] *DTV_PLANEB_START_HI = 0 -- _deref_pbuc1=vbuc2
|
|
lda #0
|
|
sta DTV_PLANEB_START_HI
|
|
// *DTV_PLANEB_STEP = 8
|
|
// [11] *DTV_PLANEB_STEP = 8 -- _deref_pbuc1=vbuc2
|
|
lda #8
|
|
sta DTV_PLANEB_STEP
|
|
// *DTV_PLANEB_MODULO_LO = 0
|
|
// [12] *DTV_PLANEB_MODULO_LO = 0 -- _deref_pbuc1=vbuc2
|
|
lda #0
|
|
sta DTV_PLANEB_MODULO_LO
|
|
// *DTV_PLANEB_MODULO_HI = 0
|
|
// [13] *DTV_PLANEB_MODULO_HI = 0 -- _deref_pbuc1=vbuc2
|
|
sta DTV_PLANEB_MODULO_HI
|
|
// CIA2->PORT_A_DDR = %00000011
|
|
// [14] *((char *)CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR) = 3 -- _deref_pbuc1=vbuc2
|
|
// VIC Graphics Bank
|
|
lda #3
|
|
sta CIA2+OFFSET_STRUCT_MOS6526_CIA_PORT_A_DDR
|
|
// CIA2->PORT_A = %00000011 ^ (byte)((word)CHUNKY/$4000)
|
|
// [15] *((char *)CIA2) = 3^(char)(unsigned int)CHUNKY/$4000 -- _deref_pbuc1=vbuc2
|
|
// Set VIC Bank bits to output - all others to input
|
|
lda #3^CHUNKY/$4000
|
|
sta CIA2
|
|
// *VICII_MEMORY = (byte)((((word)CHUNKY)&$3fff)/$40) | ((BYTE1(((word)CHUNKY)&$3fff))/4)
|
|
// [16] *VICII_MEMORY = 0 -- _deref_pbuc1=vbuc2
|
|
// Set VIC Bank
|
|
// VIC memory
|
|
lda #0
|
|
sta VICII_MEMORY
|
|
// [17] phi from main::@6 to main::@1 [phi:main::@6->main::@1]
|
|
// [17] phi main::j#2 = 0 [phi:main::@6->main::@1#0] -- vbuxx=vbuc1
|
|
tax
|
|
// DTV Palette - Grey Tones
|
|
// [17] phi from main::@1 to main::@1 [phi:main::@1->main::@1]
|
|
// [17] phi main::j#2 = main::j#1 [phi:main::@1->main::@1#0] -- register_copy
|
|
// main::@1
|
|
__b1:
|
|
// DTV_PALETTE[j] = j
|
|
// [18] DTV_PALETTE[main::j#2] = main::j#2 -- pbuc1_derefidx_vbuxx=vbuxx
|
|
txa
|
|
sta DTV_PALETTE,x
|
|
// for(byte j : 0..$f)
|
|
// [19] main::j#1 = ++ main::j#2 -- vbuxx=_inc_vbuxx
|
|
inx
|
|
// [20] if(main::j#1!=$10) goto main::@1 -- vbuxx_neq_vbuc1_then_la1
|
|
cpx #$10
|
|
bne __b1
|
|
// main::@2
|
|
__b2:
|
|
// asm
|
|
// asm { ldx#$ff rff: cpxRASTER bnerff stabilize: nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop cpxRASTER beqeat+0 eat: inx cpx#$08 bnestabilize }
|
|
// Stabilize Raster
|
|
ldx #$ff
|
|
rff:
|
|
cpx RASTER
|
|
bne rff
|
|
stabilize:
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
cpx RASTER
|
|
beq eat+0
|
|
eat:
|
|
inx
|
|
cpx #8
|
|
bne stabilize
|
|
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | 3
|
|
// [22] *VICII_CONTROL1 = VICII_DEN|VICII_ECM|VICII_RSEL|3 -- _deref_pbuc1=vbuc2
|
|
lda #VICII_DEN|VICII_ECM|VICII_RSEL|3
|
|
sta VICII_CONTROL1
|
|
// *BORDER_COLOR = 0
|
|
// [23] *BORDER_COLOR = 0 -- _deref_pbuc1=vbuc2
|
|
lda #0
|
|
sta BORDER_COLOR
|
|
// main::@3
|
|
__b3:
|
|
// while(*RASTER!=rst)
|
|
// [24] if(*RASTER!=$42) goto main::@3 -- _deref_pbuc1_neq_vbuc2_then_la1
|
|
lda #$42
|
|
cmp RASTER
|
|
bne __b3
|
|
// main::@4
|
|
// asm
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
// main::@5
|
|
__b5:
|
|
// rst = *RASTER
|
|
// [26] main::rst#1 = *RASTER -- vbuxx=_deref_pbuc1
|
|
ldx RASTER
|
|
// rst&7
|
|
// [27] main::$3 = main::rst#1 & 7 -- vbuaa=vbuxx_band_vbuc1
|
|
txa
|
|
and #7
|
|
// VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
|
|
// [28] main::$4 = VICII_DEN|VICII_ECM|VICII_RSEL | main::$3 -- vbuaa=vbuc1_bor_vbuaa
|
|
ora #VICII_DEN|VICII_ECM|VICII_RSEL
|
|
// *VICII_CONTROL1 = VICII_DEN | VICII_ECM | VICII_RSEL | (rst&7)
|
|
// [29] *VICII_CONTROL1 = main::$4 -- _deref_pbuc1=vbuaa
|
|
sta VICII_CONTROL1
|
|
// rst*$10
|
|
// [30] main::$5 = main::rst#1 << 4 -- vbuaa=vbuxx_rol_4
|
|
txa
|
|
asl
|
|
asl
|
|
asl
|
|
asl
|
|
// *BORDER_COLOR = rst*$10
|
|
// [31] *BORDER_COLOR = main::$5 -- _deref_pbuc1=vbuaa
|
|
sta BORDER_COLOR
|
|
// asm
|
|
// asm { nop nop nop nop nop nop nop nop nop nop nop nop nop nop nop }
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
nop
|
|
// while (rst!=$f2)
|
|
// [33] if(main::rst#1!=$f2) goto main::@5 -- vbuxx_neq_vbuc1_then_la1
|
|
cpx #$f2
|
|
bne __b5
|
|
jmp __b2
|
|
}
|
|
// gfx_init_chunky
|
|
// Initialize Plane with 8bpp chunky
|
|
gfx_init_chunky: {
|
|
.label __5 = 6
|
|
.label gfxb = 2
|
|
.label x = 4
|
|
.label y = 8
|
|
// dtvSetCpuBankSegment1(gfxbCpuBank++)
|
|
// [35] call dtvSetCpuBankSegment1
|
|
// [54] phi from gfx_init_chunky to dtvSetCpuBankSegment1 [phi:gfx_init_chunky->dtvSetCpuBankSegment1]
|
|
// [54] phi dtvSetCpuBankSegment1::cpuBankIdx#3 = (char)CHUNKY/$4000 [phi:gfx_init_chunky->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
|
|
lda #CHUNKY/$4000
|
|
jsr dtvSetCpuBankSegment1
|
|
// [36] phi from gfx_init_chunky to gfx_init_chunky::@1 [phi:gfx_init_chunky->gfx_init_chunky::@1]
|
|
// [36] phi gfx_init_chunky::gfxbCpuBank#7 = ++(char)CHUNKY/$4000 [phi:gfx_init_chunky->gfx_init_chunky::@1#0] -- vbuxx=vbuc1
|
|
ldx #($ff&CHUNKY/$4000)+1
|
|
// [36] phi gfx_init_chunky::y#6 = 0 [phi:gfx_init_chunky->gfx_init_chunky::@1#1] -- vbuz1=vbuc1
|
|
lda #0
|
|
sta.z y
|
|
// [36] phi gfx_init_chunky::gfxb#5 = (char *) 16384 [phi:gfx_init_chunky->gfx_init_chunky::@1#2] -- pbuz1=pbuc1
|
|
lda #<$4000
|
|
sta.z gfxb
|
|
lda #>$4000
|
|
sta.z gfxb+1
|
|
// [36] phi from gfx_init_chunky::@5 to gfx_init_chunky::@1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1]
|
|
// [36] phi gfx_init_chunky::gfxbCpuBank#7 = gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#0] -- register_copy
|
|
// [36] phi gfx_init_chunky::y#6 = gfx_init_chunky::y#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#1] -- register_copy
|
|
// [36] phi gfx_init_chunky::gfxb#5 = gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@5->gfx_init_chunky::@1#2] -- register_copy
|
|
// gfx_init_chunky::@1
|
|
__b1:
|
|
// [37] phi from gfx_init_chunky::@1 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2]
|
|
// [37] phi gfx_init_chunky::gfxbCpuBank#4 = gfx_init_chunky::gfxbCpuBank#7 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#0] -- register_copy
|
|
// [37] phi gfx_init_chunky::x#2 = 0 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#1] -- vwuz1=vwuc1
|
|
lda #<0
|
|
sta.z x
|
|
sta.z x+1
|
|
// [37] phi gfx_init_chunky::gfxb#3 = gfx_init_chunky::gfxb#5 [phi:gfx_init_chunky::@1->gfx_init_chunky::@2#2] -- register_copy
|
|
// [37] phi from gfx_init_chunky::@3 to gfx_init_chunky::@2 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2]
|
|
// [37] phi gfx_init_chunky::gfxbCpuBank#4 = gfx_init_chunky::gfxbCpuBank#8 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#0] -- register_copy
|
|
// [37] phi gfx_init_chunky::x#2 = gfx_init_chunky::x#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#1] -- register_copy
|
|
// [37] phi gfx_init_chunky::gfxb#3 = gfx_init_chunky::gfxb#1 [phi:gfx_init_chunky::@3->gfx_init_chunky::@2#2] -- register_copy
|
|
// gfx_init_chunky::@2
|
|
__b2:
|
|
// if(gfxb==$8000)
|
|
// [38] if(gfx_init_chunky::gfxb#3!=$8000) goto gfx_init_chunky::@3 -- pbuz1_neq_vwuc1_then_la1
|
|
lda.z gfxb+1
|
|
cmp #>$8000
|
|
bne __b3
|
|
lda.z gfxb
|
|
cmp #<$8000
|
|
bne __b3
|
|
// gfx_init_chunky::@4
|
|
// dtvSetCpuBankSegment1(gfxbCpuBank++)
|
|
// [39] dtvSetCpuBankSegment1::cpuBankIdx#1 = gfx_init_chunky::gfxbCpuBank#4 -- vbuaa=vbuxx
|
|
txa
|
|
// [40] call dtvSetCpuBankSegment1
|
|
// [54] phi from gfx_init_chunky::@4 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1]
|
|
// [54] phi dtvSetCpuBankSegment1::cpuBankIdx#3 = dtvSetCpuBankSegment1::cpuBankIdx#1 [phi:gfx_init_chunky::@4->dtvSetCpuBankSegment1#0] -- register_copy
|
|
jsr dtvSetCpuBankSegment1
|
|
// gfx_init_chunky::@7
|
|
// dtvSetCpuBankSegment1(gfxbCpuBank++);
|
|
// [41] gfx_init_chunky::gfxbCpuBank#2 = ++ gfx_init_chunky::gfxbCpuBank#4 -- vbuxx=_inc_vbuxx
|
|
inx
|
|
// [42] phi from gfx_init_chunky::@7 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3]
|
|
// [42] phi gfx_init_chunky::gfxbCpuBank#8 = gfx_init_chunky::gfxbCpuBank#2 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#0] -- register_copy
|
|
// [42] phi gfx_init_chunky::gfxb#4 = (char *) 16384 [phi:gfx_init_chunky::@7->gfx_init_chunky::@3#1] -- pbuz1=pbuc1
|
|
lda #<$4000
|
|
sta.z gfxb
|
|
lda #>$4000
|
|
sta.z gfxb+1
|
|
// [42] phi from gfx_init_chunky::@2 to gfx_init_chunky::@3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3]
|
|
// [42] phi gfx_init_chunky::gfxbCpuBank#8 = gfx_init_chunky::gfxbCpuBank#4 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#0] -- register_copy
|
|
// [42] phi gfx_init_chunky::gfxb#4 = gfx_init_chunky::gfxb#3 [phi:gfx_init_chunky::@2->gfx_init_chunky::@3#1] -- register_copy
|
|
// gfx_init_chunky::@3
|
|
__b3:
|
|
// x+y
|
|
// [43] gfx_init_chunky::$5 = gfx_init_chunky::x#2 + gfx_init_chunky::y#6 -- vwuz1=vwuz2_plus_vbuz3
|
|
lda.z y
|
|
clc
|
|
adc.z x
|
|
sta.z __5
|
|
lda #0
|
|
adc.z x+1
|
|
sta.z __5+1
|
|
// byte c = (byte)(x+y)
|
|
// [44] gfx_init_chunky::c#0 = (char)gfx_init_chunky::$5 -- vbuaa=_byte_vwuz1
|
|
lda.z __5
|
|
// *gfxb++ = c
|
|
// [45] *gfx_init_chunky::gfxb#4 = gfx_init_chunky::c#0 -- _deref_pbuz1=vbuaa
|
|
ldy #0
|
|
sta (gfxb),y
|
|
// *gfxb++ = c;
|
|
// [46] gfx_init_chunky::gfxb#1 = ++ gfx_init_chunky::gfxb#4 -- pbuz1=_inc_pbuz1
|
|
inc.z gfxb
|
|
bne !+
|
|
inc.z gfxb+1
|
|
!:
|
|
// for (word x : 0..319)
|
|
// [47] gfx_init_chunky::x#1 = ++ gfx_init_chunky::x#2 -- vwuz1=_inc_vwuz1
|
|
inc.z x
|
|
bne !+
|
|
inc.z x+1
|
|
!:
|
|
// [48] if(gfx_init_chunky::x#1!=$140) goto gfx_init_chunky::@2 -- vwuz1_neq_vwuc1_then_la1
|
|
lda.z x+1
|
|
cmp #>$140
|
|
bne __b2
|
|
lda.z x
|
|
cmp #<$140
|
|
bne __b2
|
|
// gfx_init_chunky::@5
|
|
// for(byte y : 0..50)
|
|
// [49] gfx_init_chunky::y#1 = ++ gfx_init_chunky::y#6 -- vbuz1=_inc_vbuz1
|
|
inc.z y
|
|
// [50] if(gfx_init_chunky::y#1!=$33) goto gfx_init_chunky::@1 -- vbuz1_neq_vbuc1_then_la1
|
|
lda #$33
|
|
cmp.z y
|
|
bne __b1
|
|
// [51] phi from gfx_init_chunky::@5 to gfx_init_chunky::@6 [phi:gfx_init_chunky::@5->gfx_init_chunky::@6]
|
|
// gfx_init_chunky::@6
|
|
// dtvSetCpuBankSegment1((byte)($4000/$4000))
|
|
// [52] call dtvSetCpuBankSegment1
|
|
// Reset CPU BANK segment to $4000
|
|
// [54] phi from gfx_init_chunky::@6 to dtvSetCpuBankSegment1 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1]
|
|
// [54] phi dtvSetCpuBankSegment1::cpuBankIdx#3 = (char)$4000/$4000 [phi:gfx_init_chunky::@6->dtvSetCpuBankSegment1#0] -- vbuaa=vbuc1
|
|
lda #$4000/$4000
|
|
jsr dtvSetCpuBankSegment1
|
|
// gfx_init_chunky::@return
|
|
// }
|
|
// [53] return
|
|
rts
|
|
}
|
|
// dtvSetCpuBankSegment1
|
|
// Set the memory pointed to by CPU BANK 1 SEGMENT ($4000-$7fff)
|
|
// This sets which actual memory is addressed when the CPU reads/writes to $4000-$7fff
|
|
// The actual memory addressed will be $4000*cpuSegmentIdx
|
|
// void dtvSetCpuBankSegment1(__register(A) char cpuBankIdx)
|
|
dtvSetCpuBankSegment1: {
|
|
// Move CPU BANK 1 SEGMENT ($4000-$7fff)
|
|
.label cpuBank = $ff
|
|
// *cpuBank = cpuBankIdx
|
|
// [55] *dtvSetCpuBankSegment1::cpuBank = dtvSetCpuBankSegment1::cpuBankIdx#3 -- _deref_pbuc1=vbuaa
|
|
sta.z cpuBank
|
|
// asm
|
|
// asm { .byte$32,$dd lda$ff .byte$32,$00 }
|
|
.byte $32, $dd
|
|
lda.z $ff
|
|
.byte $32, 0
|
|
// dtvSetCpuBankSegment1::@return
|
|
// }
|
|
// [57] return
|
|
rts
|
|
}
|
|
// File Data
|
|
|