mirror of
https://gitlab.com/camelot/kickc.git
synced 2024-09-29 03:56:15 +00:00
506 lines
14 KiB
Plaintext
506 lines
14 KiB
Plaintext
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CONTROL FLOW GRAPH SSA
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@begin: scope:[] from
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(byte) idx#0 ← (byte) 0
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to:@1
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(void()) main()
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main: scope:[main] from @1
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(byte) idx#13 ← phi( @1/(byte) idx#12 )
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(byte) main::i#0 ← (byte) 0
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to:main::@1
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main::@1: scope:[main] from main main::@2
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(byte) idx#11 ← phi( main/(byte) idx#13 main::@2/(byte) idx#1 )
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(byte) main::i#2 ← phi( main/(byte) main::i#0 main::@2/(byte) main::i#1 )
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(byte) out::c#0 ← *((const byte*) msg + (byte) main::i#2)
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call out
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to:main::@2
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main::@2: scope:[main] from main::@1
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(byte) main::i#3 ← phi( main::@1/(byte) main::i#2 )
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(byte) idx#6 ← phi( main::@1/(byte) idx#4 )
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(byte) idx#1 ← (byte) idx#6
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(byte) main::i#1 ← (byte) main::i#3 + rangenext(0,$b)
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(bool~) main::$1 ← (byte) main::i#1 != rangelast(0,$b)
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if((bool~) main::$1) goto main::@1
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to:main::@return
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main::@return: scope:[main] from main::@2
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(byte) idx#7 ← phi( main::@2/(byte) idx#1 )
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(byte) idx#2 ← (byte) idx#7
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return
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to:@return
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(void()) out((byte) out::c)
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out: scope:[out] from main::@1
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(byte) idx#8 ← phi( main::@1/(byte) idx#11 )
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(byte) out::c#1 ← phi( main::@1/(byte) out::c#0 )
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*((const nomodify byte*) SCREEN + (byte) idx#8) ← (byte) out::c#1
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(byte) idx#3 ← ++ (byte) idx#8
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to:out::@return
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out::@return: scope:[out] from out
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(byte) idx#9 ← phi( out/(byte) idx#3 )
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(byte) idx#4 ← (byte) idx#9
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return
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to:@return
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@1: scope:[] from @begin
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(byte) idx#12 ← phi( @begin/(byte) idx#0 )
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call main
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to:@2
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@2: scope:[] from @1
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(byte) idx#10 ← phi( @1/(byte) idx#2 )
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(byte) idx#5 ← (byte) idx#10
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to:@end
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@end: scope:[] from @2
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SYMBOL TABLE SSA
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(label) @1
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(label) @2
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(label) @begin
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(label) @end
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(const nomodify byte*) SCREEN = (byte*)(number) $400
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(byte) idx
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(byte) idx#0
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(byte) idx#1
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(byte) idx#10
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(byte) idx#11
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(byte) idx#12
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(byte) idx#13
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(byte) idx#2
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(byte) idx#3
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(byte) idx#4
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(byte) idx#5
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(byte) idx#6
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(byte) idx#7
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(byte) idx#8
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(byte) idx#9
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(void()) main()
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(bool~) main::$1
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(label) main::@1
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(label) main::@2
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(label) main::@return
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(byte) main::i
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(byte) main::i#0
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(byte) main::i#1
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(byte) main::i#2
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(byte) main::i#3
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(const byte*) msg[] = (byte*) "hello world!"
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(void()) out((byte) out::c)
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(label) out::@return
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(byte) out::c
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(byte) out::c#0
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(byte) out::c#1
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Simplifying constant pointer cast (byte*) 1024
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Successful SSA optimization PassNCastSimplification
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Alias main::i#2 = main::i#3
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Alias idx#1 = idx#6 idx#7 idx#2
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Alias idx#3 = idx#9 idx#4
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Alias idx#0 = idx#12
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Alias idx#10 = idx#5
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Successful SSA optimization Pass2AliasElimination
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Identical Phi Values (byte) idx#13 (byte) idx#0
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Identical Phi Values (byte) idx#1 (byte) idx#3
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Identical Phi Values (byte) out::c#1 (byte) out::c#0
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Identical Phi Values (byte) idx#8 (byte) idx#11
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Identical Phi Values (byte) idx#10 (byte) idx#1
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Successful SSA optimization Pass2IdenticalPhiElimination
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Simple Condition (bool~) main::$1 [9] if((byte) main::i#1!=rangelast(0,$b)) goto main::@1
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Successful SSA optimization Pass2ConditionalJumpSimplification
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Constant (const byte) idx#0 = 0
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Constant (const byte) main::i#0 = 0
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Successful SSA optimization Pass2ConstantIdentification
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Resolved ranged next value [7] main::i#1 ← ++ main::i#2 to ++
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Resolved ranged comparison value [9] if(main::i#1!=rangelast(0,$b)) goto main::@1 to (number) $c
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Adding number conversion cast (unumber) $c in if((byte) main::i#1!=(number) $c) goto main::@1
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Successful SSA optimization PassNAddNumberTypeConversions
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Simplifying constant integer cast $c
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Successful SSA optimization PassNCastSimplification
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Finalized unsigned number type (byte) $c
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Successful SSA optimization PassNFinalizeNumberTypeConversions
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Inlining constant with var siblings (const byte) main::i#0
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Inlining constant with var siblings (const byte) idx#0
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Constant inlined main::i#0 = (byte) 0
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Constant inlined idx#0 = (byte) 0
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Successful SSA optimization Pass2ConstantInlining
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Added new block during phi lifting main::@3(between main::@2 and main::@1)
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Adding NOP phi() at start of @begin
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Adding NOP phi() at start of @1
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Adding NOP phi() at start of @2
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Adding NOP phi() at start of @end
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Adding NOP phi() at start of main
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CALL GRAPH
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Calls in [] to main:2
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Calls in [main] to out:8
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Created 2 initial phi equivalence classes
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Coalesced [12] main::i#4 ← main::i#1
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Coalesced [13] idx#14 ← idx#3
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Coalesced down to 2 phi equivalence classes
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Culled Empty Block (label) @2
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Culled Empty Block (label) main::@3
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Adding NOP phi() at start of @begin
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Adding NOP phi() at start of @1
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Adding NOP phi() at start of @end
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Adding NOP phi() at start of main
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FINAL CONTROL FLOW GRAPH
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@begin: scope:[] from
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[0] phi()
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to:@1
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@1: scope:[] from @begin
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[1] phi()
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[2] call main
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to:@end
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@end: scope:[] from @1
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[3] phi()
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(void()) main()
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main: scope:[main] from @1
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[4] phi()
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to:main::@1
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main::@1: scope:[main] from main main::@2
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[5] (byte) idx#11 ← phi( main/(byte) 0 main::@2/(byte) idx#3 )
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[5] (byte) main::i#2 ← phi( main/(byte) 0 main::@2/(byte) main::i#1 )
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[6] (byte) out::c#0 ← *((const byte*) msg + (byte) main::i#2)
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[7] call out
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to:main::@2
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main::@2: scope:[main] from main::@1
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[8] (byte) main::i#1 ← ++ (byte) main::i#2
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[9] if((byte) main::i#1!=(byte) $c) goto main::@1
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to:main::@return
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main::@return: scope:[main] from main::@2
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[10] return
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to:@return
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(void()) out((byte) out::c)
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out: scope:[out] from main::@1
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[11] *((const nomodify byte*) SCREEN + (byte) idx#11) ← (byte) out::c#0
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[12] (byte) idx#3 ← ++ (byte) idx#11
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to:out::@return
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out::@return: scope:[out] from out
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[13] return
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to:@return
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VARIABLE REGISTER WEIGHTS
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(byte) idx
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(byte) idx#11 701.0
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(byte) idx#3 220.39999999999998
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(void()) main()
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(byte) main::i
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(byte) main::i#1 151.5
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(byte) main::i#2 101.0
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(void()) out((byte) out::c)
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(byte) out::c
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(byte) out::c#0 1102.0
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Initial phi equivalence classes
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[ main::i#2 main::i#1 ]
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[ idx#11 idx#3 ]
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Added variable out::c#0 to live range equivalence class [ out::c#0 ]
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Complete equivalence classes
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[ main::i#2 main::i#1 ]
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[ idx#11 idx#3 ]
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[ out::c#0 ]
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Allocated zp[1]:2 [ main::i#2 main::i#1 ]
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Allocated zp[1]:3 [ idx#11 idx#3 ]
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Allocated zp[1]:4 [ out::c#0 ]
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INITIAL ASM
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Target platform is c64basic / MOS6502X
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// File Comments
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// Test effective live range and register allocation
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// out::c should be a hardware register, main::i should be a hardware register, global idx should be a hardware register
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// Upstart
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.pc = $801 "Basic"
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:BasicUpstart(main)
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.pc = $80d "Program"
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// Global Constants & labels
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.label SCREEN = $400
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.label idx = 3
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// @begin
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__bbegin:
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// [1] phi from @begin to @1 [phi:@begin->@1]
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__b1_from___bbegin:
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jmp __b1
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// @1
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__b1:
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// [2] call main
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// [4] phi from @1 to main [phi:@1->main]
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main_from___b1:
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jsr main
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// [3] phi from @1 to @end [phi:@1->@end]
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__bend_from___b1:
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jmp __bend
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// @end
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__bend:
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// main
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main: {
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.label i = 2
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// [5] phi from main to main::@1 [phi:main->main::@1]
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__b1_from_main:
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// [5] phi (byte) idx#11 = (byte) 0 [phi:main->main::@1#0] -- vbuz1=vbuc1
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lda #0
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sta.z idx
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// [5] phi (byte) main::i#2 = (byte) 0 [phi:main->main::@1#1] -- vbuz1=vbuc1
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lda #0
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sta.z i
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jmp __b1
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// [5] phi from main::@2 to main::@1 [phi:main::@2->main::@1]
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__b1_from___b2:
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// [5] phi (byte) idx#11 = (byte) idx#3 [phi:main::@2->main::@1#0] -- register_copy
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// [5] phi (byte) main::i#2 = (byte) main::i#1 [phi:main::@2->main::@1#1] -- register_copy
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jmp __b1
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// main::@1
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__b1:
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// [6] (byte) out::c#0 ← *((const byte*) msg + (byte) main::i#2) -- vbuz1=pbuc1_derefidx_vbuz2
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ldy.z i
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lda msg,y
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sta.z out.c
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// [7] call out
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jsr out
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jmp __b2
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// main::@2
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__b2:
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// [8] (byte) main::i#1 ← ++ (byte) main::i#2 -- vbuz1=_inc_vbuz1
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inc.z i
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// [9] if((byte) main::i#1!=(byte) $c) goto main::@1 -- vbuz1_neq_vbuc1_then_la1
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lda #$c
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cmp.z i
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bne __b1_from___b2
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jmp __breturn
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// main::@return
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__breturn:
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// [10] return
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rts
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}
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// out
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// out(byte zp(4) c)
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out: {
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.label c = 4
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// [11] *((const nomodify byte*) SCREEN + (byte) idx#11) ← (byte) out::c#0 -- pbuc1_derefidx_vbuz1=vbuz2
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lda.z c
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ldy.z idx
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sta SCREEN,y
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// [12] (byte) idx#3 ← ++ (byte) idx#11 -- vbuz1=_inc_vbuz1
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inc.z idx
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jmp __breturn
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// out::@return
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__breturn:
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// [13] return
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rts
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}
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// File Data
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msg: .text "hello world!"
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.byte 0
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REGISTER UPLIFT POTENTIAL REGISTERS
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Potential registers zp[1]:2 [ main::i#2 main::i#1 ] : zp[1]:2 , reg byte a , reg byte x , reg byte y ,
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Potential registers zp[1]:3 [ idx#11 idx#3 ] : zp[1]:3 , reg byte a , reg byte x , reg byte y ,
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Potential registers zp[1]:4 [ out::c#0 ] : zp[1]:4 , reg byte a , reg byte x , reg byte y ,
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REGISTER UPLIFT SCOPES
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Uplift Scope [out] 1,102: zp[1]:4 [ out::c#0 ]
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Uplift Scope [] 921.4: zp[1]:3 [ idx#11 idx#3 ]
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Uplift Scope [main] 252.5: zp[1]:2 [ main::i#2 main::i#1 ]
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Uplifting [out] best 520 combination reg byte a [ out::c#0 ]
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Uplifting [] best 484 combination reg byte x [ idx#11 idx#3 ]
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Uplifting [main] best 364 combination reg byte y [ main::i#2 main::i#1 ]
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ASSEMBLER BEFORE OPTIMIZATION
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// File Comments
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// Test effective live range and register allocation
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// out::c should be a hardware register, main::i should be a hardware register, global idx should be a hardware register
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// Upstart
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.pc = $801 "Basic"
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:BasicUpstart(main)
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.pc = $80d "Program"
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// Global Constants & labels
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.label SCREEN = $400
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// @begin
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__bbegin:
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// [1] phi from @begin to @1 [phi:@begin->@1]
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__b1_from___bbegin:
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jmp __b1
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// @1
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__b1:
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// [2] call main
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// [4] phi from @1 to main [phi:@1->main]
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main_from___b1:
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jsr main
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// [3] phi from @1 to @end [phi:@1->@end]
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__bend_from___b1:
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jmp __bend
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// @end
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__bend:
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// main
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main: {
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// [5] phi from main to main::@1 [phi:main->main::@1]
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__b1_from_main:
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// [5] phi (byte) idx#11 = (byte) 0 [phi:main->main::@1#0] -- vbuxx=vbuc1
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ldx #0
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// [5] phi (byte) main::i#2 = (byte) 0 [phi:main->main::@1#1] -- vbuyy=vbuc1
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ldy #0
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jmp __b1
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// [5] phi from main::@2 to main::@1 [phi:main::@2->main::@1]
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__b1_from___b2:
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// [5] phi (byte) idx#11 = (byte) idx#3 [phi:main::@2->main::@1#0] -- register_copy
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// [5] phi (byte) main::i#2 = (byte) main::i#1 [phi:main::@2->main::@1#1] -- register_copy
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jmp __b1
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// main::@1
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__b1:
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// [6] (byte) out::c#0 ← *((const byte*) msg + (byte) main::i#2) -- vbuaa=pbuc1_derefidx_vbuyy
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lda msg,y
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// [7] call out
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jsr out
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jmp __b2
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// main::@2
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__b2:
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// [8] (byte) main::i#1 ← ++ (byte) main::i#2 -- vbuyy=_inc_vbuyy
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iny
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// [9] if((byte) main::i#1!=(byte) $c) goto main::@1 -- vbuyy_neq_vbuc1_then_la1
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cpy #$c
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bne __b1_from___b2
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jmp __breturn
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// main::@return
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__breturn:
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// [10] return
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rts
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}
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// out
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// out(byte register(A) c)
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out: {
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// [11] *((const nomodify byte*) SCREEN + (byte) idx#11) ← (byte) out::c#0 -- pbuc1_derefidx_vbuxx=vbuaa
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sta SCREEN,x
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// [12] (byte) idx#3 ← ++ (byte) idx#11 -- vbuxx=_inc_vbuxx
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inx
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jmp __breturn
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// out::@return
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__breturn:
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// [13] return
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rts
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}
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// File Data
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msg: .text "hello world!"
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.byte 0
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ASSEMBLER OPTIMIZATIONS
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Removing instruction jmp __b1
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Removing instruction jmp __bend
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Removing instruction jmp __b1
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Removing instruction jmp __b2
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Removing instruction jmp __breturn
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Removing instruction jmp __breturn
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Succesful ASM optimization Pass5NextJumpElimination
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Replacing label __b1_from___b2 with __b1
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Removing instruction __b1_from___bbegin:
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Removing instruction __b1:
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Removing instruction main_from___b1:
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Removing instruction __bend_from___b1:
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Removing instruction __b1_from___b2:
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Succesful ASM optimization Pass5RedundantLabelElimination
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Removing instruction __bbegin:
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Removing instruction __bend:
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Removing instruction __b1_from_main:
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Removing instruction __b2:
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Removing instruction __breturn:
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Removing instruction __breturn:
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Succesful ASM optimization Pass5UnusedLabelElimination
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Removing instruction jsr main
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Succesful ASM optimization Pass5SkipBegin
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Removing instruction jmp __b1
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Succesful ASM optimization Pass5NextJumpElimination
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FINAL SYMBOL TABLE
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(label) @1
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(label) @begin
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(label) @end
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(const nomodify byte*) SCREEN = (byte*) 1024
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(byte) idx
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(byte) idx#11 reg byte x 701.0
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(byte) idx#3 reg byte x 220.39999999999998
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(void()) main()
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(label) main::@1
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(label) main::@2
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(label) main::@return
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(byte) main::i
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(byte) main::i#1 reg byte y 151.5
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(byte) main::i#2 reg byte y 101.0
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(const byte*) msg[] = (byte*) "hello world!"
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(void()) out((byte) out::c)
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(label) out::@return
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(byte) out::c
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(byte) out::c#0 reg byte a 1102.0
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reg byte y [ main::i#2 main::i#1 ]
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reg byte x [ idx#11 idx#3 ]
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reg byte a [ out::c#0 ]
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FINAL ASSEMBLER
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Score: 229
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// File Comments
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// Test effective live range and register allocation
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// out::c should be a hardware register, main::i should be a hardware register, global idx should be a hardware register
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// Upstart
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.pc = $801 "Basic"
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:BasicUpstart(main)
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.pc = $80d "Program"
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// Global Constants & labels
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.label SCREEN = $400
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// @begin
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// [1] phi from @begin to @1 [phi:@begin->@1]
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// @1
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// [2] call main
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// [4] phi from @1 to main [phi:@1->main]
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// [3] phi from @1 to @end [phi:@1->@end]
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// @end
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// main
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main: {
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// [5] phi from main to main::@1 [phi:main->main::@1]
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// [5] phi (byte) idx#11 = (byte) 0 [phi:main->main::@1#0] -- vbuxx=vbuc1
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ldx #0
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// [5] phi (byte) main::i#2 = (byte) 0 [phi:main->main::@1#1] -- vbuyy=vbuc1
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ldy #0
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// [5] phi from main::@2 to main::@1 [phi:main::@2->main::@1]
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// [5] phi (byte) idx#11 = (byte) idx#3 [phi:main::@2->main::@1#0] -- register_copy
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// [5] phi (byte) main::i#2 = (byte) main::i#1 [phi:main::@2->main::@1#1] -- register_copy
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// main::@1
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__b1:
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// out(msg[i])
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// [6] (byte) out::c#0 ← *((const byte*) msg + (byte) main::i#2) -- vbuaa=pbuc1_derefidx_vbuyy
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lda msg,y
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// [7] call out
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jsr out
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// main::@2
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// for( byte i: 0..11)
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// [8] (byte) main::i#1 ← ++ (byte) main::i#2 -- vbuyy=_inc_vbuyy
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iny
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// [9] if((byte) main::i#1!=(byte) $c) goto main::@1 -- vbuyy_neq_vbuc1_then_la1
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cpy #$c
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bne __b1
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// main::@return
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// }
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// [10] return
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rts
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}
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// out
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// out(byte register(A) c)
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out: {
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// SCREEN[idx++] = c
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// [11] *((const nomodify byte*) SCREEN + (byte) idx#11) ← (byte) out::c#0 -- pbuc1_derefidx_vbuxx=vbuaa
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sta SCREEN,x
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// SCREEN[idx++] = c;
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// [12] (byte) idx#3 ← ++ (byte) idx#11 -- vbuxx=_inc_vbuxx
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inx
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// out::@return
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// }
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// [13] return
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rts
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}
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// File Data
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msg: .text "hello world!"
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.byte 0
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