mirror of
https://github.com/irmen/ksim65.git
synced 2024-06-01 06:41:34 +00:00
added most of a built-in machine code monitor
This commit is contained in:
Irmen de Jong
parent
fbdc08d696
commit
af4e901f6c
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@ -40,6 +40,7 @@ class C64Machine(title: String) : IVirtualMachine {
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private val debugWindow = DebugWindow(this)
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private val hostDisplay = MainC64Window(title, chargenData, ram, cpu, cia1)
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private val monitor = Monitor(bus, cpu)
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private var paused = false
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init {
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@ -240,6 +241,8 @@ class C64Machine(title: String) : IVirtualMachine {
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while (cpu.instrCycles > 0) bus.clock()
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}
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override fun executeMonitorCommand(command: String) = monitor.command(command)
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fun start() {
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javax.swing.Timer(50) {
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debugWindow.updateCpu(cpu, bus)
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@ -251,6 +251,28 @@ class DebugWindow(private val vm: IVirtualMachine) : JFrame("Debugger - ksim65 v
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zeropagePanel.add(zeropageTf)
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zeropagePanel.add(stackpageTf)
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val monitorPanel = JPanel()
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monitorPanel.layout = BoxLayout(monitorPanel, BoxLayout.Y_AXIS)
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monitorPanel.border = BorderFactory.createTitledBorder("Built-in Monitor")
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val output = JTextArea(5, 50)
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output.font = Font(Font.MONOSPACED, Font.PLAIN, 14)
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output.isEditable = false
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val outputScroll = JScrollPane(output)
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monitorPanel.add(outputScroll)
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val input = JTextField(50)
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input.border = BorderFactory.createLineBorder(Color.LIGHT_GRAY)
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input.font = Font(Font.MONOSPACED, Font.PLAIN, 14)
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input.addActionListener {
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output.append("\n")
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val command = input.text.trim()
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val result = vm.executeMonitorCommand(command)
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if(result.echo)
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output.append("> $command\n")
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output.append(result.output)
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input.text = result.prompt
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}
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monitorPanel.add(input)
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gc.gridx=0
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gc.gridy=0
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gc.fill=GridBagConstraints.BOTH
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@ -258,6 +280,8 @@ class DebugWindow(private val vm: IVirtualMachine) : JFrame("Debugger - ksim65 v
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gc.gridy++
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contentPane.add(zeropagePanel, gc)
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gc.gridy++
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contentPane.add(monitorPanel, gc)
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gc.gridy++
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contentPane.add(buttonPanel, gc)
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pack()
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}
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@ -1,9 +1,6 @@
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package razorvine.examplemachines
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import razorvine.ksim65.Bus
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import razorvine.ksim65.Cpu6502
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import razorvine.ksim65.IVirtualMachine
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import razorvine.ksim65.Version
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import razorvine.ksim65.*
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import razorvine.ksim65.components.*
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import java.io.File
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import javax.swing.ImageIcon
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@ -21,6 +18,7 @@ class VirtualMachine(title: String) : IVirtualMachine {
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private val rtc = RealTimeClock(0xd100, 0xd108)
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private val timer = Timer(0xd200, 0xd203, cpu)
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private val monitor = Monitor(bus, cpu)
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private val debugWindow = DebugWindow(this)
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private val hostDisplay = MainWindow(title)
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private val display = Display(
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@ -74,6 +72,8 @@ class VirtualMachine(title: String) : IVirtualMachine {
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while (cpu.instrCycles > 0) bus.clock()
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}
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override fun executeMonitorCommand(command: String) = monitor.command(command)
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fun start() {
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javax.swing.Timer(50) {
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debugWindow.updateCpu(cpu, bus)
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@ -116,7 +116,7 @@ open class Cpu6502 : BusComponent() {
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}
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}
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protected enum class AddrMode {
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enum class AddrMode {
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Imp,
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Acc,
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Imm,
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@ -135,7 +135,7 @@ open class Cpu6502 : BusComponent() {
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IaX, // special addressing mode used by the 65C02
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}
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protected class Instruction(val mnemonic: String, val mode: AddrMode, val cycles: Int)
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class Instruction(val mnemonic: String, val mode: AddrMode, val cycles: Int)
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var regA: Int = 0
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var regX: Int = 0
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@ -198,7 +198,7 @@ open class Cpu6502 : BusComponent() {
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fun disassemble(memory: MemoryComponent, from: Address, to: Address) =
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disassemble(memory.data, memory.startAddress, from, to)
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fun disassemble(memory: Array<UByte>, baseAddress: Address, from: Address, to: Address): List<String> {
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fun disassemble(memory: Array<UByte>, baseAddress: Address, from: Address, to: Address): Pair<List<String>, Address> {
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var location = from
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val result = mutableListOf<String>()
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@ -208,7 +208,7 @@ open class Cpu6502 : BusComponent() {
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location += dis.second
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}
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return result
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return Pair(result, location)
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}
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fun disassembleOneInstruction(memory: Array<UByte>, address: Address, baseAddress: Address): Pair<String, Int> {
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@ -459,7 +459,7 @@ open class Cpu6502 : BusComponent() {
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protected fun write(address: Address, data: Int) = bus.write(address, data.toShort())
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// opcodes table from http://www.oxyron.de/html/opcodes02.html
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protected open val instructions: Array<Instruction> =
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open val instructions: Array<Instruction> =
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listOf(
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/* 00 */ Instruction("brk", AddrMode.Imp, 7),
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/* 01 */ Instruction("ora", AddrMode.IzX, 6),
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@ -777,14 +777,14 @@ open class Cpu6502 : BusComponent() {
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fetchedAddress = lo or (hi shl 8)
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}
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AddrMode.IzX -> {
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// note: not able to fetch an address which crosses the page boundary
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// note: not able to fetch an address which crosses the (zero)page boundary
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fetchedAddress = readPc()
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val lo = read((fetchedAddress + regX) and 0xff)
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val hi = read((fetchedAddress + regX + 1) and 0xff)
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fetchedAddress = lo or (hi shl 8)
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}
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AddrMode.IzY -> {
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// note: not able to fetch an address which crosses the page boundary
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// note: not able to fetch an address which crosses the (zero)page boundary
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fetchedAddress = readPc()
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val lo = read(fetchedAddress)
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val hi = read((fetchedAddress + 1) and 0xff)
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@ -10,6 +10,9 @@ interface IVirtualMachine {
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fun getZeroAndStackPages(): Array<UByte>
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fun loadFileInRam(file: File, loadAddress: Address?)
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class MonitorCmdResult(val output: String, val prompt: String, val echo: Boolean)
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fun executeMonitorCommand(command: String): MonitorCmdResult
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val cpu: Cpu6502
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val bus: Bus
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}
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190
src/main/kotlin/razorvine/ksim65/Monitor.kt
Normal file
190
src/main/kotlin/razorvine/ksim65/Monitor.kt
Normal file
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@ -0,0 +1,190 @@
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package razorvine.ksim65
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class Monitor(val bus: Bus, val cpu: Cpu6502) {
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private val instructions by lazy {
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val instr = cpu.instructions.withIndex().associate {
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Pair(it.value.mnemonic, it.value.mode) to it.index
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}.toMutableMap()
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instr[Pair("nop", Cpu6502.AddrMode.Imp)] = 0xea
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instr.toMap()
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}
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fun command(command: String): IVirtualMachine.MonitorCmdResult {
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if(command.isEmpty())
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return IVirtualMachine.MonitorCmdResult("", "", false)
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return when(command[0]) {
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'f' -> {
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val parts = command.substring(1).trim().split(' ')
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if(parts.size!=3)
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IVirtualMachine.MonitorCmdResult("?syntax error", command, false)
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else {
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val start = parseNumber(parts[0])
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val end = parseNumber(parts[1])
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val value = parseNumber(parts[2]).toShort()
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for(addr in start..end) {
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bus.write(addr, value)
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}
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IVirtualMachine.MonitorCmdResult("ok", "", true)
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}
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}
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'm' -> {
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// TODO add possibility to change bytes
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val addresses = command.substring(1).trim().split(' ')
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val start = parseNumber(addresses[0])
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val end = if(addresses.size>1) parseNumber(addresses[1]) else start+1
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val result = mutableListOf<String>()
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for(addr in start until end step 16) {
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result.add(
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"m$${hexW(addr)} " +
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(0..15).joinToString(" ") { hexB(bus.read(addr + it)) } + " " +
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(0..15).joinToString("") {
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val chr = bus.read(addr+it).toChar()
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if(chr.isLetterOrDigit())
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chr.toString()
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else
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"."
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}
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)
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}
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IVirtualMachine.MonitorCmdResult(result.joinToString("\n"), "", true)
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}
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'i' -> {
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val addresses = command.substring(1).trim().split(' ')
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val start = parseNumber(addresses[0])
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val end = if(addresses.size>1) parseNumber(addresses[1]) else start+1
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val result = mutableListOf<String>()
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for(addr in start until end step 64) {
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result.add(
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"i$${hexW(addr)} " +
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(0..63).joinToString("") {
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val chr = bus.read(addr+it).toChar()
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if(chr.isLetterOrDigit())
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chr.toString()
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else
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"."
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}
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)
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}
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IVirtualMachine.MonitorCmdResult(result.joinToString("\n"), "", true)
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}
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'$' -> {
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val number = parseNumber(command)
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val output = "$${hexW(number)} #$number %${number.toString(2)}"
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IVirtualMachine.MonitorCmdResult(output, "", true)
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}
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'#' -> {
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val number = parseNumber(command)
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val output = "$${hexW(number)} #$number %${number.toString(2)}"
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IVirtualMachine.MonitorCmdResult(output, "", true)
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}
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'%' -> {
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val number = parseNumber(command)
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val output = "$${hexW(number)} #$number %${number.toString(2)}"
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IVirtualMachine.MonitorCmdResult(output, "", true)
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}
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'g' -> {
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val address = parseNumber(command.substring(1))
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cpu.regPC = address
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IVirtualMachine.MonitorCmdResult("", "", true)
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}
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'a' -> {
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val parts = command.substring(1).trim().split(' ')
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assemble(command, parts)
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}
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'd' -> {
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val addresses = command.substring(1).trim().split(' ')
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val start = parseNumber(addresses[0])
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val end = if(addresses.size>1) parseNumber(addresses[1]) else start
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val disassem = cpu.disassemble(bus.memoryComponentFor(start), start, end)
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IVirtualMachine.MonitorCmdResult(disassem.first.joinToString("\n") { "d$it" }, "d$${hexW(disassem.second)}", false)
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}
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else -> {
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IVirtualMachine.MonitorCmdResult("?unknown command", "", true)
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}
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}
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}
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private fun assemble(command: String, parts: List<String>): IVirtualMachine.MonitorCmdResult {
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if(parts.size<2)
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return IVirtualMachine.MonitorCmdResult("done", "", false)
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val address = parseNumber(parts[0])
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val mnemonic = parts[1].toLowerCase()
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when {
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parts.size==2 -> {
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// implied or acc
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var instruction = instructions[Pair(mnemonic, Cpu6502.AddrMode.Imp)]
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if(instruction==null)
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instruction = instructions[Pair(mnemonic, Cpu6502.AddrMode.Acc)]
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if(instruction==null)
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return IVirtualMachine.MonitorCmdResult("?invalid instruction", command, false)
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bus.write(address, instruction.toShort())
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val disassem = cpu.disassemble(bus.memoryComponentFor(address), address, address)
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return IVirtualMachine.MonitorCmdResult(disassem.first.single(), "a$${hexW(disassem.second)} ", false)
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}
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parts.size==3 -> {
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val arg = parts[2]
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when {
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arg.startsWith('#') -> {
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// immediate
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val instruction = instructions[Pair(mnemonic, Cpu6502.AddrMode.Imm)]
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?: return IVirtualMachine.MonitorCmdResult("?invalid instruction", command, false)
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bus.write(address, instruction.toShort())
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bus.write(address+1, parseNumber(arg.substring(1), true).toShort())
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val disassem = cpu.disassemble(bus.memoryComponentFor(address), address, address)
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return IVirtualMachine.MonitorCmdResult(disassem.first.single(), "a$${hexW(disassem.second)} ", false)
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}
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arg.startsWith('(') -> // indirect or indirect+indexed
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TODO("assemble indirect addrmode $arg")
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arg.contains(",x") -> // indexed x
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TODO("assemble indexed X addrmode $arg")
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arg.contains(",y") -> // indexed y
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TODO("assemble indexed X addrmode $arg")
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else -> {
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val instr = instructions[Pair(mnemonic, Cpu6502.AddrMode.Rel)]
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if(instr!=null) {
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// relative address
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val rel = parseNumber(arg)
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bus.write(address, instr.toShort())
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bus.write(address+1, (rel-address-2 and 255).toShort())
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} else {
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// absolute or absZp
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val absAddress = parseNumber(arg)
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if (absAddress <= 255) {
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val absInstr = instructions[Pair(mnemonic, Cpu6502.AddrMode.Zp)]
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?: return IVirtualMachine.MonitorCmdResult("?invalid instruction", command, false)
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bus.write(address, absInstr.toShort())
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bus.write(address + 1, absAddress.toShort())
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} else {
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val absInstr = instructions[Pair(mnemonic, Cpu6502.AddrMode.Abs)]
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?: return IVirtualMachine.MonitorCmdResult("?invalid instruction", command, false)
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bus.write(address, absInstr.toShort())
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bus.write(address + 1, (absAddress and 255).toShort())
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bus.write(address + 2, (absAddress ushr 8).toShort())
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}
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}
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val disassem = cpu.disassemble(bus.memoryComponentFor(address), address, address)
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return IVirtualMachine.MonitorCmdResult(disassem.first.single(), "a$${hexW(disassem.second)} ", false)
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}
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}
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}
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else -> return IVirtualMachine.MonitorCmdResult("?syntax error", command, false)
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}
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}
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private fun parseNumber(number: String, decimalFirst: Boolean = false): Int {
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val num=number.trim()
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if(num.isBlank())
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return 0
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if(decimalFirst && num[0].isDigit())
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return num.toInt(10)
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return when(num[0]) {
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'$' -> num.substring(1).trimStart().toInt(16)
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'#' -> num.substring(1).trimStart().toInt(10)
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'%' -> num.substring(1).trimStart().toInt(2)
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else -> num.toInt(16)
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}
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}
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}
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@ -38,7 +38,7 @@ class Test6502Functional {
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println(cpu.snapshot())
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val d = cpu.disassemble(ram, cpu.regPC-20, cpu.regPC+20)
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println(d.joinToString ("\n"))
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println(d.first.joinToString ("\n"))
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fail("test failed")
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}
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@ -70,7 +70,7 @@ class Test6502Functional {
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println(cpu.snapshot())
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val d = cpu.disassemble(ram, cpu.regPC-20, cpu.regPC+20)
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println(d.joinToString ("\n"))
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println(d.first.joinToString ("\n"))
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fail("test failed")
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}
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@ -13,12 +13,13 @@ class TestDisassembler {
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val binfile = javaClass.classLoader.getResourceAsStream("disassem_instr_test.prg")?.readBytes()!!
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memory.load(binfile, 0x1000-2)
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val result = cpu.disassemble(memory, 0x1000, 0x1221)
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assertEquals(256, result.size)
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assertEquals("\$1000 69 01 adc #\$01", result[0])
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assertEquals(256, result.first.size)
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assertEquals(0x1222, result.second)
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assertEquals("\$1000 69 01 adc #\$01", result.first[0])
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val reference = javaClass.classLoader.getResource("disassem_ref_output.txt")?.readText()!!.trim().lines()
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assertEquals(256, reference.size)
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for (line in result.zip(reference)) {
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for (line in result.first.zip(reference)) {
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if (line.first != line.second) {
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fail("disassembled instruction mismatch: '${line.first}', expected '${line.second}'")
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}
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@ -31,8 +32,9 @@ class TestDisassembler {
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val memory = Ram(0, 0x0fff)
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val source = javaClass.classLoader.getResource("disassem_r65c02.bin").readBytes()
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memory.load(source, 0x0200)
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val resultLines = cpu.disassemble(memory, 0x0200, 0x0250)
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val result = resultLines.joinToString("\n")
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val disassem = cpu.disassemble(memory, 0x0200, 0x0250)
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assertEquals(0x251, disassem.second)
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val result = disassem.first.joinToString("\n")
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assertEquals("""${'$'}0200 07 12 rmb0 ${'$'}12
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${'$'}0202 17 12 rmb1 ${'$'}12
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${'$'}0204 27 12 rmb2 ${'$'}12
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@ -76,8 +78,9 @@ ${'$'}0250 00 brk""", result)
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val memory = Ram(0, 0x0fff)
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val source = javaClass.classLoader.getResource("disassem_wdc65c02.bin").readBytes()
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memory.load(source, 0x200)
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val resultLines = cpu.disassemble(memory, 0x0200, 0x0215)
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val result = resultLines.joinToString("\n")
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val disassem = cpu.disassemble(memory, 0x0200, 0x0215)
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assertEquals(0x216, disassem.second)
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val result = disassem.first.joinToString("\n")
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assertEquals("""${'$'}0200 cb wai
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${'$'}0201 db stp
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${'$'}0202 3a dec a
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