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https://github.com/irmen/ksim65.git
synced 2024-06-01 21:41:31 +00:00
fix cpu irq/nmi handling
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30b164bb6d
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@ -257,9 +257,7 @@ open class Cpu6502 : BusComponent() {
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*/
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override fun clock() {
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if (instrCycles == 0) {
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if (pendingIRQ || pendingNMI) {
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// NMI or IRQ interrupt.
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regPC++
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if(pendingNMI || (pendingIRQ && !regP.I)) {
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handleInterrupt()
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return
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}
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@ -330,7 +328,7 @@ open class Cpu6502 : BusComponent() {
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}
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fun irq() {
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if (!regP.I && !pendingNMI) pendingIRQ = true
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pendingIRQ = true
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}
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protected fun getFetched() =
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@ -1087,17 +1085,20 @@ open class Cpu6502 : BusComponent() {
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protected open fun handleInterrupt() {
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// handle NMI or IRQ -- very similar to the BRK opcode above
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pushStackAddr(regPC-1)
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pushStackAddr(regPC)
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regPC++
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regP.B = false
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pushStack(regP)
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regP.I = true // interrupts are now disabled
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// NMOS 6502 doesn't clear the D flag (CMOS 65C02 version does...)
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regPC = readWord(if (pendingNMI) NMI_vector else IRQ_vector)
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if(pendingNMI)
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if(pendingNMI) {
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regPC = readWord(NMI_vector)
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pendingNMI = false
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else
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} else {
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regPC = readWord(IRQ_vector)
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pendingIRQ = false
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}
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}
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protected fun iBvc() {
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@ -636,18 +636,8 @@ class Cpu65C02 : Cpu6502() {
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}
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override fun handleInterrupt() {
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// handle NMI or IRQ -- very similar to the BRK opcode above
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pushStackAddr(regPC-1)
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regP.B = false
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pushStack(regP)
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regP.I = true // interrupts are now disabled
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super.handleInterrupt()
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regP.D = false // this is different from NMOS 6502
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regPC = readWord(if (pendingNMI) NMI_vector else IRQ_vector)
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if(pendingNMI)
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pendingNMI = false
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else
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pendingIRQ = false
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}
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override fun iBit() {
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@ -82,7 +82,6 @@ class Test6502Klaus2m5Functional {
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@Test
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fun testInterrupts6502() {
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// TODO fix this test code
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val cpu = Cpu6502()
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class Trigger(startAddress: Address, endAddress: Address) : MemMappedComponent(startAddress, endAddress) {
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var value: UByte = 0
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@ -95,17 +94,17 @@ class Test6502Klaus2m5Functional {
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value = data
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when(value.toInt()) {
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1 -> {
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println("IRQ at pc ${hexW(cpu.regPC)}")
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// println("IRQ at pc ${hexW(cpu.regPC)}")
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lastIRQpc = cpu.regPC
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cpu.irq()
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}
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2 -> {
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println("NMI at pc ${hexW(cpu.regPC)}")
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// println("NMI at pc ${hexW(cpu.regPC)}")
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lastNMIpc = cpu.regPC
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cpu.nmi()
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}
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3 -> {
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println("IRQ+NMI at pc ${hexW(cpu.regPC)}")
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// println("IRQ+NMI at pc ${hexW(cpu.regPC)}")
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lastIRQpc = cpu.regPC
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lastNMIpc = cpu.regPC
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cpu.nmi()
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