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updating Klaus Dormann's functional tests
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@ -8,7 +8,7 @@ import razorvine.ksim65.components.UByte
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/**
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* 6502 cpu simulation (the NMOS version) including the 'illegal' opcodes.
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* TODO: actually implement the illegal opcodes, see http://www.ffd2.com/fridge/docs/6502-NMOS.extra.opcodes
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* TODO: actually implement the illegal opcodes, see http://www.ffd2.com/fridge/docs/6502-NMOS.extra.opcodes or https://sourceforge.net/p/moarnes/code/ci/master/tree/src/6502.c
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*/
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open class Cpu6502 : BusComponent() {
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open val name = "6502"
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@ -1458,8 +1458,8 @@ open class Cpu6502 : BusComponent() {
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TODO("\$${hexB(currentOpcode)} - xaa - ('illegal' instruction) @ \$${hexW(currentOpcodeAddress)}")
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}
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// invalid instruction (JAM / KIL)
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// invalid instruction (JAM / KIL / HLT)
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private fun iInvalid() {
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throw InstructionError("invalid instruction encountered: opcode=${hexB(currentOpcode)} instr=${currentInstruction.mnemonic}")
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throw InstructionError("invalid instruction encountered: opcode=${hexB(currentOpcode)} instr=${currentInstruction.mnemonic} @ ${hexW(currentOpcodeAddress)}")
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}
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}
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@ -100,7 +100,7 @@ I_flag = 3
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;configure memory - try to stay away from memory used by the system
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;zero_page memory start address, $52 (82) consecutive Bytes required
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; add 2 if I_flag = 2
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zero_page = $a
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zero_page = $0
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;data_segment memory start address, $7B (123) consecutive Bytes required
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data_segment = $200
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@ -83,7 +83,7 @@ D_clear = 0 ;0 = not cleared (NMOS), 1 = cleared (CMOS)
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;configure memory - try to stay away from memory used by the system
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;zero_page memory start address, 6 consecutive Bytes required
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zero_page = $a
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zero_page = $0
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;data_segment memory start address, 4 consecutive Bytes required
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data_segment = $200
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@ -1023,4 +1023,3 @@ vec_bss equ $fffa
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end start
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Binary file not shown.
File diff suppressed because it is too large
Load Diff
Binary file not shown.
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@ -87,7 +87,7 @@ bffc = I_port = $bffc ;feedback port address
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;configure memory - try to stay away from memory used by the system
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;zero_page memory start address, 6 consecutive Bytes required
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000a = zero_page = $a
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0000 = zero_page = $0
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;data_segment memory start address, 4 consecutive Bytes required
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0200 = data_segment = $200
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@ -195,16 +195,16 @@ bffc = I_port = $bffc ;feedback port address
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else
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bss ;uninitialized segment, copy of data at end of code!
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endif
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000a = org zero_page
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0000 = org zero_page
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;BRK, IRQ, NMI test interrupt save
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000a : zpt
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000a : 00 irq_a ds 1 ;a register
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000b : 00 irq_x ds 1 ;x register
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000c : 00 irq_f ds 1 ;flags
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000d : 00 nmi_a ds 1 ;a register
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000e : 00 nmi_x ds 1 ;x register
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000f : 00 nmi_f ds 1 ;flags
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0010 : zp_bss
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0000 : zpt
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0000 : 00 irq_a ds 1 ;a register
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0001 : 00 irq_x ds 1 ;x register
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0002 : 00 irq_f ds 1 ;flags
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0003 : 00 nmi_a ds 1 ;a register
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0004 : 00 nmi_x ds 1 ;x register
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0005 : 00 nmi_f ds 1 ;flags
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0006 : zp_bss
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;fixed stack locations
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01fe = lst_f equ $1fe ;last flags before interrupt
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@ -425,7 +425,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned SP
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0439 : d0fe > bne * ;failed not equal (non zero)
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043b : a50c lda irq_f ;flags seen in IRQ vector
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043b : a502 lda irq_f ;flags seen in IRQ vector
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if D_clear = 1
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and #decmode
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trap_ne ;D-flag not cleared
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@ -492,7 +492,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned flags
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047c : d0fe > bne * ;failed not equal (non zero)
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047e : a50a lda irq_a ;accu seen in IRQ vector
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047e : a500 lda irq_a ;accu seen in IRQ vector
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0480 : cdff01 cmp lst_a
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trap_ne ;IRQ A received
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0483 : d0fe > bne * ;failed not equal (non zero)
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@ -549,7 +549,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned flags
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04bd : d0fe > bne * ;failed not equal (non zero)
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04bf : a50a lda irq_a ;accu seen in IRQ vector
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04bf : a500 lda irq_a ;accu seen in IRQ vector
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04c1 : cdff01 cmp lst_a
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trap_ne ;IRQ A received
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04c4 : d0fe > bne * ;failed not equal (non zero)
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@ -588,7 +588,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned SP
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04e9 : d0fe > bne * ;failed not equal (non zero)
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04eb : a50c lda irq_f ;flags seen in IRQ vector
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04eb : a502 lda irq_f ;flags seen in IRQ vector
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if D_clear = 1
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and #decmode
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trap_ne ;D-flag not cleared
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@ -631,7 +631,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned SP
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050f : d0fe > bne * ;failed not equal (non zero)
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0511 : a50c lda irq_f ;flags seen in IRQ vector
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0511 : a502 lda irq_f ;flags seen in IRQ vector
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if D_clear = 1
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and #decmode
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trap_ne ;D-flag not cleared
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@ -690,7 +690,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned flags
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054a : d0fe > bne * ;failed not equal (non zero)
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054c : a50a lda irq_a ;accu seen in IRQ vector
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054c : a500 lda irq_a ;accu seen in IRQ vector
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054e : cdff01 cmp lst_a
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trap_ne ;IRQ A received
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0551 : d0fe > bne * ;failed not equal (non zero)
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@ -739,7 +739,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned flags
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0583 : d0fe > bne * ;failed not equal (non zero)
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0585 : a50a lda irq_a ;accu seen in IRQ vector
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0585 : a500 lda irq_a ;accu seen in IRQ vector
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0587 : cdff01 cmp lst_a
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trap_ne ;IRQ A received
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058a : d0fe > bne * ;failed not equal (non zero)
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@ -770,7 +770,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned SP
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05a7 : d0fe > bne * ;failed not equal (non zero)
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05a9 : a50c lda irq_f ;flags seen in IRQ vector
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05a9 : a502 lda irq_f ;flags seen in IRQ vector
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if D_clear = 1
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and #decmode
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trap_ne ;D-flag not cleared
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@ -853,7 +853,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned SP
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05d5 : d0fe > bne * ;failed not equal (non zero)
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05d7 : a50f lda nmi_f ;flags seen in NMI vector
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05d7 : a505 lda nmi_f ;flags seen in NMI vector
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if D_clear = 1
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and #decmode
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trap_ne ;D-flag not cleared
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@ -920,7 +920,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned flags
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0618 : d0fe > bne * ;failed not equal (non zero)
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061a : a50d lda nmi_a ;accu seen in NMI vector
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061a : a503 lda nmi_a ;accu seen in NMI vector
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061c : cdff01 cmp lst_a
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trap_ne ;NMI A received
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061f : d0fe > bne * ;failed not equal (non zero)
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@ -977,7 +977,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned flags
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0659 : d0fe > bne * ;failed not equal (non zero)
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065b : a50d lda nmi_a ;accu seen in NMI vector
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065b : a503 lda nmi_a ;accu seen in NMI vector
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065d : cdff01 cmp lst_a
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trap_ne ;NMI A received
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0660 : d0fe > bne * ;failed not equal (non zero)
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@ -1016,7 +1016,7 @@ bffc = I_port = $bffc ;feedback port address
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trap_ne ;returned SP
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0685 : d0fe > bne * ;failed not equal (non zero)
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0687 : a50f lda nmi_f ;flags seen in NMI vector
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0687 : a505 lda nmi_f ;flags seen in NMI vector
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if D_clear = 1
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and #decmode
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trap_ne ;D-flag not cleared
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@ -1230,11 +1230,11 @@ bffc = I_port = $bffc ;feedback port address
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073a : 88 dey
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073b : 88 dey
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073c : 88 dey
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073d : 850d sta nmi_a ;save regsters during NMI
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073f : 860e stx nmi_x
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073d : 8503 sta nmi_a ;save regsters during NMI
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073f : 8604 stx nmi_x
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0741 : 68 pla
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0742 : 48 pha
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0743 : 850f sta nmi_f
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0743 : 8505 sta nmi_f
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0745 : ad0302 lda I_src ;NMI expected?
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0748 : 2904 and #4
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trap_eq ;unexpexted NMI - check stack for conditions
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@ -1264,7 +1264,7 @@ bffc = I_port = $bffc ;feedback port address
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0769 : 297d > and #I_filter-(1<<NMI_bit)
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076b : 8dfcbf > sta I_port
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076e : a60e ldx nmi_x
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076e : a604 ldx nmi_x
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0770 : e8 inx
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0771 : 8e0002 stx nmi_count
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0774 : a949 lda #'I' ;mark (NM)I
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@ -1284,11 +1284,11 @@ bffc = I_port = $bffc ;feedback port address
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077e : 88 dey
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077f : 88 dey
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0780 : 88 dey
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0781 : 850a sta irq_a ;save registers during IRQ/BRK
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0783 : 860b stx irq_x
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0781 : 8500 sta irq_a ;save registers during IRQ/BRK
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0783 : 8601 stx irq_x
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0785 : 68 pla
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0786 : 48 pha
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0787 : 850c sta irq_f
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0787 : 8502 sta irq_f
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0789 : ad0302 lda I_src ;IRQ expected?
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078c : 2903 and #3
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trap_eq ;unexpexted IRQ/BRK - check stack for conditions
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@ -1321,7 +1321,7 @@ bffc = I_port = $bffc ;feedback port address
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07b4 : 297e > and #I_filter-(1<<IRQ_bit)
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07b6 : 8dfcbf > sta I_port
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07b9 : a60b ldx irq_x
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07b9 : a601 ldx irq_x
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07bb : e8 inx
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07bc : 8e0102 stx irq_count
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07bf : a951 lda #'Q' ;mark (IR)Q
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@ -1337,10 +1337,10 @@ bffc = I_port = $bffc ;feedback port address
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07ca : ad0302 lda I_src ;mark expected BRK has occured
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07cd : 29fe and #$ff-1
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07cf : 8d0302 sta I_src
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07d2 : a60b ldx irq_x
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07d2 : a601 ldx irq_x
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07d4 : e8 inx
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07d5 : 8e0202 stx brk_count
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07d8 : a50a lda irq_a
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07d8 : a500 lda irq_a
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07da : a94b lda #'K' ;mark (BR)K
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07dc : 28 plp ;should be reversed by rti
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07dd : 40 rti
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@ -1369,7 +1369,7 @@ fffa = end start
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No errors in pass 2.
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Wrote binary from address $000a through $ffff.
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Total size 65526 bytes.
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Wrote binary from address $0000 through $ffff.
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Total size 65536 bytes.
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Program start address is at $0400 (1024).
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@ -27,29 +27,23 @@ class Test6502Klaus2m5Functional {
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bus.add(ram)
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cpu.reset()
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cpu.regPC = 0x0400
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cpu.addBreakpoint(0x3469) { _, _ ->
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// reaching this address means successful test result
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if(cpu.currentOpcode==0x4c)
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throw SuccessfulTestResult()
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Cpu6502.BreakpointResultAction(null, null)
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}
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try {
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while (cpu.totalCycles < 100000000) {
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cpu.clock()
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}
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} catch (sx: SuccessfulTestResult) {
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println("test successful ${cpu.totalCycles}")
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return
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do {
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val previousPC = cpu.regPC
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cpu.step()
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} while(cpu.regPC!=previousPC)
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} catch(nx: NotImplementedError) {
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println("encountered a not yet implemented feature: ${nx.message}")
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}
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// the test is successful if address 0x3469 is reached ("success" label in source code)
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if(cpu.regPC!=0x3469) {
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println(cpu.snapshot())
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val d = cpu.disassemble(ram, max(0, cpu.regPC-20), min(65535, cpu.regPC+20))
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println(d.first.joinToString("\n"))
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fail("test failed")
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}
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}
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@Test
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fun testExtendedOpcodes65C02() {
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@ -80,8 +74,8 @@ class Test6502Klaus2m5Functional {
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}
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@Test
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//@Ignore("todo: fix the interrupt tests") // TODO the test code is not correct
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fun testInterrupts6502() {
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// TODO fix this test code
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val cpu = Cpu6502()
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val bus = Bus()
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val ram = Ram(0, 0xffff)
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