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updating Klaus Dormann's functional tests

This commit is contained in:
Irmen de Jong 2020-02-09 16:51:20 +01:00
parent 7f3dd9c95d
commit de60698349
8 changed files with 797 additions and 803 deletions

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@ -8,7 +8,7 @@ import razorvine.ksim65.components.UByte
/**
* 6502 cpu simulation (the NMOS version) including the 'illegal' opcodes.
* TODO: actually implement the illegal opcodes, see http://www.ffd2.com/fridge/docs/6502-NMOS.extra.opcodes
* TODO: actually implement the illegal opcodes, see http://www.ffd2.com/fridge/docs/6502-NMOS.extra.opcodes or https://sourceforge.net/p/moarnes/code/ci/master/tree/src/6502.c
*/
open class Cpu6502 : BusComponent() {
open val name = "6502"
@ -1458,8 +1458,8 @@ open class Cpu6502 : BusComponent() {
TODO("\$${hexB(currentOpcode)} - xaa - ('illegal' instruction) @ \$${hexW(currentOpcodeAddress)}")
}
// invalid instruction (JAM / KIL)
// invalid instruction (JAM / KIL / HLT)
private fun iInvalid() {
throw InstructionError("invalid instruction encountered: opcode=${hexB(currentOpcode)} instr=${currentInstruction.mnemonic}")
throw InstructionError("invalid instruction encountered: opcode=${hexB(currentOpcode)} instr=${currentInstruction.mnemonic} @ ${hexW(currentOpcodeAddress)}")
}
}

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@ -100,7 +100,7 @@ I_flag = 3
;configure memory - try to stay away from memory used by the system
;zero_page memory start address, $52 (82) consecutive Bytes required
; add 2 if I_flag = 2
zero_page = $a
zero_page = $0
;data_segment memory start address, $7B (123) consecutive Bytes required
data_segment = $200

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@ -83,7 +83,7 @@ D_clear = 0 ;0 = not cleared (NMOS), 1 = cleared (CMOS)
;configure memory - try to stay away from memory used by the system
;zero_page memory start address, 6 consecutive Bytes required
zero_page = $a
zero_page = $0
;data_segment memory start address, 4 consecutive Bytes required
data_segment = $200
@ -1023,4 +1023,3 @@ vec_bss equ $fffa
end start

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@ -87,7 +87,7 @@ bffc = I_port = $bffc ;feedback port address
;configure memory - try to stay away from memory used by the system
;zero_page memory start address, 6 consecutive Bytes required
000a = zero_page = $a
0000 = zero_page = $0
;data_segment memory start address, 4 consecutive Bytes required
0200 = data_segment = $200
@ -195,16 +195,16 @@ bffc = I_port = $bffc ;feedback port address
else
bss ;uninitialized segment, copy of data at end of code!
endif
000a = org zero_page
0000 = org zero_page
;BRK, IRQ, NMI test interrupt save
000a : zpt
000a : 00 irq_a ds 1 ;a register
000b : 00 irq_x ds 1 ;x register
000c : 00 irq_f ds 1 ;flags
000d : 00 nmi_a ds 1 ;a register
000e : 00 nmi_x ds 1 ;x register
000f : 00 nmi_f ds 1 ;flags
0010 : zp_bss
0000 : zpt
0000 : 00 irq_a ds 1 ;a register
0001 : 00 irq_x ds 1 ;x register
0002 : 00 irq_f ds 1 ;flags
0003 : 00 nmi_a ds 1 ;a register
0004 : 00 nmi_x ds 1 ;x register
0005 : 00 nmi_f ds 1 ;flags
0006 : zp_bss
;fixed stack locations
01fe = lst_f equ $1fe ;last flags before interrupt
@ -425,7 +425,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned SP
0439 : d0fe > bne * ;failed not equal (non zero)
043b : a50c lda irq_f ;flags seen in IRQ vector
043b : a502 lda irq_f ;flags seen in IRQ vector
if D_clear = 1
and #decmode
trap_ne ;D-flag not cleared
@ -492,7 +492,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned flags
047c : d0fe > bne * ;failed not equal (non zero)
047e : a50a lda irq_a ;accu seen in IRQ vector
047e : a500 lda irq_a ;accu seen in IRQ vector
0480 : cdff01 cmp lst_a
trap_ne ;IRQ A received
0483 : d0fe > bne * ;failed not equal (non zero)
@ -549,7 +549,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned flags
04bd : d0fe > bne * ;failed not equal (non zero)
04bf : a50a lda irq_a ;accu seen in IRQ vector
04bf : a500 lda irq_a ;accu seen in IRQ vector
04c1 : cdff01 cmp lst_a
trap_ne ;IRQ A received
04c4 : d0fe > bne * ;failed not equal (non zero)
@ -588,7 +588,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned SP
04e9 : d0fe > bne * ;failed not equal (non zero)
04eb : a50c lda irq_f ;flags seen in IRQ vector
04eb : a502 lda irq_f ;flags seen in IRQ vector
if D_clear = 1
and #decmode
trap_ne ;D-flag not cleared
@ -631,7 +631,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned SP
050f : d0fe > bne * ;failed not equal (non zero)
0511 : a50c lda irq_f ;flags seen in IRQ vector
0511 : a502 lda irq_f ;flags seen in IRQ vector
if D_clear = 1
and #decmode
trap_ne ;D-flag not cleared
@ -690,7 +690,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned flags
054a : d0fe > bne * ;failed not equal (non zero)
054c : a50a lda irq_a ;accu seen in IRQ vector
054c : a500 lda irq_a ;accu seen in IRQ vector
054e : cdff01 cmp lst_a
trap_ne ;IRQ A received
0551 : d0fe > bne * ;failed not equal (non zero)
@ -739,7 +739,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned flags
0583 : d0fe > bne * ;failed not equal (non zero)
0585 : a50a lda irq_a ;accu seen in IRQ vector
0585 : a500 lda irq_a ;accu seen in IRQ vector
0587 : cdff01 cmp lst_a
trap_ne ;IRQ A received
058a : d0fe > bne * ;failed not equal (non zero)
@ -770,7 +770,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned SP
05a7 : d0fe > bne * ;failed not equal (non zero)
05a9 : a50c lda irq_f ;flags seen in IRQ vector
05a9 : a502 lda irq_f ;flags seen in IRQ vector
if D_clear = 1
and #decmode
trap_ne ;D-flag not cleared
@ -853,7 +853,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned SP
05d5 : d0fe > bne * ;failed not equal (non zero)
05d7 : a50f lda nmi_f ;flags seen in NMI vector
05d7 : a505 lda nmi_f ;flags seen in NMI vector
if D_clear = 1
and #decmode
trap_ne ;D-flag not cleared
@ -920,7 +920,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned flags
0618 : d0fe > bne * ;failed not equal (non zero)
061a : a50d lda nmi_a ;accu seen in NMI vector
061a : a503 lda nmi_a ;accu seen in NMI vector
061c : cdff01 cmp lst_a
trap_ne ;NMI A received
061f : d0fe > bne * ;failed not equal (non zero)
@ -977,7 +977,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned flags
0659 : d0fe > bne * ;failed not equal (non zero)
065b : a50d lda nmi_a ;accu seen in NMI vector
065b : a503 lda nmi_a ;accu seen in NMI vector
065d : cdff01 cmp lst_a
trap_ne ;NMI A received
0660 : d0fe > bne * ;failed not equal (non zero)
@ -1016,7 +1016,7 @@ bffc = I_port = $bffc ;feedback port address
trap_ne ;returned SP
0685 : d0fe > bne * ;failed not equal (non zero)
0687 : a50f lda nmi_f ;flags seen in NMI vector
0687 : a505 lda nmi_f ;flags seen in NMI vector
if D_clear = 1
and #decmode
trap_ne ;D-flag not cleared
@ -1230,11 +1230,11 @@ bffc = I_port = $bffc ;feedback port address
073a : 88 dey
073b : 88 dey
073c : 88 dey
073d : 850d sta nmi_a ;save regsters during NMI
073f : 860e stx nmi_x
073d : 8503 sta nmi_a ;save regsters during NMI
073f : 8604 stx nmi_x
0741 : 68 pla
0742 : 48 pha
0743 : 850f sta nmi_f
0743 : 8505 sta nmi_f
0745 : ad0302 lda I_src ;NMI expected?
0748 : 2904 and #4
trap_eq ;unexpexted NMI - check stack for conditions
@ -1261,10 +1261,10 @@ bffc = I_port = $bffc ;feedback port address
0763 : 8d0302 sta I_src
I_clr NMI_bit
0766 : adfcbf > lda I_port ;turn off interrupt by bit
0769 : 297d > and #I_filter-(1<<NMI_bit )
0769 : 297d > and #I_filter-(1<<NMI_bit)
076b : 8dfcbf > sta I_port
076e : a60e ldx nmi_x
076e : a604 ldx nmi_x
0770 : e8 inx
0771 : 8e0002 stx nmi_count
0774 : a949 lda #'I' ;mark (NM)I
@ -1284,11 +1284,11 @@ bffc = I_port = $bffc ;feedback port address
077e : 88 dey
077f : 88 dey
0780 : 88 dey
0781 : 850a sta irq_a ;save registers during IRQ/BRK
0783 : 860b stx irq_x
0781 : 8500 sta irq_a ;save registers during IRQ/BRK
0783 : 8601 stx irq_x
0785 : 68 pla
0786 : 48 pha
0787 : 850c sta irq_f
0787 : 8502 sta irq_f
0789 : ad0302 lda I_src ;IRQ expected?
078c : 2903 and #3
trap_eq ;unexpexted IRQ/BRK - check stack for conditions
@ -1318,10 +1318,10 @@ bffc = I_port = $bffc ;feedback port address
07ae : 8d0302 sta I_src
I_clr IRQ_bit
07b1 : adfcbf > lda I_port ;turn off interrupt by bit
07b4 : 297e > and #I_filter-(1<<IRQ_bit )
07b4 : 297e > and #I_filter-(1<<IRQ_bit)
07b6 : 8dfcbf > sta I_port
07b9 : a60b ldx irq_x
07b9 : a601 ldx irq_x
07bb : e8 inx
07bc : 8e0102 stx irq_count
07bf : a951 lda #'Q' ;mark (IR)Q
@ -1337,10 +1337,10 @@ bffc = I_port = $bffc ;feedback port address
07ca : ad0302 lda I_src ;mark expected BRK has occured
07cd : 29fe and #$ff-1
07cf : 8d0302 sta I_src
07d2 : a60b ldx irq_x
07d2 : a601 ldx irq_x
07d4 : e8 inx
07d5 : 8e0202 stx brk_count
07d8 : a50a lda irq_a
07d8 : a500 lda irq_a
07da : a94b lda #'K' ;mark (BR)K
07dc : 28 plp ;should be reversed by rti
07dd : 40 rti
@ -1369,7 +1369,7 @@ fffa = end start
No errors in pass 2.
Wrote binary from address $000a through $ffff.
Total size 65526 bytes.
Wrote binary from address $0000 through $ffff.
Total size 65536 bytes.
Program start address is at $0400 (1024).

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@ -27,28 +27,22 @@ class Test6502Klaus2m5Functional {
bus.add(ram)
cpu.reset()
cpu.regPC = 0x0400
cpu.addBreakpoint(0x3469) { _, _ ->
// reaching this address means successful test result
if(cpu.currentOpcode==0x4c)
throw SuccessfulTestResult()
Cpu6502.BreakpointResultAction(null, null)
}
try {
while (cpu.totalCycles < 100000000) {
cpu.clock()
}
} catch (sx: SuccessfulTestResult) {
println("test successful ${cpu.totalCycles}")
return
do {
val previousPC = cpu.regPC
cpu.step()
} while(cpu.regPC!=previousPC)
} catch(nx: NotImplementedError) {
println("encountered a not yet implemented feature: ${nx.message}")
}
println(cpu.snapshot())
val d = cpu.disassemble(ram, max(0, cpu.regPC-20), min(65535, cpu.regPC+20))
println(d.first.joinToString ("\n"))
fail("test failed")
// the test is successful if address 0x3469 is reached ("success" label in source code)
if(cpu.regPC!=0x3469) {
println(cpu.snapshot())
val d = cpu.disassemble(ram, max(0, cpu.regPC-20), min(65535, cpu.regPC+20))
println(d.first.joinToString("\n"))
fail("test failed")
}
}
@Test
@ -80,8 +74,8 @@ class Test6502Klaus2m5Functional {
}
@Test
//@Ignore("todo: fix the interrupt tests") // TODO the test code is not correct
fun testInterrupts6502() {
// TODO fix this test code
val cpu = Cpu6502()
val bus = Bus()
val ram = Ram(0, 0xffff)