mirror of https://github.com/irmen/ksim65.git
62 lines
2.2 KiB
Kotlin
62 lines
2.2 KiB
Kotlin
package razorvine.c64emu
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import razorvine.ksim65.components.Address
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import razorvine.ksim65.components.MemMappedComponent
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import razorvine.ksim65.components.UByte
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class VicII(startAddress: Address, endAddress: Address): MemMappedComponent(startAddress, endAddress) {
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private var ramBuffer = Array<UByte>(endAddress - startAddress + 1) { 0 }
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private var rasterIrqLine = 0
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var currentRasterLine = 1
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private var totalClocks = 0L
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private var interruptStatusRegisterD019 = 0
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override fun clock() {
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totalClocks++
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if(totalClocks % 63L == 0L) {
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currentRasterLine++
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if(currentRasterLine >= 312)
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currentRasterLine = 0
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interruptStatusRegisterD019 = if(currentRasterLine == rasterIrqLine) {
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// signal that current raster line is equal to the desired IRQ raster line
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interruptStatusRegisterD019 or 0b00000001
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} else
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interruptStatusRegisterD019 and 0b11111110
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}
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}
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override fun reset() {
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rasterIrqLine = 0
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currentRasterLine = 1
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totalClocks = 0L
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interruptStatusRegisterD019 = 0
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}
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override fun get(address: Address): UByte {
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val register = (address - startAddress) and 63
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// println("VIC GET ${register.toString(16)}")
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return when(register) {
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0x11 -> (0b00011011 or ((currentRasterLine and 0b100000000) ushr 1)).toShort()
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0x12 -> {
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// println(" read raster: $currentRasterLine")
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(currentRasterLine and 255).toShort()
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}
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0x19 -> interruptStatusRegisterD019.toShort()
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else -> ramBuffer[register]
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}
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}
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override fun set(address: Address, data: UByte) {
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val register = (address - startAddress) and 63
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ramBuffer[register] = data
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when(register) {
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0x11 -> {
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val rasterHigh = (data.toInt() ushr 7) shl 8
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rasterIrqLine = (rasterIrqLine and 0x00ff) or rasterHigh
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}
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0x12 -> rasterIrqLine = (rasterIrqLine and 0xff00) or data.toInt()
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}
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// println("VIC SET ${register.toString(16)} = ${data.toString(16)} (rasterIrqLine= $rasterIrqLine)")
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}
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}
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