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Added MOV (8 bits version) instruction.
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parent
6708ddaecc
commit
2d96e4e1d2
56
l7801.lua
56
l7801.lua
@ -40,7 +40,7 @@ local Keywords_data = {
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local Keywords_7801 = {
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'aci','adi','adinc','ani',
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'block','calb','calf','call','calt','clc','ei','eqi','daa','di','dcr','dcx',
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'ex','exx','gti','halt','inr','inx','jb','jmp','jr','lti','lxi','mvi','nei','nop',
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'ex','exx','gti','halt','inr','inx','jb','jmp','jr','lti','lxi','mov','mvi','nei','nop',
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'offi','oni','ori','pen','per','pex','ret','reti','rets','rld','rrd','sio','softi','stc','stm',
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'sbi','sui','suinb','table','xri',
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}
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@ -80,6 +80,9 @@ local opcode_relative = lookupify{
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local opcode_reg = lookupify{
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'dcr','dcx','inr','inx'
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}
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local opcode_reg_reg = lookupify{
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'mov'
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}
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local opcode_regb = lookupify{
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'aci','adi','adinc','ani','eqi','gti','lti','mvi','nei','offi','oni','ori','sbi','sui','suinb','xri',
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}
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@ -101,6 +104,36 @@ local opcode_reg_list = {
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sp = lookupify{'dcx','inx','lxi'},
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}
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local opcode_reg_reg_list = {
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a = {
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b = lookupify{'mov'},
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c = lookupify{'mov'},
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d = lookupify{'mov'},
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e = lookupify{'mov'},
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h = lookupify{'mov'},
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l = lookupify{'mov'},
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},
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b = {
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a = lookupify{'mov'},
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},
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c = {
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a = lookupify{'mov'},
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},
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d = {
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a = lookupify{'mov'},
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},
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e = {
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a = lookupify{'mov'},
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},
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h = {
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a = lookupify{'mov'},
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},
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l = {
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a = lookupify{'mov'},
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},
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v = {},
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}
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local addressing_map = {
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imp = opcode_implied,
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imm = opcode_immediate,
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@ -1415,7 +1448,26 @@ local function ParseLua(src, src_name)
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end
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stat = emit_call{name=op, args={expr, mod_expr}, inverse_encapsulate=inverse_encapsulate, paren_open_white=paren_open_whites} break
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end
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if opcode_reg[op] or opcode_regb[op] or opcode_regw[op] then
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if opcode_reg_reg[op] then
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tok:Save()
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local r0_name = tok:Get(tokenList).Data
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if not Registers_7801[r0_name] then tok:Restore()
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return false, GenerateError(r0_name .. " is not a valid register")
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end
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if not tok:ConsumeSymbol(',', tokenList) then tok:Restore()
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return false, GenerateError("Opcode " .. op .. " doesn't support this addressing mode")
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end
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local r1_name = tok:Get(tokenList).Data
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if not Registers_7801[r1_name] then tok:Restore()
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return false, GenerateError(r0_name .. " is not a valid register")
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end
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if not (opcode_reg_reg_list[r0_name] and opcode_reg_reg_list[r0_name][r1_name] and opcode_reg_reg_list[r0_name][r1_name][op]) then
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tok:Restore()
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return false, GenerateError("Opcode " .. op .. " doesn't support this addressing mode")
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end
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tok:Commit()
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stat = emit_call{name=op .. r0_name .. r1_name} break
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elseif opcode_reg[op] or opcode_regb[op] or opcode_regw[op] then
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tok:Save()
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local register_name = tok:Get(tokenList).Data
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local call_args = {name=op..register_name}
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@ -64,5 +64,18 @@ section{"rom", org=0x8000}
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rld
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rrd
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stc
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mov a,b
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mov a,c
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mov a,d
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mov a,e
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mov a,h
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mov a,l
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mov b,a
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mov c,a
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mov d,a
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mov e,a
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mov h,a
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mov l,a
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writebin(filename .. '.bin')
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31
uPD7801.lua
31
uPD7801.lua
@ -114,6 +114,20 @@ for k,v in pairs(opaxx) do
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end
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end
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local opr8r8 ={
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movab=M.op(0x0a,4), movac=M.op(0x0b,4),
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movad=M.op(0x0c,4), movae=M.op(0x0d,4),
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movah=M.op(0x0e,4), moval=M.op(0x0f,4),
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movba=M.op(0x1a,4), movca=M.op(0x1b,4),
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movda=M.op(0x1c,4), movea=M.op(0x1d,4),
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movha=M.op(0x1e,4), movla=M.op(0x1f,4),
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} M.opr8r8 = opr8r8
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for k,v in pairs(opr8r8) do
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M[k] = function()
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table.insert(M.section_current.instructions, { size=1, cycles=v.cycles, bin=v.opc })
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end
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end
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local opw = {
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call=M.op(0x44,16),
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jmp=M.op(0x54,10),
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@ -216,15 +230,6 @@ return M
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8 bits instructions:
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JRE+ 0x4e xx 17
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JRE- 0x4f xx 17
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ani
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ori
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gti
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lti
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oni
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offi
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nei
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mvi
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eqi
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-- d
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ldaxm=M.op(0x2e,7),
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@ -252,14 +257,6 @@ return M
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bit6=M.op(0x5e,10),
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bit7=M.op(0x5f,10)
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-- r8,r8
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movab=M.op(0x0a,4), movac=M.op(0x0b,4),
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movad=M.op(0x0c,4), movae=M.op(0x0d,4),
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movah=M.op(0x0e,4), moval=M.op(0x0f,4),
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movba=M.op(0x1a,4), movca=M.op(0x1b,4),
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movda=M.op(0x1c,4), movea=M.op(0x1d,4),
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movha=M.op(0x1e,4), movla=M.op(0x1f,4),
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-- hhll
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call=M.op(0x44,16),
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jmp=M.op(0x54,10),
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