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llvm-6502/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll

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Add a subtarget feature 'v8' to the ARM backend. This allows for targeting the ARMv8 AArch32 variant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 16:58:26 +00:00
; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
[ARMv8] Change hasV8Fp to hasFPARMv8, and other command line options to be more consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190692 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-13 13:46:57 +00:00
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=+fp-armv8 | FileCheck %s --check-prefix=V8-FPARMv8
Add a Subtarget feature 'v8fp' to the ARM backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185073 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-27 11:49:26 +00:00
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=+neon | FileCheck %s --check-prefix=V8-NEON
[ARMv8] Change hasV8Fp to hasFPARMv8, and other command line options to be more consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190692 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-13 13:46:57 +00:00
; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=+fp-armv8 -mattr=+neon | FileCheck %s --check-prefix=V8-FPARMv8-NEON
Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() Small test for sanity check of resulting ARM .s file. Tested against -r115129. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 02:45:56 +00:00
; This tests that MC/asm header conversion is smooth
;
Add a subtarget feature 'v8' to the ARM backend. This allows for targeting the ARMv8 AArch32 variant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184967 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-26 16:58:26 +00:00
; V7: .syntax unified
; V7: .eabi_attribute 6, 10
; V7: .eabi_attribute 20, 1
; V7: .eabi_attribute 21, 1
; V7: .eabi_attribute 23, 3
; V7: .eabi_attribute 24, 1
; V7: .eabi_attribute 25, 1
; V8: .syntax unified
; V8: .eabi_attribute 6, 14
; Vt8: .syntax unified
; Vt8: .eabi_attribute 6, 14
Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() Small test for sanity check of resulting ARM .s file. Tested against -r115129. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 02:45:56 +00:00
[ARMv8] Change hasV8Fp to hasFPARMv8, and other command line options to be more consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190692 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-13 13:46:57 +00:00
; V8-FPARMv8: .syntax unified
; V8-FPARMv8: .eabi_attribute 6, 14
; V8-FPARMv8: .eabi_attribute 10, 7
; V8-FPARMv8: .fpu fp-armv8
Add a Subtarget feature 'v8fp' to the ARM backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185073 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-27 11:49:26 +00:00
; V8-NEON: .syntax unified
; V8-NEON: .eabi_attribute 6, 14
; V8-NEON: .eabi_attribute 12, 3
[ARMv8] Change hasV8Fp to hasFPARMv8, and other command line options to be more consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190692 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-13 13:46:57 +00:00
; V8-FPARMv8-NEON: .syntax unified
; V8-FPARMv8-NEON: .eabi_attribute 6, 14
; V8-FPARMv8-NEON: .fpu neon-fp-armv8
; V8-FPARMv8-NEON: .eabi_attribute 10, 7
[ARMv8] Emit the proper .fpu directive. Patch by Bradley Smith! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190683 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-13 11:51:52 +00:00
Tiny patch for proof-of-concept cleanup of ARMAsmPrinter::EmitStartOfAsmFile() Small test for sanity check of resulting ARM .s file. Tested against -r115129. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115133 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-30 02:45:56 +00:00
define i32 @f(i64 %z) {
ret i32 0
}
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