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llvm-6502/test/CodeGen/Mips/largefr1.ll

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Check in conditional branches for constant islands. Still need to finish conditional branches for very large targets. That will be the next small patch. Everything now should in principle work as good (functionality wise) as without constant islands so we decided at Mips/Imagination to make constant islands the default for Mips16 now so that it will get excercised a lot and this port is still experimentatl though hopefully soon we will change the status. Some more cleanup and code review is in order but things are converging fast. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195902 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-28 00:56:37 +00:00
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static -mips16-constant-islands=false < %s | FileCheck %s -check-prefix=1
When Mips16 frames grow large, the immediate field may exceed the maximum allowed size for the instruction. This code uses RegScavenger to fix this. We sometimes need 2 registers for Mips16 so we must handle things differently than how register scavenger is normally used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08 03:57:41 +00:00
Check in conditional branches for constant islands. Still need to finish conditional branches for very large targets. That will be the next small patch. Everything now should in principle work as good (functionality wise) as without constant islands so we decided at Mips/Imagination to make constant islands the default for Mips16 now so that it will get excercised a lot and this port is still experimentatl though hopefully soon we will change the status. Some more cleanup and code review is in order but things are converging fast. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195902 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-28 00:56:37 +00:00
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic < %s | FileCheck %s -check-prefix=ci
Clean up code for Mips16 large frame handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 01:13:25 +00:00
When Mips16 frames grow large, the immediate field may exceed the maximum allowed size for the instruction. This code uses RegScavenger to fix this. We sometimes need 2 registers for Mips16 so we must handle things differently than how register scavenger is normally used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08 03:57:41 +00:00
@i = common global i32 0, align 4
@j = common global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"%i %i \0A\00", align 1
define void @foo(i32* %p, i32 %i, i32 %j) nounwind {
entry:
%p.addr = alloca i32*, align 4
%i.addr = alloca i32, align 4
%j.addr = alloca i32, align 4
store i32* %p, i32** %p.addr, align 4
store i32 %i, i32* %i.addr, align 4
store i32 %j, i32* %j.addr, align 4
%0 = load i32* %j.addr, align 4
%1 = load i32** %p.addr, align 4
%2 = load i32* %i.addr, align 4
%add.ptr = getelementptr inbounds i32* %1, i32 %2
store i32 %0, i32* %add.ptr, align 4
ret void
}
define i32 @main() nounwind {
entry:
Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-14 06:24:09 +00:00
; 1-LABEL: main:
Add the saving of S2. This is needed for some of the floating point helper functions. This can be optimized out later when the remaining parts of the helper function work is moved into the Mips16HardFloat pass. For now it forces us to use the 32 bit save/restore instructions instead of the 16 bit ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187712 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 23:56:53 +00:00
; 1: 1: .word -798000
Clean up code for Mips16 large frame handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 01:13:25 +00:00
; 1: lw ${{[0-9]+}}, 1f
; 1: b 2f
; 1: .align 2
Add the saving of S2. This is needed for some of the floating point helper functions. This can be optimized out later when the remaining parts of the helper function work is moved into the Mips16HardFloat pass. For now it forces us to use the 32 bit save/restore instructions instead of the 16 bit ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187712 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 23:56:53 +00:00
; 1: .word 800020
Clean up code for Mips16 large frame handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 01:13:25 +00:00
; 1: b 2f
; 1: .align 2
Add the saving of S2. This is needed for some of the floating point helper functions. This can be optimized out later when the remaining parts of the helper function work is moved into the Mips16HardFloat pass. For now it forces us to use the 32 bit save/restore instructions instead of the 16 bit ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187712 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 23:56:53 +00:00
; 1: .word 400020
Clean up code for Mips16 large frame handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 01:13:25 +00:00
; 1: move ${{[0-9]+}}, $sp
When Mips16 frames grow large, the immediate field may exceed the maximum allowed size for the instruction. This code uses RegScavenger to fix this. We sometimes need 2 registers for Mips16 so we must handle things differently than how register scavenger is normally used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08 03:57:41 +00:00
; 1: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
Clean up code for Mips16 large frame handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 01:13:25 +00:00
; 1: addiu ${{[0-9]+}}, ${{[0-9]+}}, 0
; 1: b 2f
; 1: .align 2
Add the saving of S2. This is needed for some of the floating point helper functions. This can be optimized out later when the remaining parts of the helper function work is moved into the Mips16HardFloat pass. For now it forces us to use the 32 bit save/restore instructions instead of the 16 bit ones. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187712 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 23:56:53 +00:00
; 1: .word 400220
Clean up code for Mips16 large frame handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 01:13:25 +00:00
; 1: move ${{[0-9]+}}, $sp
When Mips16 frames grow large, the immediate field may exceed the maximum allowed size for the instruction. This code uses RegScavenger to fix this. We sometimes need 2 registers for Mips16 so we must handle things differently than how register scavenger is normally used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08 03:57:41 +00:00
; 1: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
Clean up code for Mips16 large frame handling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187701 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-04 01:13:25 +00:00
; 1: lw ${{[0-9]+}}, 0(${{[0-9]+}})
When Mips16 frames grow large, the immediate field may exceed the maximum allowed size for the instruction. This code uses RegScavenger to fix this. We sometimes need 2 registers for Mips16 so we must handle things differently than how register scavenger is normally used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08 03:57:41 +00:00
%retval = alloca i32, align 4
%one = alloca [100000 x i32], align 4
%two = alloca [100000 x i32], align 4
store i32 0, i32* %retval
%arrayidx = getelementptr inbounds [100000 x i32]* %one, i32 0, i32 0
call void @foo(i32* %arrayidx, i32 50, i32 9999)
%arrayidx1 = getelementptr inbounds [100000 x i32]* %two, i32 0, i32 0
call void @foo(i32* %arrayidx1, i32 99999, i32 5555)
%arrayidx2 = getelementptr inbounds [100000 x i32]* %one, i32 0, i32 50
%0 = load i32* %arrayidx2, align 4
store i32 %0, i32* @i, align 4
%arrayidx3 = getelementptr inbounds [100000 x i32]* %two, i32 0, i32 99999
%1 = load i32* %arrayidx3, align 4
store i32 %1, i32* @j, align 4
%2 = load i32* @i, align 4
%3 = load i32* @j, align 4
%call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([8 x i8]* @.str, i32 0, i32 0), i32 %2, i32 %3)
ret i32 0
}
Make sure that for C++ emitting LwConstant32 pseudos, that it corresponds to what is needed for constant islands. The prescan method for Mips16 constant islands will eventually go away. It is only temporary and should be done earlier when the instructions are first created or from the DAG. If we keep it here we need to handle better the situation where constant islands is called multiple times since don't want to prescan more than once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195569 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-24 06:18:50 +00:00
; ci: lw ${{[0-9]+}}, $CPI{{[0-9]+}}_{{[0-9]+}}
When Mips16 frames grow large, the immediate field may exceed the maximum allowed size for the instruction. This code uses RegScavenger to fix this. We sometimes need 2 registers for Mips16 so we must handle things differently than how register scavenger is normally used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174696 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-08 03:57:41 +00:00
declare i32 @printf(i8*, ...)
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