2013-08-25 18:30:06 +00:00
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; RUN: llc < %s -march=sparc -mattr=hard-quad-float | FileCheck %s
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; CHECK-LABEL: f128_ops
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; CHECK: ldd
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; CHECK: ldd
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; CHECK: ldd
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; CHECK: ldd
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; CHECK: faddq [[R0:.+]], [[R1:.+]], [[R2:.+]]
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; CHECK: fsubq [[R2]], [[R3:.+]], [[R4:.+]]
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; CHECK: fmulq [[R4]], [[R5:.+]], [[R6:.+]]
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; CHECK: fdivq [[R6]], [[R2]]
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; CHECK: std
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; CHECK: std
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define void @f128_ops(fp128* noalias sret %scalar.result, fp128* byval %a, fp128* byval %b, fp128* byval %c, fp128* byval %d) {
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entry:
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%0 = load fp128* %a, align 8
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%1 = load fp128* %b, align 8
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%2 = load fp128* %c, align 8
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%3 = load fp128* %d, align 8
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%4 = fadd fp128 %0, %1
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%5 = fsub fp128 %4, %2
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%6 = fmul fp128 %5, %3
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%7 = fdiv fp128 %6, %4
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store fp128 %7, fp128* %scalar.result, align 8
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ret void
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}
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2013-09-02 18:32:45 +00:00
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; CHECK-LABEL: f128_spill
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; CHECK: std %f{{.+}}, [%[[S0:.+]]]
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; CHECK: std %f{{.+}}, [%[[S1:.+]]]
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; CHECK-DAG: ldd [%[[S0]]], %f{{.+}}
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; CHECK-DAG: ldd [%[[S1]]], %f{{.+}}
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; CHECK: jmp
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define void @f128_spill(fp128* noalias sret %scalar.result, fp128* byval %a) {
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entry:
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%0 = load fp128* %a, align 8
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call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
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store fp128 %0, fp128* %scalar.result, align 8
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ret void
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}
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