2011-02-17 19:18:59 +00:00
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//===-- X86ShuffleDecode.h - X86 shuffle decode logic -----------*-C++-*---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Define several functions to decode x86 specific shuffle semantics into a
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// generic vector mask.
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//
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//===----------------------------------------------------------------------===//
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2014-08-13 16:26:38 +00:00
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#ifndef LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H
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#define LLVM_LIB_TARGET_X86_UTILS_X86SHUFFLEDECODE_H
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2011-02-17 19:18:59 +00:00
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#include "llvm/ADT/SmallVector.h"
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2014-08-02 10:39:15 +00:00
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#include "llvm/ADT/ArrayRef.h"
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2011-02-17 19:18:59 +00:00
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//===----------------------------------------------------------------------===//
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// Vector Mask Decoding
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//===----------------------------------------------------------------------===//
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namespace llvm {
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2014-09-23 11:15:19 +00:00
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class Constant;
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2014-03-12 08:00:24 +00:00
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class MVT;
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2014-09-27 04:42:39 +00:00
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enum { SM_SentinelUndef = -1, SM_SentinelZero = -2 };
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2011-02-17 19:18:59 +00:00
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2012-03-20 06:42:26 +00:00
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void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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2011-02-17 19:18:59 +00:00
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// <3,1> or <6,7,2,3>
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2012-03-20 06:42:26 +00:00
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void DecodeMOVHLPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask);
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2011-02-17 19:18:59 +00:00
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// <0,2> or <0,1,4,5>
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2012-03-20 06:42:26 +00:00
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void DecodeMOVLHPSMask(unsigned NElts, SmallVectorImpl<int> &ShuffleMask);
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2011-02-17 19:18:59 +00:00
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2014-09-15 11:15:23 +00:00
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void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
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2015-01-21 22:02:30 +00:00
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void DecodeMOVSHDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
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void DecodeMOVDDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
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void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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2014-10-14 22:31:34 +00:00
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2013-01-28 06:48:25 +00:00
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void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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2013-01-26 13:31:37 +00:00
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2012-05-06 19:46:21 +00:00
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void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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2011-02-17 19:18:59 +00:00
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2012-05-06 19:46:21 +00:00
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void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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2011-02-17 19:18:59 +00:00
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2012-05-06 19:46:21 +00:00
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void DecodePSHUFLWMask(MVT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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2011-02-17 19:18:59 +00:00
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2012-02-06 07:17:51 +00:00
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/// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
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/// the type of the vector allowing it to handle different datatypes and vector
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/// widths.
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2012-05-06 19:46:21 +00:00
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void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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2011-02-17 19:18:59 +00:00
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2011-12-06 05:31:16 +00:00
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/// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd
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2012-02-06 07:17:51 +00:00
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/// and punpckh*. VT indicates the type of the vector allowing it to handle
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/// different datatypes and vector widths.
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2012-05-06 19:46:21 +00:00
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void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
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2011-02-17 19:18:59 +00:00
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2011-12-06 05:31:16 +00:00
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/// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd
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2012-02-06 07:17:51 +00:00
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/// and punpckl*. VT indicates the type of the vector allowing it to handle
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/// different datatypes and vector widths.
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2012-05-06 19:46:21 +00:00
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void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
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2011-02-17 19:18:59 +00:00
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2014-08-02 10:39:15 +00:00
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/// \brief Decode a PSHUFB mask from an IR-level vector constant.
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2015-01-11 07:29:51 +00:00
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void DecodePSHUFBMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask);
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Add support for 256-bit versions of VPERMIL instruction. This is a new
instruction introduced in AVX, which can operate on 128 and 256-bit vectors.
It considers a 256-bit vector as two independent 128-bit lanes. It can permute
any 32 or 64 elements inside a lane, and restricts the second lane to
have the same permutation of the first one. With the improved splat support
introduced early today, adding codegen for this instruction enable more
efficient 256-bit code:
Instead of:
vextractf128 $0, %ymm0, %xmm0
punpcklbw %xmm0, %xmm0
punpckhbw %xmm0, %xmm0
vinsertf128 $0, %xmm0, %ymm0, %ymm1
vinsertf128 $1, %xmm0, %ymm1, %ymm0
vextractf128 $1, %ymm0, %xmm1
shufps $1, %xmm1, %xmm1
movss %xmm1, 28(%rsp)
movss %xmm1, 24(%rsp)
movss %xmm1, 20(%rsp)
movss %xmm1, 16(%rsp)
vextractf128 $0, %ymm0, %xmm0
shufps $1, %xmm0, %xmm0
movss %xmm0, 12(%rsp)
movss %xmm0, 8(%rsp)
movss %xmm0, 4(%rsp)
movss %xmm0, (%rsp)
vmovaps (%rsp), %ymm0
We get:
vextractf128 $0, %ymm0, %xmm0
punpcklbw %xmm0, %xmm0
punpckhbw %xmm0, %xmm0
vinsertf128 $0, %xmm0, %ymm0, %ymm1
vinsertf128 $1, %xmm0, %ymm1, %ymm0
vpermilps $85, %ymm0, %ymm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-21 01:55:47 +00:00
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2014-08-02 10:39:15 +00:00
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/// \brief Decode a PSHUFB mask from a raw array of constants such as from
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/// BUILD_VECTOR.
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void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask,
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SmallVectorImpl<int> &ShuffleMask);
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2014-08-15 11:01:37 +00:00
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/// \brief Decode a BLEND immediate mask into a shuffle mask.
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void DecodeBLENDMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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2012-05-06 19:46:21 +00:00
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void DecodeVPERM2X128Mask(MVT VT, unsigned Imm,
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2012-03-20 06:42:26 +00:00
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SmallVectorImpl<int> &ShuffleMask);
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2011-08-12 21:48:26 +00:00
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2012-05-06 18:44:02 +00:00
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/// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD.
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/// No VT provided since it only works on 256-bit, 4 element vectors.
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void DecodeVPERMMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
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2015-01-31 14:09:36 +00:00
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/// \brief Decode a VPERMILP variable mask from an IR-level vector constant.
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void DecodeVPERMILPMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask);
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/// \brief Decode a zero extension instruction as a shuffle mask.
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void DecodeZeroExtendMask(MVT SrcVT, MVT DstVT,
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SmallVectorImpl<int> &ShuffleMask);
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/// \brief Decode a move lower and zero upper instruction as a shuffle mask.
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void DecodeZeroMoveLowMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
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/// \brief Decode a scalar float move instruction as a shuffle mask.
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void DecodeScalarMoveMask(MVT VT, bool IsLoad,
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SmallVectorImpl<int> &ShuffleMask);
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} // llvm namespace
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#endif
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