2011-12-09 06:15:00 +00:00
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; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx -mattr=+avx
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2011-12-08 22:05:28 +00:00
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; Various missing patterns causing crashes.
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; rdar://10538793
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define void @t1() nounwind {
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entry:
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br label %loop.cond
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loop.cond: ; preds = %t1.exit, %entry
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br i1 false, label %return, label %loop
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loop: ; preds = %loop.cond
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br i1 undef, label %0, label %t1.exit
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; <label>:0 ; preds = %loop
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%1 = load <16 x i32> addrspace(1)* undef, align 64
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%2 = shufflevector <16 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, <16 x i32> %1, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 0, i32 0>
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store <16 x i32> %2, <16 x i32> addrspace(1)* undef, align 64
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br label %t1.exit
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t1.exit: ; preds = %0, %loop
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br label %loop.cond
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return: ; preds = %loop.cond
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ret void
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}
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define void @t2() nounwind {
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br i1 undef, label %1, label %4
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; <label>:1 ; preds = %0
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%2 = load <16 x i32> addrspace(1)* undef, align 64
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%3 = shufflevector <16 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, <16 x i32> %2, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 20, i32 0, i32 0, i32 0, i32 0>
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store <16 x i32> %3, <16 x i32> addrspace(1)* undef, align 64
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br label %4
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; <label>:4 ; preds = %1, %0
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ret void
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}
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define void @t3() nounwind {
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entry:
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br label %loop.cond
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loop.cond: ; preds = %t2.exit, %entry
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br i1 false, label %return, label %loop
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loop: ; preds = %loop.cond
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br i1 undef, label %0, label %t2.exit
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; <label>:0 ; preds = %loop
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%1 = shufflevector <16 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, <16 x i32> undef, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 0>
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%2 = load <16 x i32> addrspace(1)* undef, align 64
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%3 = shufflevector <16 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>, <16 x i32> %2, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 28, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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store <16 x i32> %3, <16 x i32> addrspace(1)* undef, align 64
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br label %t2.exit
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t2.exit: ; preds = %0, %loop
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br label %loop.cond
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return: ; preds = %loop.cond
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ret void
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}
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