2013-10-07 16:13:03 +00:00
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# RUN: llvm-mc -triple=thumbv8 -disassemble < %s | FileCheck %s
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# CHECK: sevl
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# CHECK: sevl.w
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0x50 0xbf
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0xaf 0xf3 0x05 0x80
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2013-11-08 16:25:50 +00:00
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# These are the only coprocessor instructions that remain defined in ARMv8
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# (The operations on p10/p11 disassemble into FP/NEON instructions)
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0x00 0xee 0x10 0x0e
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# CHECK: mcr p14
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0x00 0xee 0x10 0x0f
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# CHECK: mcr p15
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0x10 0xee 0x10 0x0e
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# CHECK: mrc p14
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0x10 0xee 0x10 0x0f
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# CHECK: mrc p15
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0x40 0xec 0x00 0x0e
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# CHECK: mcrr p14
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0x40 0xec 0x00 0x0f
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# CHECK: mcrr p15
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0x50 0xec 0x00 0x0e
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# CHECK: mrrc p14
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0x50 0xec 0x00 0x0f
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# CHECK: mrrc p15
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0x80 0xec 0x00 0x0e
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# CHECK: stc p14
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0x90 0xec 0x00 0x0e
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# CHECK: ldc p14
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