mirror of
https://github.com/c64scene-ar/llvm-6502.git
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109 lines
3.4 KiB
LLVM
109 lines
3.4 KiB
LLVM
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; RUN: opt < %s -sroa -S | FileCheck %s
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; RUN: opt < %s -sroa -force-ssa-updater -S | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32:64"
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define i8 @test1() {
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; We fully promote these to the i24 load or store size, resulting in just masks
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; and other operations that instcombine will fold, but no alloca. Note this is
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; the same as test12 in basictest.ll, but here we assert big-endian byte
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; ordering.
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;
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; CHECK: @test1
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entry:
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%a = alloca [3 x i8]
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%b = alloca [3 x i8]
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; CHECK-NOT: alloca
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%a0ptr = getelementptr [3 x i8]* %a, i64 0, i32 0
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store i8 0, i8* %a0ptr
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%a1ptr = getelementptr [3 x i8]* %a, i64 0, i32 1
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store i8 0, i8* %a1ptr
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%a2ptr = getelementptr [3 x i8]* %a, i64 0, i32 2
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store i8 0, i8* %a2ptr
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%aiptr = bitcast [3 x i8]* %a to i24*
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%ai = load i24* %aiptr
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; CHCEK-NOT: store
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; CHCEK-NOT: load
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; CHECK: %[[mask0:.*]] = and i24 undef, 65535
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; CHECK-NEXT: %[[mask1:.*]] = and i24 %[[mask0]], -65281
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; CHECK-NEXT: %[[mask2:.*]] = and i24 %[[mask1]], -256
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%biptr = bitcast [3 x i8]* %b to i24*
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store i24 %ai, i24* %biptr
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%b0ptr = getelementptr [3 x i8]* %b, i64 0, i32 0
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%b0 = load i8* %b0ptr
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%b1ptr = getelementptr [3 x i8]* %b, i64 0, i32 1
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%b1 = load i8* %b1ptr
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%b2ptr = getelementptr [3 x i8]* %b, i64 0, i32 2
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%b2 = load i8* %b2ptr
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; CHCEK-NOT: store
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; CHCEK-NOT: load
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; CHECK: %[[shift0:.*]] = lshr i24 %[[mask2]], 16
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; CHECK-NEXT: %[[trunc0:.*]] = trunc i24 %[[shift0]] to i8
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; CHECK-NEXT: %[[shift1:.*]] = lshr i24 %[[mask2]], 8
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; CHECK-NEXT: %[[trunc1:.*]] = trunc i24 %[[shift1]] to i8
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; CHECK-NEXT: %[[trunc2:.*]] = trunc i24 %[[mask2]] to i8
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%bsum0 = add i8 %b0, %b1
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%bsum1 = add i8 %bsum0, %b2
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ret i8 %bsum1
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; CHECK: %[[sum0:.*]] = add i8 %[[trunc0]], %[[trunc1]]
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; CHECK-NEXT: %[[sum1:.*]] = add i8 %[[sum0]], %[[trunc2]]
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; CHECK-NEXT: ret i8 %[[sum1]]
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}
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define i64 @test2() {
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; Test for various mixed sizes of integer loads and stores all getting
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; promoted.
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;
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; CHECK: @test2
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entry:
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%a = alloca [7 x i8]
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; CHECK-NOT: alloca
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%a0ptr = getelementptr [7 x i8]* %a, i64 0, i32 0
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%a1ptr = getelementptr [7 x i8]* %a, i64 0, i32 1
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%a2ptr = getelementptr [7 x i8]* %a, i64 0, i32 2
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%a3ptr = getelementptr [7 x i8]* %a, i64 0, i32 3
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; CHCEK-NOT: store
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; CHCEK-NOT: load
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%a0i16ptr = bitcast i8* %a0ptr to i16*
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store i16 1, i16* %a0i16ptr
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; CHECK: %[[mask:.*]] = and i56 undef, 1099511627775
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; CHECK-NEXT: %[[or:.*]] = or i56 %[[mask]], 1099511627776
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%a1i4ptr = bitcast i8* %a1ptr to i4*
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store i4 1, i4* %a1i4ptr
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; CHECK: %[[mask:.*]] = and i56 %[[or]], -16492674416641
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; CHECK-NEXT: %[[or:.*]] = or i56 %[[mask]], 1099511627776
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store i8 1, i8* %a2ptr
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; CHECK-NEXT: %[[mask:.*]] = and i56 %[[or]], -1095216660481
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; CHECK-NEXT: %[[or:.*]] = or i56 %[[mask]], 4294967296
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%a3i24ptr = bitcast i8* %a3ptr to i24*
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store i24 1, i24* %a3i24ptr
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; CHECK-NEXT: %[[mask:.*]] = and i56 %[[or]], -4294967041
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; CHECK-NEXT: %[[or:.*]] = or i56 %[[mask]], 256
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%a2i40ptr = bitcast i8* %a2ptr to i40*
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store i40 1, i40* %a2i40ptr
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; CHECK-NEXT: %[[mask:.*]] = and i56 %[[or]], -1099511627776
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; CHECK-NEXT: %[[or:.*]] = or i56 %[[mask]], 1
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; CHCEK-NOT: store
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; CHCEK-NOT: load
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%aiptr = bitcast [7 x i8]* %a to i56*
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%ai = load i56* %aiptr
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%ret = zext i56 %ai to i64
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ret i64 %ret
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; CHECK: %[[ret:.*]] = zext i56 %[[or]] to i64
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; CHECK-NEXT: ret i64 %[[ret]]
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}
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