llvm-6502/test/CodeGen/R600/fadd64.ll

; RUN: llc < %s -march=r600 -mcpu=tahiti -verify-machineinstrs | FileCheck %s

; CHECK: @fadd_f64
; CHECK: V_ADD_F64 {{VGPR[0-9]+_VGPR[0-9]+, VGPR[0-9]+_VGPR[0-9]+, VGPR[0-9]+_VGPR[0-9]+}}

define void @fadd_f64(double addrspace(1)* %out, double addrspace(1)* %in1,
                      double addrspace(1)* %in2) {
   %r0 = load double addrspace(1)* %in1
   %r1 = load double addrspace(1)* %in2
   %r2 = fadd double %r0, %r1
   store double %r2, double addrspace(1)* %out
   ret void
}
R600/SI: Use -verify-machineinstrs for most tests We can't enable the verifier for tests with SI_IF and SI_ELSE, because these instructions are always followed by a COPY which copies their result to the next basic block. This violates the machine verifier's rule that non-terminators can not folow terminators. Reviewed-by: Vincent Lejeune<vljn at ovi.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192366 91177308-0d34-0410-b5e6-96231b3b80d8 2013-10-10 17:11:46 +00:00			`; RUN: llc < %s -march=r600 -mcpu=tahiti -verify-machineinstrs \| FileCheck %s`
R600/SI: Add initial double precision support for SI Patch by: Niels Ole Salscheider Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186177 91177308-0d34-0410-b5e6-96231b3b80d8 2013-07-12 18:14:56 +00:00
			`; CHECK: @fadd_f64`
			`; CHECK: V_ADD_F64 {{VGPR[0-9]+_VGPR[0-9]+, VGPR[0-9]+_VGPR[0-9]+, VGPR[0-9]+_VGPR[0-9]+}}`

			`define void @fadd_f64(double addrspace(1)* %out, double addrspace(1)* %in1,`
			`double addrspace(1)* %in2) {`
			`%r0 = load double addrspace(1)* %in1`
			`%r1 = load double addrspace(1)* %in2`
			`%r2 = fadd double %r0, %r1`
			`store double %r2, double addrspace(1)* %out`
			`ret void`
			`}`