2001-09-18 22:52:44 +00:00
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#include "llvm/Target/Sparc.h"
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2001-09-15 00:30:44 +00:00
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#include "SparcInternals.h"
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2001-09-18 22:52:44 +00:00
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#include "llvm/Method.h"
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#include "llvm/iTerminators.h"
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2001-09-30 23:16:47 +00:00
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#include "llvm/iOther.h"
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2001-09-18 22:52:44 +00:00
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#include "llvm/CodeGen/InstrScheduling.h"
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#include "llvm/CodeGen/InstrSelection.h"
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2001-09-14 03:47:57 +00:00
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2001-09-18 22:52:44 +00:00
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#include "llvm/Analysis/LiveVar/MethodLiveVarInfo.h"
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#include "llvm/CodeGen/PhyRegAlloc.h"
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2001-09-14 03:47:57 +00:00
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2001-09-18 22:52:44 +00:00
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//---------------------------------------------------------------------------
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// UltraSparcRegInfo
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//---------------------------------------------------------------------------
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2001-09-14 03:47:57 +00:00
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2001-10-21 16:43:41 +00:00
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//---------------------------------------------------------------------------
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// Finds the return value of a call instruction
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//---------------------------------------------------------------------------
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const Value *
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UltraSparcRegInfo::getCallInstRetVal(const MachineInstr *CallMI) const{
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unsigned OpCode = CallMI->getOpCode();
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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if( OpCode == CALL ) {
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// The one before the last implicit operand is the return value of
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// a CALL instr
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if( NumOfImpRefs > 1 )
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
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return CallMI->getImplicitRef(NumOfImpRefs-2);
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}
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2001-10-22 13:41:12 +00:00
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else if( OpCode == JMPLCALL) {
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2001-10-21 16:43:41 +00:00
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// The last implicit operand is the return value of a JMPL in
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if( NumOfImpRefs > 0 )
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
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return CallMI->getImplicitRef(NumOfImpRefs-1);
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}
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else
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assert(0 && "OpCode must be CALL/JMPL for a call instr");
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return NULL;
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}
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//---------------------------------------------------------------------------
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// Finds the return address of a call instruction
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//---------------------------------------------------------------------------
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const Value *
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UltraSparcRegInfo::getCallInstRetAddr(const MachineInstr *CallMI)const {
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unsigned OpCode = CallMI->getOpCode();
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if( OpCode == CALL) {
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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assert( NumOfImpRefs && "CALL instr must have at least on ImpRef");
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// The last implicit operand is the return address of a CALL instr
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return CallMI->getImplicitRef(NumOfImpRefs-1);
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}
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2001-10-22 13:41:12 +00:00
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else if( OpCode == JMPLCALL ) {
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2001-10-21 16:43:41 +00:00
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MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
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return MO.getVRegValue();
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}
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else
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assert(0 && "OpCode must be CALL/JMPL for a call instr");
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assert(0 && "There must be a return addr for a call instr");
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return NULL;
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}
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//---------------------------------------------------------------------------
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2001-10-22 13:41:12 +00:00
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// Finds the # of actual arguments of the call instruction
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2001-10-21 16:43:41 +00:00
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//---------------------------------------------------------------------------
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const unsigned
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UltraSparcRegInfo::getCallInstNumArgs(const MachineInstr *CallMI) const {
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unsigned OpCode = CallMI->getOpCode();
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unsigned NumOfImpRefs = CallMI->getNumImplicitRefs();
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int NumArgs = -1;
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if( OpCode == CALL ) {
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switch( NumOfImpRefs ) {
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case 0: assert(0 && "A CALL inst must have at least one ImpRef (RetAddr)");
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case 1: NumArgs = 0;
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break;
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default: // two or more implicit refs
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-2) )
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NumArgs = NumOfImpRefs - 2; // i.e., NumOfImpRef-2 is the ret val
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else
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NumArgs = NumOfImpRefs - 1;
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}
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}
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2001-10-22 13:41:12 +00:00
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else if( OpCode == JMPLCALL ) {
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2001-10-21 16:43:41 +00:00
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// The last implicit operand is the return value of a JMPL instr
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if( NumOfImpRefs > 0 ) {
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if( CallMI->implicitRefIsDefined(NumOfImpRefs-1) )
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NumArgs = NumOfImpRefs - 1; // i.e., NumOfImpRef-1 is the ret val
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else
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NumArgs = NumOfImpRefs;
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}
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else
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NumArgs = NumOfImpRefs;
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}
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else
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assert(0 && "OpCode must be CALL/JMPL for a call instr");
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assert( (NumArgs != -1) && "Internal error in getCallInstNumArgs" );
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return (unsigned) NumArgs;
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2001-10-28 18:15:12 +00:00
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2001-10-21 16:43:41 +00:00
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}
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2001-09-30 23:16:47 +00:00
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//---------------------------------------------------------------------------
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2001-10-15 16:25:28 +00:00
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// Suggests a register for the ret address in the RET machine instruction
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2001-09-30 23:16:47 +00:00
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//---------------------------------------------------------------------------
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2001-10-22 13:41:12 +00:00
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2001-10-15 16:25:28 +00:00
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void UltraSparcRegInfo::suggestReg4RetAddr(const MachineInstr * RetMI,
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LiveRangeInfo& LRI) const {
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2001-09-30 23:16:47 +00:00
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2001-10-22 13:41:12 +00:00
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assert( (RetMI->getNumOperands() >= 2)
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&& "JMPL/RETURN must have 3 and 2 operands respectively");
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2001-10-15 16:25:28 +00:00
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MachineOperand & MO = ( MachineOperand &) RetMI->getOperand(0);
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2001-09-14 03:47:57 +00:00
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2001-10-15 16:25:28 +00:00
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MO.setRegForValue( getUnifiedRegNum( IntRegClassID, SparcIntRegOrder::i7) );
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2001-10-22 13:41:12 +00:00
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2001-10-15 16:25:28 +00:00
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// TODO (Optimize):
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2001-10-16 01:23:19 +00:00
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// Instead of setting the color, we can suggest one. In that case,
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2001-10-15 16:25:28 +00:00
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// we have to test later whether it received the suggested color.
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// In that case, a LR has to be created at the start of method.
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// It has to be done as follows (remove the setRegVal above):
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2001-09-30 23:16:47 +00:00
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2001-10-15 16:25:28 +00:00
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/*
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const Value *RetAddrVal = MO.getVRegValue();
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2001-09-30 23:16:47 +00:00
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2001-10-15 16:25:28 +00:00
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assert( RetAddrVal && "LR for ret address must be created at start");
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2001-09-14 03:47:57 +00:00
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2001-10-15 16:25:28 +00:00
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LiveRange * RetAddrLR = LRI.getLiveRangeForValue( RetAddrVal);
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RetAddrLR->setSuggestedColor(getUnifiedRegNum( IntRegClassID,
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SparcIntRegOrdr::i7) );
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*/
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2001-09-30 23:16:47 +00:00
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}
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2001-09-14 03:47:57 +00:00
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2001-09-18 22:52:44 +00:00
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//---------------------------------------------------------------------------
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2001-10-15 16:25:28 +00:00
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// Suggests a register for the ret address in the JMPL/CALL machine instr
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2001-09-18 22:52:44 +00:00
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//---------------------------------------------------------------------------
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2001-10-21 16:43:41 +00:00
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void UltraSparcRegInfo::suggestReg4CallAddr(const MachineInstr * CallMI,
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LiveRangeInfo& LRI,
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vector<RegClass *> RCList) const {
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const Value *RetAddrVal = getCallInstRetAddr( CallMI );
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2001-09-14 03:47:57 +00:00
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2001-10-21 16:43:41 +00:00
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// RetAddrVal cannot be NULL (asserted in getCallInstRetAddr)
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// create a new LR for the return address and color it
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LiveRange * RetAddrLR = new LiveRange();
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RetAddrLR->add( RetAddrVal );
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unsigned RegClassID = getRegClassIDOfValue( RetAddrVal );
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RetAddrLR->setRegClass( RCList[RegClassID] );
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RetAddrLR->setColor(getUnifiedRegNum(IntRegClassID,SparcIntRegOrder::o7));
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LRI.addLRToMap( RetAddrVal, RetAddrLR);
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/*
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2001-10-15 16:25:28 +00:00
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assert( (CallMI->getNumOperands() == 3) && "JMPL must have 3 operands");
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// directly set color since the LR of ret address (if there were one)
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// will not extend after the call instr
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MachineOperand & MO = ( MachineOperand &) CallMI->getOperand(2);
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MO.setRegForValue( getUnifiedRegNum( IntRegClassID,SparcIntRegOrder::o7) );
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2001-10-21 16:43:41 +00:00
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*/
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2001-09-30 23:16:47 +00:00
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}
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2001-10-15 16:25:28 +00:00
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2001-09-30 23:16:47 +00:00
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//---------------------------------------------------------------------------
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// This method will suggest colors to incoming args to a method.
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// If the arg is passed on stack due to the lack of regs, NOTHING will be
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// done - it will be colored (or spilled) as a normal value.
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//---------------------------------------------------------------------------
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void UltraSparcRegInfo::suggestRegs4MethodArgs(const Method *const Meth,
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LiveRangeInfo& LRI) const
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2001-09-18 22:52:44 +00:00
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{
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2001-09-14 03:47:57 +00:00
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2001-09-18 22:52:44 +00:00
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// get the argument list
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const Method::ArgumentListType& ArgList = Meth->getArgumentList();
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// get an iterator to arg list
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Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
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// for each argument
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2001-09-30 23:16:47 +00:00
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for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
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2001-09-18 22:52:44 +00:00
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// get the LR of arg
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LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
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2001-09-30 23:16:47 +00:00
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assert( LR && "No live range found for method arg");
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unsigned RegType = getRegType( LR );
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2001-09-18 22:52:44 +00:00
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// if the arg is in int class - allocate a reg for an int arg
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2001-09-30 23:16:47 +00:00
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if( RegType == IntRegType ) {
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2001-09-18 22:52:44 +00:00
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2001-09-30 23:16:47 +00:00
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if( argNo < NumOfIntArgRegs) {
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LR->setSuggestedColor( SparcIntRegOrder::i0 + argNo );
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2001-09-18 22:52:44 +00:00
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}
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else {
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2001-09-30 23:16:47 +00:00
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// Do NOTHING as this will be colored as a normal value.
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2001-10-15 18:15:27 +00:00
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if (DEBUG_RA) cerr << " Int Regr not suggested for method arg\n";
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2001-09-18 22:52:44 +00:00
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}
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2001-09-30 23:16:47 +00:00
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2001-09-14 03:47:57 +00:00
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}
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2001-09-30 23:16:47 +00:00
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else if( RegType==FPSingleRegType && (argNo*2+1) < NumOfFloatArgRegs)
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LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
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else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
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LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
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}
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}
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2001-09-14 03:47:57 +00:00
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2001-09-30 23:16:47 +00:00
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//---------------------------------------------------------------------------
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//
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//---------------------------------------------------------------------------
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2001-09-18 22:52:44 +00:00
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2001-09-30 23:16:47 +00:00
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void UltraSparcRegInfo::colorMethodArgs(const Method *const Meth,
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LiveRangeInfo& LRI,
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AddedInstrns *const FirstAI) const {
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2001-09-18 22:52:44 +00:00
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2001-09-30 23:16:47 +00:00
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// get the argument list
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const Method::ArgumentListType& ArgList = Meth->getArgumentList();
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// get an iterator to arg list
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Method::ArgumentListType::const_iterator ArgIt = ArgList.begin();
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2001-09-18 22:52:44 +00:00
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2001-09-30 23:16:47 +00:00
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MachineInstr *AdMI;
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2001-09-18 22:52:44 +00:00
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2001-09-30 23:16:47 +00:00
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// for each argument
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for( unsigned argNo=0; ArgIt != ArgList.end() ; ++ArgIt, ++argNo) {
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// get the LR of arg
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LiveRange *const LR = LRI.getLiveRangeForValue((const Value *) *ArgIt);
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assert( LR && "No live range found for method arg");
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unsigned RegType = getRegType( LR );
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unsigned RegClassID = (LR->getRegClass())->getID();
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// find whether this argument is coming in a register (if not, on stack)
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bool isArgInReg = false;
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2001-10-24 15:56:58 +00:00
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unsigned UniArgReg = InvalidRegNum; // reg that LR MUST be colored with
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2001-09-30 23:16:47 +00:00
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if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
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isArgInReg = true;
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2001-10-24 15:56:58 +00:00
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UniArgReg = getUnifiedRegNum( RegClassID, SparcIntRegOrder::i0 + argNo );
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2001-09-30 23:16:47 +00:00
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}
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else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
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isArgInReg = true;
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UniArgReg = getUnifiedRegNum( RegClassID,
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SparcFloatRegOrder::f0 + argNo*2 + 1 ) ;
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}
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else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
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isArgInReg = true;
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UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
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}
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if( LR->hasColor() ) {
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2001-10-24 15:56:58 +00:00
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unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
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// if LR received the correct color, nothing to do
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if( UniLRReg == UniArgReg )
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continue;
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2001-09-30 23:16:47 +00:00
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// We are here because the LR did not have a suggested
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// color or did not receive the suggested color but LR got a register.
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// Now we have to copy %ix reg (or stack pos of arg)
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// to the register it was colored with.
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2001-10-24 15:56:58 +00:00
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// if the arg is coming in UniArgReg register MUST go into
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// the UniLRReg register
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2001-09-30 23:16:47 +00:00
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if( isArgInReg )
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2001-10-24 15:56:58 +00:00
|
|
|
AdMI = cpReg2RegMI( UniArgReg, UniLRReg, RegType );
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
else {
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
// Now the arg is coming on stack. Since the LR recieved a register,
|
|
|
|
// we just have to load the arg on stack into that register
|
|
|
|
int ArgStakOffFromFP =
|
|
|
|
UltraSparcFrameInfo::FirstIncomingArgOffsetFromFP +
|
|
|
|
argNo * SizeOfOperandOnStack;
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
AdMI = cpMem2RegMI(getFramePointer(), ArgStakOffFromFP,
|
|
|
|
UniLRReg, RegType );
|
|
|
|
}
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
FirstAI->InstrnsBefore.push_back( AdMI );
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
} // if LR received a color
|
|
|
|
|
|
|
|
else {
|
|
|
|
|
|
|
|
// Now, the LR did not receive a color. But it has a stack offset for
|
|
|
|
// spilling.
|
|
|
|
|
|
|
|
// So, if the arg is coming in UniArgReg register, we can just move
|
|
|
|
// that on to the stack pos of LR
|
|
|
|
|
|
|
|
|
|
|
|
if( isArgInReg ) {
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
MachineInstr *AdIBef =
|
|
|
|
cpReg2MemMI(UniArgReg, getFramePointer(),
|
|
|
|
LR->getSpillOffFromFP(), RegType );
|
|
|
|
|
|
|
|
FirstAI->InstrnsBefore.push_back( AdMI );
|
|
|
|
}
|
|
|
|
|
|
|
|
else {
|
|
|
|
|
|
|
|
// Now the arg is coming on stack. Since the LR did NOT
|
|
|
|
// recieved a register as well, it is allocated a stack position. We
|
|
|
|
// can simply change the stack poistion of the LR. We can do this,
|
|
|
|
// since this method is called before any other method that makes
|
|
|
|
// uses of the stack pos of the LR (e.g., updateMachineInstr)
|
|
|
|
|
|
|
|
int ArgStakOffFromFP =
|
|
|
|
UltraSparcFrameInfo::FirstIncomingArgOffsetFromFP +
|
|
|
|
argNo * SizeOfOperandOnStack;
|
|
|
|
|
|
|
|
LR->modifySpillOffFromFP( ArgStakOffFromFP );
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
} // for each incoming argument
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
}
|
2001-09-14 03:47:57 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
// This method is called before graph coloring to suggest colors to the
|
|
|
|
// outgoing call args and the return value of the call.
|
|
|
|
//---------------------------------------------------------------------------
|
2001-10-15 16:25:28 +00:00
|
|
|
void UltraSparcRegInfo::suggestRegs4CallArgs(const MachineInstr *const CallMI,
|
2001-09-30 23:16:47 +00:00
|
|
|
LiveRangeInfo& LRI,
|
|
|
|
vector<RegClass *> RCList) const {
|
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
|
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
suggestReg4CallAddr(CallMI, LRI, RCList);
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
// First color the return value of the call instruction. The return value
|
2001-09-18 22:52:44 +00:00
|
|
|
// will be in %o0 if the value is an integer type, or in %f0 if the
|
|
|
|
// value is a float type.
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
// the return value cannot have a LR in machine instruction since it is
|
|
|
|
// only defined by the call instruction
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
// if type is not void, create a new live range and set its
|
|
|
|
// register class and add to LRI
|
2001-09-14 03:47:57 +00:00
|
|
|
|
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
const Value *RetVal = getCallInstRetVal( CallMI );
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
if( RetVal ) {
|
2001-10-15 16:25:28 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
assert( (! LRI.getLiveRangeForValue( RetVal ) ) &&
|
|
|
|
"LR for ret Value of call already definded!");
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// create a new LR for the return value
|
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
LiveRange * RetValLR = new LiveRange();
|
|
|
|
RetValLR->add( RetVal );
|
|
|
|
unsigned RegClassID = getRegClassIDOfValue( RetVal );
|
|
|
|
RetValLR->setRegClass( RCList[RegClassID] );
|
|
|
|
LRI.addLRToMap( RetVal, RetValLR);
|
|
|
|
|
|
|
|
// now suggest a register depending on the register class of ret arg
|
2001-10-15 16:25:28 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
if( RegClassID == IntRegClassID )
|
|
|
|
RetValLR->setSuggestedColor(SparcIntRegOrder::o0);
|
|
|
|
else if (RegClassID == FloatRegClassID )
|
|
|
|
RetValLR->setSuggestedColor(SparcFloatRegOrder::f0 );
|
|
|
|
else assert( 0 && "Unknown reg class for return value of call\n");
|
2001-10-15 16:25:28 +00:00
|
|
|
|
|
|
|
}
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
// Now suggest colors for arguments (operands) of the call instruction.
|
|
|
|
// Colors are suggested only if the arg number is smaller than the
|
|
|
|
// the number of registers allocated for argument passing.
|
2001-10-21 16:43:41 +00:00
|
|
|
// Now, go thru call args - implicit operands of the call MI
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
|
|
|
|
|
|
|
|
const Value *CallArg = CallMI->getImplicitRef(i);
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
// get the LR of call operand (parameter)
|
2001-10-15 16:25:28 +00:00
|
|
|
LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// not possible to have a null LR since all args (even consts)
|
|
|
|
// must be defined before
|
|
|
|
if( !LR ) {
|
2001-09-30 23:16:47 +00:00
|
|
|
if( DEBUG_RA) {
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << " ERROR: In call instr, no LR for arg: " ;
|
|
|
|
printValue(CallArg); cerr << endl;
|
2001-09-18 22:52:44 +00:00
|
|
|
}
|
2001-10-15 16:25:28 +00:00
|
|
|
assert(0 && "NO LR for call arg");
|
|
|
|
// continue;
|
2001-09-14 03:47:57 +00:00
|
|
|
}
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
unsigned RegType = getRegType( LR );
|
|
|
|
|
|
|
|
// if the arg is in int class - allocate a reg for an int arg
|
|
|
|
if( RegType == IntRegType ) {
|
|
|
|
|
|
|
|
if( argNo < NumOfIntArgRegs)
|
|
|
|
LR->setSuggestedColor( SparcIntRegOrder::o0 + argNo );
|
|
|
|
|
|
|
|
else if (DEBUG_RA)
|
|
|
|
// Do NOTHING as this will be colored as a normal value.
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << " Regr not suggested for int call arg" << endl;
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-09-14 03:47:57 +00:00
|
|
|
}
|
2001-09-30 23:16:47 +00:00
|
|
|
else if( RegType == FPSingleRegType && (argNo*2 +1)< NumOfFloatArgRegs)
|
|
|
|
LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2 + 1) );
|
|
|
|
|
|
|
|
|
|
|
|
else if( RegType == FPDoubleRegType && (argNo*2) < NumOfFloatArgRegs)
|
|
|
|
LR->setSuggestedColor( SparcFloatRegOrder::f0 + (argNo * 2) );
|
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
} // for all call arguments
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
}
|
2001-09-18 22:52:44 +00:00
|
|
|
|
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
// After graph coloring, we have call this method to see whehter the return
|
|
|
|
// value and the call args received the correct colors. If not, we have
|
|
|
|
// to instert copy instructions.
|
|
|
|
//---------------------------------------------------------------------------
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
void UltraSparcRegInfo::colorCallArgs(const MachineInstr *const CallMI,
|
2001-09-30 23:16:47 +00:00
|
|
|
LiveRangeInfo& LRI,
|
2001-10-28 18:15:12 +00:00
|
|
|
AddedInstrns *const CallAI,
|
|
|
|
PhyRegAlloc &PRA) const {
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
assert ( (UltraSparcInfo->getInstrInfo()).isCall(CallMI->getOpCode()) );
|
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
// First color the return value of the call.
|
|
|
|
// If there is a LR for the return value, it means this
|
|
|
|
// method returns a value
|
|
|
|
|
|
|
|
MachineInstr *AdMI;
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
const Value *RetVal = getCallInstRetVal( CallMI );
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
if( RetVal ) {
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
LiveRange * RetValLR = LRI.getLiveRangeForValue( RetVal );
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
if( !RetValLR ) {
|
|
|
|
cerr << "\nNo LR for:";
|
|
|
|
printValue( RetVal );
|
|
|
|
cerr << endl;
|
|
|
|
assert( RetValLR && "ERR:No LR for non-void return value");
|
|
|
|
//return;
|
|
|
|
}
|
2001-10-24 15:56:58 +00:00
|
|
|
|
|
|
|
unsigned RegClassID = (RetValLR->getRegClass())->getID();
|
|
|
|
bool recvCorrectColor = false;
|
|
|
|
|
|
|
|
unsigned CorrectCol; // correct color for ret value
|
|
|
|
if(RegClassID == IntRegClassID)
|
|
|
|
CorrectCol = SparcIntRegOrder::o0;
|
|
|
|
else if(RegClassID == FloatRegClassID)
|
|
|
|
CorrectCol = SparcFloatRegOrder::f0;
|
|
|
|
else
|
|
|
|
assert( 0 && "Unknown RegClass");
|
|
|
|
|
|
|
|
|
|
|
|
// if the LR received the correct color, NOTHING to do
|
|
|
|
|
|
|
|
if( RetValLR->hasColor() )
|
|
|
|
if( RetValLR->getColor() == CorrectCol )
|
|
|
|
recvCorrectColor = true;
|
|
|
|
|
|
|
|
|
|
|
|
// if we didn't receive the correct color for some reason,
|
2001-10-21 16:43:41 +00:00
|
|
|
// put copy instruction
|
|
|
|
|
2001-10-24 15:56:58 +00:00
|
|
|
if( !recvCorrectColor ) {
|
2001-10-28 18:15:12 +00:00
|
|
|
|
|
|
|
unsigned RegType = getRegType( RetValLR );
|
|
|
|
|
|
|
|
// the reg that LR must be colored with
|
|
|
|
unsigned UniRetReg = getUnifiedRegNum( RegClassID, CorrectCol);
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
if( RetValLR->hasColor() ) {
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
unsigned
|
|
|
|
UniRetLRReg=getUnifiedRegNum(RegClassID,RetValLR->getColor());
|
|
|
|
|
2001-10-24 15:56:58 +00:00
|
|
|
// the return value is coming in UniRetReg but has to go into
|
|
|
|
// the UniRetLRReg
|
|
|
|
|
|
|
|
AdMI = cpReg2RegMI( UniRetReg, UniRetLRReg, RegType );
|
2001-10-28 18:15:12 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
} // if LR has color
|
|
|
|
else {
|
2001-10-28 18:15:12 +00:00
|
|
|
|
|
|
|
// if the LR did NOT receive a color, we have to move the return
|
|
|
|
// value coming in UniRetReg to the stack pos of spilled LR
|
2001-10-21 16:43:41 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
AdMI = cpReg2MemMI(UniRetReg, getFramePointer(),
|
|
|
|
RetValLR->getSpillOffFromFP(), RegType );
|
2001-10-21 16:43:41 +00:00
|
|
|
}
|
2001-10-28 18:15:12 +00:00
|
|
|
|
|
|
|
CallAI->InstrnsAfter.push_back( AdMI );
|
2001-10-21 16:43:41 +00:00
|
|
|
|
|
|
|
} // the LR didn't receive the suggested color
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
} // if there a return value
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// Now color all args of the call instruction
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-21 16:43:41 +00:00
|
|
|
unsigned NumOfCallArgs = getCallInstNumArgs( CallMI );
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
for(unsigned argNo=0, i=0; i < NumOfCallArgs; ++i, ++argNo ) {
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
const Value *CallArg = CallMI->getImplicitRef(i);
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// get the LR of call operand (parameter)
|
|
|
|
LiveRange *const LR = LRI.getLiveRangeForValue(CallArg);
|
|
|
|
|
|
|
|
unsigned RegType = getRegType( CallArg );
|
|
|
|
unsigned RegClassID = getRegClassIDOfValue( CallArg);
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
// find whether this argument is coming in a register (if not, on stack)
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
bool isArgInReg = false;
|
2001-10-24 15:56:58 +00:00
|
|
|
unsigned UniArgReg = InvalidRegNum; // reg that LR must be colored with
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
if( (RegType== IntRegType && argNo < NumOfIntArgRegs)) {
|
|
|
|
isArgInReg = true;
|
|
|
|
UniArgReg = getUnifiedRegNum(RegClassID, SparcIntRegOrder::o0 + argNo );
|
|
|
|
}
|
|
|
|
else if(RegType == FPSingleRegType && argNo < NumOfFloatArgRegs) {
|
|
|
|
isArgInReg = true;
|
|
|
|
UniArgReg = getUnifiedRegNum(RegClassID,
|
|
|
|
SparcFloatRegOrder::f0 + (argNo*2 + 1) );
|
|
|
|
}
|
|
|
|
else if(RegType == FPDoubleRegType && argNo < NumOfFloatArgRegs) {
|
|
|
|
isArgInReg = true;
|
|
|
|
UniArgReg = getUnifiedRegNum(RegClassID, SparcFloatRegOrder::f0+argNo*2);
|
|
|
|
}
|
2001-09-14 03:47:57 +00:00
|
|
|
|
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// not possible to have a null LR since all args (even consts)
|
|
|
|
// must be defined before
|
|
|
|
if( !LR ) {
|
2001-09-30 23:16:47 +00:00
|
|
|
if( DEBUG_RA) {
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << " ERROR: In call instr, no LR for arg: " ;
|
|
|
|
printValue(CallArg); cerr << endl;
|
2001-09-30 23:16:47 +00:00
|
|
|
}
|
2001-10-15 16:25:28 +00:00
|
|
|
assert(0 && "NO LR for call arg");
|
|
|
|
// continue;
|
2001-09-30 23:16:47 +00:00
|
|
|
}
|
2001-10-15 16:25:28 +00:00
|
|
|
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
// if the LR received the suggested color, NOTHING to do
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-10-24 15:56:58 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
if( LR->hasColor() ) {
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-10-24 15:56:58 +00:00
|
|
|
|
|
|
|
unsigned UniLRReg = getUnifiedRegNum( RegClassID, LR->getColor() );
|
|
|
|
|
|
|
|
// if LR received the correct color, nothing to do
|
|
|
|
if( UniLRReg == UniArgReg )
|
|
|
|
continue;
|
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
// We are here because though the LR is allocated a register, it
|
|
|
|
// was not allocated the suggested register. So, we have to copy %ix reg
|
|
|
|
// (or stack pos of arg) to the register it was colored with
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-10-24 15:56:58 +00:00
|
|
|
// the LR is colored with UniLRReg but has to go into UniArgReg
|
|
|
|
// to pass it as an argument
|
2001-09-19 22:40:51 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
if( isArgInReg )
|
|
|
|
AdMI = cpReg2RegMI(UniLRReg, UniArgReg, RegType );
|
2001-09-19 22:40:51 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
else {
|
|
|
|
// Now, we have to pass the arg on stack. Since LR received a register
|
|
|
|
// we just have to move that register to the stack position where
|
|
|
|
// the argument must be passed
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
int ArgStakOffFromSP =
|
|
|
|
UltraSparcFrameInfo::FirstOutgoingArgOffsetFromSP +
|
|
|
|
argNo * SizeOfOperandOnStack;
|
2001-09-19 22:40:51 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
AdMI = cpReg2MemMI(UniLRReg, getStackPointer(), ArgStakOffFromSP,
|
|
|
|
RegType );
|
|
|
|
}
|
|
|
|
|
|
|
|
CallAI->InstrnsBefore.push_back( AdMI ); // Now add the instruction
|
2001-09-30 23:16:47 +00:00
|
|
|
}
|
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
else { // LR is not colored (i.e., spilled)
|
2001-09-19 22:40:51 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
if( isArgInReg ) {
|
|
|
|
|
|
|
|
// Now the LR did NOT recieve a register but has a stack poistion.
|
|
|
|
// Since, the outgoing arg goes in a register we just have to insert
|
|
|
|
// a load instruction to load the LR to outgoing register
|
|
|
|
|
|
|
|
|
|
|
|
AdMI = cpMem2RegMI(getStackPointer(), LR->getSpillOffFromFP(),
|
|
|
|
UniArgReg, RegType );
|
|
|
|
|
|
|
|
CallAI->InstrnsBefore.push_back( AdMI ); // Now add the instruction
|
|
|
|
}
|
|
|
|
|
|
|
|
else {
|
|
|
|
// Now, we have to pass the arg on stack. Since LR also did NOT
|
|
|
|
// receive a register we have to move an argument in memory to
|
|
|
|
// outgoing parameter on stack.
|
|
|
|
|
|
|
|
// Optoimize: Optimize when reverse pointers in MahineInstr are
|
|
|
|
// introduced.
|
|
|
|
// call PRA.getUnusedRegAtMI(....) to get an unused reg. Only if this
|
|
|
|
// fails, then use the following code. Currently, we cannot call the
|
|
|
|
// above method since we cannot find LVSetBefore without the BB
|
|
|
|
|
|
|
|
int TReg = PRA.getRegNotUsedByThisInst( LR->getRegClass(), CallMI );
|
|
|
|
int TmpOff = PRA.getStackOffsets().getNewTmpPosOffFromFP();
|
|
|
|
int ArgStakOffFromSP =
|
|
|
|
UltraSparcFrameInfo::FirstOutgoingArgOffsetFromSP +
|
|
|
|
argNo * SizeOfOperandOnStack;
|
|
|
|
|
|
|
|
MachineInstr *Ad1, *Ad2, *Ad3, *Ad4;
|
|
|
|
|
|
|
|
// Sequence:
|
|
|
|
// (1) Save TReg on stack
|
|
|
|
// (2) Load LR value into TReg from stack pos of LR
|
|
|
|
// (3) Store Treg on outgoing Arg pos on stack
|
|
|
|
// (4) Load the old value of TReg from stack to TReg (restore it)
|
|
|
|
|
|
|
|
Ad1 = cpReg2MemMI(TReg, getFramePointer(), TmpOff, RegType );
|
|
|
|
Ad2 = cpMem2RegMI(getFramePointer(), LR->getSpillOffFromFP(),
|
|
|
|
TReg, RegType );
|
|
|
|
Ad3 = cpReg2MemMI(TReg, getStackPointer(), ArgStakOffFromSP, RegType );
|
|
|
|
Ad4 = cpMem2RegMI(getFramePointer(), TmpOff, TReg, RegType );
|
|
|
|
|
|
|
|
CallAI->InstrnsBefore.push_back( Ad1 );
|
|
|
|
CallAI->InstrnsBefore.push_back( Ad2 );
|
|
|
|
CallAI->InstrnsBefore.push_back( Ad3 );
|
|
|
|
CallAI->InstrnsBefore.push_back( Ad4 );
|
|
|
|
}
|
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
}
|
2001-09-19 22:40:51 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
} // for each parameter in call instruction
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
}
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
// This method is called for an LLVM return instruction to identify which
|
|
|
|
// values will be returned from this method and to suggest colors.
|
|
|
|
//---------------------------------------------------------------------------
|
2001-10-15 16:25:28 +00:00
|
|
|
void UltraSparcRegInfo::suggestReg4RetValue(const MachineInstr *const RetMI,
|
2001-09-30 23:16:47 +00:00
|
|
|
LiveRangeInfo& LRI) const {
|
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-23 21:40:39 +00:00
|
|
|
suggestReg4RetAddr(RetMI, LRI);
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// if there is an implicit ref, that has to be the ret value
|
|
|
|
if( RetMI->getNumImplicitRefs() > 0 ) {
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// The first implicit operand is the return value of a return instr
|
|
|
|
const Value *RetVal = RetMI->getImplicitRef(0);
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
MachineInstr *AdMI;
|
|
|
|
LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
|
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
if( !LR ) {
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << "\nNo LR for:";
|
2001-10-15 16:25:28 +00:00
|
|
|
printValue( RetVal );
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << endl;
|
2001-10-15 16:25:28 +00:00
|
|
|
assert( LR && "No LR for return value of non-void method");
|
|
|
|
//return;
|
|
|
|
}
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
unsigned RegClassID = (LR->getRegClass())->getID();
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
if( RegClassID == IntRegClassID )
|
|
|
|
LR->setSuggestedColor(SparcIntRegOrder::i0);
|
|
|
|
|
|
|
|
else if ( RegClassID == FloatRegClassID )
|
|
|
|
LR->setSuggestedColor(SparcFloatRegOrder::f0);
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-09-14 03:47:57 +00:00
|
|
|
}
|
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
}
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
// Colors the return value of a method to %i0 or %f0, if possible. If it is
|
|
|
|
// not possilbe to directly color the LR, insert a copy instruction to move
|
|
|
|
// the LR to %i0 or %f0. When the LR is spilled, instead of the copy, we
|
|
|
|
// have to put a load instruction.
|
2001-09-30 23:16:47 +00:00
|
|
|
//---------------------------------------------------------------------------
|
2001-10-15 16:25:28 +00:00
|
|
|
void UltraSparcRegInfo::colorRetValue(const MachineInstr *const RetMI,
|
2001-09-30 23:16:47 +00:00
|
|
|
LiveRangeInfo& LRI,
|
|
|
|
AddedInstrns *const RetAI) const {
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
assert( (UltraSparcInfo->getInstrInfo()).isReturn( RetMI->getOpCode() ) );
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// if there is an implicit ref, that has to be the ret value
|
|
|
|
if( RetMI->getNumImplicitRefs() > 0 ) {
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// The first implicit operand is the return value of a return instr
|
|
|
|
const Value *RetVal = RetMI->getImplicitRef(0);
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
MachineInstr *AdMI;
|
|
|
|
LiveRange *const LR = LRI.getLiveRangeForValue( RetVal );
|
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
if( ! LR ) {
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << "\nNo LR for:";
|
2001-10-15 16:25:28 +00:00
|
|
|
printValue( RetVal );
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << endl;
|
2001-10-15 16:25:28 +00:00
|
|
|
// assert( LR && "No LR for return value of non-void method");
|
|
|
|
return;
|
2001-10-28 18:15:12 +00:00
|
|
|
}
|
2001-10-15 16:25:28 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
unsigned RegClassID = getRegClassIDOfValue(RetVal);
|
|
|
|
unsigned RegType = getRegType( RetVal );
|
2001-10-23 21:40:39 +00:00
|
|
|
|
|
|
|
|
|
|
|
unsigned CorrectCol;
|
2001-09-30 23:16:47 +00:00
|
|
|
if(RegClassID == IntRegClassID)
|
2001-10-23 21:40:39 +00:00
|
|
|
CorrectCol = SparcIntRegOrder::i0;
|
2001-09-30 23:16:47 +00:00
|
|
|
else if(RegClassID == FloatRegClassID)
|
2001-10-23 21:40:39 +00:00
|
|
|
CorrectCol = SparcFloatRegOrder::f0;
|
|
|
|
else
|
|
|
|
assert( 0 && "Unknown RegClass");
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-24 15:56:58 +00:00
|
|
|
// if the LR received the correct color, NOTHING to do
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-24 15:56:58 +00:00
|
|
|
if( LR->hasColor() )
|
|
|
|
if( LR->getColor() == CorrectCol )
|
|
|
|
return;
|
2001-10-23 21:40:39 +00:00
|
|
|
|
|
|
|
unsigned UniRetReg = getUnifiedRegNum( RegClassID, CorrectCol );
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
if( LR->hasColor() ) {
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-23 21:40:39 +00:00
|
|
|
// We are here because the LR was allocted a regiter
|
|
|
|
// It may be the suggested register or not
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
// copy the LR of retun value to i0 or f0
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
unsigned UniLRReg =getUnifiedRegNum( RegClassID, LR->getColor());
|
2001-09-18 22:52:44 +00:00
|
|
|
|
2001-10-24 15:56:58 +00:00
|
|
|
// the LR received UniLRReg but must be colored with UniRetReg
|
|
|
|
// to pass as the return value
|
|
|
|
|
2001-10-15 16:25:28 +00:00
|
|
|
AdMI = cpReg2RegMI( UniLRReg, UniRetReg, RegType);
|
2001-10-23 21:40:39 +00:00
|
|
|
RetAI->InstrnsBefore.push_back( AdMI );
|
2001-09-30 23:16:47 +00:00
|
|
|
}
|
2001-10-28 18:15:12 +00:00
|
|
|
else { // if the LR is spilled
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
AdMI = cpMem2RegMI(getFramePointer(), LR->getSpillOffFromFP(),
|
|
|
|
UniRetReg, RegType);
|
|
|
|
RetAI->InstrnsBefore.push_back( AdMI );
|
|
|
|
cout << "\nCopied the return value from stack";
|
|
|
|
}
|
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
} // if there is a return value
|
2001-09-14 03:47:57 +00:00
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
// Copy from a register to register. Register number must be the unified
|
|
|
|
// register number
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
MachineInstr * UltraSparcRegInfo::cpReg2RegMI(const unsigned SrcReg,
|
|
|
|
const unsigned DestReg,
|
|
|
|
const int RegType) const {
|
|
|
|
|
2001-10-16 01:23:19 +00:00
|
|
|
assert( ((int)SrcReg != InvalidRegNum) && ((int)DestReg != InvalidRegNum) &&
|
2001-09-30 23:16:47 +00:00
|
|
|
"Invalid Register");
|
|
|
|
|
|
|
|
MachineInstr * MI = NULL;
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
switch( RegType ) {
|
|
|
|
|
|
|
|
case IntRegType:
|
2001-10-18 22:38:52 +00:00
|
|
|
case IntCCRegType:
|
|
|
|
case FloatCCRegType:
|
2001-09-18 22:52:44 +00:00
|
|
|
MI = new MachineInstr(ADD, 3);
|
2001-09-30 23:16:47 +00:00
|
|
|
MI->SetMachineOperand(0, SrcReg, false);
|
2001-09-18 22:52:44 +00:00
|
|
|
MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
|
2001-09-30 23:16:47 +00:00
|
|
|
MI->SetMachineOperand(2, DestReg, true);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case FPSingleRegType:
|
|
|
|
MI = new MachineInstr(FMOVS, 2);
|
|
|
|
MI->SetMachineOperand(0, SrcReg, false);
|
|
|
|
MI->SetMachineOperand(1, DestReg, true);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case FPDoubleRegType:
|
|
|
|
MI = new MachineInstr(FMOVD, 2);
|
|
|
|
MI->SetMachineOperand(0, SrcReg, false);
|
|
|
|
MI->SetMachineOperand(1, DestReg, true);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
assert(0 && "Unknow RegType");
|
2001-09-18 22:52:44 +00:00
|
|
|
}
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
return MI;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2001-10-16 01:23:19 +00:00
|
|
|
//---------------------------------------------------------------------------
|
2001-10-24 22:05:34 +00:00
|
|
|
// Copy from a register to memory (i.e., Store). Register number must
|
|
|
|
// be the unified register number
|
2001-10-16 01:23:19 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
|
|
|
|
|
|
|
|
MachineInstr * UltraSparcRegInfo::cpReg2MemMI(const unsigned SrcReg,
|
|
|
|
const unsigned DestPtrReg,
|
|
|
|
const int Offset,
|
|
|
|
const int RegType) const {
|
|
|
|
|
|
|
|
|
|
|
|
MachineInstr * MI = NULL;
|
|
|
|
|
|
|
|
switch( RegType ) {
|
|
|
|
|
|
|
|
case IntRegType:
|
2001-10-18 22:38:52 +00:00
|
|
|
case IntCCRegType:
|
|
|
|
case FloatCCRegType:
|
2001-10-16 01:23:19 +00:00
|
|
|
MI = new MachineInstr(STX, 3);
|
2001-10-24 22:05:34 +00:00
|
|
|
MI->SetMachineOperand(0, SrcReg, false);
|
|
|
|
MI->SetMachineOperand(1, DestPtrReg, false);
|
2001-10-16 01:23:19 +00:00
|
|
|
MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
|
|
|
|
(int64_t) Offset, false);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case FPSingleRegType:
|
|
|
|
MI = new MachineInstr(ST, 3);
|
2001-10-24 22:05:34 +00:00
|
|
|
MI->SetMachineOperand(0, SrcReg, false);
|
|
|
|
MI->SetMachineOperand(1, DestPtrReg, false);
|
2001-10-16 01:23:19 +00:00
|
|
|
MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
|
|
|
|
(int64_t) Offset, false);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case FPDoubleRegType:
|
|
|
|
MI = new MachineInstr(STD, 3);
|
2001-10-24 22:05:34 +00:00
|
|
|
MI->SetMachineOperand(0, SrcReg, false);
|
|
|
|
MI->SetMachineOperand(1, DestPtrReg, false);
|
2001-10-16 01:23:19 +00:00
|
|
|
MI->SetMachineOperand(2, MachineOperand:: MO_SignExtendedImmed,
|
|
|
|
(int64_t) Offset, false);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
assert(0 && "Unknow RegType");
|
|
|
|
}
|
|
|
|
|
|
|
|
return MI;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
//---------------------------------------------------------------------------
|
2001-10-24 22:05:34 +00:00
|
|
|
// Copy from memory to a reg (i.e., Load) Register number must be the unified
|
2001-10-16 01:23:19 +00:00
|
|
|
// register number
|
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
|
|
|
|
|
|
|
|
MachineInstr * UltraSparcRegInfo::cpMem2RegMI(const unsigned SrcPtrReg,
|
|
|
|
const int Offset,
|
|
|
|
const unsigned DestReg,
|
|
|
|
const int RegType) const {
|
|
|
|
|
|
|
|
MachineInstr * MI = NULL;
|
|
|
|
|
|
|
|
switch( RegType ) {
|
|
|
|
|
|
|
|
case IntRegType:
|
2001-10-18 22:38:52 +00:00
|
|
|
case IntCCRegType:
|
|
|
|
case FloatCCRegType:
|
2001-10-16 01:23:19 +00:00
|
|
|
MI = new MachineInstr(LDX, 3);
|
|
|
|
MI->SetMachineOperand(0, SrcPtrReg, false);
|
|
|
|
MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
|
|
|
|
(int64_t) Offset, false);
|
|
|
|
MI->SetMachineOperand(2, DestReg, false);
|
|
|
|
break;
|
|
|
|
|
|
|
|
case FPSingleRegType:
|
|
|
|
MI = new MachineInstr(LD, 3);
|
|
|
|
MI->SetMachineOperand(0, SrcPtrReg, false);
|
|
|
|
MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
|
|
|
|
(int64_t) Offset, false);
|
|
|
|
MI->SetMachineOperand(2, DestReg, false);
|
|
|
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
case FPDoubleRegType:
|
|
|
|
MI = new MachineInstr(LDD, 3);
|
|
|
|
MI->SetMachineOperand(0, SrcPtrReg, false);
|
|
|
|
MI->SetMachineOperand(1, MachineOperand:: MO_SignExtendedImmed,
|
|
|
|
(int64_t) Offset, false);
|
|
|
|
MI->SetMachineOperand(2, DestReg, false);
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
assert(0 && "Unknow RegType");
|
|
|
|
}
|
|
|
|
|
|
|
|
return MI;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2001-11-03 17:13:27 +00:00
|
|
|
MachineInstr* UltraSparcRegInfo::cpValue2Value(Value *Src, Value *Dest) const {
|
2001-10-16 01:23:19 +00:00
|
|
|
|
2001-11-03 17:13:27 +00:00
|
|
|
MachineInstr * MI = NULL;
|
|
|
|
|
|
|
|
MI = new MachineInstr(ADD, 3);
|
|
|
|
MI->SetMachineOperand(0, MachineOperand:: MO_VirtualRegister, Src, false);
|
|
|
|
MI->SetMachineOperand(1, SparcIntRegOrder::g0, false);
|
|
|
|
MI->SetMachineOperand(2, MachineOperand:: MO_VirtualRegister, Dest, true);
|
|
|
|
|
|
|
|
|
|
|
|
return MI;
|
|
|
|
|
|
|
|
}
|
2001-10-16 01:23:19 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
//----------------------------------------------------------------------------
|
|
|
|
// This method inserts caller saving/restoring instructons before/after
|
|
|
|
// a call machine instruction.
|
|
|
|
//----------------------------------------------------------------------------
|
2001-10-16 01:23:19 +00:00
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
void UltraSparcRegInfo::insertCallerSavingCode(const MachineInstr *MInst,
|
|
|
|
const BasicBlock *BB,
|
|
|
|
PhyRegAlloc &PRA) const {
|
|
|
|
// assert( (getInstrInfo()).isCall( MInst->getOpCode() ) );
|
2001-09-14 03:47:57 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
|
|
|
|
PRA.StackOffsets.resetTmpPos();
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
hash_set<unsigned> PushedRegSet;
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
// Now find the LR of the return value of the call
|
|
|
|
// The last *implicit operand* is the return value of a call
|
|
|
|
// Insert it to to he PushedRegSet since we must not save that register
|
|
|
|
// and restore it after the call.
|
|
|
|
// We do this because, we look at the LV set *after* the instruction
|
|
|
|
// to determine, which LRs must be saved across calls. The return value
|
|
|
|
// of the call is live in this set - but we must not save/restore it.
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
const Value *RetVal = getCallInstRetVal( MInst );
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
if( RetVal ) {
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
LiveRange *RetValLR = PRA.LRI.getLiveRangeForValue( RetVal );
|
|
|
|
assert( RetValLR && "No LR for RetValue of call");
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
PushedRegSet.insert(
|
|
|
|
getUnifiedRegNum((RetValLR->getRegClass())->getID(),
|
|
|
|
RetValLR->getColor() ) );
|
|
|
|
}
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
const LiveVarSet *LVSetAft = PRA.LVI->getLiveVarSetAfterMInst(MInst, BB);
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
LiveVarSet::const_iterator LIt = LVSetAft->begin();
|
2001-09-14 20:31:39 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
// for each live var in live variable set after machine inst
|
|
|
|
for( ; LIt != LVSetAft->end(); ++LIt) {
|
2001-09-14 20:31:39 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
// get the live range corresponding to live var
|
|
|
|
LiveRange *const LR = PRA.LRI.getLiveRangeForValue(*LIt );
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
// LR can be null if it is a const since a const
|
|
|
|
// doesn't have a dominating def - see Assumptions above
|
|
|
|
if( LR ) {
|
|
|
|
|
|
|
|
if( LR->hasColor() ) {
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
unsigned RCID = (LR->getRegClass())->getID();
|
|
|
|
unsigned Color = LR->getColor();
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
if ( isRegVolatile(RCID, Color) ) {
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
// if the value is in both LV sets (i.e., live before and after
|
|
|
|
// the call machine instruction)
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
unsigned Reg = getUnifiedRegNum(RCID, Color);
|
|
|
|
|
|
|
|
if( PushedRegSet.find(Reg) == PushedRegSet.end() ) {
|
|
|
|
|
|
|
|
// if we haven't already pushed that register
|
2001-09-30 23:16:47 +00:00
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
unsigned RegType = getRegType( LR );
|
|
|
|
|
|
|
|
// Now get two instructions - to push on stack and pop from stack
|
|
|
|
// and add them to InstrnsBefore and InstrnsAfter of the
|
|
|
|
// call instruction
|
|
|
|
|
|
|
|
int StackOff = PRA.StackOffsets. getNewTmpPosOffFromFP();
|
|
|
|
|
|
|
|
/**** TODO - Handle IntCCRegType
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
*/
|
|
|
|
|
|
|
|
MachineInstr *AdIBef =
|
|
|
|
cpReg2MemMI(Reg, getStackPointer(), StackOff, RegType );
|
|
|
|
|
|
|
|
MachineInstr *AdIAft =
|
|
|
|
cpMem2RegMI(getStackPointer(), StackOff, Reg, RegType );
|
|
|
|
|
|
|
|
((PRA.AddedInstrMap[MInst])->InstrnsBefore).push_front(AdIBef);
|
|
|
|
((PRA.AddedInstrMap[MInst])->InstrnsAfter).push_back(AdIAft);
|
|
|
|
|
|
|
|
PushedRegSet.insert( Reg );
|
|
|
|
|
|
|
|
if(DEBUG_RA) {
|
|
|
|
cerr << "\nFor callee save call inst:" << *MInst;
|
|
|
|
cerr << "\n -inserted caller saving instrs:\n\t ";
|
|
|
|
cerr << *AdIBef << "\n\t" << *AdIAft ;
|
|
|
|
}
|
|
|
|
} // if not already pushed
|
|
|
|
|
|
|
|
} // if LR has a volatile color
|
|
|
|
|
|
|
|
} // if LR has color
|
|
|
|
|
|
|
|
} // if there is a LR for Var
|
|
|
|
|
|
|
|
} // for each value in the LV set after instruction
|
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
2001-09-30 23:16:47 +00:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2001-10-28 18:15:12 +00:00
|
|
|
|
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
//---------------------------------------------------------------------------
|
|
|
|
// Print the register assigned to a LR
|
|
|
|
//---------------------------------------------------------------------------
|
2001-09-14 20:31:39 +00:00
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
void UltraSparcRegInfo::printReg(const LiveRange *const LR) {
|
2001-09-14 20:31:39 +00:00
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
unsigned RegClassID = (LR->getRegClass())->getID();
|
2001-09-14 20:31:39 +00:00
|
|
|
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << " *Node " << (LR->getUserIGNode())->getIndex();
|
2001-09-18 22:52:44 +00:00
|
|
|
|
|
|
|
if( ! LR->hasColor() ) {
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << " - could not find a color" << endl;
|
2001-09-18 22:52:44 +00:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
// if a color is found
|
2001-09-14 20:31:39 +00:00
|
|
|
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << " colored with color "<< LR->getColor();
|
2001-09-14 20:31:39 +00:00
|
|
|
|
2001-09-18 22:52:44 +00:00
|
|
|
if( RegClassID == IntRegClassID ) {
|
2001-09-14 20:31:39 +00:00
|
|
|
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr<< " [" << SparcIntRegOrder::getRegName(LR->getColor()) ;
|
|
|
|
cerr << "]" << endl;
|
2001-09-18 22:52:44 +00:00
|
|
|
}
|
|
|
|
else if ( RegClassID == FloatRegClassID) {
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << "[" << SparcFloatRegOrder::getRegName(LR->getColor());
|
2001-09-18 22:52:44 +00:00
|
|
|
if( LR->getTypeID() == Type::DoubleTyID )
|
2001-10-15 18:15:27 +00:00
|
|
|
cerr << "+" << SparcFloatRegOrder::getRegName(LR->getColor()+1);
|
|
|
|
cerr << "]" << endl;
|
2001-09-18 22:52:44 +00:00
|
|
|
}
|
|
|
|
}
|