llvm-6502/test/MC/Disassembler/ARM/invalid-CPS3p-arm.txt

# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {potentially undefined instruction encoding}

# invalid (imod, M, iflags) combination
0x93 0x00 0x02 0xf1
Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions. Fixes a large class of disassembler crashes found by randomized testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137995 91177308-0d34-0410-b5e6-96231b3b80d8 2011-08-18 22:11:02 +00:00			`# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 \|& grep {potentially undefined instruction encoding}`
Plug a leak in the arm disassembler and put the tests back. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128238 91177308-0d34-0410-b5e6-96231b3b80d8 2011-03-24 21:14:28 +00:00
			`# invalid (imod, M, iflags) combination`
Reapply r143202, with a manual decoding hook for SWP. This change inadvertantly exposed a decoding ambiguity between SWP and CPS that the auto-generated decoder can't handle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143208 91177308-0d34-0410-b5e6-96231b3b80d8 2011-10-28 18:02:13 +00:00			`0x93 0x00 0x02 0xf1`