llvm-6502/lib/Target/Sparc/CMakeLists.txt

set(LLVM_TARGET_DEFINITIONS Sparc.td)

tablegen(SparcGenRegisterInfo.inc -gen-register-info)
tablegen(SparcGenInstrInfo.inc -gen-instr-info)
tablegen(SparcGenAsmWriter.inc -gen-asm-writer)
tablegen(SparcGenDAGISel.inc -gen-dag-isel)
tablegen(SparcGenSubtargetInfo.inc -gen-subtarget)
tablegen(SparcGenCallingConv.inc -gen-callingconv)

add_llvm_target(SparcCodeGen
  DelaySlotFiller.cpp
  FPMover.cpp
  SparcAsmPrinter.cpp
  SparcInstrInfo.cpp
  SparcISelDAGToDAG.cpp
  SparcISelLowering.cpp
  SparcFrameLowering.cpp
  SparcMCAsmInfo.cpp
  SparcRegisterInfo.cpp
  SparcSubtarget.cpp
  SparcTargetMachine.cpp
  SparcSelectionDAGInfo.cpp
  )

add_subdirectory(TargetInfo)
CMake: Builds all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8 2008-09-26 04:40:32 +00:00			`set(LLVM_TARGET_DEFINITIONS Sparc.td)`

Starting to refactor Target to separate out code that's needed to fully describe target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8 2011-06-24 01:44:41 +00:00			`tablegen(SparcGenRegisterInfo.inc -gen-register-info)`
Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8 2011-06-28 20:07:07 +00:00			`tablegen(SparcGenInstrInfo.inc -gen-instr-info)`
CMake: Builds all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8 2008-09-26 04:40:32 +00:00			`tablegen(SparcGenAsmWriter.inc -gen-asm-writer)`
			`tablegen(SparcGenDAGISel.inc -gen-dag-isel)`
Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8 2011-07-01 22:36:09 +00:00			`tablegen(SparcGenSubtargetInfo.inc -gen-subtarget)`
CMake: Builds all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8 2008-09-26 04:40:32 +00:00			`tablegen(SparcGenCallingConv.inc -gen-callingconv)`

CMake: corrected split of Alpha and Sparc AsmPrinters. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59050 91177308-0d34-0410-b5e6-96231b3b80d8 2008-11-11 17:10:13 +00:00			`add_llvm_target(SparcCodeGen`
CMake: Builds all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8 2008-09-26 04:40:32 +00:00			`DelaySlotFiller.cpp`
			`FPMover.cpp`
move all the target's asmprinters into the main target. The piece that should be split out is the InstPrinter (if a target is mc'ized). This change makes all the targets be consistent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119056 91177308-0d34-0410-b5e6-96231b3b80d8 2010-11-14 18:43:56 +00:00			`SparcAsmPrinter.cpp`
CMake: Builds all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8 2008-09-26 04:40:32 +00:00			`SparcInstrInfo.cpp`
			`SparcISelDAGToDAG.cpp`
			`SparcISelLowering.cpp`
Update CMake stuff git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123171 91177308-0d34-0410-b5e6-96231b3b80d8 2011-01-10 12:39:23 +00:00			`SparcFrameLowering.cpp`
Normalize makefile comments and sort cmake file lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80584 91177308-0d34-0410-b5e6-96231b3b80d8 2009-08-31 13:05:24 +00:00			`SparcMCAsmInfo.cpp`
CMake: Builds all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8 2008-09-26 04:40:32 +00:00			`SparcRegisterInfo.cpp`
			`SparcSubtarget.cpp`
			`SparcTargetMachine.cpp`
Add skeleton target-specific SelectionDAGInfo files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101564 91177308-0d34-0410-b5e6-96231b3b80d8 2010-04-16 23:04:22 +00:00			`SparcSelectionDAGInfo.cpp`
CMake: Builds all targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56641 91177308-0d34-0410-b5e6-96231b3b80d8 2008-09-26 04:40:32 +00:00			`)`
Use explicit add_subdirectory's for LLVM target sublibraries instead of testing for its presence at cmake time. This way the build automatically regenerates the makefiles when a svn update brings in a new sublibrary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126068 91177308-0d34-0410-b5e6-96231b3b80d8 2011-02-20 02:55:27 +00:00
			`add_subdirectory(TargetInfo)`