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19 lines
756 B
TableGen
19 lines
756 B
TableGen
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//===- Mips16InstrInfo.td - Target Description for Mips16 -*- tablegen -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes Mips16 instructions.
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//
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//===----------------------------------------------------------------------===//
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let isReturn=1, isTerminator=1, hasDelaySlot=1, isCodeGenOnly=1,
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isBarrier=1, hasCtrlDep=1, rx=0b000, ry=0b001 in
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def RET16 : FRR16 <0, (outs), (ins CPURAReg:$target),
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"jr\t$target", [(MipsRet CPURAReg:$target)], IIBranch>,
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Requires<[InMips16Mode]>;
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