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Better processor definition

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43749 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
2007-11-06 03:15:20 +00:00
parent efcc3f5c5e
commit 000604afd4
2 changed files with 5 additions and 3 deletions
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6
lib/Target/Mips/Mips.td
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@@ -33,6 +33,7 @@ def MipsInstrInfo : InstrInfo {
// CPU Directives // // CPU Directives //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Not currently supported, but work as SubtargetFeature placeholder.
def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true", def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true",
"MipsIII ISA Support">; "MipsIII ISA Support">;
@@ -40,8 +41,9 @@ def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true",
// Mips processors supported. // Mips processors supported.
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
def : Processor<"generic", MipsGenericItineraries, []>; def : Processor<"mips1", MipsGenericItineraries, []>;
//def : Processor<"r4000", MipsR4000Itineraries, [FeatureMipsIII]>; def : Processor<"r2000", MipsGenericItineraries, []>;
def : Processor<"r3000", MipsGenericItineraries, []>;
def Mips : Target { def Mips : Target {
let InstructionSet = MipsInstrInfo; let InstructionSet = MipsInstrInfo;

2
lib/Target/Mips/MipsSubtarget.cpp
View File

@@ -20,7 +20,7 @@ MipsSubtarget::MipsSubtarget(const TargetMachine &TM, const Module &M,
const std::string &FS) : const std::string &FS) :
IsMipsIII(false) IsMipsIII(false)
{ {
std::string CPU = "generic"; std::string CPU = "mips1";
// Parse features string. // Parse features string.
ParseSubtargetFeatures(FS, CPU); ParseSubtargetFeatures(FS, CPU);