6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-11-01 15:17:25 +00:00
Code Issues Projects Releases Wiki Activity

[X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly

Browse Source 
Differential Revision: http://reviews.llvm.org/D11257
Patch by: marina.yatsina@intel.com

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242639 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Michael Kuperstein
2015-07-19 11:03:08 +00:00
parent c365e7e2b5
commit 00552e3875
2 changed files with 3 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
test/MC/X86/intel-syntax.s
View File

@@ -635,10 +635,12 @@ add byte ptr [rax], 1
// CHECK: addw $1, (%rax)
// CHECK: addb $1, (%rax)
fstp tbyte ptr [rax]
fstp xword ptr [rax]
fstp qword ptr [rax]
fstp dword ptr [rax]
// CHECK: fstpt (%rax)
// CHECK: fstpt (%rax)
// CHECK: fstpl (%rax)
// CHECK: fstps (%rax)