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Teach RemoveCopyByCommutingDef to check all aliases, not just subregisters.

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This caused a miscompilation in WebKit where %RAX had conflicting defs when
RemoveCopyByCommutingDef was commuting a %EAX use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112751 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-09-01 22:15:35 +00:00
parent a314afe658
commit 0077114efc
2 changed files with 42 additions and 16 deletions
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30
lib/CodeGen/SimpleRegisterCoalescing.cpp
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@ -389,16 +389,12 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(const CoalescerPair &CP,
if (HasOtherReachingDefs(IntA, IntB, AValNo, BValNo))
return false;
bool BHasSubRegs = false;
if (TargetRegisterInfo::isPhysicalRegister(IntB.reg))
BHasSubRegs = *tri_->getSubRegisters(IntB.reg);
// Abort if the subregisters of IntB.reg have values that are not simply the
// Abort if the aliases of IntB.reg have values that are not simply the
// clobbers from the superreg.
if (BHasSubRegs)
for (const unsigned *SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR)
if (li_->hasInterval(*SR) &&
HasOtherReachingDefs(IntA, li_->getInterval(*SR), AValNo, 0))
if (TargetRegisterInfo::isPhysicalRegister(IntB.reg))
for (const unsigned *AS = tri_->getAliasSet(IntB.reg); *AS; ++AS)
if (li_->hasInterval(*AS) &&
HasOtherReachingDefs(IntA, li_->getInterval(*AS), AValNo, 0))
return false;
// If some of the uses of IntA.reg is already coalesced away, return false.
@ -415,6 +411,8 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(const CoalescerPair &CP,
return false;
}
DEBUG(dbgs() << "\tRemoveCopyByCommutingDef: " << *DefMI);
// At this point we have decided that it is legal to do this
// transformation. Start by commuting the instruction.
MachineBasicBlock *MBB = DefMI->getParent();
@ -478,7 +476,7 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(const CoalescerPair &CP,
if (UseMI->getOperand(0).getReg() != IntB.reg ||
UseMI->getOperand(0).getSubReg())
continue;
// This copy will become a noop. If it's defining a new val#,
// remove that val# as well. However this live range is being
// extended to the end of the existing live range defined by the copy.
@ -503,13 +501,13 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(const CoalescerPair &CP,
// Remove val#'s defined by copies that will be coalesced away.
for (unsigned i = 0, e = BDeadValNos.size(); i != e; ++i) {
VNInfo *DeadVNI = BDeadValNos[i];
if (BHasSubRegs) {
for (const unsigned *SR = tri_->getSubRegisters(IntB.reg); *SR; ++SR) {
if (!li_->hasInterval(*SR))
if (TargetRegisterInfo::isPhysicalRegister(IntB.reg)) {
for (const unsigned *AS = tri_->getAliasSet(IntB.reg); *AS; ++AS) {
if (!li_->hasInterval(*AS))
continue;
LiveInterval &SRLI = li_->getInterval(*SR);
if (const LiveRange *SRLR = SRLI.getLiveRangeContaining(DeadVNI->def))
SRLI.removeValNo(SRLR->valno);
LiveInterval &ASLI = li_->getInterval(*AS);
if (const LiveRange *ASLR = ASLI.getLiveRangeContaining(DeadVNI->def))
ASLI.removeValNo(ASLR->valno);
}
}
IntB.removeValNo(BDeadValNos[i]);

28
test/CodeGen/X86/2010-09-01-RemoveCopyByCommutingDef.ll Normal file
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@ -0,0 +1,28 @@
; RUN: llc < %s -verify-machineinstrs | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
; This test exercises the alias checking in SimpleRegisterCoalescing::RemoveCopyByCommutingDef.
define void @f(i32* %w, i32* %h, i8* %_this, i8* %image) nounwind ssp {
%x1 = tail call i64 @g(i8* %_this, i8* %image) nounwind ; <i64> [#uses=3]
%tmp1 = trunc i64 %x1 to i32 ; <i32> [#uses=1]
; CHECK: movl (%r{{.*}}), %
%x4 = load i32* %h, align 4 ; <i32> [#uses=1]
; The imull clobbers a 32-bit register.
; CHECK: imull %{{...}}, %e[[CLOBBER:..]]
%x5 = mul nsw i32 %x4, %tmp1 ; <i32> [#uses=1]
; So we cannot use the corresponding 64-bit register anymore.
; CHECK-NOT: shrq $32, %r[[CLOBBER]]
%btmp3 = lshr i64 %x1, 32 ; <i64> [#uses=1]
%btmp4 = trunc i64 %btmp3 to i32 ; <i32> [#uses=1]
; CHECK: idiv
%x6 = sdiv i32 %x5, %btmp4 ; <i32> [#uses=1]
store i32 %x6, i32* %w, align 4
ret void
}
declare i64 @g(i8*, i8*)