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Legalizer: Add an assert and tweak a comment to clarify the assumptions this code makes.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173620 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2013-01-27 15:04:43 +00:00
parent 6a325cc46d
commit 022688c260
1 changed files with 5 additions and 1 deletions
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6
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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@ -2098,9 +2098,13 @@ void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
EVT VT = LHSL.getValueType();
// If the shift amount operand is coming from a vector legalization it may
// not have the right return type. Fix that first by casting the operand.
// have an illegal type. Fix that first by casting the operand. Otherwise
// the new SHL_PARTS operation would need further legalization, and the
// legalizer assumes that illegal SHL_PARTS never occur.
SDValue ShiftOp = N->getOperand(1);
MVT ShiftTy = TLI.getShiftAmountTy(VT);
assert(ShiftTy.getSizeInBits() >= Log2_32_Ceil(VT.getSizeInBits()) &&
"ShiftAmountTy is too small to cover the range of this type!");
if (ShiftOp.getValueType() != ShiftTy)
ShiftOp = DAG.getZExtOrTrunc(ShiftOp, dl, ShiftTy);