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https://github.com/c64scene-ar/llvm-6502.git
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* Convert to a MachineFunctionPass
* Don't take a TM as a ctor parameter * Print [X - Y] instead of [X + -Y] when possible git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5180 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
parent
5ae99fe3bf
commit
0285a33761
@ -7,25 +7,23 @@
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#include "X86.h"
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#include "X86InstrInfo.h"
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#include "llvm/Pass.h"
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#include "llvm/Function.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "Support/Statistic.h"
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namespace {
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struct Printer : public FunctionPass {
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TargetMachine &TM;
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struct Printer : public MachineFunctionPass {
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std::ostream &O;
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Printer(TargetMachine &tm, std::ostream &o) : TM(tm), O(o) {}
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Printer(std::ostream &o) : O(o) {}
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virtual const char *getPassName() const {
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return "X86 Assembly Printer";
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}
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bool runOnFunction(Function &F);
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bool runOnMachineFunction(MachineFunction &F);
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};
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}
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@ -33,38 +31,35 @@ namespace {
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/// the specified stream. This function should work regardless of whether or
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/// not the function is in SSA form or not.
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///
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Pass *createX86CodePrinterPass(TargetMachine &TM, std::ostream &O) {
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return new Printer(TM, O);
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Pass *createX86CodePrinterPass(std::ostream &O) {
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return new Printer(O);
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}
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/// runOnFunction - This uses the X86InstructionInfo::print method
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/// to print assembly for each instruction.
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bool Printer::runOnFunction (Function & F)
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{
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static unsigned bbnumber = 0;
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MachineFunction & MF = MachineFunction::get (&F);
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const MachineInstrInfo & MII = TM.getInstrInfo ();
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bool Printer::runOnMachineFunction(MachineFunction &MF) {
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static unsigned BBNumber = 0;
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const TargetMachine &TM = MF.getTarget();
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const MachineInstrInfo &MII = TM.getInstrInfo();
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// Print out labels for the function.
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O << "\t.globl\t" << F.getName () << "\n";
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O << "\t.type\t" << F.getName () << ", @function\n";
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O << F.getName () << ":\n";
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O << "\t.globl\t" << MF.getFunction()->getName() << "\n";
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O << "\t.type\t" << MF.getFunction()->getName() << ", @function\n";
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O << MF.getFunction()->getName() << ":\n";
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// Print out code for the function.
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for (MachineFunction::const_iterator bb_i = MF.begin (), bb_e = MF.end ();
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bb_i != bb_e; ++bb_i)
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{
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// Print a label for the basic block.
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O << ".BB" << bbnumber++ << ":\n";
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for (MachineBasicBlock::const_iterator i_i = bb_i->begin (), i_e =
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bb_i->end (); i_i != i_e; ++i_i)
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{
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// Print the assembly for the instruction.
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O << "\t";
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MII.print(*i_i, O, TM);
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}
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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O << ".BB" << BBNumber++ << ":\n";
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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MII.print(*II, O, TM);
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}
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}
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// We didn't modify anything.
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return false;
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@ -109,7 +104,7 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
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}
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}
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static const std::string sizePtr (const MachineInstrDescriptor &Desc) {
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static const std::string sizePtr(const MachineInstrDescriptor &Desc) {
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switch (Desc.TSFlags & X86II::ArgMask) {
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default: assert(0 && "Unknown arg size!");
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case X86II::Arg8: return "BYTE PTR";
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@ -125,9 +120,9 @@ static void printMemReference(std::ostream &O, const MachineInstr *MI,
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unsigned Op, const MRegisterInfo &RI) {
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assert(isMem(MI, Op) && "Invalid memory reference!");
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const MachineOperand &BaseReg = MI->getOperand(Op);
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const MachineOperand &Scale = MI->getOperand(Op+1);
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int ScaleVal = MI->getOperand(Op+1).getImmedValue();
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &Disp = MI->getOperand(Op+3);
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int DispVal = MI->getOperand(Op+3).getImmedValue();
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O << "[";
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bool NeedPlus = false;
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@ -138,15 +133,21 @@ static void printMemReference(std::ostream &O, const MachineInstr *MI,
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if (IndexReg.getReg()) {
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if (NeedPlus) O << " + ";
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if (Scale.getImmedValue() != 1)
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O << Scale.getImmedValue() << "*";
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if (ScaleVal != 1)
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O << ScaleVal << "*";
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printOp(O, IndexReg, RI);
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NeedPlus = true;
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}
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if (Disp.getImmedValue()) {
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if (NeedPlus) O << " + ";
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printOp(O, Disp, RI);
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if (DispVal) {
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if (NeedPlus)
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if (DispVal > 0)
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O << " + ";
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else {
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O << " - ";
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DispVal = -DispVal;
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}
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O << DispVal;
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}
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O << "]";
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}
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@ -7,25 +7,23 @@
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#include "X86.h"
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#include "X86InstrInfo.h"
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#include "llvm/Pass.h"
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#include "llvm/Function.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "Support/Statistic.h"
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namespace {
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struct Printer : public FunctionPass {
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TargetMachine &TM;
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struct Printer : public MachineFunctionPass {
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std::ostream &O;
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Printer(TargetMachine &tm, std::ostream &o) : TM(tm), O(o) {}
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Printer(std::ostream &o) : O(o) {}
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virtual const char *getPassName() const {
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return "X86 Assembly Printer";
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}
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bool runOnFunction(Function &F);
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bool runOnMachineFunction(MachineFunction &F);
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};
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}
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@ -33,38 +31,35 @@ namespace {
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/// the specified stream. This function should work regardless of whether or
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/// not the function is in SSA form or not.
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///
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Pass *createX86CodePrinterPass(TargetMachine &TM, std::ostream &O) {
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return new Printer(TM, O);
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Pass *createX86CodePrinterPass(std::ostream &O) {
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return new Printer(O);
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}
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/// runOnFunction - This uses the X86InstructionInfo::print method
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/// to print assembly for each instruction.
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bool Printer::runOnFunction (Function & F)
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{
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static unsigned bbnumber = 0;
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MachineFunction & MF = MachineFunction::get (&F);
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const MachineInstrInfo & MII = TM.getInstrInfo ();
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bool Printer::runOnMachineFunction(MachineFunction &MF) {
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static unsigned BBNumber = 0;
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const TargetMachine &TM = MF.getTarget();
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const MachineInstrInfo &MII = TM.getInstrInfo();
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// Print out labels for the function.
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O << "\t.globl\t" << F.getName () << "\n";
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O << "\t.type\t" << F.getName () << ", @function\n";
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O << F.getName () << ":\n";
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O << "\t.globl\t" << MF.getFunction()->getName() << "\n";
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O << "\t.type\t" << MF.getFunction()->getName() << ", @function\n";
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O << MF.getFunction()->getName() << ":\n";
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// Print out code for the function.
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for (MachineFunction::const_iterator bb_i = MF.begin (), bb_e = MF.end ();
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bb_i != bb_e; ++bb_i)
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{
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// Print a label for the basic block.
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O << ".BB" << bbnumber++ << ":\n";
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for (MachineBasicBlock::const_iterator i_i = bb_i->begin (), i_e =
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bb_i->end (); i_i != i_e; ++i_i)
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{
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// Print the assembly for the instruction.
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O << "\t";
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MII.print(*i_i, O, TM);
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}
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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O << ".BB" << BBNumber++ << ":\n";
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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O << "\t";
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MII.print(*II, O, TM);
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}
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}
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// We didn't modify anything.
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return false;
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@ -109,7 +104,7 @@ static void printOp(std::ostream &O, const MachineOperand &MO,
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}
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}
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static const std::string sizePtr (const MachineInstrDescriptor &Desc) {
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static const std::string sizePtr(const MachineInstrDescriptor &Desc) {
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switch (Desc.TSFlags & X86II::ArgMask) {
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default: assert(0 && "Unknown arg size!");
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case X86II::Arg8: return "BYTE PTR";
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@ -125,9 +120,9 @@ static void printMemReference(std::ostream &O, const MachineInstr *MI,
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unsigned Op, const MRegisterInfo &RI) {
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assert(isMem(MI, Op) && "Invalid memory reference!");
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const MachineOperand &BaseReg = MI->getOperand(Op);
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const MachineOperand &Scale = MI->getOperand(Op+1);
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int ScaleVal = MI->getOperand(Op+1).getImmedValue();
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const MachineOperand &IndexReg = MI->getOperand(Op+2);
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const MachineOperand &Disp = MI->getOperand(Op+3);
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int DispVal = MI->getOperand(Op+3).getImmedValue();
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O << "[";
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bool NeedPlus = false;
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@ -138,15 +133,21 @@ static void printMemReference(std::ostream &O, const MachineInstr *MI,
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if (IndexReg.getReg()) {
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if (NeedPlus) O << " + ";
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if (Scale.getImmedValue() != 1)
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O << Scale.getImmedValue() << "*";
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if (ScaleVal != 1)
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O << ScaleVal << "*";
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printOp(O, IndexReg, RI);
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NeedPlus = true;
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}
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if (Disp.getImmedValue()) {
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if (NeedPlus) O << " + ";
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printOp(O, Disp, RI);
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if (DispVal) {
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if (NeedPlus)
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if (DispVal > 0)
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O << " + ";
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else {
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O << " - ";
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DispVal = -DispVal;
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}
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O << DispVal;
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}
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O << "]";
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}
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