From 02ff6ba6f6bb804d01ff5354176486355b5e2676 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sat, 6 Nov 2010 07:34:58 +0000 Subject: [PATCH] move the "movsd -> movsl" alias to the .td files, tidy up the movsx and movzx aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118331 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/AsmParser/X86AsmParser.cpp | 6 --- lib/Target/X86/X86InstrInfo.td | 47 ++++++++--------------- 2 files changed, 17 insertions(+), 36 deletions(-) diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 30d3a7e6c5a..9b57827a777 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -969,12 +969,6 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, NameLoc); } - // movsd -> movsl (when no operands are specified). - if (Name == "movsd" && Operands.size() == 1) { - delete Operands[0]; - Operands[0] = X86Operand::CreateToken("movsl", NameLoc); - } - // fstp -> fstps . Without this, we'll default to fstpl due to // suffix searching. if (Name == "fstp" && Operands.size() == 2 && diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index fdb17a13724..fd94d22bdf0 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -1370,6 +1370,10 @@ defm : IntegerCondCodeMnemonicAlias<"cmov", "q">; // Assembler Instruction Aliases //===----------------------------------------------------------------------===// +// movsd with no operands (as opposed to the SSE scalar move of a double) is an +// alias for movsl. (as in rep; movsd) +def : InstAlias<"movsd", (MOVSD)>; + // clr aliases. def : InstAlias<"clrb $reg", (XOR8rr GR8 :$reg, GR8 :$reg)>; def : InstAlias<"clrw $reg", (XOR16rr GR16:$reg, GR16:$reg)>; @@ -1377,38 +1381,21 @@ def : InstAlias<"clrl $reg", (XOR32rr GR32:$reg, GR32:$reg)>; def : InstAlias<"clrq $reg", (XOR64rr GR64:$reg, GR64:$reg)>; // movsx aliases -def : InstAlias<"movsx $src, $dst", - (MOVSX16rr8W GR16:$dst, GR8:$src)>; -def : InstAlias<"movsx $src, $dst", - (MOVSX16rm8W GR16:$dst, i8mem:$src)>; - -def : InstAlias<"movsx $src, $dst", - (MOVSX32rr8 GR32:$dst, GR8:$src)>; -def : InstAlias<"movsx $src, $dst", - (MOVSX32rr16 GR32:$dst, GR16:$src)>; - -def : InstAlias<"movsx $src, $dst", - (MOVSX64rr8 GR64:$dst, GR8:$src)>; -def : InstAlias<"movsx $src, $dst", - (MOVSX64rr16 GR64:$dst, GR16:$src)>; -def : InstAlias<"movsx $src, $dst", - (MOVSX64rr32 GR64:$dst, GR32:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX16rr8W GR16:$dst, GR8:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX16rm8W GR16:$dst, i8mem:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX32rr8 GR32:$dst, GR8:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX32rr16 GR32:$dst, GR16:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX64rr8 GR64:$dst, GR8:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX64rr16 GR64:$dst, GR16:$src)>; +def : InstAlias<"movsx $src, $dst", (MOVSX64rr32 GR64:$dst, GR32:$src)>; // movzx aliases -def : InstAlias<"movzx $src, $dst", - (MOVZX16rr8W GR16:$dst, GR8:$src)>; -def : InstAlias<"movzx $src, $dst", - (MOVZX16rm8W GR16:$dst, i8mem:$src)>; - -def : InstAlias<"movzx $src, $dst", - (MOVZX32rr8 GR32:$dst, GR8:$src)>; -def : InstAlias<"movzx $src, $dst", - (MOVZX32rr16 GR32:$dst, GR16:$src)>; - -def : InstAlias<"movzx $src, $dst", - (MOVZX64rr8_Q GR64:$dst, GR8:$src)>; -def : InstAlias<"movzx $src, $dst", - (MOVZX64rr16_Q GR64:$dst, GR16:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX16rr8W GR16:$dst, GR8:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX16rm8W GR16:$dst, i8mem:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX32rr8 GR32:$dst, GR8:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX32rr16 GR32:$dst, GR16:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX64rr8_Q GR64:$dst, GR8:$src)>; +def : InstAlias<"movzx $src, $dst", (MOVZX64rr16_Q GR64:$dst, GR16:$src)>; // Note: No GR32->GR64 movzx form.