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[NVPTX] mul.wide generation works for any smaller integer source types, not just the next smaller power of two

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213784 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Justin Holewinski
2014-07-23 18:46:03 +00:00
parent 8b832c1c39
commit 03f160f9d3
2 changed files with 24 additions and 2 deletions
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4
lib/Target/NVPTX/NVPTXISelLowering.cpp
View File

@@ -4053,13 +4053,13 @@ static bool IsMulWideOperandDemotable(SDValue Op,
if (Op.getOpcode() == ISD::SIGN_EXTEND || if (Op.getOpcode() == ISD::SIGN_EXTEND ||
Op.getOpcode() == ISD::SIGN_EXTEND_INREG) { Op.getOpcode() == ISD::SIGN_EXTEND_INREG) {
EVT OrigVT = Op.getOperand(0).getValueType(); EVT OrigVT = Op.getOperand(0).getValueType();
if (OrigVT.getSizeInBits() == OptSize) { if (OrigVT.getSizeInBits() <= OptSize) {
S = Signed; S = Signed;
return true; return true;
} }
} else if (Op.getOpcode() == ISD::ZERO_EXTEND) { } else if (Op.getOpcode() == ISD::ZERO_EXTEND) {
EVT OrigVT = Op.getOperand(0).getValueType(); EVT OrigVT = Op.getOperand(0).getValueType();
if (OrigVT.getSizeInBits() == OptSize) { if (OrigVT.getSizeInBits() <= OptSize) {
S = Unsigned; S = Unsigned;
return true; return true;
} }

22
test/CodeGen/NVPTX/mulwide.ll
View File

@@ -23,6 +23,28 @@ define i32 @mulwideu16(i16 %a, i16 %b) {
ret i32 %val2 ret i32 %val2
} }
; OPT-LABEL: @mulwide8
; NOOPT-LABEL: @mulwide8
define i32 @mulwide8(i8 %a, i8 %b) {
; OPT: mul.wide.s16
; NOOPT: mul.lo.s32
%val0 = sext i8 %a to i32
%val1 = sext i8 %b to i32
%val2 = mul i32 %val0, %val1
ret i32 %val2
}
; OPT-LABEL: @mulwideu8
; NOOPT-LABEL: @mulwideu8
define i32 @mulwideu8(i8 %a, i8 %b) {
; OPT: mul.wide.u16
; NOOPT: mul.lo.s32
%val0 = zext i8 %a to i32
%val1 = zext i8 %b to i32
%val2 = mul i32 %val0, %val1
ret i32 %val2
}
; OPT-LABEL: @mulwide32 ; OPT-LABEL: @mulwide32
; NOOPT-LABEL: @mulwide32 ; NOOPT-LABEL: @mulwide32
define i64 @mulwide32(i32 %a, i32 %b) { define i64 @mulwide32(i32 %a, i32 %b) {