From 0432d7964f04875b8ce0662df8579b7f6c537e13 Mon Sep 17 00:00:00 2001
From: Christian Konig <christian.koenig@amd.com>
Date: Sat, 16 Feb 2013 11:27:56 +0000
Subject: [PATCH] R600/SI: remove some more unused code
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This is a candidate for the stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175350 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/R600/AMDGPUCodeEmitter.h           | 45 -------------------
 .../R600/MCTargetDesc/AMDGPUMCCodeEmitter.h   |  7 ---
 2 files changed, 52 deletions(-)
 delete mode 100644 lib/Target/R600/AMDGPUCodeEmitter.h

diff --git a/lib/Target/R600/AMDGPUCodeEmitter.h b/lib/Target/R600/AMDGPUCodeEmitter.h
deleted file mode 100644
index 5d61cd0de62..00000000000
--- a/lib/Target/R600/AMDGPUCodeEmitter.h
+++ /dev/null
@@ -1,45 +0,0 @@
-//===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// \brief CodeEmitter interface for R600 and SI codegen.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef AMDGPUCODEEMITTER_H
-#define AMDGPUCODEEMITTER_H
-
-namespace llvm {
-
-class AMDGPUCodeEmitter {
-public:
-  uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
-  virtual uint64_t getMachineOpValue(const MachineInstr &MI,
-                                   const MachineOperand &MO) const { return 0; }
-  virtual unsigned GPR4AlignEncode(const MachineInstr  &MI,
-                                     unsigned OpNo) const {
-    return 0;
-  }
-  virtual unsigned GPR2AlignEncode(const MachineInstr &MI,
-                                   unsigned OpNo) const {
-    return 0;
-  }
-  virtual uint64_t VOPPostEncode(const MachineInstr &MI,
-                                 uint64_t Value) const {
-    return Value;
-  }
-  virtual uint64_t i32LiteralEncode(const MachineInstr &MI,
-                                    unsigned OpNo) const {
-    return 0;
-  }
-};
-
-} // End namespace llvm
-
-#endif // AMDGPUCODEEMITTER_H
diff --git a/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h b/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h
index 3b3816a5107..8721f8084d6 100644
--- a/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h
+++ b/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h
@@ -42,13 +42,6 @@ public:
                                    SmallVectorImpl<MCFixup> &Fixups) const {
     return 0;
   }
-  virtual uint64_t VOPPostEncode(const MCInst &MI, uint64_t Value) const {
-    return Value;
-  }
-  virtual uint64_t i32LiteralEncode(const MCInst &MI, unsigned OpNo,
-                                   SmallVectorImpl<MCFixup> &Fixups) const {
-    return 0;
-  }
 };
 
 } // End namespace llvm