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Change debug info from #define to command line option
Clean up extra debug info that wasn't guarded git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@647 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1,6 +1,10 @@
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#include "llvm/CodeGen/PhyRegAlloc.h"
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cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::NoFlags,
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"enable register allocation debugging information",
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clEnumValN(RA_DEBUG_None , "n", "disable debug output"),
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clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"),
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clEnumValN(RA_DEBUG_Verbose, "v", "enable extra debug output"), 0);
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//----------------------------------------------------------------------------
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@ -267,8 +271,9 @@ void PhyRegAlloc::updateMachineCode()
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const Value *const Val = Op.getVRegValue();
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// delete this condition checking later (must assert if Val is null)
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if( !Val && DEBUG_RA) {
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cout << "Warning: NULL Value found for operand" << endl;
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if( !Val) {
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if (DEBUG_RA)
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cout << "Warning: NULL Value found for operand" << endl;
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continue;
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}
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assert( Val && "Value is NULL");
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@ -480,8 +485,10 @@ void PhyRegAlloc::allocateRegisters()
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RegClassList[ rc ]->colorAllRegs();
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updateMachineCode();
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PrintMachineInstructions(Meth);
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printMachineCode(); // only for DEBUGGING
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if (DEBUG_RA) {
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PrintMachineInstructions(Meth);
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printMachineCode(); // only for DEBUGGING
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}
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}
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@ -1,6 +1,10 @@
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#include "llvm/CodeGen/PhyRegAlloc.h"
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cl::Enum<RegAllocDebugLevel_t> DEBUG_RA("dregalloc", cl::NoFlags,
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"enable register allocation debugging information",
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clEnumValN(RA_DEBUG_None , "n", "disable debug output"),
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clEnumValN(RA_DEBUG_Normal , "y", "enable debug output"),
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clEnumValN(RA_DEBUG_Verbose, "v", "enable extra debug output"), 0);
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//----------------------------------------------------------------------------
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@ -267,8 +271,9 @@ void PhyRegAlloc::updateMachineCode()
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const Value *const Val = Op.getVRegValue();
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// delete this condition checking later (must assert if Val is null)
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if( !Val && DEBUG_RA) {
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cout << "Warning: NULL Value found for operand" << endl;
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if( !Val) {
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if (DEBUG_RA)
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cout << "Warning: NULL Value found for operand" << endl;
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continue;
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}
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assert( Val && "Value is NULL");
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@ -480,8 +485,10 @@ void PhyRegAlloc::allocateRegisters()
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RegClassList[ rc ]->colorAllRegs();
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updateMachineCode();
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PrintMachineInstructions(Meth);
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printMachineCode(); // only for DEBUGGING
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if (DEBUG_RA) {
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PrintMachineInstructions(Meth);
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printMachineCode(); // only for DEBUGGING
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}
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}
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