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Force fragile test to the atom scheduler model.

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The pattern the test originally checked for doesn't occur on other -mcpu
settings. On atom it's still there though slightly differently scheduled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182933 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Benjamin Kramer 2013-05-30 15:22:28 +00:00
parent 71f2df0e28
commit 051ed0ae2d
1 changed files with 4 additions and 2 deletions
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6
test/CodeGen/X86/zext-sext.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -march=x86-64 | FileCheck %s
; RUN: llc < %s -march=x86-64 -mcpu=atom | FileCheck %s
; <rdar://problem/8006248>
; This randomly started passing after an unrelated change, if it fails again it
@ -34,9 +34,11 @@ entry:
%tmp12 = add i64 %tmp11, 5089792279245435153
; CHECK: addl $2138875574, %e[[REGISTER_zext:[a-z0-9]+]]
; CHECK-NEXT: cmpl $-8608074, %e[[REGISTER_zext]]
; CHECK-NEXT: movslq %e[[REGISTER_zext]], [[REGISTER_tmp:%r[a-z0-9]+]]
; CHECK: movq [[REGISTER_tmp]], [[REGISTER_sext:%r[a-z0-9]+]]
; CHECK-NEXT: subq %r[[REGISTER_zext]], [[REGISTER_sext]]
; CHECK-NOT: [[REGISTER_zext]]
; CHECK: subq %r[[REGISTER_zext]], [[REGISTER_sext]]
%tmp13 = sub i64 %tmp12, 2138875574
%tmp14 = zext i32 %tmp4 to i64