mirror of
https://github.com/c64scene-ar/llvm-6502.git
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Remove invalid instruction encodings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170291 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@@ -34,90 +34,72 @@ class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FL2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FL2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FLRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FLRU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FLU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FLU6<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FU10<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FU10<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FLU10<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FLU10<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _F2R<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _F2R<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FRUS<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FRUS<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _FL2R<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _FL2R<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _F1R<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _F1R<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _F0R<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _F0R<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<2, outs, ins, asmstr, pattern> {
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: InstXCore<2, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _L4R<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _L5R<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _L5R<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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class _L6R<dag outs, dag ins, string asmstr, list<dag> pattern>
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class _L6R<dag outs, dag ins, string asmstr, list<dag> pattern>
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: InstXCore<4, outs, ins, asmstr, pattern> {
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: InstXCore<4, outs, ins, asmstr, pattern> {
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let Inst{31-0} = 0;
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}
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}
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