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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157005 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2012-05-17 18:35:07 +00:00
parent b54ec26b35
commit 0556bd35e5
2 changed files with 1 additions and 3 deletions
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2
lib/CodeGen/MachineScheduler.cpp
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@ -819,8 +819,6 @@ SUnit *ConvergingScheduler::pickNode(bool &IsTopNode) {
assert(TopQueue.empty() && BotQueue.empty() && "ReadyQ garbage"); assert(TopQueue.empty() && BotQueue.empty() && "ReadyQ garbage");
return NULL; return NULL;
} }
// As an initial placeholder heuristic, schedule in the direction that has
// the fewest choices.
SUnit *SU; SUnit *SU;
if (ForceTopDown) { if (ForceTopDown) {
SU = DAG->getSUnit(DAG->top()); SU = DAG->getSUnit(DAG->top());

2
lib/CodeGen/RegisterPressure.cpp
View File

@ -698,7 +698,7 @@ getMaxDownwardPressureDelta(const MachineInstr *MI, RegPressureDelta &Delta) {
unsigned Reg = VirtRegOpers.Uses[i]; unsigned Reg = VirtRegOpers.Uses[i];
const LiveInterval *LI = &LIS->getInterval(Reg); const LiveInterval *LI = &LIS->getInterval(Reg);
// FIXME: allow the caller to pass in the list of vreg uses that remain to // FIXME: allow the caller to pass in the list of vreg uses that remain to
// be top-scheduled to avoid searching uses at each query. // be bottom-scheduled to avoid searching uses at each query.
SlotIndex CurrIdx = LIS->getInstructionIndex(CurrPos).getRegSlot(); SlotIndex CurrIdx = LIS->getInstructionIndex(CurrPos).getRegSlot();
if (LI->killedAt(SlotIdx) if (LI->killedAt(SlotIdx)
&& !findUseBetween(Reg, CurrIdx, SlotIdx, MRI, LIS)) { && !findUseBetween(Reg, CurrIdx, SlotIdx, MRI, LIS)) {