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https://github.com/c64scene-ar/llvm-6502.git
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PPC: Map frin to round() not nearbyint() and rint()
Making use of the recently-added ISD::FROUND, which allows for custom lowering of round(), the PPC backend will now map frin to round(). Previously, we had been using frin to lower nearbyint() (and rint() via some custom lowering to handle the extra fenv flags requirements), but only in fast-math mode because frin does not tie-to-even. Several users had complained about this behavior, and this new mapping of frin to round is certainly more appropriate (and does not require fast-math mode). In effect, this reverts r178362 (and part of r178337, replacing the nearbyint mapping with the round mapping). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187960 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel
parent
9706d43b56
commit
05a4d2642b
@ -156,21 +156,12 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
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setOperationAction(ISD::FFLOOR, MVT::f64, Legal);
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setOperationAction(ISD::FCEIL, MVT::f64, Legal);
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setOperationAction(ISD::FTRUNC, MVT::f64, Legal);
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setOperationAction(ISD::FROUND, MVT::f64, Legal);
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setOperationAction(ISD::FFLOOR, MVT::f32, Legal);
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setOperationAction(ISD::FCEIL, MVT::f32, Legal);
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setOperationAction(ISD::FTRUNC, MVT::f32, Legal);
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// frin does not implement "ties to even." Thus, this is safe only in
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// fast-math mode.
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if (TM.Options.UnsafeFPMath) {
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setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal);
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setOperationAction(ISD::FNEARBYINT, MVT::f32, Legal);
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// These need to set FE_INEXACT, and use a custom inserter.
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setOperationAction(ISD::FRINT, MVT::f64, Legal);
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setOperationAction(ISD::FRINT, MVT::f32, Legal);
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}
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setOperationAction(ISD::FROUND, MVT::f32, Legal);
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}
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// PowerPC does not have BSWAP, CTPOP or CTTZ
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@ -6676,51 +6667,6 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
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// Restore FPSCR value.
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BuildMI(*BB, MI, dl, TII->get(PPC::MTFSF)).addImm(1).addReg(MFFSReg);
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} else if (MI->getOpcode() == PPC::FRINDrint ||
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MI->getOpcode() == PPC::FRINSrint) {
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bool isf32 = MI->getOpcode() == PPC::FRINSrint;
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unsigned Dest = MI->getOperand(0).getReg();
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unsigned Src = MI->getOperand(1).getReg();
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DebugLoc dl = MI->getDebugLoc();
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MachineRegisterInfo &RegInfo = F->getRegInfo();
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unsigned CRReg = RegInfo.createVirtualRegister(&PPC::CRRCRegClass);
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// Perform the rounding.
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BuildMI(*BB, MI, dl, TII->get(isf32 ? PPC::FRINS : PPC::FRIND), Dest)
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.addReg(Src);
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// Compare the results.
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BuildMI(*BB, MI, dl, TII->get(isf32 ? PPC::FCMPUS : PPC::FCMPUD), CRReg)
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.addReg(Dest).addReg(Src);
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// If the results were not equal, then set the FPSCR XX bit.
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MachineBasicBlock *midMBB = F->CreateMachineBasicBlock(LLVM_BB);
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MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
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F->insert(It, midMBB);
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F->insert(It, exitMBB);
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exitMBB->splice(exitMBB->begin(), BB,
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llvm::next(MachineBasicBlock::iterator(MI)),
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BB->end());
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exitMBB->transferSuccessorsAndUpdatePHIs(BB);
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BuildMI(*BB, MI, dl, TII->get(PPC::BCC))
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.addImm(PPC::PRED_EQ).addReg(CRReg).addMBB(exitMBB);
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BB->addSuccessor(midMBB);
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BB->addSuccessor(exitMBB);
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BB = midMBB;
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// Set the FPSCR XX bit (FE_INEXACT). Note that we cannot just set
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// the FI bit here because that will not automatically set XX also,
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// and XX is what libm interprets as the FE_INEXACT flag.
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BuildMI(BB, dl, TII->get(PPC::MTFSB1)).addImm(/* 38 - 32 = */ 6);
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BuildMI(BB, dl, TII->get(PPC::B)).addMBB(exitMBB);
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BB->addSuccessor(exitMBB);
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BB = exitMBB;
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} else {
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llvm_unreachable("Unexpected instr type to insert");
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}
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@ -1686,23 +1686,13 @@ let Uses = [RM] in {
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"frsp", "$frD, $frB", FPGeneral,
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[(set f32:$frD, (fround f64:$frB))]>;
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// The frin -> nearbyint mapping is valid only in fast-math mode.
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let Interpretation64Bit = 1 in
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defm FRIND : XForm_26r<63, 392, (outs f8rc:$frD), (ins f8rc:$frB),
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"frin", "$frD, $frB", FPGeneral,
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[(set f64:$frD, (fnearbyint f64:$frB))]>;
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[(set f64:$frD, (frnd f64:$frB))]>;
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defm FRINS : XForm_26r<63, 392, (outs f4rc:$frD), (ins f4rc:$frB),
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"frin", "$frD, $frB", FPGeneral,
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[(set f32:$frD, (fnearbyint f32:$frB))]>;
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}
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// These pseudos expand to rint but also set FE_INEXACT when the result does
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// not equal the argument.
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let usesCustomInserter = 1, Defs = [RM] in { // FIXME: Model FPSCR!
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def FRINDrint : Pseudo<(outs f8rc:$frD), (ins f8rc:$frB),
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"#FRINDrint", [(set f64:$frD, (frint f64:$frB))]>;
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def FRINSrint : Pseudo<(outs f4rc:$frD), (ins f4rc:$frB),
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"#FRINSrint", [(set f32:$frD, (frint f32:$frB))]>;
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[(set f32:$frD, (frnd f32:$frB))]>;
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}
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let neverHasSideEffects = 1 in {
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@ -1,5 +1,4 @@
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; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s
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; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-unsafe-fp-math | FileCheck -check-prefix=CHECK-FM %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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@ -9,9 +8,6 @@ define float @test1(float %x) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: frim 1, 1
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; CHECK-FM-LABEL: test1:
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; CHECK-FM: frim 1, 1
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}
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declare float @floorf(float) nounwind readnone
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@ -22,38 +18,29 @@ define double @test2(double %x) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: frim 1, 1
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; CHECK-FM-LABEL: test2:
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; CHECK-FM: frim 1, 1
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}
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declare double @floor(double) nounwind readnone
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define float @test3(float %x) nounwind {
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%call = tail call float @nearbyintf(float %x) nounwind readnone
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%call = tail call float @roundf(float %x) nounwind readnone
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ret float %call
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; CHECK-LABEL: test3:
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; CHECK-NOT: frin
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; CHECK-FM-LABEL: test3:
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; CHECK-FM: frin 1, 1
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; CHECK: frin 1, 1
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}
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declare float @nearbyintf(float) nounwind readnone
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declare float @roundf(float) nounwind readnone
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define double @test4(double %x) nounwind {
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%call = tail call double @nearbyint(double %x) nounwind readnone
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%call = tail call double @round(double %x) nounwind readnone
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ret double %call
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; CHECK-LABEL: test4:
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; CHECK-NOT: frin
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; CHECK-FM-LABEL: test4:
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; CHECK-FM: frin 1, 1
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; CHECK: frin 1, 1
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}
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declare double @nearbyint(double) nounwind readnone
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declare double @round(double) nounwind readnone
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define float @test5(float %x) nounwind {
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%call = tail call float @ceilf(float %x) nounwind readnone
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@ -61,9 +48,6 @@ define float @test5(float %x) nounwind {
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; CHECK-LABEL: test5:
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; CHECK: frip 1, 1
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; CHECK-FM-LABEL: test5:
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; CHECK-FM: frip 1, 1
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}
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declare float @ceilf(float) nounwind readnone
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@ -74,9 +58,6 @@ define double @test6(double %x) nounwind {
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; CHECK-LABEL: test6:
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; CHECK: frip 1, 1
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; CHECK-FM-LABEL: test6:
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; CHECK-FM: frip 1, 1
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}
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declare double @ceil(double) nounwind readnone
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@ -87,9 +68,6 @@ define float @test9(float %x) nounwind {
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; CHECK-LABEL: test9:
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; CHECK: friz 1, 1
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; CHECK-FM-LABEL: test9:
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; CHECK-FM: friz 1, 1
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}
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declare float @truncf(float) nounwind readnone
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@ -100,48 +78,7 @@ define double @test10(double %x) nounwind {
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; CHECK-LABEL: test10:
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; CHECK: friz 1, 1
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; CHECK-FM-LABEL: test10:
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; CHECK-FM: friz 1, 1
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}
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declare double @trunc(double) nounwind readnone
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define void @test11(float %x, float* %y) nounwind {
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%call = tail call float @rintf(float %x) nounwind readnone
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store float %call, float* %y
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ret void
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; CHECK-LABEL: test11:
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; CHECK-NOT: frin
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; CHECK-FM-LABEL: test11:
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; CHECK-FM: frin [[R2:[0-9]+]], [[R1:[0-9]+]]
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; CHECK-FM: fcmpu [[CR:[0-9]+]], [[R2]], [[R1]]
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; CHECK-FM: beq [[CR]], .LBB[[BB:[0-9]+]]_2
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; CHECK-FM: mtfsb1 6
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; CHECK-FM: .LBB[[BB]]_2:
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; CHECK-FM: blr
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}
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declare float @rintf(float) nounwind readnone
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define void @test12(double %x, double* %y) nounwind {
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%call = tail call double @rint(double %x) nounwind readnone
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store double %call, double* %y
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ret void
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; CHECK-LABEL: test12:
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; CHECK-NOT: frin
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; CHECK-FM-LABEL: test12:
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; CHECK-FM: frin [[R2:[0-9]+]], [[R1:[0-9]+]]
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; CHECK-FM: fcmpu [[CR:[0-9]+]], [[R2]], [[R1]]
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; CHECK-FM: beq [[CR]], .LBB[[BB:[0-9]+]]_2
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; CHECK-FM: mtfsb1 6
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; CHECK-FM: .LBB[[BB]]_2:
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; CHECK-FM: blr
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}
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declare double @rint(double) nounwind readnone
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