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ARM pre-v6 assembly parsing for umull/smull.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152188 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2012-03-07 01:09:17 +00:00
parent 0104dd3ffd
commit 05d88f4fea
1 changed files with 10 additions and 0 deletions
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10
lib/Target/ARM/ARMInstrInfo.td
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@ -5256,6 +5256,16 @@ def : ARMInstAlias<"neg${s}${p} $Rd, $Rm",
def : InstAlias<"nop${p}", (MOVr R0, R0, pred:$p, zero_reg)>,
Requires<[IsARM, NoV6]>;
// UMULL/SMULL are available on all arches, but the instruction definitions
// need difference constraints pre-v6. Use these aliases for the assembly
// parsing on pre-v6.
def : InstAlias<"smull${s}${p} $RdLo, $RdHi, $Rn, $Rm",
(SMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
Requires<[IsARM, NoV6]>;
def : InstAlias<"umull${s}${p} $RdLo, $RdHi, $Rn, $Rm",
(UMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
Requires<[IsARM, NoV6]>;
// 'it' blocks in ARM mode just validate the predicates. The IT itself
// is discarded.
def ITasm : ARMAsmPseudo<"it$mask $cc", (ins it_pred:$cc, it_mask:$mask)>;