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Refactor code into a new method.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19635 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-01-17 17:15:02 +00:00
parent 80d8a93489
commit 068a81e9fc
2 changed files with 29 additions and 19 deletions
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3
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
View File

@ -567,8 +567,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
assert(VT == N1.getValueType() && assert(VT == N1.getValueType() &&
"Shift operators return type must be the same as their first arg"); "Shift operators return type must be the same as their first arg");
assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) && assert(MVT::isInteger(VT) && MVT::isInteger(N2.getValueType()) &&
"Shifts only work on integers"); VT != MVT::i1 && "Shifts only work on integers");
assert(VT >= MVT::i8 && "Shift amount cannot be a MVT::i1");
break; break;
default: break; default: break;
} }

45
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -806,6 +806,32 @@ CopyValueToVirtualRegister(SelectionDAGLowering &SDL, Value *V, unsigned Reg) {
return DAG.getCopyToReg(DAG.getRoot(), Op, Reg); return DAG.getCopyToReg(DAG.getRoot(), Op, Reg);
} }
void SelectionDAGISel::
LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL,
std::vector<SDOperand> &UnorderedChains) {
// If this is the entry block, emit arguments.
Function &F = *BB->getParent();
if (BB == &F.front()) {
// FIXME: If an argument is only used in one basic block, we could directly
// emit it (ONLY) into that block, not emitting the COPY_TO_VREG node. This
// would improve codegen in several cases on X86 by allowing the loads to be
// folded into the user operation.
std::vector<SDOperand> Args = TLI.LowerArguments(F, SDL.DAG);
FunctionLoweringInfo &FuncInfo = SDL.FuncInfo;
unsigned a = 0;
for (Function::aiterator AI = F.abegin(), E = F.aend(); AI != E; ++AI,++a)
if (!AI->use_empty()) {
SDL.setValue(AI, Args[a]);
UnorderedChains.push_back(
CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]));
}
}
}
void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB, void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate, std::vector<std::pair<MachineInstr*, unsigned> > &PHINodesToUpdate,
FunctionLoweringInfo &FuncInfo) { FunctionLoweringInfo &FuncInfo) {
@ -813,23 +839,8 @@ void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB,
std::vector<SDOperand> UnorderedChains; std::vector<SDOperand> UnorderedChains;
// If this is the entry block, emit arguments. // Lower any arguments needed in this block.
Function *F = LLVMBB->getParent(); LowerArguments(LLVMBB, SDL, UnorderedChains);
if (LLVMBB == &F->front()) {
// FIXME: If an argument is only used in one basic block, we could directly
// emit it (ONLY) into that block, not emitting the COPY_TO_VREG node. This
// would improve codegen in several cases on X86 by allowing the loads to be
// folded into the user operation.
std::vector<SDOperand> Args = TLI.LowerArguments(*LLVMBB->getParent(), DAG);
unsigned a = 0;
for (Function::aiterator AI = F->abegin(), E = F->aend(); AI != E; ++AI,++a)
if (!AI->use_empty()) {
SDL.setValue(AI, Args[a]);
UnorderedChains.push_back(
CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]));
}
}
BB = FuncInfo.MBBMap[LLVMBB]; BB = FuncInfo.MBBMap[LLVMBB];
SDL.setCurrentBasicBlock(BB); SDL.setCurrentBasicBlock(BB);