From 0692ee676f8cdad25ad09a868bf597af4115c9d9 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 6 Sep 2010 19:11:01 +0000 Subject: [PATCH] have AsmMatcherEmitter.cpp produce the hunk of code that gets included into the middle of the class, and rework how the different sections of the generated file are conditionally included for simplicity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113163 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 9 +++---- lib/Target/X86/AsmParser/X86AsmLexer.cpp | 9 +++---- lib/Target/X86/AsmParser/X86AsmParser.cpp | 18 ++++++------- utils/TableGen/AsmMatcherEmitter.cpp | 32 ++++++++++++++++++----- 4 files changed, 42 insertions(+), 26 deletions(-) diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 75e2a739bf1..fef8eb08103 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -95,11 +95,8 @@ private: /// @name Auto-generated Match Functions /// { - unsigned ComputeAvailableFeatures(const ARMSubtarget *Subtarget) const; - - bool MatchInstructionImpl(const SmallVectorImpl - &Operands, - MCInst &Inst); +#define GET_ASSEMBLER_HEADER +#include "ARMGenAsmMatcher.inc" /// } @@ -869,4 +866,6 @@ extern "C" void LLVMInitializeARMAsmParser() { LLVMInitializeARMAsmLexer(); } +#define GET_REGISTER_MATCHER +#define GET_MATCHER_IMPLEMENTATION #include "ARMGenAsmMatcher.inc" diff --git a/lib/Target/X86/AsmParser/X86AsmLexer.cpp b/lib/Target/X86/AsmParser/X86AsmLexer.cpp index 26797ab353b..ec73087a330 100644 --- a/lib/Target/X86/AsmParser/X86AsmLexer.cpp +++ b/lib/Target/X86/AsmParser/X86AsmLexer.cpp @@ -65,9 +65,10 @@ public: } }; -} +} // end anonymous namespace -static unsigned MatchRegisterName(StringRef Name); +#define GET_REGISTER_MATCHER +#include "X86GenAsmMatcher.inc" AsmToken X86AsmLexer::LexTokenATT() { AsmToken lexedToken = lexDefinite(); @@ -162,7 +163,3 @@ extern "C" void LLVMInitializeX86AsmLexer() { RegisterAsmLexer X(TheX86_32Target); RegisterAsmLexer Y(TheX86_64Target); } - -#define REGISTERS_ONLY -#include "X86GenAsmMatcher.inc" -#undef REGISTERS_ONLY diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 6dcb7f554be..7e922ed4f86 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -56,12 +56,10 @@ private: /// @name Auto-generated Matcher Functions /// { - - unsigned ComputeAvailableFeatures(const X86Subtarget *Subtarget) const; - - bool MatchInstructionImpl( - const SmallVectorImpl &Operands, MCInst &Inst); - + +#define GET_ASSEMBLER_HEADER +#include "X86GenAsmMatcher.inc" + /// } public: @@ -882,9 +880,6 @@ X86ATTAsmParser::MatchInstruction(SMLoc IDLoc, MCInst &Inst) { assert(!Operands.empty() && "Unexpect empty operand list!"); - X86Operand *Op = static_cast(Operands[0]); - assert(Op->isToken() && "Leading operand should always be a mnemonic!"); - // First, try a direct match. if (!MatchInstructionImpl(Operands, Inst)) return false; @@ -894,6 +889,9 @@ X86ATTAsmParser::MatchInstruction(SMLoc IDLoc, // type. However, that requires substantially more matcher support than the // following hack. + X86Operand *Op = static_cast(Operands[0]); + assert(Op->isToken() && "Leading operand should always be a mnemonic!"); + // Change the operand to point to a temporary token. StringRef Base = Op->getToken(); SmallString<16> Tmp; @@ -966,4 +964,6 @@ extern "C" void LLVMInitializeX86AsmParser() { LLVMInitializeX86AsmLexer(); } +#define GET_REGISTER_MATCHER +#define GET_MATCHER_IMPLEMENTATION #include "X86GenAsmMatcher.inc" diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp index 799a58a511b..515916efde7 100644 --- a/utils/TableGen/AsmMatcherEmitter.cpp +++ b/utils/TableGen/AsmMatcherEmitter.cpp @@ -1541,13 +1541,32 @@ void AsmMatcherEmitter::run(raw_ostream &OS) { EmitSourceFileHeader("Assembly Matcher Source Fragment", OS); + // Information for the class declaration. + OS << "\n#ifdef GET_ASSEMBLER_HEADER\n"; + OS << "#undef GET_ASSEMBLER_HEADER\n"; + OS << " unsigned ComputeAvailableFeatures(const " << + Target.getName() << "Subtarget *Subtarget) const;\n"; + OS << "bool MatchInstructionImpl(const SmallVectorImpl" + << " &Operands, MCInst &Inst);\n\n"; + OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n"; + + + + + OS << "\n#ifdef GET_REGISTER_MATCHER\n"; + OS << "#undef GET_REGISTER_MATCHER\n\n"; + // Emit the subtarget feature enumeration. EmitSubtargetFeatureFlagEnumeration(Target, Info, OS); // Emit the function to match a register name to number. EmitMatchRegisterName(Target, AsmParser, OS); + + OS << "#endif // GET_REGISTER_MATCHER\n\n"; - OS << "#ifndef REGISTERS_ONLY\n\n"; + + OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n"; + OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n"; // Generate the unified function to convert operands into an MCInst. EmitConvertToMCInst(Target, Info.Instructions, OS); @@ -1658,16 +1677,17 @@ void AsmMatcherEmitter::run(raw_ostream &OS) { << "; it != ie; ++it) {\n"; // Emit check that the required features are available. - OS << " if ((AvailableFeatures & it->RequiredFeatures) " - << "!= it->RequiredFeatures)\n"; - OS << " continue;\n"; - + OS << " if ((AvailableFeatures & it->RequiredFeatures) " + << "!= it->RequiredFeatures)\n"; + OS << " continue;\n"; + // Emit check that the subclasses match. for (unsigned i = 0; i != MaxNumOperands; ++i) { OS << " if (!IsSubclass(Classes[" << i << "], it->Classes[" << i << "]))\n"; OS << " continue;\n"; } + OS << "\n"; OS << " ConvertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n"; @@ -1683,5 +1703,5 @@ void AsmMatcherEmitter::run(raw_ostream &OS) { OS << " return true;\n"; OS << "}\n\n"; - OS << "#endif // REGISTERS_ONLY\n"; + OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n"; }