From 069e4348685e5e7a472787fc9950a081633bf928 Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Sun, 23 May 2010 05:42:31 +0000 Subject: [PATCH] VDUP doesn't support vectors with 64-bit elements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104455 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMISelLowering.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 39e75d32c93..21042da1a9a 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -2876,12 +2876,12 @@ static SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) { return SDValue(); // Use VDUP for non-constant splats. - if (usesOnlyOneValue) + unsigned EltSize = VT.getVectorElementType().getSizeInBits(); + if (usesOnlyOneValue && EltSize <= 32) return DAG.getNode(ARMISD::VDUP, dl, VT, Value); // Vectors with 32- or 64-bit elements can be built by directly assigning // the subregisters. - unsigned EltSize = VT.getVectorElementType().getSizeInBits(); if (EltSize >= 32) { // Do the expansion with floating-point types, since that is what the VFP // registers are defined to use, and since i64 is not legal.