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give FP_TO_INT16_IN_MEM and friends a memoperand. They are only

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used with stack slots, but hey, lets be safe.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114521 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2010-09-22 01:05:16 +00:00
parent 40d66052f4
commit 0729093cd7
4 changed files with 29 additions and 22 deletions
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4
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -1169,12 +1169,10 @@ bool X86DAGToDAGISel::SelectAddr(SDNode *Parent, SDValue N, SDValue &Base,
Parent->getOpcode() != ISD::PREFETCH &&
Parent->getOpcode() != ISD::INTRINSIC_W_CHAIN && // unaligned loads, fixme
Parent->getOpcode() != ISD::INTRINSIC_VOID && // nontemporal stores.
Parent->getOpcode() != X86ISD::FNSTCW16m &&
Parent->getOpcode() != X86ISD::FLD &&
Parent->getOpcode() != X86ISD::FILD &&
Parent->getOpcode() != X86ISD::FILD_FLAG &&
Parent->getOpcode() != X86ISD::FP_TO_INT16_IN_MEM &&
Parent->getOpcode() != X86ISD::FP_TO_INT32_IN_MEM &&
Parent->getOpcode() != X86ISD::FP_TO_INT64_IN_MEM &&
Parent->getOpcode() != X86ISD::FST) {
unsigned AddrSpace =
cast<MemSDNode>(Parent)->getPointerInfo().getAddrSpace();

15
lib/Target/X86/X86ISelLowering.cpp
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@ -6599,7 +6599,7 @@ SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op,
std::pair<SDValue,SDValue> X86TargetLowering::
FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned) const {
DebugLoc dl = Op.getDebugLoc();
DebugLoc DL = Op.getDebugLoc();
EVT DstTy = Op.getValueType();
@ -6628,6 +6628,8 @@ FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned) const {
int SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize, false);
SDValue StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
unsigned Opc;
switch (DstTy.getSimpleVT().SimpleTy) {
default: llvm_unreachable("Invalid FP_TO_SINT to lower!");
@ -6640,22 +6642,27 @@ FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG, bool IsSigned) const {
SDValue Value = Op.getOperand(0);
if (isScalarFPTypeInSSEReg(Op.getOperand(0).getValueType())) {
assert(DstTy == MVT::i64 && "Invalid FP_TO_SINT to lower!");
Chain = DAG.getStore(Chain, dl, Value, StackSlot,
Chain = DAG.getStore(Chain, DL, Value, StackSlot,
MachinePointerInfo::getFixedStack(SSFI),
false, false, 0);
SDVTList Tys = DAG.getVTList(Op.getOperand(0).getValueType(), MVT::Other);
SDValue Ops[] = {
Chain, StackSlot, DAG.getValueType(Op.getOperand(0).getValueType())
};
Value = DAG.getNode(X86ISD::FLD, dl, Tys, Ops, 3);
Value = DAG.getNode(X86ISD::FLD, DL, Tys, Ops, 3);
Chain = Value.getValue(1);
SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize, false);
StackSlot = DAG.getFrameIndex(SSFI, getPointerTy());
}
MachineMemOperand *MMO =
MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(SSFI),
MachineMemOperand::MOStore, MemSize, MemSize);
// Build the FP_TO_INT*_IN_MEM
SDValue Ops[] = { Chain, Value, StackSlot };
SDValue FIST = DAG.getNode(Opc, dl, MVT::Other, Ops, 3);
SDValue FIST = DAG.getMemIntrinsicNode(Opc, DL, DAG.getVTList(MVT::Other),
Ops, 3, DstTy, MMO);
return std::make_pair(FIST, StackSlot);
}

23
lib/Target/X86/X86ISelLowering.h
View File

@ -64,16 +64,7 @@ namespace llvm {
/// also produces a flag).
FILD,
FILD_FLAG,
/// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the
/// integer destination in memory and a FP reg source. This corresponds
/// to the X86::FIST*m instructions and the rounding mode change stuff. It
/// has two inputs (token chain and address) and two outputs (int value
/// and token chain).
FP_TO_INT16_IN_MEM,
FP_TO_INT32_IN_MEM,
FP_TO_INT64_IN_MEM,
/// FLD - This instruction implements an extending load to FP stack slots.
/// This corresponds to the X86::FLD32m / X86::FLD64m. It takes a chain
/// operand, ptr to load from, and a ValueType node indicating the type
@ -309,7 +300,17 @@ namespace llvm {
LCMPXCHG8_DAG,
// VZEXT_LOAD - Load, scalar_to_vector, and zero extend.
VZEXT_LOAD
VZEXT_LOAD,
/// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the
/// integer destination in memory and a FP reg source. This corresponds
/// to the X86::FIST*m instructions and the rounding mode change stuff. It
/// has two inputs (token chain and address) and two outputs (int value
/// and token chain).
FP_TO_INT16_IN_MEM,
FP_TO_INT32_IN_MEM,
FP_TO_INT64_IN_MEM
// WARNING: Do not add anything in the end unless you want the node to
// have memop! In fact, starting from ATOMADD64_DAG all opcodes will be

9
lib/Target/X86/X86InstrFPStack.td
View File

@ -40,13 +40,14 @@ def X86fild : SDNode<"X86ISD::FILD", SDTX86Fild,
def X86fildflag : SDNode<"X86ISD::FILD_FLAG", SDTX86Fild,
[SDNPHasChain, SDNPOutFlag, SDNPMayLoad]>;
def X86fp_to_i16mem : SDNode<"X86ISD::FP_TO_INT16_IN_MEM", SDTX86FpToIMem,
[SDNPHasChain, SDNPMayStore]>;
[SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
def X86fp_to_i32mem : SDNode<"X86ISD::FP_TO_INT32_IN_MEM", SDTX86FpToIMem,
[SDNPHasChain, SDNPMayStore]>;
[SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
def X86fp_to_i64mem : SDNode<"X86ISD::FP_TO_INT64_IN_MEM", SDTX86FpToIMem,
[SDNPHasChain, SDNPMayStore]>;
[SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
def X86fp_cwd_get16 : SDNode<"X86ISD::FNSTCW16m", SDTX86CwdStore,
[SDNPHasChain, SDNPMayStore, SDNPSideEffect]>;
[SDNPHasChain, SDNPMayStore, SDNPSideEffect,
SDNPMemOperand]>;
//===----------------------------------------------------------------------===//
// FPStack pattern fragments