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Fix call instruction operands in ARMFastISel.

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The ARM BL and BLX instructions don't have predicate operands, but the
thumb variants tBL and tBLX do.

The argument registers should be added as implicit uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162593 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-08-24 20:52:46 +00:00
parent 9511a460d8
commit 0745b649ed
1 changed files with 16 additions and 34 deletions
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42
lib/Target/ARM/ARMFastISel.cpp
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@ -2212,25 +2212,17 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) {
unsigned CallOpc = ARMSelectCallOp(EnableARMLongCalls); unsigned CallOpc = ARMSelectCallOp(EnableARMLongCalls);
MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
DL, TII.get(CallOpc)); DL, TII.get(CallOpc));
if (isThumb2) { // BL / BLX don't take a predicate, but tBL / tBLX do.
// Explicitly adding the predicate here. if (isThumb2)
AddDefaultPred(MIB); AddDefaultPred(MIB);
if (EnableARMLongCalls) if (EnableARMLongCalls)
MIB.addReg(CalleeReg); MIB.addReg(CalleeReg);
else else
MIB.addExternalSymbol(TLI.getLibcallName(Call)); MIB.addExternalSymbol(TLI.getLibcallName(Call));
} else {
if (EnableARMLongCalls)
MIB.addReg(CalleeReg);
else
MIB.addExternalSymbol(TLI.getLibcallName(Call));
// Explicitly adding the predicate here.
AddDefaultPred(MIB);
}
// Add implicit physical register uses to the call. // Add implicit physical register uses to the call.
for (unsigned i = 0, e = RegArgs.size(); i != e; ++i) for (unsigned i = 0, e = RegArgs.size(); i != e; ++i)
MIB.addReg(RegArgs[i]); MIB.addReg(RegArgs[i], RegState::Implicit);
// Add a register mask with the call-preserved registers. // Add a register mask with the call-preserved registers.
// Proper defs for return values will be added by setPhysRegsDeadExcept(). // Proper defs for return values will be added by setPhysRegsDeadExcept().
@ -2358,30 +2350,20 @@ bool ARMFastISel::SelectCall(const Instruction *I,
unsigned CallOpc = ARMSelectCallOp(UseReg); unsigned CallOpc = ARMSelectCallOp(UseReg);
MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
DL, TII.get(CallOpc)); DL, TII.get(CallOpc));
if(isThumb2) {
// Explicitly adding the predicate here.
AddDefaultPred(MIB);
if (UseReg)
MIB.addReg(CalleeReg);
else if (!IntrMemName)
MIB.addGlobalAddress(GV, 0, 0);
else
MIB.addExternalSymbol(IntrMemName, 0);
} else {
if (UseReg)
MIB.addReg(CalleeReg);
else if (!IntrMemName)
MIB.addGlobalAddress(GV, 0, 0);
else
MIB.addExternalSymbol(IntrMemName, 0);
// Explicitly adding the predicate here. // ARM calls don't take a predicate, but tBL / tBLX do.
if(isThumb2)
AddDefaultPred(MIB); AddDefaultPred(MIB);
} if (UseReg)
MIB.addReg(CalleeReg);
else if (!IntrMemName)
MIB.addGlobalAddress(GV, 0, 0);
else
MIB.addExternalSymbol(IntrMemName, 0);
// Add implicit physical register uses to the call. // Add implicit physical register uses to the call.
for (unsigned i = 0, e = RegArgs.size(); i != e; ++i) for (unsigned i = 0, e = RegArgs.size(); i != e; ++i)
MIB.addReg(RegArgs[i]); MIB.addReg(RegArgs[i], RegState::Implicit);
// Add a register mask with the call-preserved registers. // Add a register mask with the call-preserved registers.
// Proper defs for return values will be added by setPhysRegsDeadExcept(). // Proper defs for return values will be added by setPhysRegsDeadExcept().