From 0780b6303b99441fef04340b7a083006484f4743 Mon Sep 17 00:00:00 2001
From: Jim Grosbach <grosbach@apple.com>
Date: Fri, 19 Aug 2011 23:24:36 +0000
Subject: [PATCH] Thumb parsing and encoding support for NOP.

The irony is not lost that this is not a completely trivial patchset.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138143 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMInstrThumb.td               | 8 +++++++-
 lib/Target/ARM/AsmParser/ARMAsmParser.cpp     | 1 +
 lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp | 7 +++++++
 test/MC/ARM/basic-thumb-instructions.s        | 8 ++++++++
 test/MC/ARM/thumb.s                           | 2 +-
 5 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index 197afeb11fd..a151c0dfaaf 100644
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -237,7 +237,8 @@ class T1SystemEncoding<bits<8> opc>
 }
 
 def tNOP : T1pI<(outs), (ins), NoItinerary, "nop", "", []>,
-           T1SystemEncoding<0x00>; // A8.6.110
+           T1SystemEncoding<0x00>, // A8.6.110
+        Requires<[IsThumb2]>;
 
 def tYIELD : T1pI<(outs), (ins), NoItinerary, "yield", "", []>,
            T1SystemEncoding<0x10>; // A8.6.410
@@ -1382,3 +1383,8 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
                   2, IIC_Br, [(brind GPR:$Rm)],
                   (tMOVr PC, GPR:$Rm, pred:$p)>;
 }
+
+
+// In Thumb1, "nop" is encoded as a "mov r8, r8". Technically, the bf00
+// encoding is available on ARMv6K, but we don't differentiate that finely.
+def : InstAlias<"nop", (tMOVr R8, R8, 14, 0)>,Requires<[IsThumb, IsThumb1Only]>;
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 6a14387640e..3e768f25317 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -2846,6 +2846,7 @@ getMnemonicAcceptInfo(StringRef Mnemonic, bool &CanAcceptCarrySet,
       Mnemonic == "trap" || Mnemonic == "mrc2" || Mnemonic == "mrrc2" ||
       Mnemonic == "dsb" || Mnemonic == "isb" || Mnemonic == "clrex" ||
       Mnemonic == "setend" ||
+      (Mnemonic == "nop" && isThumbOne()) ||
       ((Mnemonic == "pld" || Mnemonic == "pli") && !isThumb()) ||
       ((Mnemonic.startswith("rfe") || Mnemonic.startswith("srs"))
         && !isThumb()) ||
diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
index 1999ee7a6f5..153f68d62c8 100644
--- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
+++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
@@ -169,6 +169,13 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) {
     return;
   }
 
+  // Thumb1 NOP
+  if (Opcode == ARM::tMOVr && MI->getOperand(0).getReg() == ARM::R8 &&
+      MI->getOperand(1).getReg() == ARM::R8) {
+    O << "\tnop";
+    return;
+  }
+
   printInstruction(MI, O);
 }
 
diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s
index 5e45c3c7dc2..13d19649366 100644
--- a/test/MC/ARM/basic-thumb-instructions.s
+++ b/test/MC/ARM/basic-thumb-instructions.s
@@ -347,3 +347,11 @@ _func:
         negs r3, r4
 
 @ CHECK: rsbs	r3, r4, #0              @ encoding: [0x63,0x42]
+
+
+@------------------------------------------------------------------------------
+@ NOP
+@------------------------------------------------------------------------------
+        nop
+
+@ CHECK: nop                            @ encoding: [0xc0,0x46]
diff --git a/test/MC/ARM/thumb.s b/test/MC/ARM/thumb.s
index 497d45d827a..625882c737f 100644
--- a/test/MC/ARM/thumb.s
+++ b/test/MC/ARM/thumb.s
@@ -42,7 +42,7 @@
 @ CHECK: bkpt  #2                       @ encoding: [0x02,0xbe]
 
         nop
-@ CHECK: nop @ encoding: [0x00,0xbf]
+@ CHECK: nop @ encoding: [0xc0,0x46]
 
         wfe
         wfi