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Make code a little less verbose.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148651 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5052,11 +5052,10 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
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if (ISD::isBuildVectorAllZeros(Op.getNode())) {
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// Canonicalize this to <4 x i32> to 1) ensure the zero vectors are CSE'd
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// and 2) ensure that i64 scalars are eliminated on x86-32 hosts.
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if (Op.getValueType() == MVT::v4i32 ||
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Op.getValueType() == MVT::v8i32)
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if (VT == MVT::v4i32 || VT == MVT::v8i32)
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return Op;
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return getZeroVector(Op.getValueType(), Subtarget->hasSSE2(),
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return getZeroVector(VT, Subtarget->hasSSE2(),
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Subtarget->hasAVX2(), DAG, dl);
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}
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@ -5064,11 +5063,10 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
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// vectors or broken into v4i32 operations on 256-bit vectors. AVX2 can use
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// vpcmpeqd on 256-bit vectors.
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if (ISD::isBuildVectorAllOnes(Op.getNode())) {
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if (Op.getValueType() == MVT::v4i32 ||
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(Op.getValueType() == MVT::v8i32 && Subtarget->hasAVX2()))
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if (VT == MVT::v4i32 || (VT == MVT::v8i32 && Subtarget->hasAVX2()))
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return Op;
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return getOnesVector(Op.getValueType(), Subtarget->hasAVX2(), DAG, dl);
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return getOnesVector(VT, Subtarget->hasAVX2(), DAG, dl);
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}
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SDValue LD = isVectorBroadcast(Op, Subtarget);
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@ -5137,7 +5135,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
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DAG.getUNDEF(Item.getValueType()),
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&Mask[0]);
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}
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return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Item);
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return DAG.getNode(ISD::BITCAST, dl, VT, Item);
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}
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}
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