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Add codegen and encoding support for the immediate form of vbic.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118291 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Owen Anderson
2010-11-05 19:27:46 +00:00
parent a55661b6bd
commit 080c092297
5 changed files with 102 additions and 6 deletions
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20
test/CodeGen/ARM/vbits.ll
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@@ -525,3 +525,23 @@ define <16 x i8> @v_orrimmQ(<16 x i8>* %A) nounwind {
%tmp3 = or <16 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 1>
ret <16 x i8> %tmp3
}
define <8 x i8> @v_bicimm(<8 x i8>* %A) nounwind {
; CHECK: v_bicimm:
; CHECK-NOT: vmov
; CHECK-NOT vmvn
; CHECK: vbic
%tmp1 = load <8 x i8>* %A
%tmp3 = and <8 x i8> %tmp1, < i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0 >
ret <8 x i8> %tmp3
}
define <16 x i8> @v_bicimmQ(<16 x i8>* %A) nounwind {
; CHECK: v_bicimmQ:
; CHECK-NOT: vmov
; CHECK-NOT: vmvn
; CHECK: vbic
%tmp1 = load <16 x i8>* %A
%tmp3 = and <16 x i8> %tmp1, < i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0, i8 -1, i8 -1, i8 -1, i8 0 >
ret <16 x i8> %tmp3
}