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	Fix up some comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100849 91177308-0d34-0410-b5e6-96231b3b80d8
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		| @@ -411,10 +411,9 @@ void MachineInstr::addImplicitDefUseOperands() { | |||||||
|       addOperand(MachineOperand::CreateReg(*ImpUses, false, true)); |       addOperand(MachineOperand::CreateReg(*ImpUses, false, true)); | ||||||
| } | } | ||||||
|  |  | ||||||
| /// MachineInstr ctor - This constructor create a MachineInstr and add the | /// MachineInstr ctor - This constructor creates a MachineInstr and adds the | ||||||
| /// implicit operands. It reserves space for number of operands specified by | /// implicit operands. It reserves space for the number of operands specified by | ||||||
| /// TargetInstrDesc or the numOperands if it is not zero. (for | /// the TargetInstrDesc. | ||||||
| /// instructions with variable number of operands). |  | ||||||
| MachineInstr::MachineInstr(const TargetInstrDesc &tid, bool NoImp) | MachineInstr::MachineInstr(const TargetInstrDesc &tid, bool NoImp) | ||||||
|   : TID(&tid), NumImplicitOps(0), AsmPrinterFlags(0), |   : TID(&tid), NumImplicitOps(0), AsmPrinterFlags(0), | ||||||
|     MemRefs(0), MemRefsEnd(0), Parent(0) { |     MemRefs(0), MemRefsEnd(0), Parent(0) { | ||||||
| @@ -452,7 +451,6 @@ MachineInstr::MachineInstr(const TargetInstrDesc &tid, const DebugLoc dl, | |||||||
| /// MachineInstr ctor - Work exactly the same as the ctor two above, except | /// MachineInstr ctor - Work exactly the same as the ctor two above, except | ||||||
| /// that the MachineInstr is created and added to the end of the specified  | /// that the MachineInstr is created and added to the end of the specified  | ||||||
| /// basic block. | /// basic block. | ||||||
| /// |  | ||||||
| MachineInstr::MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &tid) | MachineInstr::MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &tid) | ||||||
|   : TID(&tid), NumImplicitOps(0), AsmPrinterFlags(0), |   : TID(&tid), NumImplicitOps(0), AsmPrinterFlags(0), | ||||||
|     MemRefs(0), MemRefsEnd(0), Parent(0) { |     MemRefs(0), MemRefsEnd(0), Parent(0) { | ||||||
|   | |||||||
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