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Merging r229226:

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r229226 | Matthew.Arsenault | 2015-02-13 21:55:56 -0500 (Fri, 13 Feb 2015) | 5 lines

R600/SI: Fix copies from SGPR to VCC

This shows up without optimizations when vcc is required
to be used.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_36@235623 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard committed 2015-04-23 19:14:42 +00:00
1 parent 0f26277b54
commit 08c90de1f3
1 file changed
+10 -5
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lib/Target/R600/SIInstrInfo.cpp
+10 -5
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@@ -334,12 +334,17 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
} else if (AMDGPU::SReg_64RegClass.contains(DestReg)) {
if (DestReg == AMDGPU::VCC) {
// FIXME: Hack until VReg_1 removed.
if (AMDGPU::SReg_64RegClass.contains(SrcReg)) {
BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), AMDGPU::VCC)
.addReg(SrcReg, getKillRegState(KillSrc));
} else {
// FIXME: Hack until VReg_1 removed.
assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC)
.addImm(0)
.addReg(SrcReg, getKillRegState(KillSrc));
}
assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
BuildMI(MBB, MI, DL, get(AMDGPU::V_CMP_NE_I32_e32), AMDGPU::VCC)
.addImm(0)
.addReg(SrcReg, getKillRegState(KillSrc));
return;
}