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[Sparc] Add support for decoding 'swap' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203424 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -211,6 +211,8 @@ static DecodeStatus DecodeJMPL(MCInst &Inst, unsigned insn, uint64_t Address,
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const void *Decoder);
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static DecodeStatus DecodeReturn(MCInst &MI, unsigned insn, uint64_t Address,
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const void *Decoder);
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static DecodeStatus DecodeSWAP(MCInst &Inst, unsigned insn, uint64_t Address,
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const void *Decoder);
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#include "SparcGenDisassemblerTables.inc"
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@ -445,3 +447,37 @@ static DecodeStatus DecodeReturn(MCInst &MI, unsigned insn, uint64_t Address,
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}
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeSWAP(MCInst &MI, unsigned insn, uint64_t Address,
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const void *Decoder) {
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unsigned rd = fieldFromInstruction(insn, 25, 5);
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unsigned rs1 = fieldFromInstruction(insn, 14, 5);
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unsigned isImm = fieldFromInstruction(insn, 13, 1);
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unsigned rs2 = 0;
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unsigned simm13 = 0;
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if (isImm)
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simm13 = SignExtend32<13>(fieldFromInstruction(insn, 0, 13));
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else
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rs2 = fieldFromInstruction(insn, 0, 5);
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// Decode RD.
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DecodeStatus status = DecodeIntRegsRegisterClass(MI, rd, Address, Decoder);
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if (status != MCDisassembler::Success)
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return status;
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// Decode RS1.
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status = DecodeIntRegsRegisterClass(MI, rs1, Address, Decoder);
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if (status != MCDisassembler::Success)
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return status;
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// Decode RS1 | SIMM13.
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if (isImm)
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MI.addOperand(MCOperand::CreateImm(simm13));
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else {
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status = DecodeIntRegsRegisterClass(MI, rs2, Address, Decoder);
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if (status != MCDisassembler::Success)
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return status;
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}
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return MCDisassembler::Success;
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}
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@ -1107,7 +1107,7 @@ let Predicates = [HasV9], hasSideEffects = 1, rd = 0, rs1 = 0b01111 in
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def MEMBARi : F3_2<2, 0b101000, (outs), (ins simm13Op:$simm13),
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"membar $simm13", []>;
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let Constraints = "$val = $dst" in {
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let Constraints = "$val = $dst", DecoderMethod = "DecodeSWAP" in {
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def SWAPrr : F3_1<3, 0b001111,
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(outs IntRegs:$dst), (ins MEMrr:$addr, IntRegs:$val),
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"swap [$addr], $dst",
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@ -152,3 +152,12 @@
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# CHECK: stx %o2, [%g1]
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0xd4 0x70 0x60 0x00
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# CHECK: swap [%i0+%l6], %o2
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0xd4 0x7e 0x00 0x16
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# CHECK: swap [%i0+32], %o2
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0xd4 0x7e 0x20 0x20
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# CHECK: swap [%g1], %o2
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0xd4 0x78 0x60 0x00
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