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[AVX512] Pull pattern for subvector extract into the instruction definition
No functional change. I initially thought that pulling the Pat<> into the instruction pattern was not possible because it was doing a transform on the index in order to convert it from a per-element (extract_subvector) index into a per-chunk (vextract*x4) index. Turns out this also works inside the pattern because the vextract_extract PatFrag has an OperandTransform EXTRACT_get_vextract{128,256}_imm, so the index in $idx goes through the same conversion. The existing test CodeGen/X86/avx512-insert-extract.ll extended in the previous commit provides coverage for this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218480 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -422,10 +422,12 @@ multiclass vextract_for_size<int Opcode,
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SDNodeXForm EXTRACT_get_vextract_imm> {
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let hasSideEffects = 0, ExeDomain = To.ExeDomain in {
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def rr : AVX512AIi8<Opcode, MRMDestReg, (outs To.RC:$dst),
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(ins VR512:$src1, i8imm:$src2),
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"vextract" # To.EltTypeName # "x4\t{$src2, $src1, $dst|"
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"$dst, $src1, $src2}",
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[]>, EVEX, EVEX_V512;
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(ins VR512:$src1, i8imm:$idx),
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"vextract" # To.EltTypeName # "x4\t{$idx, $src1, $dst|"
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"$dst, $src1, $idx}",
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[(set To.RC:$dst, (vextract_extract:$idx (From.VT VR512:$src1),
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(iPTR imm)))]>,
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EVEX, EVEX_V512;
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let mayStore = 1 in
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def rm : AVX512AIi8<Opcode, MRMDestMem, (outs),
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(ins To.MemOp:$dst, VR512:$src1, i8imm:$src2),
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@ -434,11 +436,6 @@ multiclass vextract_for_size<int Opcode,
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[]>, EVEX, EVEX_V512, EVEX_CD8<To.EltSize, CD8VT4>;
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}
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// Codegen pattern, e.g. v16i32 -> v4i32 for vextracti32x4
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def : Pat<(vextract_extract:$ext (From.VT VR512:$src1), (iPTR imm)),
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(To.VT (!cast<Instruction>(NAME # To.EltSize # "x4rr") VR512:$src1,
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(EXTRACT_get_vextract_imm To.RC:$ext)))>;
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// Codegen pattern with the alternative types, e.g. v8i64 -> v2i64 for
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// vextracti32x4
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def : Pat<(vextract_extract:$ext (AltFrom.VT VR512:$src1), (iPTR imm)),
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