From 0908bcbf4483d1245f2156624268cf0922e874c9 Mon Sep 17 00:00:00 2001
From: Chad Rosier <mcrosier@apple.com>
Date: Tue, 26 Feb 2013 20:22:30 +0000
Subject: [PATCH] Add a test case for r176066.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176119 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/CodeGen/X86/fast-isel-args-fail.ll | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 test/CodeGen/X86/fast-isel-args-fail.ll

diff --git a/test/CodeGen/X86/fast-isel-args-fail.ll b/test/CodeGen/X86/fast-isel-args-fail.ll
new file mode 100644
index 00000000000..4995baa3e5a
--- /dev/null
+++ b/test/CodeGen/X86/fast-isel-args-fail.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-apple-darwin10
+; Requires: Asserts
+
+; Previously, this would cause an assert.
+define i31 @t1(i31 %a, i31 %b, i31 %c) {
+entry:
+  %add = add nsw i31 %b, %a
+  %add1 = add nsw i31 %add, %c
+  ret i31 %add1
+}